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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
4 */
5
6#include "dra71x.dtsi"
7#include "dra7-mmc-iodelay.dtsi"
8#include "dra72x-mmc-iodelay.dtsi"
9#include <dt-bindings/net/ti-dp83867.h>
10
11/ {
12 compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7";
13 model = "TI DRA718 EVM";
14
15 memory {
16 device_type = "memory";
17 reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */
18 };
19
20 vpo_sd_1v8_3v3: gpio-regulator-TPS74801 {
21 compatible = "regulator-gpio";
22
23 regulator-name = "vddshv8";
24 regulator-min-microvolt = <1800000>;
25 regulator-max-microvolt = <3300000>;
26 regulator-boot-on;
27 vin-supply = <&evm_5v0>;
28
29 gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
30 states = <1800000 0x0
31 3300000 0x1>;
32 };
33
34 evm_1v8_sw: fixedregulator-evm_1v8 {
35 compatible = "regulator-fixed";
36 regulator-name = "evm_1v8";
37 regulator-min-microvolt = <1800000>;
38 regulator-max-microvolt = <1800000>;
39 vin-supply = <&lp8732_buck0_reg>;
40 regulator-always-on;
41 regulator-boot-on;
42 };
43
44 poweroff: gpio-poweroff {
45 compatible = "gpio-poweroff";
46 gpios = <&gpio7 30 GPIO_ACTIVE_HIGH>;
47 input;
48 };
49};
50
51&i2c1 {
52 status = "okay";
53 clock-frequency = <400000>;
54
55 lp8733: lp8733@60 {
56 compatible = "ti,lp8733";
57 reg = <0x60>;
58
59 buck0-in-supply =<&vsys_3v3>;
60 buck1-in-supply =<&vsys_3v3>;
61 ldo0-in-supply =<&evm_5v0>;
62 ldo1-in-supply =<&evm_5v0>;
63
64 lp8733_regulators: regulators {
65 lp8733_buck0_reg: buck0 {
66 /* FB_B0 -> LP8733-BUCK1 - VPO_S1_AVS - VDD_CORE_AVS (core, mpu, gpu) */
67 regulator-name = "lp8733-buck0";
68 regulator-min-microvolt = <850000>;
69 regulator-max-microvolt = <1250000>;
70 regulator-always-on;
71 regulator-boot-on;
72 };
73
74 lp8733_buck1_reg: buck1 {
75 /* FB_B1 -> LP8733-BUCK2 - VPO_S2_AVS - VDD_DSP_AVS (DSP/eve/iva) */
76 regulator-name = "lp8733-buck1";
77 regulator-min-microvolt = <850000>;
78 regulator-max-microvolt = <1250000>;
79 regulator-boot-on;
80 regulator-always-on;
81 };
82
83 lp8733_ldo0_reg: ldo0 {
84 /* LDO0 -> LP8733-LDO1 - VPO_L1_3V3 - VDDSHV8 (optional) */
85 regulator-name = "lp8733-ldo0";
86 regulator-min-microvolt = <3300000>;
87 regulator-max-microvolt = <3300000>;
88 };
89
90 lp8733_ldo1_reg: ldo1 {
91 /* LDO1 -> LP8733-LDO2 - VPO_L2_3V3 - VDDA_USB3V3 */
92 regulator-name = "lp8733-ldo1";
93 regulator-min-microvolt = <3300000>;
94 regulator-max-microvolt = <3300000>;
95 regulator-always-on;
96 regulator-boot-on;
97 };
98 };
99 };
100
101 lp8732: lp8732@61 {
102 compatible = "ti,lp8732";
103 reg = <0x61>;
104
105 buck0-in-supply =<&vsys_3v3>;
106 buck1-in-supply =<&vsys_3v3>;
107 ldo0-in-supply =<&vsys_3v3>;
108 ldo1-in-supply =<&vsys_3v3>;
109
110 lp8732_regulators: regulators {
111 lp8732_buck0_reg: buck0 {
112 /* FB_B0 -> LP8732-BUCK1 - VPO_S3_1V8 - VDDS_1V8 */
113 regulator-name = "lp8732-buck0";
114 regulator-min-microvolt = <1800000>;
115 regulator-max-microvolt = <1800000>;
116 regulator-always-on;
117 regulator-boot-on;
118 };
119
120 lp8732_buck1_reg: buck1 {
121 /* FB_B1 -> LP8732-BUCK2 - VPO_S4_DDR - VDD_DDR_1V35 */
122 regulator-name = "lp8732-buck1";
123 regulator-min-microvolt = <1350000>;
124 regulator-max-microvolt = <1350000>;
125 regulator-boot-on;
126 regulator-always-on;
127 };
128
129 lp8732_ldo0_reg: ldo0 {
130 /* LDO0 -> LP8732-LDO1 - VPO_L3_1V8 - VDA_1V8_PLL */
131 regulator-name = "lp8732-ldo0";
132 regulator-min-microvolt = <1800000>;
133 regulator-max-microvolt = <1800000>;
134 regulator-boot-on;
135 regulator-always-on;
136 };
137
138 lp8732_ldo1_reg: ldo1 {
139 /* LDO1 -> LP8732-LDO2 - VPO_L4_1V8 - VDA_1V8_PHY */
140 regulator-name = "lp8732-ldo1";
141 regulator-min-microvolt = <1800000>;
142 regulator-max-microvolt = <1800000>;
143 regulator-always-on;
144 regulator-boot-on;
145 };
146 };
147 };
148};
149
150&pcf_lcd {
151 interrupt-parent = <&gpio7>;
152 interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
153};
154
155&pcf_gpio_21 {
156 interrupt-parent = <&gpio7>;
157 interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
158};
159
160&pcf_hdmi {
161 p0 {
162 /*
163 * PM_OEn to High: Disable routing I2C3 to PM_I2C
164 * With this PM_SEL(p3) should not matter
165 */
166 gpio-hog;
167 gpios = <0 GPIO_ACTIVE_LOW>;
168 output-high;
169 line-name = "pm_oe_n";
170 };
171};
172
173&mmc1 {
174 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
175 pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
176 pinctrl-1 = <&mmc1_pins_hs>;
177 pinctrl-2 = <&mmc1_pins_sdr12>;
178 pinctrl-3 = <&mmc1_pins_sdr25>;
179 pinctrl-4 = <&mmc1_pins_sdr50>;
180 pinctrl-5 = <&mmc1_pins_ddr50_rev20 &mmc1_iodelay_ddr50_conf>;
181 pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>;
182 vqmmc-supply = <&vpo_sd_1v8_3v3>;
183};
184
185&mmc2 {
186 pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v";
187 pinctrl-0 = <&mmc2_pins_default>;
188 pinctrl-1 = <&mmc2_pins_hs>;
189 pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>;
190 pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev20_conf>;
191 vmmc-supply = <&evm_1v8_sw>;
192 vqmmc-supply = <&evm_1v8_sw>;
193};
194
195&mac {
196 mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>,
197 <&pcf_hdmi 9 GPIO_ACTIVE_LOW>, /* P11 */
198 <&pcf_hdmi 10 GPIO_ACTIVE_LOW>; /* P12 */
199 dual_emac;
200};
201
202&cpsw_emac0 {
203 phy-handle = <&dp83867_0>;
204 phy-mode = "rgmii-id";
205 dual_emac_res_vlan = <1>;
206};
207
208&cpsw_emac1 {
209 phy-handle = <&dp83867_1>;
210 phy-mode = "rgmii-id";
211 dual_emac_res_vlan = <2>;
212};
213
214&davinci_mdio {
215 dp83867_0: ethernet-phy@2 {
216 reg = <2>;
217 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
218 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
219 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
220 ti,min-output-impedance;
221 ti,dp83867-rxctrl-strap-quirk;
222 };
223
224 dp83867_1: ethernet-phy@3 {
225 reg = <3>;
226 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
227 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
228 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
229 ti,min-output-impedance;
230 ti,dp83867-rxctrl-strap-quirk;
231 };
232};
233
234/* No Sata on this device */
235&sata_phy {
236 status = "disabled";
237};
238
239&sata {
240 status = "disabled";
241};
242
243/* No RTC on this device */
244&rtc {
245 status = "disabled";
246};
247
248&usb2_phy1 {
249 phy-supply = <&lp8733_ldo1_reg>;
250};
251
252&usb2_phy2 {
253 phy-supply = <&lp8733_ldo1_reg>;
254};
255
256&dss {
257 /* Supplied by VDA_1V8_PLL */
258 vdda_video-supply = <&lp8732_ldo0_reg>;
259};
260
261&hdmi {
262 /* Supplied by VDA_1V8_PHY */
263 vdda_video-supply = <&lp8732_ldo1_reg>;
264};
265
266&extcon_usb1 {
267 vbus-gpio = <&pcf_lcd 14 GPIO_ACTIVE_HIGH>;
268};
269
270&extcon_usb2 {
271 vbus-gpio = <&pcf_lcd 15 GPIO_ACTIVE_HIGH>;
272};
1/*
2 * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include "dra72-evm-common.dtsi"
10#include "dra72x-mmc-iodelay.dtsi"
11#include <dt-bindings/net/ti-dp83867.h>
12
13/ {
14 compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7";
15 model = "TI DRA718 EVM";
16
17 memory {
18 device_type = "memory";
19 reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */
20 };
21
22 vpo_sd_1v8_3v3: gpio-regulator-TPS74801 {
23 compatible = "regulator-gpio";
24
25 regulator-name = "vddshv8";
26 regulator-min-microvolt = <1800000>;
27 regulator-max-microvolt = <3300000>;
28 regulator-boot-on;
29 vin-supply = <&evm_5v0>;
30
31 gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
32 states = <1800000 0x0
33 3300000 0x1>;
34 };
35
36 evm_1v8_sw: fixedregulator-evm_1v8 {
37 compatible = "regulator-fixed";
38 regulator-name = "evm_1v8";
39 regulator-min-microvolt = <1800000>;
40 regulator-max-microvolt = <1800000>;
41 vin-supply = <&lp8732_buck0_reg>;
42 regulator-always-on;
43 regulator-boot-on;
44 };
45
46 poweroff: gpio-poweroff {
47 compatible = "gpio-poweroff";
48 gpios = <&gpio7 30 GPIO_ACTIVE_HIGH>;
49 input;
50 };
51};
52
53&dra7_pmx_core {
54 mmc1_pins_default: mmc1_pins_default {
55 pinctrl-single,pins = <
56 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mmc1_clk.clk */
57 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
58 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
59 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
60 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
61 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
62 >;
63 };
64};
65
66&i2c1 {
67 status = "okay";
68 clock-frequency = <400000>;
69
70 lp8733: lp8733@60 {
71 compatible = "ti,lp8733";
72 reg = <0x60>;
73
74 buck0-in-supply =<&vsys_3v3>;
75 buck1-in-supply =<&vsys_3v3>;
76 ldo0-in-supply =<&evm_5v0>;
77 ldo1-in-supply =<&evm_5v0>;
78
79 lp8733_regulators: regulators {
80 lp8733_buck0_reg: buck0 {
81 /* FB_B0 -> LP8733-BUCK1 - VPO_S1_AVS - VDD_CORE_AVS (core, mpu, gpu) */
82 regulator-name = "lp8733-buck0";
83 regulator-min-microvolt = <850000>;
84 regulator-max-microvolt = <1250000>;
85 regulator-always-on;
86 regulator-boot-on;
87 };
88
89 lp8733_buck1_reg: buck1 {
90 /* FB_B1 -> LP8733-BUCK2 - VPO_S2_AVS - VDD_DSP_AVS (DSP/eve/iva) */
91 regulator-name = "lp8733-buck1";
92 regulator-min-microvolt = <850000>;
93 regulator-max-microvolt = <1250000>;
94 regulator-boot-on;
95 regulator-always-on;
96 };
97
98 lp8733_ldo0_reg: ldo0 {
99 /* LDO0 -> LP8733-LDO1 - VPO_L1_3V3 - VDDSHV8 (optional) */
100 regulator-name = "lp8733-ldo0";
101 regulator-min-microvolt = <3300000>;
102 regulator-max-microvolt = <3300000>;
103 };
104
105 lp8733_ldo1_reg: ldo1 {
106 /* LDO1 -> LP8733-LDO2 - VPO_L2_3V3 - VDDA_USB3V3 */
107 regulator-name = "lp8733-ldo1";
108 regulator-min-microvolt = <3300000>;
109 regulator-max-microvolt = <3300000>;
110 regulator-always-on;
111 regulator-boot-on;
112 };
113 };
114 };
115
116 lp8732: lp8732@61 {
117 compatible = "ti,lp8732";
118 reg = <0x61>;
119
120 buck0-in-supply =<&vsys_3v3>;
121 buck1-in-supply =<&vsys_3v3>;
122 ldo0-in-supply =<&vsys_3v3>;
123 ldo1-in-supply =<&vsys_3v3>;
124
125 lp8732_regulators: regulators {
126 lp8732_buck0_reg: buck0 {
127 /* FB_B0 -> LP8732-BUCK1 - VPO_S3_1V8 - VDDS_1V8 */
128 regulator-name = "lp8732-buck0";
129 regulator-min-microvolt = <1800000>;
130 regulator-max-microvolt = <1800000>;
131 regulator-always-on;
132 regulator-boot-on;
133 };
134
135 lp8732_buck1_reg: buck1 {
136 /* FB_B1 -> LP8732-BUCK2 - VPO_S4_DDR - VDD_DDR_1V35 */
137 regulator-name = "lp8732-buck1";
138 regulator-min-microvolt = <1350000>;
139 regulator-max-microvolt = <1350000>;
140 regulator-boot-on;
141 regulator-always-on;
142 };
143
144 lp8732_ldo0_reg: ldo0 {
145 /* LDO0 -> LP8732-LDO1 - VPO_L3_1V8 - VDA_1V8_PLL */
146 regulator-name = "lp8732-ldo0";
147 regulator-min-microvolt = <1800000>;
148 regulator-max-microvolt = <1800000>;
149 regulator-boot-on;
150 regulator-always-on;
151 };
152
153 lp8732_ldo1_reg: ldo1 {
154 /* LDO1 -> LP8732-LDO2 - VPO_L4_1V8 - VDA_1V8_PHY */
155 regulator-name = "lp8732-ldo1";
156 regulator-min-microvolt = <1800000>;
157 regulator-max-microvolt = <1800000>;
158 regulator-always-on;
159 regulator-boot-on;
160 };
161 };
162 };
163};
164
165&pcf_lcd {
166 interrupt-parent = <&gpio7>;
167 interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
168};
169
170&pcf_gpio_21 {
171 interrupt-parent = <&gpio7>;
172 interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
173};
174
175&pcf_hdmi {
176 p0 {
177 /*
178 * PM_OEn to High: Disable routing I2C3 to PM_I2C
179 * With this PM_SEL(p3) should not matter
180 */
181 gpio-hog;
182 gpios = <0 GPIO_ACTIVE_LOW>;
183 output-high;
184 line-name = "pm_oe_n";
185 };
186};
187
188&mmc1 {
189 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
190 pinctrl-0 = <&mmc1_pins_default>;
191 pinctrl-1 = <&mmc1_pins_hs>;
192 pinctrl-2 = <&mmc1_pins_sdr12>;
193 pinctrl-3 = <&mmc1_pins_sdr25>;
194 pinctrl-4 = <&mmc1_pins_sdr50>;
195 pinctrl-5 = <&mmc1_pins_ddr50_rev20 &mmc1_iodelay_ddr50_conf>;
196 pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>;
197 vqmmc-supply = <&vpo_sd_1v8_3v3>;
198};
199
200&mmc2 {
201 pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v";
202 pinctrl-0 = <&mmc2_pins_default>;
203 pinctrl-1 = <&mmc2_pins_hs>;
204 pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>;
205 pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev20_conf>;
206 vmmc-supply = <&evm_1v8_sw>;
207};
208
209&mac {
210 mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>,
211 <&pcf_hdmi 9 GPIO_ACTIVE_LOW>, /* P11 */
212 <&pcf_hdmi 10 GPIO_ACTIVE_LOW>; /* P12 */
213 dual_emac;
214};
215
216&cpsw_emac0 {
217 phy_id = <&davinci_mdio>, <2>;
218 phy-mode = "rgmii-id";
219 dual_emac_res_vlan = <1>;
220};
221
222&cpsw_emac1 {
223 phy_id = <&davinci_mdio>, <3>;
224 phy-mode = "rgmii-id";
225 dual_emac_res_vlan = <2>;
226};
227
228&davinci_mdio {
229 dp83867_0: ethernet-phy@2 {
230 reg = <2>;
231 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
232 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
233 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
234 ti,min-output-impedance;
235 ti,dp83867-rxctrl-strap-quirk;
236 };
237
238 dp83867_1: ethernet-phy@3 {
239 reg = <3>;
240 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
241 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
242 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
243 ti,min-output-impedance;
244 ti,dp83867-rxctrl-strap-quirk;
245 };
246};
247
248/* No Sata on this device */
249&sata_phy {
250 status = "disabled";
251};
252
253&sata {
254 status = "disabled";
255};
256
257/* No RTC on this device */
258&rtc {
259 status = "disabled";
260};
261
262&usb2_phy1 {
263 phy-supply = <&lp8733_ldo1_reg>;
264};
265
266&usb2_phy2 {
267 phy-supply = <&lp8733_ldo1_reg>;
268};
269
270&dss {
271 /* Supplied by VDA_1V8_PLL */
272 vdda_video-supply = <&lp8732_ldo0_reg>;
273};
274
275&hdmi {
276 /* Supplied by VDA_1V8_PHY */
277 vdda_video-supply = <&lp8732_ldo1_reg>;
278};