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1/*
2 * Copyright (C) 2015 Red Hat, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 */
25
26#include <drm/drm_atomic_helper.h>
27#include <drm/drm_fourcc.h>
28#include <drm/drm_plane_helper.h>
29
30#include "virtgpu_drv.h"
31
32static const uint32_t virtio_gpu_formats[] = {
33 DRM_FORMAT_HOST_XRGB8888,
34};
35
36static const uint32_t virtio_gpu_cursor_formats[] = {
37 DRM_FORMAT_HOST_ARGB8888,
38};
39
40uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc)
41{
42 uint32_t format;
43
44 switch (drm_fourcc) {
45 case DRM_FORMAT_XRGB8888:
46 format = VIRTIO_GPU_FORMAT_B8G8R8X8_UNORM;
47 break;
48 case DRM_FORMAT_ARGB8888:
49 format = VIRTIO_GPU_FORMAT_B8G8R8A8_UNORM;
50 break;
51 case DRM_FORMAT_BGRX8888:
52 format = VIRTIO_GPU_FORMAT_X8R8G8B8_UNORM;
53 break;
54 case DRM_FORMAT_BGRA8888:
55 format = VIRTIO_GPU_FORMAT_A8R8G8B8_UNORM;
56 break;
57 default:
58 /*
59 * This should not happen, we handle everything listed
60 * in virtio_gpu_formats[].
61 */
62 format = 0;
63 break;
64 }
65 WARN_ON(format == 0);
66 return format;
67}
68
69static void virtio_gpu_plane_destroy(struct drm_plane *plane)
70{
71 drm_plane_cleanup(plane);
72 kfree(plane);
73}
74
75static const struct drm_plane_funcs virtio_gpu_plane_funcs = {
76 .update_plane = drm_atomic_helper_update_plane,
77 .disable_plane = drm_atomic_helper_disable_plane,
78 .destroy = virtio_gpu_plane_destroy,
79 .reset = drm_atomic_helper_plane_reset,
80 .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
81 .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
82};
83
84static int virtio_gpu_plane_atomic_check(struct drm_plane *plane,
85 struct drm_plane_state *state)
86{
87 return 0;
88}
89
90static void virtio_gpu_primary_plane_update(struct drm_plane *plane,
91 struct drm_plane_state *old_state)
92{
93 struct drm_device *dev = plane->dev;
94 struct virtio_gpu_device *vgdev = dev->dev_private;
95 struct virtio_gpu_output *output = NULL;
96 struct virtio_gpu_framebuffer *vgfb;
97 struct virtio_gpu_object *bo;
98 uint32_t handle;
99
100 if (plane->state->crtc)
101 output = drm_crtc_to_virtio_gpu_output(plane->state->crtc);
102 if (old_state->crtc)
103 output = drm_crtc_to_virtio_gpu_output(old_state->crtc);
104 if (WARN_ON(!output))
105 return;
106
107 if (plane->state->fb && output->enabled) {
108 vgfb = to_virtio_gpu_framebuffer(plane->state->fb);
109 bo = gem_to_virtio_gpu_obj(vgfb->base.obj[0]);
110 handle = bo->hw_res_handle;
111 if (bo->dumb) {
112 virtio_gpu_cmd_transfer_to_host_2d
113 (vgdev, bo, 0,
114 cpu_to_le32(plane->state->src_w >> 16),
115 cpu_to_le32(plane->state->src_h >> 16),
116 cpu_to_le32(plane->state->src_x >> 16),
117 cpu_to_le32(plane->state->src_y >> 16), NULL);
118 }
119 } else {
120 handle = 0;
121 }
122
123 DRM_DEBUG("handle 0x%x, crtc %dx%d+%d+%d, src %dx%d+%d+%d\n", handle,
124 plane->state->crtc_w, plane->state->crtc_h,
125 plane->state->crtc_x, plane->state->crtc_y,
126 plane->state->src_w >> 16,
127 plane->state->src_h >> 16,
128 plane->state->src_x >> 16,
129 plane->state->src_y >> 16);
130 virtio_gpu_cmd_set_scanout(vgdev, output->index, handle,
131 plane->state->src_w >> 16,
132 plane->state->src_h >> 16,
133 plane->state->src_x >> 16,
134 plane->state->src_y >> 16);
135 if (handle)
136 virtio_gpu_cmd_resource_flush(vgdev, handle,
137 plane->state->src_x >> 16,
138 plane->state->src_y >> 16,
139 plane->state->src_w >> 16,
140 plane->state->src_h >> 16);
141}
142
143static int virtio_gpu_cursor_prepare_fb(struct drm_plane *plane,
144 struct drm_plane_state *new_state)
145{
146 struct drm_device *dev = plane->dev;
147 struct virtio_gpu_device *vgdev = dev->dev_private;
148 struct virtio_gpu_framebuffer *vgfb;
149 struct virtio_gpu_object *bo;
150
151 if (!new_state->fb)
152 return 0;
153
154 vgfb = to_virtio_gpu_framebuffer(new_state->fb);
155 bo = gem_to_virtio_gpu_obj(vgfb->base.obj[0]);
156 if (bo && bo->dumb && (plane->state->fb != new_state->fb)) {
157 vgfb->fence = virtio_gpu_fence_alloc(vgdev);
158 if (!vgfb->fence)
159 return -ENOMEM;
160 }
161
162 return 0;
163}
164
165static void virtio_gpu_cursor_cleanup_fb(struct drm_plane *plane,
166 struct drm_plane_state *old_state)
167{
168 struct virtio_gpu_framebuffer *vgfb;
169
170 if (!plane->state->fb)
171 return;
172
173 vgfb = to_virtio_gpu_framebuffer(plane->state->fb);
174 if (vgfb->fence) {
175 dma_fence_put(&vgfb->fence->f);
176 vgfb->fence = NULL;
177 }
178}
179
180static void virtio_gpu_cursor_plane_update(struct drm_plane *plane,
181 struct drm_plane_state *old_state)
182{
183 struct drm_device *dev = plane->dev;
184 struct virtio_gpu_device *vgdev = dev->dev_private;
185 struct virtio_gpu_output *output = NULL;
186 struct virtio_gpu_framebuffer *vgfb;
187 struct virtio_gpu_object *bo = NULL;
188 uint32_t handle;
189 int ret = 0;
190
191 if (plane->state->crtc)
192 output = drm_crtc_to_virtio_gpu_output(plane->state->crtc);
193 if (old_state->crtc)
194 output = drm_crtc_to_virtio_gpu_output(old_state->crtc);
195 if (WARN_ON(!output))
196 return;
197
198 if (plane->state->fb) {
199 vgfb = to_virtio_gpu_framebuffer(plane->state->fb);
200 bo = gem_to_virtio_gpu_obj(vgfb->base.obj[0]);
201 handle = bo->hw_res_handle;
202 } else {
203 handle = 0;
204 }
205
206 if (bo && bo->dumb && (plane->state->fb != old_state->fb)) {
207 /* new cursor -- update & wait */
208 virtio_gpu_cmd_transfer_to_host_2d
209 (vgdev, bo, 0,
210 cpu_to_le32(plane->state->crtc_w),
211 cpu_to_le32(plane->state->crtc_h),
212 0, 0, vgfb->fence);
213 ret = virtio_gpu_object_reserve(bo, false);
214 if (!ret) {
215 dma_resv_add_excl_fence(bo->tbo.base.resv,
216 &vgfb->fence->f);
217 dma_fence_put(&vgfb->fence->f);
218 vgfb->fence = NULL;
219 virtio_gpu_object_unreserve(bo);
220 virtio_gpu_object_wait(bo, false);
221 }
222 }
223
224 if (plane->state->fb != old_state->fb) {
225 DRM_DEBUG("update, handle %d, pos +%d+%d, hot %d,%d\n", handle,
226 plane->state->crtc_x,
227 plane->state->crtc_y,
228 plane->state->fb ? plane->state->fb->hot_x : 0,
229 plane->state->fb ? plane->state->fb->hot_y : 0);
230 output->cursor.hdr.type =
231 cpu_to_le32(VIRTIO_GPU_CMD_UPDATE_CURSOR);
232 output->cursor.resource_id = cpu_to_le32(handle);
233 if (plane->state->fb) {
234 output->cursor.hot_x =
235 cpu_to_le32(plane->state->fb->hot_x);
236 output->cursor.hot_y =
237 cpu_to_le32(plane->state->fb->hot_y);
238 } else {
239 output->cursor.hot_x = cpu_to_le32(0);
240 output->cursor.hot_y = cpu_to_le32(0);
241 }
242 } else {
243 DRM_DEBUG("move +%d+%d\n",
244 plane->state->crtc_x,
245 plane->state->crtc_y);
246 output->cursor.hdr.type =
247 cpu_to_le32(VIRTIO_GPU_CMD_MOVE_CURSOR);
248 }
249 output->cursor.pos.x = cpu_to_le32(plane->state->crtc_x);
250 output->cursor.pos.y = cpu_to_le32(plane->state->crtc_y);
251 virtio_gpu_cursor_ping(vgdev, output);
252}
253
254static const struct drm_plane_helper_funcs virtio_gpu_primary_helper_funcs = {
255 .atomic_check = virtio_gpu_plane_atomic_check,
256 .atomic_update = virtio_gpu_primary_plane_update,
257};
258
259static const struct drm_plane_helper_funcs virtio_gpu_cursor_helper_funcs = {
260 .prepare_fb = virtio_gpu_cursor_prepare_fb,
261 .cleanup_fb = virtio_gpu_cursor_cleanup_fb,
262 .atomic_check = virtio_gpu_plane_atomic_check,
263 .atomic_update = virtio_gpu_cursor_plane_update,
264};
265
266struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
267 enum drm_plane_type type,
268 int index)
269{
270 struct drm_device *dev = vgdev->ddev;
271 const struct drm_plane_helper_funcs *funcs;
272 struct drm_plane *plane;
273 const uint32_t *formats;
274 int ret, nformats;
275
276 plane = kzalloc(sizeof(*plane), GFP_KERNEL);
277 if (!plane)
278 return ERR_PTR(-ENOMEM);
279
280 if (type == DRM_PLANE_TYPE_CURSOR) {
281 formats = virtio_gpu_cursor_formats;
282 nformats = ARRAY_SIZE(virtio_gpu_cursor_formats);
283 funcs = &virtio_gpu_cursor_helper_funcs;
284 } else {
285 formats = virtio_gpu_formats;
286 nformats = ARRAY_SIZE(virtio_gpu_formats);
287 funcs = &virtio_gpu_primary_helper_funcs;
288 }
289 ret = drm_universal_plane_init(dev, plane, 1 << index,
290 &virtio_gpu_plane_funcs,
291 formats, nformats,
292 NULL, type, NULL);
293 if (ret)
294 goto err_plane_init;
295
296 drm_plane_helper_add(plane, funcs);
297 return plane;
298
299err_plane_init:
300 kfree(plane);
301 return ERR_PTR(ret);
302}
1/*
2 * Copyright (C) 2015 Red Hat, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 */
25
26#include "virtgpu_drv.h"
27#include <drm/drm_plane_helper.h>
28#include <drm/drm_atomic_helper.h>
29
30static const uint32_t virtio_gpu_formats[] = {
31 DRM_FORMAT_XRGB8888,
32 DRM_FORMAT_ARGB8888,
33 DRM_FORMAT_BGRX8888,
34 DRM_FORMAT_BGRA8888,
35 DRM_FORMAT_RGBX8888,
36 DRM_FORMAT_RGBA8888,
37 DRM_FORMAT_XBGR8888,
38 DRM_FORMAT_ABGR8888,
39};
40
41static const uint32_t virtio_gpu_cursor_formats[] = {
42 DRM_FORMAT_ARGB8888,
43};
44
45static void virtio_gpu_plane_destroy(struct drm_plane *plane)
46{
47 kfree(plane);
48}
49
50static const struct drm_plane_funcs virtio_gpu_plane_funcs = {
51 .update_plane = drm_atomic_helper_update_plane,
52 .disable_plane = drm_atomic_helper_disable_plane,
53 .destroy = virtio_gpu_plane_destroy,
54 .reset = drm_atomic_helper_plane_reset,
55 .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
56 .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
57};
58
59static int virtio_gpu_plane_atomic_check(struct drm_plane *plane,
60 struct drm_plane_state *state)
61{
62 return 0;
63}
64
65static void virtio_gpu_primary_plane_update(struct drm_plane *plane,
66 struct drm_plane_state *old_state)
67{
68 struct drm_device *dev = plane->dev;
69 struct virtio_gpu_device *vgdev = dev->dev_private;
70 struct virtio_gpu_output *output = NULL;
71 struct virtio_gpu_framebuffer *vgfb;
72 struct virtio_gpu_object *bo;
73 uint32_t handle;
74
75 if (plane->state->crtc)
76 output = drm_crtc_to_virtio_gpu_output(plane->state->crtc);
77 if (old_state->crtc)
78 output = drm_crtc_to_virtio_gpu_output(old_state->crtc);
79 if (WARN_ON(!output))
80 return;
81
82 if (plane->state->fb) {
83 vgfb = to_virtio_gpu_framebuffer(plane->state->fb);
84 bo = gem_to_virtio_gpu_obj(vgfb->obj);
85 handle = bo->hw_res_handle;
86 if (bo->dumb) {
87 virtio_gpu_cmd_transfer_to_host_2d
88 (vgdev, handle, 0,
89 cpu_to_le32(plane->state->src_w >> 16),
90 cpu_to_le32(plane->state->src_h >> 16),
91 cpu_to_le32(plane->state->src_x >> 16),
92 cpu_to_le32(plane->state->src_y >> 16), NULL);
93 }
94 } else {
95 handle = 0;
96 }
97
98 DRM_DEBUG("handle 0x%x, crtc %dx%d+%d+%d, src %dx%d+%d+%d\n", handle,
99 plane->state->crtc_w, plane->state->crtc_h,
100 plane->state->crtc_x, plane->state->crtc_y,
101 plane->state->src_w >> 16,
102 plane->state->src_h >> 16,
103 plane->state->src_x >> 16,
104 plane->state->src_y >> 16);
105 virtio_gpu_cmd_set_scanout(vgdev, output->index, handle,
106 plane->state->src_w >> 16,
107 plane->state->src_h >> 16,
108 plane->state->src_x >> 16,
109 plane->state->src_y >> 16);
110 virtio_gpu_cmd_resource_flush(vgdev, handle,
111 plane->state->src_x >> 16,
112 plane->state->src_y >> 16,
113 plane->state->src_w >> 16,
114 plane->state->src_h >> 16);
115}
116
117static void virtio_gpu_cursor_plane_update(struct drm_plane *plane,
118 struct drm_plane_state *old_state)
119{
120 struct drm_device *dev = plane->dev;
121 struct virtio_gpu_device *vgdev = dev->dev_private;
122 struct virtio_gpu_output *output = NULL;
123 struct virtio_gpu_framebuffer *vgfb;
124 struct virtio_gpu_fence *fence = NULL;
125 struct virtio_gpu_object *bo = NULL;
126 uint32_t handle;
127 int ret = 0;
128
129 if (plane->state->crtc)
130 output = drm_crtc_to_virtio_gpu_output(plane->state->crtc);
131 if (old_state->crtc)
132 output = drm_crtc_to_virtio_gpu_output(old_state->crtc);
133 if (WARN_ON(!output))
134 return;
135
136 if (plane->state->fb) {
137 vgfb = to_virtio_gpu_framebuffer(plane->state->fb);
138 bo = gem_to_virtio_gpu_obj(vgfb->obj);
139 handle = bo->hw_res_handle;
140 } else {
141 handle = 0;
142 }
143
144 if (bo && bo->dumb && (plane->state->fb != old_state->fb)) {
145 /* new cursor -- update & wait */
146 virtio_gpu_cmd_transfer_to_host_2d
147 (vgdev, handle, 0,
148 cpu_to_le32(plane->state->crtc_w),
149 cpu_to_le32(plane->state->crtc_h),
150 0, 0, &fence);
151 ret = virtio_gpu_object_reserve(bo, false);
152 if (!ret) {
153 reservation_object_add_excl_fence(bo->tbo.resv,
154 &fence->f);
155 dma_fence_put(&fence->f);
156 fence = NULL;
157 virtio_gpu_object_unreserve(bo);
158 virtio_gpu_object_wait(bo, false);
159 }
160 }
161
162 if (plane->state->fb != old_state->fb) {
163 DRM_DEBUG("update, handle %d, pos +%d+%d, hot %d,%d\n", handle,
164 plane->state->crtc_x,
165 plane->state->crtc_y,
166 plane->state->fb ? plane->state->fb->hot_x : 0,
167 plane->state->fb ? plane->state->fb->hot_y : 0);
168 output->cursor.hdr.type =
169 cpu_to_le32(VIRTIO_GPU_CMD_UPDATE_CURSOR);
170 output->cursor.resource_id = cpu_to_le32(handle);
171 if (plane->state->fb) {
172 output->cursor.hot_x =
173 cpu_to_le32(plane->state->fb->hot_x);
174 output->cursor.hot_y =
175 cpu_to_le32(plane->state->fb->hot_y);
176 } else {
177 output->cursor.hot_x = cpu_to_le32(0);
178 output->cursor.hot_y = cpu_to_le32(0);
179 }
180 } else {
181 DRM_DEBUG("move +%d+%d\n",
182 plane->state->crtc_x,
183 plane->state->crtc_y);
184 output->cursor.hdr.type =
185 cpu_to_le32(VIRTIO_GPU_CMD_MOVE_CURSOR);
186 }
187 output->cursor.pos.x = cpu_to_le32(plane->state->crtc_x);
188 output->cursor.pos.y = cpu_to_le32(plane->state->crtc_y);
189 virtio_gpu_cursor_ping(vgdev, output);
190}
191
192static const struct drm_plane_helper_funcs virtio_gpu_primary_helper_funcs = {
193 .atomic_check = virtio_gpu_plane_atomic_check,
194 .atomic_update = virtio_gpu_primary_plane_update,
195};
196
197static const struct drm_plane_helper_funcs virtio_gpu_cursor_helper_funcs = {
198 .atomic_check = virtio_gpu_plane_atomic_check,
199 .atomic_update = virtio_gpu_cursor_plane_update,
200};
201
202struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
203 enum drm_plane_type type,
204 int index)
205{
206 struct drm_device *dev = vgdev->ddev;
207 const struct drm_plane_helper_funcs *funcs;
208 struct drm_plane *plane;
209 const uint32_t *formats;
210 int ret, nformats;
211
212 plane = kzalloc(sizeof(*plane), GFP_KERNEL);
213 if (!plane)
214 return ERR_PTR(-ENOMEM);
215
216 if (type == DRM_PLANE_TYPE_CURSOR) {
217 formats = virtio_gpu_cursor_formats;
218 nformats = ARRAY_SIZE(virtio_gpu_cursor_formats);
219 funcs = &virtio_gpu_cursor_helper_funcs;
220 } else {
221 formats = virtio_gpu_formats;
222 nformats = ARRAY_SIZE(virtio_gpu_formats);
223 funcs = &virtio_gpu_primary_helper_funcs;
224 }
225 ret = drm_universal_plane_init(dev, plane, 1 << index,
226 &virtio_gpu_plane_funcs,
227 formats, nformats,
228 type, NULL);
229 if (ret)
230 goto err_plane_init;
231
232 drm_plane_helper_add(plane, funcs);
233 return plane;
234
235err_plane_init:
236 kfree(plane);
237 return ERR_PTR(ret);
238}