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v5.4
  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * Copyright 2001 MontaVista Software Inc.
  4 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
  5 * Copyright (c) 2003, 2004  Maciej W. Rozycki
  6 *
  7 * Common time service routines for MIPS machines.
 
 
 
 
 
  8 */
  9#include <linux/bug.h>
 10#include <linux/clockchips.h>
 11#include <linux/types.h>
 12#include <linux/kernel.h>
 13#include <linux/init.h>
 14#include <linux/sched.h>
 15#include <linux/param.h>
 16#include <linux/time.h>
 17#include <linux/timex.h>
 18#include <linux/smp.h>
 19#include <linux/spinlock.h>
 20#include <linux/export.h>
 21
 22#include <asm/cpu-features.h>
 23#include <asm/cpu-type.h>
 24#include <asm/div64.h>
 25#include <asm/time.h>
 26
 27/*
 28 * forward reference
 29 */
 30DEFINE_SPINLOCK(rtc_lock);
 31EXPORT_SYMBOL(rtc_lock);
 32
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 33static int null_perf_irq(void)
 34{
 35	return 0;
 36}
 37
 38int (*perf_irq)(void) = null_perf_irq;
 39
 40EXPORT_SYMBOL(perf_irq);
 41
 42/*
 43 * time_init() - it does the following things.
 44 *
 45 * 1) plat_time_init() -
 46 *	a) (optional) set up RTC routines,
 47 *	b) (optional) calibrate and set the mips_hpt_frequency
 48 *	    (only needed if you intended to use cpu counter as timer interrupt
 49 *	     source)
 50 * 2) calculate a couple of cached variables for later usage
 51 */
 52
 53unsigned int mips_hpt_frequency;
 54EXPORT_SYMBOL_GPL(mips_hpt_frequency);
 
 
 
 
 
 
 
 
 
 
 
 
 
 55
 56static __init int cpu_has_mfc0_count_bug(void)
 57{
 58	switch (current_cpu_type()) {
 59	case CPU_R4000PC:
 60	case CPU_R4000SC:
 61	case CPU_R4000MC:
 62		/*
 63		 * V3.0 is documented as suffering from the mfc0 from count bug.
 64		 * Afaik this is the last version of the R4000.	 Later versions
 65		 * were marketed as R4400.
 66		 */
 67		return 1;
 68
 69	case CPU_R4400PC:
 70	case CPU_R4400SC:
 71	case CPU_R4400MC:
 72		/*
 73		 * The published errata for the R4400 up to 3.0 say the CPU
 74		 * has the mfc0 from count bug.
 75		 */
 76		if ((current_cpu_data.processor_id & 0xff) <= 0x30)
 77			return 1;
 78
 79		/*
 80		 * we assume newer revisions are ok
 81		 */
 82		return 0;
 83	}
 84
 85	return 0;
 86}
 87
 88void __init time_init(void)
 89{
 90	plat_time_init();
 91
 92	/*
 93	 * The use of the R4k timer as a clock event takes precedence;
 94	 * if reading the Count register might interfere with the timer
 95	 * interrupt, then we don't use the timer as a clock source.
 96	 * We may still use the timer as a clock source though if the
 97	 * timer interrupt isn't reliable; the interference doesn't
 98	 * matter then, because we don't use the interrupt.
 99	 */
100	if (mips_clockevent_init() != 0 || !cpu_has_mfc0_count_bug())
101		init_mips_clocksource();
102}
v4.10.11
 
  1/*
  2 * Copyright 2001 MontaVista Software Inc.
  3 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
  4 * Copyright (c) 2003, 2004  Maciej W. Rozycki
  5 *
  6 * Common time service routines for MIPS machines.
  7 *
  8 * This program is free software; you can redistribute	it and/or modify it
  9 * under  the terms of	the GNU General	 Public License as published by the
 10 * Free Software Foundation;  either version 2 of the  License, or (at your
 11 * option) any later version.
 12 */
 13#include <linux/bug.h>
 14#include <linux/clockchips.h>
 15#include <linux/types.h>
 16#include <linux/kernel.h>
 17#include <linux/init.h>
 18#include <linux/sched.h>
 19#include <linux/param.h>
 20#include <linux/time.h>
 21#include <linux/timex.h>
 22#include <linux/smp.h>
 23#include <linux/spinlock.h>
 24#include <linux/export.h>
 25
 26#include <asm/cpu-features.h>
 27#include <asm/cpu-type.h>
 28#include <asm/div64.h>
 29#include <asm/time.h>
 30
 31/*
 32 * forward reference
 33 */
 34DEFINE_SPINLOCK(rtc_lock);
 35EXPORT_SYMBOL(rtc_lock);
 36
 37int __weak rtc_mips_set_time(unsigned long sec)
 38{
 39	return -ENODEV;
 40}
 41
 42int __weak rtc_mips_set_mmss(unsigned long nowtime)
 43{
 44	return rtc_mips_set_time(nowtime);
 45}
 46
 47int update_persistent_clock(struct timespec now)
 48{
 49	return rtc_mips_set_mmss(now.tv_sec);
 50}
 51
 52static int null_perf_irq(void)
 53{
 54	return 0;
 55}
 56
 57int (*perf_irq)(void) = null_perf_irq;
 58
 59EXPORT_SYMBOL(perf_irq);
 60
 61/*
 62 * time_init() - it does the following things.
 63 *
 64 * 1) plat_time_init() -
 65 *	a) (optional) set up RTC routines,
 66 *	b) (optional) calibrate and set the mips_hpt_frequency
 67 *	    (only needed if you intended to use cpu counter as timer interrupt
 68 *	     source)
 69 * 2) calculate a couple of cached variables for later usage
 70 */
 71
 72unsigned int mips_hpt_frequency;
 73
 74/*
 75 * This function exists in order to cause an error due to a duplicate
 76 * definition if platform code should have its own implementation.  The hook
 77 * to use instead is plat_time_init.  plat_time_init does not receive the
 78 * irqaction pointer argument anymore.	This is because any function which
 79 * initializes an interrupt timer now takes care of its own request_irq rsp.
 80 * setup_irq calls and each clock_event_device should use its own
 81 * struct irqrequest.
 82 */
 83void __init plat_timer_setup(void)
 84{
 85	BUG();
 86}
 87
 88static __init int cpu_has_mfc0_count_bug(void)
 89{
 90	switch (current_cpu_type()) {
 91	case CPU_R4000PC:
 92	case CPU_R4000SC:
 93	case CPU_R4000MC:
 94		/*
 95		 * V3.0 is documented as suffering from the mfc0 from count bug.
 96		 * Afaik this is the last version of the R4000.	 Later versions
 97		 * were marketed as R4400.
 98		 */
 99		return 1;
100
101	case CPU_R4400PC:
102	case CPU_R4400SC:
103	case CPU_R4400MC:
104		/*
105		 * The published errata for the R4400 up to 3.0 say the CPU
106		 * has the mfc0 from count bug.
107		 */
108		if ((current_cpu_data.processor_id & 0xff) <= 0x30)
109			return 1;
110
111		/*
112		 * we assume newer revisions are ok
113		 */
114		return 0;
115	}
116
117	return 0;
118}
119
120void __init time_init(void)
121{
122	plat_time_init();
123
124	/*
125	 * The use of the R4k timer as a clock event takes precedence;
126	 * if reading the Count register might interfere with the timer
127	 * interrupt, then we don't use the timer as a clock source.
128	 * We may still use the timer as a clock source though if the
129	 * timer interrupt isn't reliable; the interference doesn't
130	 * matter then, because we don't use the interrupt.
131	 */
132	if (mips_clockevent_init() != 0 || !cpu_has_mfc0_count_bug())
133		init_mips_clocksource();
134}