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v5.4
  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * XLP8XX Device Tree Source for EVP boards
  4 */
  5
  6/dts-v1/;
  7/ {
  8	model = "netlogic,XLP-EVP";
  9	compatible = "netlogic,xlp";
 10	#address-cells = <2>;
 11	#size-cells = <2>;
 12
 13	soc {
 14		#address-cells = <2>;
 15		#size-cells = <1>;
 16		compatible = "simple-bus";
 17		ranges = <0 0  0 0x18000000  0x04000000   // PCIe CFG
 18			  1 0  0 0x16000000  0x02000000>; // GBU chipselects
 19
 20		serial0: serial@30000 {
 21			device_type = "serial";
 22			compatible = "ns16550";
 23			reg = <0 0x30100 0xa00>;
 24			reg-shift = <2>;
 25			reg-io-width = <4>;
 26			clock-frequency = <133333333>;
 27			interrupt-parent = <&pic>;
 28			interrupts = <17>;
 29		};
 30		serial1: serial@31000 {
 31			device_type = "serial";
 32			compatible = "ns16550";
 33			reg = <0 0x31100 0xa00>;
 34			reg-shift = <2>;
 35			reg-io-width = <4>;
 36			clock-frequency = <133333333>;
 37			interrupt-parent = <&pic>;
 38			interrupts = <18>;
 39		};
 40		i2c0: ocores@32000 {
 41			compatible = "opencores,i2c-ocores";
 42			#address-cells = <1>;
 43			#size-cells = <0>;
 44			reg = <0 0x32100 0xa00>;
 45			reg-shift = <2>;
 46			reg-io-width = <4>;
 47			clock-frequency = <32000000>;
 48			interrupt-parent = <&pic>;
 49			interrupts = <30>;
 50		};
 51		i2c1: ocores@33000 {
 52			compatible = "opencores,i2c-ocores";
 53			#address-cells = <1>;
 54			#size-cells = <0>;
 55			reg = <0 0x33100 0xa00>;
 56			reg-shift = <2>;
 57			reg-io-width = <4>;
 58			clock-frequency = <32000000>;
 59			interrupt-parent = <&pic>;
 60			interrupts = <31>;
 61
 62			rtc@68 {
 63				compatible = "dallas,ds1374";
 64				reg = <0x68>;
 65			};
 66
 67			dtt@4c {
 68				compatible = "national,lm90";
 69				reg = <0x4c>;
 70			};
 71		};
 72		pic: pic@4000 {
 73			compatible = "netlogic,xlp-pic";
 74			#address-cells = <0>;
 75			#interrupt-cells = <1>;
 76			reg = <0 0x4000 0x200>;
 77			interrupt-controller;
 78		};
 79
 80		nor_flash@1,0 {
 81			compatible = "cfi-flash";
 82			#address-cells = <1>;
 83			#size-cells = <1>;
 84			bank-width = <2>;
 85			reg = <1 0 0x1000000>;
 86
 87			partition@0 {
 88				label = "x-loader";
 89				reg = <0x0 0x100000>; /* 1M */
 90				read-only;
 91			};
 92
 93			partition@100000 {
 94				label = "u-boot";
 95				reg = <0x100000 0x100000>; /* 1M */
 96			};
 97
 98			partition@200000 {
 99				label = "kernel";
100				reg = <0x200000 0x500000>; /* 5M */
101			};
102
103			partition@700000 {
104				label = "rootfs";
105				reg = <0x700000 0x800000>; /* 8M */
106			};
107
108			partition@f00000 {
109				label = "env";
110				reg = <0xf00000 0x100000>; /* 1M */
111				read-only;
112			};
113		};
114
115		gpio: xlp_gpio@34100 {
116			compatible = "netlogic,xlp832-gpio";
117			reg = <0 0x34100 0x1000>;
118			#gpio-cells = <2>;
119			gpio-controller;
120
121			#interrupt-cells = <2>;
122			interrupt-parent = <&pic>;
123			interrupts = <39>;
124			interrupt-controller;
125		};
126	};
127
128	chosen {
129		bootargs = "console=ttyS0,115200 rdinit=/sbin/init";
130	};
131};
v4.10.11
 
  1/*
  2 * XLP8XX Device Tree Source for EVP boards
  3 */
  4
  5/dts-v1/;
  6/ {
  7	model = "netlogic,XLP-EVP";
  8	compatible = "netlogic,xlp";
  9	#address-cells = <2>;
 10	#size-cells = <2>;
 11
 12	soc {
 13		#address-cells = <2>;
 14		#size-cells = <1>;
 15		compatible = "simple-bus";
 16		ranges = <0 0  0 0x18000000  0x04000000   // PCIe CFG
 17			  1 0  0 0x16000000  0x02000000>; // GBU chipselects
 18
 19		serial0: serial@30000 {
 20			device_type = "serial";
 21			compatible = "ns16550";
 22			reg = <0 0x30100 0xa00>;
 23			reg-shift = <2>;
 24			reg-io-width = <4>;
 25			clock-frequency = <133333333>;
 26			interrupt-parent = <&pic>;
 27			interrupts = <17>;
 28		};
 29		serial1: serial@31000 {
 30			device_type = "serial";
 31			compatible = "ns16550";
 32			reg = <0 0x31100 0xa00>;
 33			reg-shift = <2>;
 34			reg-io-width = <4>;
 35			clock-frequency = <133333333>;
 36			interrupt-parent = <&pic>;
 37			interrupts = <18>;
 38		};
 39		i2c0: ocores@32000 {
 40			compatible = "opencores,i2c-ocores";
 41			#address-cells = <1>;
 42			#size-cells = <0>;
 43			reg = <0 0x32100 0xa00>;
 44			reg-shift = <2>;
 45			reg-io-width = <4>;
 46			clock-frequency = <32000000>;
 47			interrupt-parent = <&pic>;
 48			interrupts = <30>;
 49		};
 50		i2c1: ocores@33000 {
 51			compatible = "opencores,i2c-ocores";
 52			#address-cells = <1>;
 53			#size-cells = <0>;
 54			reg = <0 0x33100 0xa00>;
 55			reg-shift = <2>;
 56			reg-io-width = <4>;
 57			clock-frequency = <32000000>;
 58			interrupt-parent = <&pic>;
 59			interrupts = <31>;
 60
 61			rtc@68 {
 62				compatible = "dallas,ds1374";
 63				reg = <0x68>;
 64			};
 65
 66			dtt@4c {
 67				compatible = "national,lm90";
 68				reg = <0x4c>;
 69			};
 70		};
 71		pic: pic@4000 {
 72			compatible = "netlogic,xlp-pic";
 73			#address-cells = <0>;
 74			#interrupt-cells = <1>;
 75			reg = <0 0x4000 0x200>;
 76			interrupt-controller;
 77		};
 78
 79		nor_flash@1,0 {
 80			compatible = "cfi-flash";
 81			#address-cells = <1>;
 82			#size-cells = <1>;
 83			bank-width = <2>;
 84			reg = <1 0 0x1000000>;
 85
 86			partition@0 {
 87				label = "x-loader";
 88				reg = <0x0 0x100000>; /* 1M */
 89				read-only;
 90			};
 91
 92			partition@100000 {
 93				label = "u-boot";
 94				reg = <0x100000 0x100000>; /* 1M */
 95			};
 96
 97			partition@200000 {
 98				label = "kernel";
 99				reg = <0x200000 0x500000>; /* 5M */
100			};
101
102			partition@700000 {
103				label = "rootfs";
104				reg = <0x700000 0x800000>; /* 8M */
105			};
106
107			partition@f00000 {
108				label = "env";
109				reg = <0xf00000 0x100000>; /* 1M */
110				read-only;
111			};
112		};
113
114		gpio: xlp_gpio@34100 {
115			compatible = "netlogic,xlp832-gpio";
116			reg = <0 0x34100 0x1000>;
117			#gpio-cells = <2>;
118			gpio-controller;
119
120			#interrupt-cells = <2>;
121			interrupt-parent = <&pic>;
122			interrupts = <39>;
123			interrupt-controller;
124		};
125	};
126
127	chosen {
128		bootargs = "console=ttyS0,115200 rdinit=/sbin/init";
129	};
130};