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1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include <dt-bindings/input/input.h>
5#include "tegra124.dtsi"
6
7/ {
8 model = "NVIDIA Tegra124 Venice2";
9 compatible = "nvidia,venice2", "nvidia,tegra124";
10
11 aliases {
12 rtc0 = "/i2c@7000d000/pmic@40";
13 rtc1 = "/rtc@7000e000";
14 serial0 = &uarta;
15 };
16
17 chosen {
18 stdout-path = "serial0:115200n8";
19 };
20
21 memory@80000000 {
22 reg = <0x0 0x80000000 0x0 0x80000000>;
23 };
24
25 host1x@50000000 {
26 hdmi@54280000 {
27 status = "okay";
28
29 vdd-supply = <&vdd_3v3_hdmi>;
30 pll-supply = <&vdd_hdmi_pll>;
31 hdmi-supply = <&vdd_5v0_hdmi>;
32
33 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
34 nvidia,hpd-gpio =
35 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
36 };
37
38 sor@54540000 {
39 status = "okay";
40
41 nvidia,dpaux = <&dpaux>;
42 nvidia,panel = <&panel>;
43 };
44
45 dpaux@545c0000 {
46 vdd-supply = <&vdd_3v3_panel>;
47 status = "okay";
48 };
49 };
50
51 gpu@0,57000000 {
52 /*
53 * Node left disabled on purpose - the bootloader will enable
54 * it after having set the VPR up
55 */
56 vdd-supply = <&vdd_gpu>;
57 };
58
59 pinmux: pinmux@70000868 {
60 pinctrl-names = "boot";
61 pinctrl-0 = <&pinmux_boot>;
62
63 pinmux_boot: common {
64 dap_mclk1_pw4 {
65 nvidia,pins = "dap_mclk1_pw4";
66 nvidia,function = "extperiph1";
67 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
68 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
69 nvidia,tristate = <TEGRA_PIN_DISABLE>;
70 };
71 dap1_din_pn1 {
72 nvidia,pins = "dap1_din_pn1";
73 nvidia,function = "i2s0";
74 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
75 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
76 nvidia,tristate = <TEGRA_PIN_ENABLE>;
77 };
78 dap1_dout_pn2 {
79 nvidia,pins = "dap1_dout_pn2",
80 "dap1_fs_pn0",
81 "dap1_sclk_pn3";
82 nvidia,function = "i2s0";
83 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
84 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
85 nvidia,tristate = <TEGRA_PIN_ENABLE>;
86 };
87 dap2_din_pa4 {
88 nvidia,pins = "dap2_din_pa4";
89 nvidia,function = "i2s1";
90 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
91 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
92 nvidia,tristate = <TEGRA_PIN_DISABLE>;
93 };
94 dap2_dout_pa5 {
95 nvidia,pins = "dap2_dout_pa5",
96 "dap2_fs_pa2",
97 "dap2_sclk_pa3";
98 nvidia,function = "i2s1";
99 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
100 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
101 nvidia,tristate = <TEGRA_PIN_DISABLE>;
102 };
103 dvfs_pwm_px0 {
104 nvidia,pins = "dvfs_pwm_px0",
105 "dvfs_clk_px2";
106 nvidia,function = "cldvfs";
107 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
108 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
109 nvidia,tristate = <TEGRA_PIN_DISABLE>;
110 };
111 ulpi_clk_py0 {
112 nvidia,pins = "ulpi_clk_py0",
113 "ulpi_nxt_py2",
114 "ulpi_stp_py3";
115 nvidia,function = "spi1";
116 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
117 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
118 nvidia,tristate = <TEGRA_PIN_DISABLE>;
119 };
120 ulpi_dir_py1 {
121 nvidia,pins = "ulpi_dir_py1";
122 nvidia,function = "spi1";
123 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
124 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
125 nvidia,tristate = <TEGRA_PIN_DISABLE>;
126 };
127 cam_i2c_scl_pbb1 {
128 nvidia,pins = "cam_i2c_scl_pbb1",
129 "cam_i2c_sda_pbb2";
130 nvidia,function = "i2c3";
131 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
132 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
133 nvidia,tristate = <TEGRA_PIN_DISABLE>;
134 nvidia,lock = <TEGRA_PIN_DISABLE>;
135 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
136 };
137 gen2_i2c_scl_pt5 {
138 nvidia,pins = "gen2_i2c_scl_pt5",
139 "gen2_i2c_sda_pt6";
140 nvidia,function = "i2c2";
141 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
142 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
143 nvidia,tristate = <TEGRA_PIN_DISABLE>;
144 nvidia,lock = <TEGRA_PIN_DISABLE>;
145 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
146 };
147 pg4 {
148 nvidia,pins = "pg4",
149 "pg5",
150 "pg6",
151 "pi3";
152 nvidia,function = "spi4";
153 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
154 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
155 nvidia,tristate = <TEGRA_PIN_DISABLE>;
156 };
157 pg7 {
158 nvidia,pins = "pg7";
159 nvidia,function = "spi4";
160 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
161 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
162 nvidia,tristate = <TEGRA_PIN_DISABLE>;
163 };
164 ph1 {
165 nvidia,pins = "ph1";
166 nvidia,function = "pwm1";
167 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
168 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
169 nvidia,tristate = <TEGRA_PIN_DISABLE>;
170 };
171 pk0 {
172 nvidia,pins = "pk0",
173 "kb_row15_ps7",
174 "clk_32k_out_pa0";
175 nvidia,function = "soc";
176 nvidia,pull = <TEGRA_PIN_PULL_UP>;
177 nvidia,tristate = <TEGRA_PIN_DISABLE>;
178 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
179 };
180 sdmmc1_clk_pz0 {
181 nvidia,pins = "sdmmc1_clk_pz0";
182 nvidia,function = "sdmmc1";
183 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
184 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
185 nvidia,tristate = <TEGRA_PIN_DISABLE>;
186 };
187 sdmmc1_cmd_pz1 {
188 nvidia,pins = "sdmmc1_cmd_pz1",
189 "sdmmc1_dat0_py7",
190 "sdmmc1_dat1_py6",
191 "sdmmc1_dat2_py5",
192 "sdmmc1_dat3_py4";
193 nvidia,function = "sdmmc1";
194 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
195 nvidia,pull = <TEGRA_PIN_PULL_UP>;
196 nvidia,tristate = <TEGRA_PIN_DISABLE>;
197 };
198 sdmmc3_clk_pa6 {
199 nvidia,pins = "sdmmc3_clk_pa6";
200 nvidia,function = "sdmmc3";
201 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
202 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
203 nvidia,tristate = <TEGRA_PIN_DISABLE>;
204 };
205 sdmmc3_cmd_pa7 {
206 nvidia,pins = "sdmmc3_cmd_pa7",
207 "sdmmc3_dat0_pb7",
208 "sdmmc3_dat1_pb6",
209 "sdmmc3_dat2_pb5",
210 "sdmmc3_dat3_pb4",
211 "sdmmc3_clk_lb_out_pee4",
212 "sdmmc3_clk_lb_in_pee5";
213 nvidia,function = "sdmmc3";
214 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
215 nvidia,pull = <TEGRA_PIN_PULL_UP>;
216 nvidia,tristate = <TEGRA_PIN_DISABLE>;
217 };
218 sdmmc4_clk_pcc4 {
219 nvidia,pins = "sdmmc4_clk_pcc4";
220 nvidia,function = "sdmmc4";
221 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
222 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
223 nvidia,tristate = <TEGRA_PIN_DISABLE>;
224 };
225 sdmmc4_cmd_pt7 {
226 nvidia,pins = "sdmmc4_cmd_pt7",
227 "sdmmc4_dat0_paa0",
228 "sdmmc4_dat1_paa1",
229 "sdmmc4_dat2_paa2",
230 "sdmmc4_dat3_paa3",
231 "sdmmc4_dat4_paa4",
232 "sdmmc4_dat5_paa5",
233 "sdmmc4_dat6_paa6",
234 "sdmmc4_dat7_paa7";
235 nvidia,function = "sdmmc4";
236 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
237 nvidia,pull = <TEGRA_PIN_PULL_UP>;
238 nvidia,tristate = <TEGRA_PIN_DISABLE>;
239 };
240 pwr_i2c_scl_pz6 {
241 nvidia,pins = "pwr_i2c_scl_pz6",
242 "pwr_i2c_sda_pz7";
243 nvidia,function = "i2cpwr";
244 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
245 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
246 nvidia,tristate = <TEGRA_PIN_DISABLE>;
247 nvidia,lock = <TEGRA_PIN_DISABLE>;
248 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
249 };
250 jtag_rtck {
251 nvidia,pins = "jtag_rtck";
252 nvidia,function = "rtck";
253 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
254 nvidia,pull = <TEGRA_PIN_PULL_UP>;
255 nvidia,tristate = <TEGRA_PIN_DISABLE>;
256 };
257 clk_32k_in {
258 nvidia,pins = "clk_32k_in";
259 nvidia,function = "clk";
260 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
261 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
262 nvidia,tristate = <TEGRA_PIN_DISABLE>;
263 };
264 core_pwr_req {
265 nvidia,pins = "core_pwr_req";
266 nvidia,function = "pwron";
267 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
268 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
269 nvidia,tristate = <TEGRA_PIN_DISABLE>;
270 };
271 cpu_pwr_req {
272 nvidia,pins = "cpu_pwr_req";
273 nvidia,function = "cpu";
274 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
275 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
276 nvidia,tristate = <TEGRA_PIN_DISABLE>;
277 };
278 pwr_int_n {
279 nvidia,pins = "pwr_int_n";
280 nvidia,function = "pmi";
281 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
282 nvidia,pull = <TEGRA_PIN_PULL_UP>;
283 nvidia,tristate = <TEGRA_PIN_DISABLE>;
284 };
285 reset_out_n {
286 nvidia,pins = "reset_out_n";
287 nvidia,function = "reset_out_n";
288 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
289 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
290 nvidia,tristate = <TEGRA_PIN_DISABLE>;
291 };
292 clk3_out_pee0 {
293 nvidia,pins = "clk3_out_pee0";
294 nvidia,function = "extperiph3";
295 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
296 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
297 nvidia,tristate = <TEGRA_PIN_DISABLE>;
298 };
299 dap4_din_pp5 {
300 nvidia,pins = "dap4_din_pp5";
301 nvidia,function = "i2s3";
302 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
303 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
304 nvidia,tristate = <TEGRA_PIN_ENABLE>;
305 };
306 dap4_dout_pp6 {
307 nvidia,pins = "dap4_dout_pp6",
308 "dap4_fs_pp4",
309 "dap4_sclk_pp7";
310 nvidia,function = "i2s3";
311 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
312 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
313 nvidia,tristate = <TEGRA_PIN_ENABLE>;
314 };
315 gen1_i2c_sda_pc5 {
316 nvidia,pins = "gen1_i2c_sda_pc5",
317 "gen1_i2c_scl_pc4";
318 nvidia,function = "i2c1";
319 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
320 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
321 nvidia,tristate = <TEGRA_PIN_DISABLE>;
322 nvidia,lock = <TEGRA_PIN_DISABLE>;
323 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
324 };
325 uart2_cts_n_pj5 {
326 nvidia,pins = "uart2_cts_n_pj5";
327 nvidia,function = "uartb";
328 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
329 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
330 nvidia,tristate = <TEGRA_PIN_DISABLE>;
331 };
332 uart2_rts_n_pj6 {
333 nvidia,pins = "uart2_rts_n_pj6";
334 nvidia,function = "uartb";
335 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
336 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
337 nvidia,tristate = <TEGRA_PIN_DISABLE>;
338 };
339 uart2_rxd_pc3 {
340 nvidia,pins = "uart2_rxd_pc3";
341 nvidia,function = "irda";
342 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
343 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
344 nvidia,tristate = <TEGRA_PIN_DISABLE>;
345 };
346 uart2_txd_pc2 {
347 nvidia,pins = "uart2_txd_pc2";
348 nvidia,function = "irda";
349 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
350 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
351 nvidia,tristate = <TEGRA_PIN_DISABLE>;
352 };
353 uart3_cts_n_pa1 {
354 nvidia,pins = "uart3_cts_n_pa1",
355 "uart3_rxd_pw7";
356 nvidia,function = "uartc";
357 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
358 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
359 nvidia,tristate = <TEGRA_PIN_DISABLE>;
360 };
361 uart3_rts_n_pc0 {
362 nvidia,pins = "uart3_rts_n_pc0",
363 "uart3_txd_pw6";
364 nvidia,function = "uartc";
365 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
366 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
367 nvidia,tristate = <TEGRA_PIN_DISABLE>;
368 };
369 hdmi_cec_pee3 {
370 nvidia,pins = "hdmi_cec_pee3";
371 nvidia,function = "cec";
372 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
373 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
374 nvidia,tristate = <TEGRA_PIN_DISABLE>;
375 nvidia,lock = <TEGRA_PIN_DISABLE>;
376 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
377 };
378 hdmi_int_pn7 {
379 nvidia,pins = "hdmi_int_pn7";
380 nvidia,function = "rsvd1";
381 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
382 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
383 nvidia,tristate = <TEGRA_PIN_DISABLE>;
384 };
385 ddc_scl_pv4 {
386 nvidia,pins = "ddc_scl_pv4",
387 "ddc_sda_pv5";
388 nvidia,function = "i2c4";
389 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
390 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
391 nvidia,tristate = <TEGRA_PIN_DISABLE>;
392 nvidia,lock = <TEGRA_PIN_DISABLE>;
393 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
394 };
395 pj7 {
396 nvidia,pins = "pj7",
397 "pk7";
398 nvidia,function = "uartd";
399 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
400 nvidia,tristate = <TEGRA_PIN_DISABLE>;
401 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
402 };
403 pb0 {
404 nvidia,pins = "pb0",
405 "pb1";
406 nvidia,function = "uartd";
407 nvidia,pull = <TEGRA_PIN_PULL_UP>;
408 nvidia,tristate = <TEGRA_PIN_DISABLE>;
409 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
410 };
411 ph0 {
412 nvidia,pins = "ph0";
413 nvidia,function = "pwm0";
414 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
415 nvidia,tristate = <TEGRA_PIN_DISABLE>;
416 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
417 };
418 kb_row10_ps2 {
419 nvidia,pins = "kb_row10_ps2";
420 nvidia,function = "uarta";
421 nvidia,pull = <TEGRA_PIN_PULL_UP>;
422 nvidia,tristate = <TEGRA_PIN_DISABLE>;
423 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
424 };
425 kb_row9_ps1 {
426 nvidia,pins = "kb_row9_ps1";
427 nvidia,function = "uarta";
428 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
429 nvidia,tristate = <TEGRA_PIN_DISABLE>;
430 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
431 };
432 kb_row6_pr6 {
433 nvidia,pins = "kb_row6_pr6";
434 nvidia,function = "displaya_alt";
435 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
436 nvidia,tristate = <TEGRA_PIN_DISABLE>;
437 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
438 };
439 usb_vbus_en0_pn4 {
440 nvidia,pins = "usb_vbus_en0_pn4",
441 "usb_vbus_en1_pn5";
442 nvidia,function = "usb";
443 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
444 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
445 nvidia,tristate = <TEGRA_PIN_DISABLE>;
446 nvidia,lock = <TEGRA_PIN_DISABLE>;
447 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
448 };
449 drive_sdio1 {
450 nvidia,pins = "drive_sdio1";
451 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
452 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
453 nvidia,pull-down-strength = <32>;
454 nvidia,pull-up-strength = <42>;
455 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
456 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
457 };
458 drive_sdio3 {
459 nvidia,pins = "drive_sdio3";
460 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
461 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
462 nvidia,pull-down-strength = <20>;
463 nvidia,pull-up-strength = <36>;
464 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
465 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
466 };
467 drive_gma {
468 nvidia,pins = "drive_gma";
469 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
470 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
471 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
472 nvidia,pull-down-strength = <1>;
473 nvidia,pull-up-strength = <2>;
474 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
475 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
476 nvidia,drive-type = <1>;
477 };
478 als_irq_l {
479 nvidia,pins = "gpio_x3_aud_px3";
480 nvidia,function = "gmi";
481 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
482 nvidia,tristate = <TEGRA_PIN_ENABLE>;
483 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
484 };
485 codec_irq_l {
486 nvidia,pins = "ph4";
487 nvidia,function = "gmi";
488 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
489 nvidia,tristate = <TEGRA_PIN_DISABLE>;
490 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
491 };
492 lcd_bl_en {
493 nvidia,pins = "ph2";
494 nvidia,function = "gmi";
495 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
496 nvidia,tristate = <TEGRA_PIN_DISABLE>;
497 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
498 };
499 touch_irq_l {
500 nvidia,pins = "gpio_w3_aud_pw3";
501 nvidia,function = "spi6";
502 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
503 nvidia,tristate = <TEGRA_PIN_ENABLE>;
504 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
505 };
506 tpm_davint_l {
507 nvidia,pins = "ph6";
508 nvidia,function = "gmi";
509 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
510 nvidia,tristate = <TEGRA_PIN_ENABLE>;
511 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
512 };
513 ts_irq_l {
514 nvidia,pins = "pk2";
515 nvidia,function = "gmi";
516 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
517 nvidia,tristate = <TEGRA_PIN_ENABLE>;
518 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
519 };
520 ts_reset_l {
521 nvidia,pins = "pk4";
522 nvidia,function = "gmi";
523 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
524 nvidia,tristate = <TEGRA_PIN_DISABLE>;
525 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
526 };
527 ts_shdn_l {
528 nvidia,pins = "pk1";
529 nvidia,function = "gmi";
530 nvidia,pull = <TEGRA_PIN_PULL_UP>;
531 nvidia,tristate = <TEGRA_PIN_DISABLE>;
532 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
533 };
534 ph7 {
535 nvidia,pins = "ph7";
536 nvidia,function = "gmi";
537 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
538 nvidia,tristate = <TEGRA_PIN_DISABLE>;
539 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
540 };
541 kb_col0_ap {
542 nvidia,pins = "kb_col0_pq0";
543 nvidia,function = "rsvd4";
544 nvidia,pull = <TEGRA_PIN_PULL_UP>;
545 nvidia,tristate = <TEGRA_PIN_DISABLE>;
546 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
547 };
548 lid_open {
549 nvidia,pins = "kb_row4_pr4";
550 nvidia,function = "rsvd3";
551 nvidia,pull = <TEGRA_PIN_PULL_UP>;
552 nvidia,tristate = <TEGRA_PIN_DISABLE>;
553 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
554 };
555 en_vdd_sd {
556 nvidia,pins = "kb_row0_pr0";
557 nvidia,function = "rsvd4";
558 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
559 nvidia,tristate = <TEGRA_PIN_DISABLE>;
560 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
561 };
562 ac_ok {
563 nvidia,pins = "pj0";
564 nvidia,function = "gmi";
565 nvidia,pull = <TEGRA_PIN_PULL_UP>;
566 nvidia,tristate = <TEGRA_PIN_ENABLE>;
567 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
568 };
569 sensor_irq_l {
570 nvidia,pins = "pi6";
571 nvidia,function = "gmi";
572 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
573 nvidia,tristate = <TEGRA_PIN_DISABLE>;
574 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
575 };
576 wifi_en {
577 nvidia,pins = "gpio_x7_aud_px7";
578 nvidia,function = "rsvd4";
579 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
580 nvidia,tristate = <TEGRA_PIN_DISABLE>;
581 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
582 };
583 wifi_rst_l {
584 nvidia,pins = "clk2_req_pcc5";
585 nvidia,function = "dap";
586 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
587 nvidia,tristate = <TEGRA_PIN_DISABLE>;
588 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
589 };
590 hp_det_l {
591 nvidia,pins = "ulpi_data1_po2";
592 nvidia,function = "spi3";
593 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
594 nvidia,tristate = <TEGRA_PIN_DISABLE>;
595 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
596 };
597 };
598 };
599
600 serial@70006000 {
601 status = "okay";
602 };
603
604 pwm@7000a000 {
605 status = "okay";
606 };
607
608 i2c@7000c000 {
609 status = "okay";
610 clock-frequency = <100000>;
611
612 acodec: audio-codec@10 {
613 compatible = "maxim,max98090";
614 reg = <0x10>;
615 interrupt-parent = <&gpio>;
616 interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_EDGE_FALLING>;
617 };
618 };
619
620 i2c@7000c400 {
621 status = "okay";
622 clock-frequency = <100000>;
623
624 trackpad@4b {
625 compatible = "atmel,maxtouch";
626 reg = <0x4b>;
627 interrupt-parent = <&gpio>;
628 interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_LOW>;
629 linux,gpio-keymap = <0 0 0 BTN_LEFT>;
630 };
631 };
632
633 i2c@7000c500 {
634 status = "okay";
635 clock-frequency = <100000>;
636 };
637
638 hdmi_ddc: i2c@7000c700 {
639 status = "okay";
640 clock-frequency = <100000>;
641 };
642
643 i2c@7000d000 {
644 status = "okay";
645 clock-frequency = <400000>;
646
647 pmic: pmic@40 {
648 compatible = "ams,as3722";
649 reg = <0x40>;
650 interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
651
652 ams,system-power-controller;
653
654 #interrupt-cells = <2>;
655 interrupt-controller;
656
657 gpio-controller;
658 #gpio-cells = <2>;
659
660 pinctrl-names = "default";
661 pinctrl-0 = <&as3722_default>;
662
663 as3722_default: pinmux {
664 gpio0 {
665 pins = "gpio0";
666 function = "gpio";
667 bias-pull-down;
668 };
669
670 gpio1_2_4_7 {
671 pins = "gpio1", "gpio2", "gpio4", "gpio7";
672 function = "gpio";
673 bias-pull-up;
674 };
675
676 gpio3_6 {
677 pins = "gpio3", "gpio6";
678 bias-high-impedance;
679 };
680
681 gpio5 {
682 pins = "gpio5";
683 function = "clk32k-out";
684 };
685 };
686
687 regulators {
688 vsup-sd2-supply = <&vdd_5v0_sys>;
689 vsup-sd3-supply = <&vdd_5v0_sys>;
690 vsup-sd4-supply = <&vdd_5v0_sys>;
691 vsup-sd5-supply = <&vdd_5v0_sys>;
692 vin-ldo0-supply = <&vdd_1v35_lp0>;
693 vin-ldo1-6-supply = <&vdd_3v3_run>;
694 vin-ldo2-5-7-supply = <&vddio_1v8>;
695 vin-ldo3-4-supply = <&vdd_3v3_sys>;
696 vin-ldo9-10-supply = <&vdd_5v0_sys>;
697 vin-ldo11-supply = <&vdd_3v3_run>;
698
699 sd0 {
700 regulator-name = "+VDD_CPU_AP";
701 regulator-min-microvolt = <700000>;
702 regulator-max-microvolt = <1400000>;
703 regulator-min-microamp = <3500000>;
704 regulator-max-microamp = <3500000>;
705 regulator-always-on;
706 regulator-boot-on;
707 ams,ext-control = <2>;
708 };
709
710 sd1 {
711 regulator-name = "+VDD_CORE";
712 regulator-min-microvolt = <700000>;
713 regulator-max-microvolt = <1350000>;
714 regulator-min-microamp = <2500000>;
715 regulator-max-microamp = <2500000>;
716 regulator-always-on;
717 regulator-boot-on;
718 ams,ext-control = <1>;
719 };
720
721 vdd_1v35_lp0: sd2 {
722 regulator-name = "+1.35V_LP0(sd2)";
723 regulator-min-microvolt = <1350000>;
724 regulator-max-microvolt = <1350000>;
725 regulator-always-on;
726 regulator-boot-on;
727 };
728
729 sd3 {
730 regulator-name = "+1.35V_LP0(sd3)";
731 regulator-min-microvolt = <1350000>;
732 regulator-max-microvolt = <1350000>;
733 regulator-always-on;
734 regulator-boot-on;
735 };
736
737 vdd_1v05_run: sd4 {
738 regulator-name = "+1.05V_RUN";
739 regulator-min-microvolt = <1050000>;
740 regulator-max-microvolt = <1050000>;
741 };
742
743 vddio_1v8: sd5 {
744 regulator-name = "+1.8V_VDDIO";
745 regulator-min-microvolt = <1800000>;
746 regulator-max-microvolt = <1800000>;
747 regulator-boot-on;
748 regulator-always-on;
749 };
750
751 vdd_gpu: sd6 {
752 regulator-name = "+VDD_GPU_AP";
753 regulator-min-microvolt = <650000>;
754 regulator-max-microvolt = <1200000>;
755 regulator-min-microamp = <3500000>;
756 regulator-max-microamp = <3500000>;
757 regulator-boot-on;
758 regulator-always-on;
759 };
760
761 avdd_1v05_run: ldo0 {
762 regulator-name = "+1.05V_RUN_AVDD";
763 regulator-min-microvolt = <1050000>;
764 regulator-max-microvolt = <1050000>;
765 regulator-boot-on;
766 regulator-always-on;
767 ams,ext-control = <1>;
768 };
769
770 ldo1 {
771 regulator-name = "+1.8V_RUN_CAM";
772 regulator-min-microvolt = <1800000>;
773 regulator-max-microvolt = <1800000>;
774 };
775
776 ldo2 {
777 regulator-name = "+1.2V_GEN_AVDD";
778 regulator-min-microvolt = <1200000>;
779 regulator-max-microvolt = <1200000>;
780 regulator-boot-on;
781 regulator-always-on;
782 };
783
784 ldo3 {
785 regulator-name = "+1.00V_LP0_VDD_RTC";
786 regulator-min-microvolt = <1000000>;
787 regulator-max-microvolt = <1000000>;
788 regulator-boot-on;
789 regulator-always-on;
790 ams,enable-tracking;
791 };
792
793 vdd_run_cam: ldo4 {
794 regulator-name = "+3.3V_RUN_CAM";
795 regulator-min-microvolt = <2800000>;
796 regulator-max-microvolt = <2800000>;
797 };
798
799 ldo5 {
800 regulator-name = "+1.2V_RUN_CAM_FRONT";
801 regulator-min-microvolt = <1200000>;
802 regulator-max-microvolt = <1200000>;
803 };
804
805 vddio_sdmmc3: ldo6 {
806 regulator-name = "+VDDIO_SDMMC3";
807 regulator-min-microvolt = <1800000>;
808 regulator-max-microvolt = <3300000>;
809 };
810
811 ldo7 {
812 regulator-name = "+1.05V_RUN_CAM_REAR";
813 regulator-min-microvolt = <1050000>;
814 regulator-max-microvolt = <1050000>;
815 };
816
817 ldo9 {
818 regulator-name = "+2.8V_RUN_TOUCH";
819 regulator-min-microvolt = <2800000>;
820 regulator-max-microvolt = <2800000>;
821 };
822
823 ldo10 {
824 regulator-name = "+2.8V_RUN_CAM_AF";
825 regulator-min-microvolt = <2800000>;
826 regulator-max-microvolt = <2800000>;
827 };
828
829 ldo11 {
830 regulator-name = "+1.8V_RUN_VPP_FUSE";
831 regulator-min-microvolt = <1800000>;
832 regulator-max-microvolt = <1800000>;
833 };
834 };
835 };
836 };
837
838 spi@7000d400 {
839 status = "okay";
840
841 cros_ec: cros-ec@0 {
842 compatible = "google,cros-ec-spi";
843 spi-max-frequency = <4000000>;
844 interrupt-parent = <&gpio>;
845 interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>;
846 reg = <0>;
847
848 google,cros-ec-spi-msg-delay = <2000>;
849
850 i2c-tunnel {
851 compatible = "google,cros-ec-i2c-tunnel";
852 #address-cells = <1>;
853 #size-cells = <0>;
854
855 google,remote-bus = <0>;
856
857 charger: bq24735@9 {
858 compatible = "ti,bq24735";
859 reg = <0x9>;
860 interrupt-parent = <&gpio>;
861 interrupts = <TEGRA_GPIO(J, 0)
862 IRQ_TYPE_EDGE_BOTH>;
863 ti,ac-detect-gpios = <&gpio
864 TEGRA_GPIO(J, 0)
865 GPIO_ACTIVE_HIGH>;
866 };
867
868 battery: sbs-battery@b {
869 compatible = "sbs,sbs-battery";
870 reg = <0xb>;
871 sbs,i2c-retry-count = <2>;
872 sbs,poll-retry-count = <1>;
873 };
874 };
875 };
876 };
877
878 spi@7000da00 {
879 status = "okay";
880 spi-max-frequency = <25000000>;
881 spi-flash@0 {
882 compatible = "winbond,w25q32dw", "jedec,spi-nor";
883 reg = <0>;
884 spi-max-frequency = <20000000>;
885 };
886 };
887
888 pmc@7000e400 {
889 nvidia,invert-interrupt;
890 nvidia,suspend-mode = <1>;
891 nvidia,cpu-pwr-good-time = <500>;
892 nvidia,cpu-pwr-off-time = <300>;
893 nvidia,core-pwr-good-time = <641 3845>;
894 nvidia,core-pwr-off-time = <61036>;
895 nvidia,core-power-req-active-high;
896 nvidia,sys-clock-req-active-high;
897 };
898
899 hda@70030000 {
900 status = "okay";
901 };
902
903 usb@70090000 {
904 phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, /* 1st USB A */
905 <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, /* Internal USB */
906 <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, /* 2nd USB A */
907 <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>, /* 1st USB A */
908 <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>; /* 2nd USB A */
909 phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0", "usb3-1";
910
911 avddio-pex-supply = <&vdd_1v05_run>;
912 dvddio-pex-supply = <&vdd_1v05_run>;
913 avdd-usb-supply = <&vdd_3v3_lp0>;
914 avdd-pll-utmip-supply = <&vddio_1v8>;
915 avdd-pll-erefe-supply = <&avdd_1v05_run>;
916 avdd-usb-ss-pll-supply = <&vdd_1v05_run>;
917 hvdd-usb-ss-supply = <&vdd_3v3_lp0>;
918 hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>;
919
920 status = "okay";
921 };
922
923 padctl@7009f000 {
924 avdd-pll-utmip-supply = <&vddio_1v8>;
925 avdd-pll-erefe-supply = <&avdd_1v05_run>;
926 avdd-pex-pll-supply = <&vdd_1v05_run>;
927 hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
928
929 pads {
930 usb2 {
931 status = "okay";
932
933 lanes {
934 usb2-0 {
935 nvidia,function = "xusb";
936 status = "okay";
937 };
938
939 usb2-1 {
940 nvidia,function = "xusb";
941 status = "okay";
942 };
943
944 usb2-2 {
945 nvidia,function = "xusb";
946 status = "okay";
947 };
948 };
949 };
950
951 pcie {
952 status = "okay";
953
954 lanes {
955 pcie-0 {
956 nvidia,function = "usb3-ss";
957 status = "okay";
958 };
959
960 pcie-1 {
961 nvidia,function = "usb3-ss";
962 status = "okay";
963 };
964 };
965 };
966 };
967
968 ports {
969 usb2-0 {
970 status = "okay";
971 mode = "otg";
972
973 vbus-supply = <&vdd_usb1_vbus>;
974 };
975
976 usb2-1 {
977 status = "okay";
978 mode = "host";
979
980 vbus-supply = <&vdd_run_cam>;
981 };
982
983 usb2-2 {
984 status = "okay";
985 mode = "host";
986
987 vbus-supply = <&vdd_usb3_vbus>;
988 };
989
990 usb3-0 {
991 nvidia,usb2-companion = <0>;
992 status = "okay";
993 };
994
995 usb3-1 {
996 nvidia,usb2-companion = <2>;
997 status = "okay";
998 };
999 };
1000 };
1001
1002 sdhci@700b0400 {
1003 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
1004 power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
1005 wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
1006 status = "okay";
1007 bus-width = <4>;
1008 vqmmc-supply = <&vddio_sdmmc3>;
1009 };
1010
1011 sdhci@700b0600 {
1012 status = "okay";
1013 bus-width = <8>;
1014 non-removable;
1015 };
1016
1017 ahub@70300000 {
1018 i2s@70301100 {
1019 status = "okay";
1020 };
1021 };
1022
1023 usb@7d000000 {
1024 status = "okay";
1025 };
1026
1027 usb-phy@7d000000 {
1028 status = "okay";
1029 vbus-supply = <&vdd_usb1_vbus>;
1030 };
1031
1032 usb@7d004000 {
1033 status = "okay";
1034 };
1035
1036 usb-phy@7d004000 {
1037 status = "okay";
1038 vbus-supply = <&vdd_run_cam>;
1039 };
1040
1041 usb@7d008000 {
1042 status = "okay";
1043 };
1044
1045 usb-phy@7d008000 {
1046 status = "okay";
1047 vbus-supply = <&vdd_usb3_vbus>;
1048 };
1049
1050 backlight: backlight {
1051 compatible = "pwm-backlight";
1052
1053 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
1054 power-supply = <&vdd_led>;
1055 pwms = <&pwm 1 1000000>;
1056
1057 brightness-levels = <0 4 8 16 32 64 128 255>;
1058 default-brightness-level = <6>;
1059 };
1060
1061 clocks {
1062 compatible = "simple-bus";
1063 #address-cells = <1>;
1064 #size-cells = <0>;
1065
1066 clk32k_in: clock@0 {
1067 compatible = "fixed-clock";
1068 reg = <0>;
1069 #clock-cells = <0>;
1070 clock-frequency = <32768>;
1071 };
1072 };
1073
1074 gpio-keys {
1075 compatible = "gpio-keys";
1076
1077 power {
1078 label = "Power";
1079 gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1080 linux,code = <KEY_POWER>;
1081 debounce-interval = <10>;
1082 wakeup-source;
1083 };
1084 };
1085
1086 panel: panel {
1087 compatible = "lg,lp129qe", "simple-panel";
1088
1089 backlight = <&backlight>;
1090 ddc-i2c-bus = <&dpaux>;
1091 };
1092
1093 regulators {
1094 compatible = "simple-bus";
1095 #address-cells = <1>;
1096 #size-cells = <0>;
1097
1098 vdd_mux: regulator@0 {
1099 compatible = "regulator-fixed";
1100 reg = <0>;
1101 regulator-name = "+VDD_MUX";
1102 regulator-min-microvolt = <12000000>;
1103 regulator-max-microvolt = <12000000>;
1104 regulator-always-on;
1105 regulator-boot-on;
1106 };
1107
1108 vdd_5v0_sys: regulator@1 {
1109 compatible = "regulator-fixed";
1110 reg = <1>;
1111 regulator-name = "+5V_SYS";
1112 regulator-min-microvolt = <5000000>;
1113 regulator-max-microvolt = <5000000>;
1114 regulator-always-on;
1115 regulator-boot-on;
1116 vin-supply = <&vdd_mux>;
1117 };
1118
1119 vdd_3v3_sys: regulator@2 {
1120 compatible = "regulator-fixed";
1121 reg = <2>;
1122 regulator-name = "+3.3V_SYS";
1123 regulator-min-microvolt = <3300000>;
1124 regulator-max-microvolt = <3300000>;
1125 regulator-always-on;
1126 regulator-boot-on;
1127 vin-supply = <&vdd_mux>;
1128 };
1129
1130 vdd_3v3_run: regulator@3 {
1131 compatible = "regulator-fixed";
1132 reg = <3>;
1133 regulator-name = "+3.3V_RUN";
1134 regulator-min-microvolt = <3300000>;
1135 regulator-max-microvolt = <3300000>;
1136 regulator-always-on;
1137 regulator-boot-on;
1138 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
1139 enable-active-high;
1140 vin-supply = <&vdd_3v3_sys>;
1141 };
1142
1143 vdd_3v3_hdmi: regulator@4 {
1144 compatible = "regulator-fixed";
1145 reg = <4>;
1146 regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
1147 regulator-min-microvolt = <3300000>;
1148 regulator-max-microvolt = <3300000>;
1149 vin-supply = <&vdd_3v3_run>;
1150 };
1151
1152 vdd_led: regulator@5 {
1153 compatible = "regulator-fixed";
1154 reg = <5>;
1155 regulator-name = "+VDD_LED";
1156 regulator-min-microvolt = <3300000>;
1157 regulator-max-microvolt = <3300000>;
1158 gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
1159 enable-active-high;
1160 vin-supply = <&vdd_mux>;
1161 };
1162
1163 vdd_5v0_ts: regulator@6 {
1164 compatible = "regulator-fixed";
1165 reg = <6>;
1166 regulator-name = "+5V_VDD_TS_SW";
1167 regulator-min-microvolt = <5000000>;
1168 regulator-max-microvolt = <5000000>;
1169 regulator-boot-on;
1170 gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
1171 enable-active-high;
1172 vin-supply = <&vdd_5v0_sys>;
1173 };
1174
1175 vdd_usb1_vbus: regulator@7 {
1176 compatible = "regulator-fixed";
1177 reg = <7>;
1178 regulator-name = "+5V_USB_HS";
1179 regulator-min-microvolt = <5000000>;
1180 regulator-max-microvolt = <5000000>;
1181 gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1182 enable-active-high;
1183 gpio-open-drain;
1184 vin-supply = <&vdd_5v0_sys>;
1185 };
1186
1187 vdd_usb3_vbus: regulator@8 {
1188 compatible = "regulator-fixed";
1189 reg = <8>;
1190 regulator-name = "+5V_USB_SS";
1191 regulator-min-microvolt = <5000000>;
1192 regulator-max-microvolt = <5000000>;
1193 gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
1194 enable-active-high;
1195 gpio-open-drain;
1196 vin-supply = <&vdd_5v0_sys>;
1197 };
1198
1199 vdd_3v3_panel: regulator@9 {
1200 compatible = "regulator-fixed";
1201 reg = <9>;
1202 regulator-name = "+3.3V_PANEL";
1203 regulator-min-microvolt = <3300000>;
1204 regulator-max-microvolt = <3300000>;
1205 gpio = <&pmic 4 GPIO_ACTIVE_HIGH>;
1206 enable-active-high;
1207 vin-supply = <&vdd_3v3_run>;
1208 };
1209
1210 vdd_3v3_lp0: regulator@10 {
1211 compatible = "regulator-fixed";
1212 reg = <10>;
1213 regulator-name = "+3.3V_LP0";
1214 regulator-min-microvolt = <3300000>;
1215 regulator-max-microvolt = <3300000>;
1216 /*
1217 * TODO: find a way to wire this up with the USB EHCI
1218 * controllers so that it can be enabled on demand.
1219 */
1220 regulator-always-on;
1221 gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
1222 enable-active-high;
1223 vin-supply = <&vdd_3v3_sys>;
1224 };
1225
1226 vdd_hdmi_pll: regulator@11 {
1227 compatible = "regulator-fixed";
1228 reg = <11>;
1229 regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
1230 regulator-min-microvolt = <1050000>;
1231 regulator-max-microvolt = <1050000>;
1232 gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1233 vin-supply = <&vdd_1v05_run>;
1234 };
1235
1236 vdd_5v0_hdmi: regulator@12 {
1237 compatible = "regulator-fixed";
1238 reg = <12>;
1239 regulator-name = "+5V_HDMI_CON";
1240 regulator-min-microvolt = <5000000>;
1241 regulator-max-microvolt = <5000000>;
1242 gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1243 enable-active-high;
1244 vin-supply = <&vdd_5v0_sys>;
1245 };
1246 };
1247
1248 sound {
1249 compatible = "nvidia,tegra-audio-max98090-venice2",
1250 "nvidia,tegra-audio-max98090";
1251 nvidia,model = "NVIDIA Tegra Venice2";
1252
1253 nvidia,audio-routing =
1254 "Headphones", "HPR",
1255 "Headphones", "HPL",
1256 "Speakers", "SPKR",
1257 "Speakers", "SPKL",
1258 "Mic Jack", "MICBIAS",
1259 "IN34", "Mic Jack";
1260
1261 nvidia,i2s-controller = <&tegra_i2s1>;
1262 nvidia,audio-codec = <&acodec>;
1263
1264 clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
1265 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
1266 <&tegra_car TEGRA124_CLK_EXTERN1>;
1267 clock-names = "pll_a", "pll_a_out0", "mclk";
1268 };
1269};
1270
1271#include "cros-ec-keyboard.dtsi"
1/dts-v1/;
2
3#include <dt-bindings/input/input.h>
4#include "tegra124.dtsi"
5
6/ {
7 model = "NVIDIA Tegra124 Venice2";
8 compatible = "nvidia,venice2", "nvidia,tegra124";
9
10 aliases {
11 rtc0 = "/i2c@7000d000/pmic@40";
12 rtc1 = "/rtc@7000e000";
13 serial0 = &uarta;
14 };
15
16 chosen {
17 stdout-path = "serial0:115200n8";
18 };
19
20 memory {
21 reg = <0x0 0x80000000 0x0 0x80000000>;
22 };
23
24 host1x@50000000 {
25 hdmi@54280000 {
26 status = "okay";
27
28 vdd-supply = <&vdd_3v3_hdmi>;
29 pll-supply = <&vdd_hdmi_pll>;
30 hdmi-supply = <&vdd_5v0_hdmi>;
31
32 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
33 nvidia,hpd-gpio =
34 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
35 };
36
37 sor@54540000 {
38 status = "okay";
39
40 nvidia,dpaux = <&dpaux>;
41 nvidia,panel = <&panel>;
42 };
43
44 dpaux@545c0000 {
45 vdd-supply = <&vdd_3v3_panel>;
46 status = "okay";
47 };
48 };
49
50 gpu@0,57000000 {
51 /*
52 * Node left disabled on purpose - the bootloader will enable
53 * it after having set the VPR up
54 */
55 vdd-supply = <&vdd_gpu>;
56 };
57
58 pinmux: pinmux@70000868 {
59 pinctrl-names = "boot";
60 pinctrl-0 = <&pinmux_boot>;
61
62 pinmux_boot: common {
63 dap_mclk1_pw4 {
64 nvidia,pins = "dap_mclk1_pw4";
65 nvidia,function = "extperiph1";
66 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
67 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
68 nvidia,tristate = <TEGRA_PIN_DISABLE>;
69 };
70 dap1_din_pn1 {
71 nvidia,pins = "dap1_din_pn1";
72 nvidia,function = "i2s0";
73 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
74 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
75 nvidia,tristate = <TEGRA_PIN_ENABLE>;
76 };
77 dap1_dout_pn2 {
78 nvidia,pins = "dap1_dout_pn2",
79 "dap1_fs_pn0",
80 "dap1_sclk_pn3";
81 nvidia,function = "i2s0";
82 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
83 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
84 nvidia,tristate = <TEGRA_PIN_ENABLE>;
85 };
86 dap2_din_pa4 {
87 nvidia,pins = "dap2_din_pa4";
88 nvidia,function = "i2s1";
89 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
90 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
91 nvidia,tristate = <TEGRA_PIN_DISABLE>;
92 };
93 dap2_dout_pa5 {
94 nvidia,pins = "dap2_dout_pa5",
95 "dap2_fs_pa2",
96 "dap2_sclk_pa3";
97 nvidia,function = "i2s1";
98 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
99 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
100 nvidia,tristate = <TEGRA_PIN_DISABLE>;
101 };
102 dvfs_pwm_px0 {
103 nvidia,pins = "dvfs_pwm_px0",
104 "dvfs_clk_px2";
105 nvidia,function = "cldvfs";
106 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
107 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
108 nvidia,tristate = <TEGRA_PIN_DISABLE>;
109 };
110 ulpi_clk_py0 {
111 nvidia,pins = "ulpi_clk_py0",
112 "ulpi_nxt_py2",
113 "ulpi_stp_py3";
114 nvidia,function = "spi1";
115 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
116 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
117 nvidia,tristate = <TEGRA_PIN_DISABLE>;
118 };
119 ulpi_dir_py1 {
120 nvidia,pins = "ulpi_dir_py1";
121 nvidia,function = "spi1";
122 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
123 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
124 nvidia,tristate = <TEGRA_PIN_DISABLE>;
125 };
126 cam_i2c_scl_pbb1 {
127 nvidia,pins = "cam_i2c_scl_pbb1",
128 "cam_i2c_sda_pbb2";
129 nvidia,function = "i2c3";
130 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
131 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
132 nvidia,tristate = <TEGRA_PIN_DISABLE>;
133 nvidia,lock = <TEGRA_PIN_DISABLE>;
134 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
135 };
136 gen2_i2c_scl_pt5 {
137 nvidia,pins = "gen2_i2c_scl_pt5",
138 "gen2_i2c_sda_pt6";
139 nvidia,function = "i2c2";
140 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
141 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
142 nvidia,tristate = <TEGRA_PIN_DISABLE>;
143 nvidia,lock = <TEGRA_PIN_DISABLE>;
144 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
145 };
146 pg4 {
147 nvidia,pins = "pg4",
148 "pg5",
149 "pg6",
150 "pi3";
151 nvidia,function = "spi4";
152 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
153 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
154 nvidia,tristate = <TEGRA_PIN_DISABLE>;
155 };
156 pg7 {
157 nvidia,pins = "pg7";
158 nvidia,function = "spi4";
159 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
160 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
161 nvidia,tristate = <TEGRA_PIN_DISABLE>;
162 };
163 ph1 {
164 nvidia,pins = "ph1";
165 nvidia,function = "pwm1";
166 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
167 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
168 nvidia,tristate = <TEGRA_PIN_DISABLE>;
169 };
170 pk0 {
171 nvidia,pins = "pk0",
172 "kb_row15_ps7",
173 "clk_32k_out_pa0";
174 nvidia,function = "soc";
175 nvidia,pull = <TEGRA_PIN_PULL_UP>;
176 nvidia,tristate = <TEGRA_PIN_DISABLE>;
177 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
178 };
179 sdmmc1_clk_pz0 {
180 nvidia,pins = "sdmmc1_clk_pz0";
181 nvidia,function = "sdmmc1";
182 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
183 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
184 nvidia,tristate = <TEGRA_PIN_DISABLE>;
185 };
186 sdmmc1_cmd_pz1 {
187 nvidia,pins = "sdmmc1_cmd_pz1",
188 "sdmmc1_dat0_py7",
189 "sdmmc1_dat1_py6",
190 "sdmmc1_dat2_py5",
191 "sdmmc1_dat3_py4";
192 nvidia,function = "sdmmc1";
193 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
194 nvidia,pull = <TEGRA_PIN_PULL_UP>;
195 nvidia,tristate = <TEGRA_PIN_DISABLE>;
196 };
197 sdmmc3_clk_pa6 {
198 nvidia,pins = "sdmmc3_clk_pa6";
199 nvidia,function = "sdmmc3";
200 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
201 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
202 nvidia,tristate = <TEGRA_PIN_DISABLE>;
203 };
204 sdmmc3_cmd_pa7 {
205 nvidia,pins = "sdmmc3_cmd_pa7",
206 "sdmmc3_dat0_pb7",
207 "sdmmc3_dat1_pb6",
208 "sdmmc3_dat2_pb5",
209 "sdmmc3_dat3_pb4",
210 "sdmmc3_clk_lb_out_pee4",
211 "sdmmc3_clk_lb_in_pee5";
212 nvidia,function = "sdmmc3";
213 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
214 nvidia,pull = <TEGRA_PIN_PULL_UP>;
215 nvidia,tristate = <TEGRA_PIN_DISABLE>;
216 };
217 sdmmc4_clk_pcc4 {
218 nvidia,pins = "sdmmc4_clk_pcc4";
219 nvidia,function = "sdmmc4";
220 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
221 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
222 nvidia,tristate = <TEGRA_PIN_DISABLE>;
223 };
224 sdmmc4_cmd_pt7 {
225 nvidia,pins = "sdmmc4_cmd_pt7",
226 "sdmmc4_dat0_paa0",
227 "sdmmc4_dat1_paa1",
228 "sdmmc4_dat2_paa2",
229 "sdmmc4_dat3_paa3",
230 "sdmmc4_dat4_paa4",
231 "sdmmc4_dat5_paa5",
232 "sdmmc4_dat6_paa6",
233 "sdmmc4_dat7_paa7";
234 nvidia,function = "sdmmc4";
235 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
236 nvidia,pull = <TEGRA_PIN_PULL_UP>;
237 nvidia,tristate = <TEGRA_PIN_DISABLE>;
238 };
239 pwr_i2c_scl_pz6 {
240 nvidia,pins = "pwr_i2c_scl_pz6",
241 "pwr_i2c_sda_pz7";
242 nvidia,function = "i2cpwr";
243 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
244 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
245 nvidia,tristate = <TEGRA_PIN_DISABLE>;
246 nvidia,lock = <TEGRA_PIN_DISABLE>;
247 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
248 };
249 jtag_rtck {
250 nvidia,pins = "jtag_rtck";
251 nvidia,function = "rtck";
252 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
253 nvidia,pull = <TEGRA_PIN_PULL_UP>;
254 nvidia,tristate = <TEGRA_PIN_DISABLE>;
255 };
256 clk_32k_in {
257 nvidia,pins = "clk_32k_in";
258 nvidia,function = "clk";
259 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
260 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
261 nvidia,tristate = <TEGRA_PIN_DISABLE>;
262 };
263 core_pwr_req {
264 nvidia,pins = "core_pwr_req";
265 nvidia,function = "pwron";
266 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
267 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
268 nvidia,tristate = <TEGRA_PIN_DISABLE>;
269 };
270 cpu_pwr_req {
271 nvidia,pins = "cpu_pwr_req";
272 nvidia,function = "cpu";
273 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
274 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
275 nvidia,tristate = <TEGRA_PIN_DISABLE>;
276 };
277 pwr_int_n {
278 nvidia,pins = "pwr_int_n";
279 nvidia,function = "pmi";
280 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
281 nvidia,pull = <TEGRA_PIN_PULL_UP>;
282 nvidia,tristate = <TEGRA_PIN_DISABLE>;
283 };
284 reset_out_n {
285 nvidia,pins = "reset_out_n";
286 nvidia,function = "reset_out_n";
287 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
288 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
289 nvidia,tristate = <TEGRA_PIN_DISABLE>;
290 };
291 clk3_out_pee0 {
292 nvidia,pins = "clk3_out_pee0";
293 nvidia,function = "extperiph3";
294 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
295 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
296 nvidia,tristate = <TEGRA_PIN_DISABLE>;
297 };
298 dap4_din_pp5 {
299 nvidia,pins = "dap4_din_pp5";
300 nvidia,function = "i2s3";
301 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
302 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
303 nvidia,tristate = <TEGRA_PIN_ENABLE>;
304 };
305 dap4_dout_pp6 {
306 nvidia,pins = "dap4_dout_pp6",
307 "dap4_fs_pp4",
308 "dap4_sclk_pp7";
309 nvidia,function = "i2s3";
310 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
311 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
312 nvidia,tristate = <TEGRA_PIN_ENABLE>;
313 };
314 gen1_i2c_sda_pc5 {
315 nvidia,pins = "gen1_i2c_sda_pc5",
316 "gen1_i2c_scl_pc4";
317 nvidia,function = "i2c1";
318 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
319 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
320 nvidia,tristate = <TEGRA_PIN_DISABLE>;
321 nvidia,lock = <TEGRA_PIN_DISABLE>;
322 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
323 };
324 uart2_cts_n_pj5 {
325 nvidia,pins = "uart2_cts_n_pj5";
326 nvidia,function = "uartb";
327 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
328 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
329 nvidia,tristate = <TEGRA_PIN_DISABLE>;
330 };
331 uart2_rts_n_pj6 {
332 nvidia,pins = "uart2_rts_n_pj6";
333 nvidia,function = "uartb";
334 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
335 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
336 nvidia,tristate = <TEGRA_PIN_DISABLE>;
337 };
338 uart2_rxd_pc3 {
339 nvidia,pins = "uart2_rxd_pc3";
340 nvidia,function = "irda";
341 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
342 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
343 nvidia,tristate = <TEGRA_PIN_DISABLE>;
344 };
345 uart2_txd_pc2 {
346 nvidia,pins = "uart2_txd_pc2";
347 nvidia,function = "irda";
348 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
349 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
350 nvidia,tristate = <TEGRA_PIN_DISABLE>;
351 };
352 uart3_cts_n_pa1 {
353 nvidia,pins = "uart3_cts_n_pa1",
354 "uart3_rxd_pw7";
355 nvidia,function = "uartc";
356 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
357 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
358 nvidia,tristate = <TEGRA_PIN_DISABLE>;
359 };
360 uart3_rts_n_pc0 {
361 nvidia,pins = "uart3_rts_n_pc0",
362 "uart3_txd_pw6";
363 nvidia,function = "uartc";
364 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
365 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
366 nvidia,tristate = <TEGRA_PIN_DISABLE>;
367 };
368 hdmi_cec_pee3 {
369 nvidia,pins = "hdmi_cec_pee3";
370 nvidia,function = "cec";
371 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
372 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
373 nvidia,tristate = <TEGRA_PIN_DISABLE>;
374 nvidia,lock = <TEGRA_PIN_DISABLE>;
375 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
376 };
377 hdmi_int_pn7 {
378 nvidia,pins = "hdmi_int_pn7";
379 nvidia,function = "rsvd1";
380 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
381 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
382 nvidia,tristate = <TEGRA_PIN_DISABLE>;
383 };
384 ddc_scl_pv4 {
385 nvidia,pins = "ddc_scl_pv4",
386 "ddc_sda_pv5";
387 nvidia,function = "i2c4";
388 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
389 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
390 nvidia,tristate = <TEGRA_PIN_DISABLE>;
391 nvidia,lock = <TEGRA_PIN_DISABLE>;
392 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
393 };
394 pj7 {
395 nvidia,pins = "pj7",
396 "pk7";
397 nvidia,function = "uartd";
398 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
399 nvidia,tristate = <TEGRA_PIN_DISABLE>;
400 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
401 };
402 pb0 {
403 nvidia,pins = "pb0",
404 "pb1";
405 nvidia,function = "uartd";
406 nvidia,pull = <TEGRA_PIN_PULL_UP>;
407 nvidia,tristate = <TEGRA_PIN_DISABLE>;
408 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
409 };
410 ph0 {
411 nvidia,pins = "ph0";
412 nvidia,function = "pwm0";
413 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
414 nvidia,tristate = <TEGRA_PIN_DISABLE>;
415 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
416 };
417 kb_row10_ps2 {
418 nvidia,pins = "kb_row10_ps2";
419 nvidia,function = "uarta";
420 nvidia,pull = <TEGRA_PIN_PULL_UP>;
421 nvidia,tristate = <TEGRA_PIN_DISABLE>;
422 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
423 };
424 kb_row9_ps1 {
425 nvidia,pins = "kb_row9_ps1";
426 nvidia,function = "uarta";
427 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
428 nvidia,tristate = <TEGRA_PIN_DISABLE>;
429 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
430 };
431 kb_row6_pr6 {
432 nvidia,pins = "kb_row6_pr6";
433 nvidia,function = "displaya_alt";
434 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
435 nvidia,tristate = <TEGRA_PIN_DISABLE>;
436 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
437 };
438 usb_vbus_en0_pn4 {
439 nvidia,pins = "usb_vbus_en0_pn4",
440 "usb_vbus_en1_pn5";
441 nvidia,function = "usb";
442 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
443 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
444 nvidia,tristate = <TEGRA_PIN_DISABLE>;
445 nvidia,lock = <TEGRA_PIN_DISABLE>;
446 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
447 };
448 drive_sdio1 {
449 nvidia,pins = "drive_sdio1";
450 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
451 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
452 nvidia,pull-down-strength = <32>;
453 nvidia,pull-up-strength = <42>;
454 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
455 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
456 };
457 drive_sdio3 {
458 nvidia,pins = "drive_sdio3";
459 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
460 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
461 nvidia,pull-down-strength = <20>;
462 nvidia,pull-up-strength = <36>;
463 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
464 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
465 };
466 drive_gma {
467 nvidia,pins = "drive_gma";
468 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
469 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
470 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
471 nvidia,pull-down-strength = <1>;
472 nvidia,pull-up-strength = <2>;
473 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
474 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
475 nvidia,drive-type = <1>;
476 };
477 als_irq_l {
478 nvidia,pins = "gpio_x3_aud_px3";
479 nvidia,function = "gmi";
480 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
481 nvidia,tristate = <TEGRA_PIN_ENABLE>;
482 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
483 };
484 codec_irq_l {
485 nvidia,pins = "ph4";
486 nvidia,function = "gmi";
487 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
488 nvidia,tristate = <TEGRA_PIN_DISABLE>;
489 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
490 };
491 lcd_bl_en {
492 nvidia,pins = "ph2";
493 nvidia,function = "gmi";
494 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
495 nvidia,tristate = <TEGRA_PIN_DISABLE>;
496 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
497 };
498 touch_irq_l {
499 nvidia,pins = "gpio_w3_aud_pw3";
500 nvidia,function = "spi6";
501 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
502 nvidia,tristate = <TEGRA_PIN_ENABLE>;
503 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
504 };
505 tpm_davint_l {
506 nvidia,pins = "ph6";
507 nvidia,function = "gmi";
508 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
509 nvidia,tristate = <TEGRA_PIN_ENABLE>;
510 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
511 };
512 ts_irq_l {
513 nvidia,pins = "pk2";
514 nvidia,function = "gmi";
515 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
516 nvidia,tristate = <TEGRA_PIN_ENABLE>;
517 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
518 };
519 ts_reset_l {
520 nvidia,pins = "pk4";
521 nvidia,function = "gmi";
522 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
523 nvidia,tristate = <TEGRA_PIN_DISABLE>;
524 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
525 };
526 ts_shdn_l {
527 nvidia,pins = "pk1";
528 nvidia,function = "gmi";
529 nvidia,pull = <TEGRA_PIN_PULL_UP>;
530 nvidia,tristate = <TEGRA_PIN_DISABLE>;
531 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
532 };
533 ph7 {
534 nvidia,pins = "ph7";
535 nvidia,function = "gmi";
536 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
537 nvidia,tristate = <TEGRA_PIN_DISABLE>;
538 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
539 };
540 kb_col0_ap {
541 nvidia,pins = "kb_col0_pq0";
542 nvidia,function = "rsvd4";
543 nvidia,pull = <TEGRA_PIN_PULL_UP>;
544 nvidia,tristate = <TEGRA_PIN_DISABLE>;
545 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
546 };
547 lid_open {
548 nvidia,pins = "kb_row4_pr4";
549 nvidia,function = "rsvd3";
550 nvidia,pull = <TEGRA_PIN_PULL_UP>;
551 nvidia,tristate = <TEGRA_PIN_DISABLE>;
552 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
553 };
554 en_vdd_sd {
555 nvidia,pins = "kb_row0_pr0";
556 nvidia,function = "rsvd4";
557 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
558 nvidia,tristate = <TEGRA_PIN_DISABLE>;
559 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
560 };
561 ac_ok {
562 nvidia,pins = "pj0";
563 nvidia,function = "gmi";
564 nvidia,pull = <TEGRA_PIN_PULL_UP>;
565 nvidia,tristate = <TEGRA_PIN_ENABLE>;
566 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
567 };
568 sensor_irq_l {
569 nvidia,pins = "pi6";
570 nvidia,function = "gmi";
571 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
572 nvidia,tristate = <TEGRA_PIN_DISABLE>;
573 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
574 };
575 wifi_en {
576 nvidia,pins = "gpio_x7_aud_px7";
577 nvidia,function = "rsvd4";
578 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
579 nvidia,tristate = <TEGRA_PIN_DISABLE>;
580 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
581 };
582 wifi_rst_l {
583 nvidia,pins = "clk2_req_pcc5";
584 nvidia,function = "dap";
585 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
586 nvidia,tristate = <TEGRA_PIN_DISABLE>;
587 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
588 };
589 hp_det_l {
590 nvidia,pins = "ulpi_data1_po2";
591 nvidia,function = "spi3";
592 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
593 nvidia,tristate = <TEGRA_PIN_DISABLE>;
594 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
595 };
596 };
597 };
598
599 serial@70006000 {
600 status = "okay";
601 };
602
603 pwm@7000a000 {
604 status = "okay";
605 };
606
607 i2c@7000c000 {
608 status = "okay";
609 clock-frequency = <100000>;
610
611 acodec: audio-codec@10 {
612 compatible = "maxim,max98090";
613 reg = <0x10>;
614 interrupt-parent = <&gpio>;
615 interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>;
616 };
617 };
618
619 i2c@7000c400 {
620 status = "okay";
621 clock-frequency = <100000>;
622
623 trackpad@4b {
624 compatible = "atmel,maxtouch";
625 reg = <0x4b>;
626 interrupt-parent = <&gpio>;
627 interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_LOW>;
628 linux,gpio-keymap = <0 0 0 BTN_LEFT>;
629 };
630 };
631
632 i2c@7000c500 {
633 status = "okay";
634 clock-frequency = <100000>;
635 };
636
637 hdmi_ddc: i2c@7000c700 {
638 status = "okay";
639 clock-frequency = <100000>;
640 };
641
642 i2c@7000d000 {
643 status = "okay";
644 clock-frequency = <400000>;
645
646 pmic: pmic@40 {
647 compatible = "ams,as3722";
648 reg = <0x40>;
649 interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
650
651 ams,system-power-controller;
652
653 #interrupt-cells = <2>;
654 interrupt-controller;
655
656 gpio-controller;
657 #gpio-cells = <2>;
658
659 pinctrl-names = "default";
660 pinctrl-0 = <&as3722_default>;
661
662 as3722_default: pinmux {
663 gpio0 {
664 pins = "gpio0";
665 function = "gpio";
666 bias-pull-down;
667 };
668
669 gpio1_2_4_7 {
670 pins = "gpio1", "gpio2", "gpio4", "gpio7";
671 function = "gpio";
672 bias-pull-up;
673 };
674
675 gpio3_6 {
676 pins = "gpio3", "gpio6";
677 bias-high-impedance;
678 };
679
680 gpio5 {
681 pins = "gpio5";
682 function = "clk32k-out";
683 };
684 };
685
686 regulators {
687 vsup-sd2-supply = <&vdd_5v0_sys>;
688 vsup-sd3-supply = <&vdd_5v0_sys>;
689 vsup-sd4-supply = <&vdd_5v0_sys>;
690 vsup-sd5-supply = <&vdd_5v0_sys>;
691 vin-ldo0-supply = <&vdd_1v35_lp0>;
692 vin-ldo1-6-supply = <&vdd_3v3_run>;
693 vin-ldo2-5-7-supply = <&vddio_1v8>;
694 vin-ldo3-4-supply = <&vdd_3v3_sys>;
695 vin-ldo9-10-supply = <&vdd_5v0_sys>;
696 vin-ldo11-supply = <&vdd_3v3_run>;
697
698 sd0 {
699 regulator-name = "+VDD_CPU_AP";
700 regulator-min-microvolt = <700000>;
701 regulator-max-microvolt = <1400000>;
702 regulator-min-microamp = <3500000>;
703 regulator-max-microamp = <3500000>;
704 regulator-always-on;
705 regulator-boot-on;
706 ams,ext-control = <2>;
707 };
708
709 sd1 {
710 regulator-name = "+VDD_CORE";
711 regulator-min-microvolt = <700000>;
712 regulator-max-microvolt = <1350000>;
713 regulator-min-microamp = <2500000>;
714 regulator-max-microamp = <2500000>;
715 regulator-always-on;
716 regulator-boot-on;
717 ams,ext-control = <1>;
718 };
719
720 vdd_1v35_lp0: sd2 {
721 regulator-name = "+1.35V_LP0(sd2)";
722 regulator-min-microvolt = <1350000>;
723 regulator-max-microvolt = <1350000>;
724 regulator-always-on;
725 regulator-boot-on;
726 };
727
728 sd3 {
729 regulator-name = "+1.35V_LP0(sd3)";
730 regulator-min-microvolt = <1350000>;
731 regulator-max-microvolt = <1350000>;
732 regulator-always-on;
733 regulator-boot-on;
734 };
735
736 vdd_1v05_run: sd4 {
737 regulator-name = "+1.05V_RUN";
738 regulator-min-microvolt = <1050000>;
739 regulator-max-microvolt = <1050000>;
740 };
741
742 vddio_1v8: sd5 {
743 regulator-name = "+1.8V_VDDIO";
744 regulator-min-microvolt = <1800000>;
745 regulator-max-microvolt = <1800000>;
746 regulator-boot-on;
747 regulator-always-on;
748 };
749
750 vdd_gpu: sd6 {
751 regulator-name = "+VDD_GPU_AP";
752 regulator-min-microvolt = <650000>;
753 regulator-max-microvolt = <1200000>;
754 regulator-min-microamp = <3500000>;
755 regulator-max-microamp = <3500000>;
756 regulator-boot-on;
757 regulator-always-on;
758 };
759
760 avdd_1v05_run: ldo0 {
761 regulator-name = "+1.05V_RUN_AVDD";
762 regulator-min-microvolt = <1050000>;
763 regulator-max-microvolt = <1050000>;
764 regulator-boot-on;
765 regulator-always-on;
766 ams,ext-control = <1>;
767 };
768
769 ldo1 {
770 regulator-name = "+1.8V_RUN_CAM";
771 regulator-min-microvolt = <1800000>;
772 regulator-max-microvolt = <1800000>;
773 };
774
775 ldo2 {
776 regulator-name = "+1.2V_GEN_AVDD";
777 regulator-min-microvolt = <1200000>;
778 regulator-max-microvolt = <1200000>;
779 regulator-boot-on;
780 regulator-always-on;
781 };
782
783 ldo3 {
784 regulator-name = "+1.00V_LP0_VDD_RTC";
785 regulator-min-microvolt = <1000000>;
786 regulator-max-microvolt = <1000000>;
787 regulator-boot-on;
788 regulator-always-on;
789 ams,enable-tracking;
790 };
791
792 vdd_run_cam: ldo4 {
793 regulator-name = "+3.3V_RUN_CAM";
794 regulator-min-microvolt = <2800000>;
795 regulator-max-microvolt = <2800000>;
796 };
797
798 ldo5 {
799 regulator-name = "+1.2V_RUN_CAM_FRONT";
800 regulator-min-microvolt = <1200000>;
801 regulator-max-microvolt = <1200000>;
802 };
803
804 vddio_sdmmc3: ldo6 {
805 regulator-name = "+VDDIO_SDMMC3";
806 regulator-min-microvolt = <1800000>;
807 regulator-max-microvolt = <3300000>;
808 };
809
810 ldo7 {
811 regulator-name = "+1.05V_RUN_CAM_REAR";
812 regulator-min-microvolt = <1050000>;
813 regulator-max-microvolt = <1050000>;
814 };
815
816 ldo9 {
817 regulator-name = "+2.8V_RUN_TOUCH";
818 regulator-min-microvolt = <2800000>;
819 regulator-max-microvolt = <2800000>;
820 };
821
822 ldo10 {
823 regulator-name = "+2.8V_RUN_CAM_AF";
824 regulator-min-microvolt = <2800000>;
825 regulator-max-microvolt = <2800000>;
826 };
827
828 ldo11 {
829 regulator-name = "+1.8V_RUN_VPP_FUSE";
830 regulator-min-microvolt = <1800000>;
831 regulator-max-microvolt = <1800000>;
832 };
833 };
834 };
835 };
836
837 spi@7000d400 {
838 status = "okay";
839
840 cros_ec: cros-ec@0 {
841 compatible = "google,cros-ec-spi";
842 spi-max-frequency = <4000000>;
843 interrupt-parent = <&gpio>;
844 interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>;
845 reg = <0>;
846
847 google,cros-ec-spi-msg-delay = <2000>;
848
849 i2c-tunnel {
850 compatible = "google,cros-ec-i2c-tunnel";
851 #address-cells = <1>;
852 #size-cells = <0>;
853
854 google,remote-bus = <0>;
855
856 charger: bq24735@9 {
857 compatible = "ti,bq24735";
858 reg = <0x9>;
859 interrupt-parent = <&gpio>;
860 interrupts = <TEGRA_GPIO(J, 0)
861 GPIO_ACTIVE_HIGH>;
862 ti,ac-detect-gpios = <&gpio
863 TEGRA_GPIO(J, 0)
864 GPIO_ACTIVE_HIGH>;
865 };
866
867 battery: sbs-battery@b {
868 compatible = "sbs,sbs-battery";
869 reg = <0xb>;
870 sbs,i2c-retry-count = <2>;
871 sbs,poll-retry-count = <1>;
872 };
873 };
874 };
875 };
876
877 spi@7000da00 {
878 status = "okay";
879 spi-max-frequency = <25000000>;
880 spi-flash@0 {
881 compatible = "winbond,w25q32dw";
882 reg = <0>;
883 spi-max-frequency = <20000000>;
884 };
885 };
886
887 pmc@7000e400 {
888 nvidia,invert-interrupt;
889 nvidia,suspend-mode = <1>;
890 nvidia,cpu-pwr-good-time = <500>;
891 nvidia,cpu-pwr-off-time = <300>;
892 nvidia,core-pwr-good-time = <641 3845>;
893 nvidia,core-pwr-off-time = <61036>;
894 nvidia,core-power-req-active-high;
895 nvidia,sys-clock-req-active-high;
896 };
897
898 hda@70030000 {
899 status = "okay";
900 };
901
902 usb@70090000 {
903 phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, /* 1st USB A */
904 <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, /* Internal USB */
905 <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, /* 2nd USB A */
906 <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>, /* 1st USB A */
907 <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>; /* 2nd USB A */
908 phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0", "usb3-1";
909
910 avddio-pex-supply = <&vdd_1v05_run>;
911 dvddio-pex-supply = <&vdd_1v05_run>;
912 avdd-usb-supply = <&vdd_3v3_lp0>;
913 avdd-pll-utmip-supply = <&vddio_1v8>;
914 avdd-pll-erefe-supply = <&avdd_1v05_run>;
915 avdd-usb-ss-pll-supply = <&vdd_1v05_run>;
916 hvdd-usb-ss-supply = <&vdd_3v3_lp0>;
917 hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>;
918
919 status = "okay";
920 };
921
922 padctl@7009f000 {
923 pads {
924 usb2 {
925 status = "okay";
926
927 lanes {
928 usb2-0 {
929 nvidia,function = "xusb";
930 status = "okay";
931 };
932
933 usb2-1 {
934 nvidia,function = "xusb";
935 status = "okay";
936 };
937
938 usb2-2 {
939 nvidia,function = "xusb";
940 status = "okay";
941 };
942 };
943 };
944
945 pcie {
946 status = "okay";
947
948 lanes {
949 pcie-0 {
950 nvidia,function = "usb3-ss";
951 status = "okay";
952 };
953
954 pcie-1 {
955 nvidia,function = "usb3-ss";
956 status = "okay";
957 };
958
959 pcie-1 {
960 nvidia,function = "usb3-ss";
961 status = "okay";
962 };
963 };
964 };
965 };
966
967 ports {
968 usb2-0 {
969 status = "okay";
970 mode = "otg";
971
972 vbus-supply = <&vdd_usb1_vbus>;
973 };
974
975 usb2-1 {
976 status = "okay";
977 mode = "host";
978
979 vbus-supply = <&vdd_run_cam>;
980 };
981
982 usb2-2 {
983 status = "okay";
984 mode = "host";
985
986 vbus-supply = <&vdd_usb3_vbus>;
987 };
988
989 usb3-0 {
990 nvidia,usb2-companion = <0>;
991 status = "okay";
992 };
993
994 usb3-1 {
995 nvidia,usb2-companion = <2>;
996 status = "okay";
997 };
998 };
999 };
1000
1001 sdhci@700b0400 {
1002 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
1003 power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
1004 wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
1005 status = "okay";
1006 bus-width = <4>;
1007 vqmmc-supply = <&vddio_sdmmc3>;
1008 };
1009
1010 sdhci@700b0600 {
1011 status = "okay";
1012 bus-width = <8>;
1013 non-removable;
1014 };
1015
1016 ahub@70300000 {
1017 i2s@70301100 {
1018 status = "okay";
1019 };
1020 };
1021
1022 usb@7d000000 {
1023 status = "okay";
1024 };
1025
1026 usb-phy@7d000000 {
1027 status = "okay";
1028 vbus-supply = <&vdd_usb1_vbus>;
1029 };
1030
1031 usb@7d004000 {
1032 status = "okay";
1033 };
1034
1035 usb-phy@7d004000 {
1036 status = "okay";
1037 vbus-supply = <&vdd_run_cam>;
1038 };
1039
1040 usb@7d008000 {
1041 status = "okay";
1042 };
1043
1044 usb-phy@7d008000 {
1045 status = "okay";
1046 vbus-supply = <&vdd_usb3_vbus>;
1047 };
1048
1049 backlight: backlight {
1050 compatible = "pwm-backlight";
1051
1052 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
1053 power-supply = <&vdd_led>;
1054 pwms = <&pwm 1 1000000>;
1055
1056 brightness-levels = <0 4 8 16 32 64 128 255>;
1057 default-brightness-level = <6>;
1058 };
1059
1060 clocks {
1061 compatible = "simple-bus";
1062 #address-cells = <1>;
1063 #size-cells = <0>;
1064
1065 clk32k_in: clock@0 {
1066 compatible = "fixed-clock";
1067 reg = <0>;
1068 #clock-cells = <0>;
1069 clock-frequency = <32768>;
1070 };
1071 };
1072
1073 gpio-keys {
1074 compatible = "gpio-keys";
1075
1076 power {
1077 label = "Power";
1078 gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1079 linux,code = <KEY_POWER>;
1080 debounce-interval = <10>;
1081 wakeup-source;
1082 };
1083 };
1084
1085 panel: panel {
1086 compatible = "lg,lp129qe", "simple-panel";
1087
1088 backlight = <&backlight>;
1089 ddc-i2c-bus = <&dpaux>;
1090 };
1091
1092 regulators {
1093 compatible = "simple-bus";
1094 #address-cells = <1>;
1095 #size-cells = <0>;
1096
1097 vdd_mux: regulator@0 {
1098 compatible = "regulator-fixed";
1099 reg = <0>;
1100 regulator-name = "+VDD_MUX";
1101 regulator-min-microvolt = <12000000>;
1102 regulator-max-microvolt = <12000000>;
1103 regulator-always-on;
1104 regulator-boot-on;
1105 };
1106
1107 vdd_5v0_sys: regulator@1 {
1108 compatible = "regulator-fixed";
1109 reg = <1>;
1110 regulator-name = "+5V_SYS";
1111 regulator-min-microvolt = <5000000>;
1112 regulator-max-microvolt = <5000000>;
1113 regulator-always-on;
1114 regulator-boot-on;
1115 vin-supply = <&vdd_mux>;
1116 };
1117
1118 vdd_3v3_sys: regulator@2 {
1119 compatible = "regulator-fixed";
1120 reg = <2>;
1121 regulator-name = "+3.3V_SYS";
1122 regulator-min-microvolt = <3300000>;
1123 regulator-max-microvolt = <3300000>;
1124 regulator-always-on;
1125 regulator-boot-on;
1126 vin-supply = <&vdd_mux>;
1127 };
1128
1129 vdd_3v3_run: regulator@3 {
1130 compatible = "regulator-fixed";
1131 reg = <3>;
1132 regulator-name = "+3.3V_RUN";
1133 regulator-min-microvolt = <3300000>;
1134 regulator-max-microvolt = <3300000>;
1135 regulator-always-on;
1136 regulator-boot-on;
1137 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
1138 enable-active-high;
1139 vin-supply = <&vdd_3v3_sys>;
1140 };
1141
1142 vdd_3v3_hdmi: regulator@4 {
1143 compatible = "regulator-fixed";
1144 reg = <4>;
1145 regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
1146 regulator-min-microvolt = <3300000>;
1147 regulator-max-microvolt = <3300000>;
1148 vin-supply = <&vdd_3v3_run>;
1149 };
1150
1151 vdd_led: regulator@5 {
1152 compatible = "regulator-fixed";
1153 reg = <5>;
1154 regulator-name = "+VDD_LED";
1155 regulator-min-microvolt = <3300000>;
1156 regulator-max-microvolt = <3300000>;
1157 gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
1158 enable-active-high;
1159 vin-supply = <&vdd_mux>;
1160 };
1161
1162 vdd_5v0_ts: regulator@6 {
1163 compatible = "regulator-fixed";
1164 reg = <6>;
1165 regulator-name = "+5V_VDD_TS_SW";
1166 regulator-min-microvolt = <5000000>;
1167 regulator-max-microvolt = <5000000>;
1168 regulator-boot-on;
1169 gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
1170 enable-active-high;
1171 vin-supply = <&vdd_5v0_sys>;
1172 };
1173
1174 vdd_usb1_vbus: regulator@7 {
1175 compatible = "regulator-fixed";
1176 reg = <7>;
1177 regulator-name = "+5V_USB_HS";
1178 regulator-min-microvolt = <5000000>;
1179 regulator-max-microvolt = <5000000>;
1180 gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1181 enable-active-high;
1182 gpio-open-drain;
1183 vin-supply = <&vdd_5v0_sys>;
1184 };
1185
1186 vdd_usb3_vbus: regulator@8 {
1187 compatible = "regulator-fixed";
1188 reg = <8>;
1189 regulator-name = "+5V_USB_SS";
1190 regulator-min-microvolt = <5000000>;
1191 regulator-max-microvolt = <5000000>;
1192 gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
1193 enable-active-high;
1194 gpio-open-drain;
1195 vin-supply = <&vdd_5v0_sys>;
1196 };
1197
1198 vdd_3v3_panel: regulator@9 {
1199 compatible = "regulator-fixed";
1200 reg = <9>;
1201 regulator-name = "+3.3V_PANEL";
1202 regulator-min-microvolt = <3300000>;
1203 regulator-max-microvolt = <3300000>;
1204 gpio = <&pmic 4 GPIO_ACTIVE_HIGH>;
1205 enable-active-high;
1206 vin-supply = <&vdd_3v3_run>;
1207 };
1208
1209 vdd_3v3_lp0: regulator@10 {
1210 compatible = "regulator-fixed";
1211 reg = <10>;
1212 regulator-name = "+3.3V_LP0";
1213 regulator-min-microvolt = <3300000>;
1214 regulator-max-microvolt = <3300000>;
1215 /*
1216 * TODO: find a way to wire this up with the USB EHCI
1217 * controllers so that it can be enabled on demand.
1218 */
1219 regulator-always-on;
1220 gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
1221 enable-active-high;
1222 vin-supply = <&vdd_3v3_sys>;
1223 };
1224
1225 vdd_hdmi_pll: regulator@11 {
1226 compatible = "regulator-fixed";
1227 reg = <11>;
1228 regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
1229 regulator-min-microvolt = <1050000>;
1230 regulator-max-microvolt = <1050000>;
1231 gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1232 vin-supply = <&vdd_1v05_run>;
1233 };
1234
1235 vdd_5v0_hdmi: regulator@12 {
1236 compatible = "regulator-fixed";
1237 reg = <12>;
1238 regulator-name = "+5V_HDMI_CON";
1239 regulator-min-microvolt = <5000000>;
1240 regulator-max-microvolt = <5000000>;
1241 gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1242 enable-active-high;
1243 vin-supply = <&vdd_5v0_sys>;
1244 };
1245 };
1246
1247 sound {
1248 compatible = "nvidia,tegra-audio-max98090-venice2",
1249 "nvidia,tegra-audio-max98090";
1250 nvidia,model = "NVIDIA Tegra Venice2";
1251
1252 nvidia,audio-routing =
1253 "Headphones", "HPR",
1254 "Headphones", "HPL",
1255 "Speakers", "SPKR",
1256 "Speakers", "SPKL",
1257 "Mic Jack", "MICBIAS",
1258 "IN34", "Mic Jack";
1259
1260 nvidia,i2s-controller = <&tegra_i2s1>;
1261 nvidia,audio-codec = <&acodec>;
1262
1263 clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
1264 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
1265 <&tegra_car TEGRA124_CLK_EXTERN1>;
1266 clock-names = "pll_a", "pll_a_out0", "mclk";
1267 };
1268};
1269
1270#include "cros-ec-keyboard.dtsi"