1// SPDX-License-Identifier: GPL-2.0
 2/*
 3 * Copyright (C) 2013 Altera Corporation <www.altera.com>
 
 
 
 
 
 
 
 
 
 
 
 
 4 */
 5
 6/dts-v1/;
 7/* First 4KB has trampoline code for secondary cores. */
 8/memreserve/ 0x00000000 0x0001000;
 9#include "socfpga.dtsi"
10
11/ {
12	soc {
13		clkmgr@ffd04000 {
14			clocks {
15				osc1 {
16					clock-frequency = <25000000>;
17				};
18			};
19		};
20
21		mmc0: dwmmc0@ff704000 {
 
22			broken-cd;
23			bus-width = <4>;
24			cap-mmc-highspeed;
25			cap-sd-highspeed;
26		};
27
28		sysmgr@ffd08000 {
29			cpu1-start-addr = <0xffd080c4>;
30		};
31	};
32};
33
34&watchdog0 {
35	status = "okay";
36};

 
 1/*
 2 *  Copyright (C) 2013 Altera Corporation <www.altera.com>
 3 *
 4 * This program is free software; you can redistribute it and/or modify it
 5 * under the terms and conditions of the GNU General Public License,
 6 * version 2, as published by the Free Software Foundation.
 7 *
 8 * This program is distributed in the hope it will be useful, but WITHOUT
 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program.  If not, see <http://www.gnu.org/licenses/>.
15 */
16
17/dts-v1/;
18/* First 4KB has trampoline code for secondary cores. */
19/memreserve/ 0x00000000 0x0001000;
20#include "socfpga.dtsi"
21
22/ {
23	soc {
24		clkmgr@ffd04000 {
25			clocks {
26				osc1 {
27					clock-frequency = <25000000>;
28				};
29			};
30		};
31
32		mmc0: dwmmc0@ff704000 {
33			num-slots = <1>;
34			broken-cd;
35			bus-width = <4>;
36			cap-mmc-highspeed;
37			cap-sd-highspeed;
38		};
39
40		sysmgr@ffd08000 {
41			cpu1-start-addr = <0xffd080c4>;
42		};
43	};
 
 
 
 
44};