Loading...
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Common features on the Zoom debug board
4 */
5
6#include "omap-gpmc-smsc911x.dtsi"
7
8&gpmc {
9 ranges = <3 0 0x10000000 0x1000000>, /* CS3: 16MB for UART */
10 <7 0 0x2c000000 0x01000000>;
11
12 /*
13 * Four port TL16CP754C serial port on GPMC,
14 * they probably share the same GPIO IRQ
15 * REVISIT: Add timing support from slls644g.pdf
16 */
17 uart@3,0 {
18 compatible = "ns16550a";
19 reg = <3 0 8>; /* CS3, offset 0, IO size 8 */
20 bank-width = <2>;
21 reg-shift = <1>;
22 reg-io-width = <1>;
23 interrupt-parent = <&gpio4>;
24 interrupts = <6 IRQ_TYPE_EDGE_RISING>; /* gpio102 */
25 clock-frequency = <1843200>;
26 current-speed = <115200>;
27 gpmc,mux-add-data = <0>;
28 gpmc,device-width = <1>;
29 gpmc,wait-pin = <1>;
30 gpmc,cycle2cycle-samecsen = <1>;
31 gpmc,cycle2cycle-diffcsen = <1>;
32 gpmc,cs-on-ns = <5>;
33 gpmc,cs-rd-off-ns = <155>;
34 gpmc,cs-wr-off-ns = <155>;
35 gpmc,adv-on-ns = <15>;
36 gpmc,adv-rd-off-ns = <40>;
37 gpmc,adv-wr-off-ns = <40>;
38 gpmc,oe-on-ns = <45>;
39 gpmc,oe-off-ns = <145>;
40 gpmc,we-on-ns = <45>;
41 gpmc,we-off-ns = <145>;
42 gpmc,rd-cycle-ns = <155>;
43 gpmc,wr-cycle-ns = <155>;
44 gpmc,access-ns = <145>;
45 gpmc,page-burst-access-ns = <20>;
46 gpmc,bus-turnaround-ns = <20>;
47 gpmc,cycle2cycle-delay-ns = <20>;
48 gpmc,wait-monitoring-ns = <0>;
49 gpmc,clk-activation-ns = <0>;
50 gpmc,wr-data-mux-bus-ns = <45>;
51 gpmc,wr-access-ns = <145>;
52 };
53 uart@3,1 {
54 compatible = "ns16550a";
55 reg = <3 0x100 8>; /* CS3, offset 0x100, IO size 8 */
56 bank-width = <2>;
57 reg-shift = <1>;
58 reg-io-width = <1>;
59 interrupt-parent = <&gpio4>;
60 interrupts = <6 IRQ_TYPE_EDGE_RISING>; /* gpio102 */
61 clock-frequency = <1843200>;
62 current-speed = <115200>;
63 };
64 uart@3,2 {
65 compatible = "ns16550a";
66 reg = <3 0x200 8>; /* CS3, offset 0x200, IO size 8 */
67 bank-width = <2>;
68 reg-shift = <1>;
69 reg-io-width = <1>;
70 interrupt-parent = <&gpio4>;
71 interrupts = <6 IRQ_TYPE_EDGE_RISING>; /* gpio102 */
72 clock-frequency = <1843200>;
73 current-speed = <115200>;
74 };
75 uart@3,3 {
76 compatible = "ns16550a";
77 reg = <3 0x300 8>; /* CS3, offset 0x300, IO size 8 */
78 bank-width = <2>;
79 reg-shift = <1>;
80 reg-io-width = <1>;
81 interrupt-parent = <&gpio4>;
82 interrupts = <6 IRQ_TYPE_EDGE_RISING>; /* gpio102 */
83 clock-frequency = <1843200>;
84 current-speed = <115200>;
85 };
86
87 ethernet@gpmc {
88 reg = <7 0 0xff>;
89 interrupt-parent = <&gpio5>;
90 interrupts = <30 IRQ_TYPE_LEVEL_LOW>; /* gpio158 */
91 };
92};
1/*
2 * Common features on the Zoom debug board
3 */
4
5#include "omap-gpmc-smsc911x.dtsi"
6
7&gpmc {
8 ranges = <3 0 0x10000000 0x1000000>, /* CS3: 16MB for UART */
9 <7 0 0x2c000000 0x01000000>;
10
11 /*
12 * Four port TL16CP754C serial port on GPMC,
13 * they probably share the same GPIO IRQ
14 * REVISIT: Add timing support from slls644g.pdf
15 */
16 uart@3,0 {
17 compatible = "ns16550a";
18 reg = <3 0 8>; /* CS3, offset 0, IO size 8 */
19 bank-width = <2>;
20 reg-shift = <1>;
21 reg-io-width = <1>;
22 interrupt-parent = <&gpio4>;
23 interrupts = <6 IRQ_TYPE_EDGE_RISING>; /* gpio102 */
24 clock-frequency = <1843200>;
25 current-speed = <115200>;
26 gpmc,mux-add-data = <0>;
27 gpmc,device-width = <1>;
28 gpmc,wait-pin = <1>;
29 gpmc,cycle2cycle-samecsen = <1>;
30 gpmc,cycle2cycle-diffcsen = <1>;
31 gpmc,cs-on-ns = <5>;
32 gpmc,cs-rd-off-ns = <155>;
33 gpmc,cs-wr-off-ns = <155>;
34 gpmc,adv-on-ns = <15>;
35 gpmc,adv-rd-off-ns = <40>;
36 gpmc,adv-wr-off-ns = <40>;
37 gpmc,oe-on-ns = <45>;
38 gpmc,oe-off-ns = <145>;
39 gpmc,we-on-ns = <45>;
40 gpmc,we-off-ns = <145>;
41 gpmc,rd-cycle-ns = <155>;
42 gpmc,wr-cycle-ns = <155>;
43 gpmc,access-ns = <145>;
44 gpmc,page-burst-access-ns = <20>;
45 gpmc,bus-turnaround-ns = <20>;
46 gpmc,cycle2cycle-delay-ns = <20>;
47 gpmc,wait-monitoring-ns = <0>;
48 gpmc,clk-activation-ns = <0>;
49 gpmc,wr-data-mux-bus-ns = <45>;
50 gpmc,wr-access-ns = <145>;
51 };
52 uart@3,1 {
53 compatible = "ns16550a";
54 reg = <3 0x100 8>; /* CS3, offset 0x100, IO size 8 */
55 bank-width = <2>;
56 reg-shift = <1>;
57 reg-io-width = <1>;
58 interrupt-parent = <&gpio4>;
59 interrupts = <6 IRQ_TYPE_EDGE_RISING>; /* gpio102 */
60 clock-frequency = <1843200>;
61 current-speed = <115200>;
62 };
63 uart@3,2 {
64 compatible = "ns16550a";
65 reg = <3 0x200 8>; /* CS3, offset 0x200, IO size 8 */
66 bank-width = <2>;
67 reg-shift = <1>;
68 reg-io-width = <1>;
69 interrupt-parent = <&gpio4>;
70 interrupts = <6 IRQ_TYPE_EDGE_RISING>; /* gpio102 */
71 clock-frequency = <1843200>;
72 current-speed = <115200>;
73 };
74 uart@3,3 {
75 compatible = "ns16550a";
76 reg = <3 0x300 8>; /* CS3, offset 0x300, IO size 8 */
77 bank-width = <2>;
78 reg-shift = <1>;
79 reg-io-width = <1>;
80 interrupt-parent = <&gpio4>;
81 interrupts = <6 IRQ_TYPE_EDGE_RISING>; /* gpio102 */
82 clock-frequency = <1843200>;
83 current-speed = <115200>;
84 };
85
86 ethernet@gpmc {
87 reg = <7 0 0xff>;
88 interrupt-parent = <&gpio5>;
89 interrupts = <30 IRQ_TYPE_LEVEL_LOW>; /* gpio158 */
90 };
91};