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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
4 *
5 * Copyright (C) 2014 Microchip
6 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
7 */
8
9#include <dt-bindings/pinctrl/at91.h>
10#include <dt-bindings/clock/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/pwm/pwm.h>
14
15/ {
16 #address-cells = <1>;
17 #size-cells = <1>;
18 model = "Atmel AT91SAM9RL family SoC";
19 compatible = "atmel,at91sam9rl", "atmel,at91sam9";
20 interrupt-parent = <&aic>;
21
22 aliases {
23 serial0 = &dbgu;
24 serial1 = &usart0;
25 serial2 = &usart1;
26 serial3 = &usart2;
27 serial4 = &usart3;
28 gpio0 = &pioA;
29 gpio1 = &pioB;
30 gpio2 = &pioC;
31 gpio3 = &pioD;
32 tcb0 = &tcb0;
33 i2c0 = &i2c0;
34 i2c1 = &i2c1;
35 ssc0 = &ssc0;
36 ssc1 = &ssc1;
37 pwm0 = &pwm0;
38 };
39
40 cpus {
41 #address-cells = <0>;
42 #size-cells = <0>;
43
44 cpu {
45 compatible = "arm,arm926ej-s";
46 device_type = "cpu";
47 };
48 };
49
50 memory {
51 device_type = "memory";
52 reg = <0x20000000 0x04000000>;
53 };
54
55 clocks {
56 slow_xtal: slow_xtal {
57 compatible = "fixed-clock";
58 #clock-cells = <0>;
59 clock-frequency = <0>;
60 };
61
62 main_xtal: main_xtal {
63 compatible = "fixed-clock";
64 #clock-cells = <0>;
65 clock-frequency = <0>;
66 };
67
68 adc_op_clk: adc_op_clk{
69 compatible = "fixed-clock";
70 #clock-cells = <0>;
71 clock-frequency = <1000000>;
72 };
73 };
74
75 sram: sram@300000 {
76 compatible = "mmio-sram";
77 reg = <0x00300000 0x10000>;
78 };
79
80 ahb {
81 compatible = "simple-bus";
82 #address-cells = <1>;
83 #size-cells = <1>;
84 ranges;
85
86 fb0: fb@500000 {
87 compatible = "atmel,at91sam9rl-lcdc";
88 reg = <0x00500000 0x1000>;
89 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
90 pinctrl-names = "default";
91 pinctrl-0 = <&pinctrl_fb>;
92 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>;
93 clock-names = "hclk", "lcdc_clk";
94 status = "disabled";
95 };
96
97 ebi: ebi@10000000 {
98 compatible = "atmel,at91sam9rl-ebi";
99 #address-cells = <2>;
100 #size-cells = <1>;
101 atmel,smc = <&smc>;
102 atmel,matrix = <&matrix>;
103 reg = <0x10000000 0x80000000>;
104 ranges = <0x0 0x0 0x10000000 0x10000000
105 0x1 0x0 0x20000000 0x10000000
106 0x2 0x0 0x30000000 0x10000000
107 0x3 0x0 0x40000000 0x10000000
108 0x4 0x0 0x50000000 0x10000000
109 0x5 0x0 0x60000000 0x10000000>;
110 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
111 status = "disabled";
112
113 nand_controller: nand-controller {
114 compatible = "atmel,at91sam9g45-nand-controller";
115 #address-cells = <2>;
116 #size-cells = <1>;
117 ranges;
118 status = "disabled";
119 };
120 };
121
122 apb {
123 compatible = "simple-bus";
124 #address-cells = <1>;
125 #size-cells = <1>;
126 ranges;
127
128 tcb0: timer@fffa0000 {
129 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
130 #address-cells = <1>;
131 #size-cells = <0>;
132 reg = <0xfffa0000 0x100>;
133 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>,
134 <17 IRQ_TYPE_LEVEL_HIGH 0>,
135 <18 IRQ_TYPE_LEVEL_HIGH 0>;
136 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>, <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>;
137 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
138 };
139
140 mmc0: mmc@fffa4000 {
141 compatible = "atmel,hsmci";
142 reg = <0xfffa4000 0x600>;
143 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
144 #address-cells = <1>;
145 #size-cells = <0>;
146 pinctrl-names = "default";
147 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
148 clock-names = "mci_clk";
149 status = "disabled";
150 };
151
152 i2c0: i2c@fffa8000 {
153 compatible = "atmel,at91sam9260-i2c";
154 reg = <0xfffa8000 0x100>;
155 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
156 #address-cells = <1>;
157 #size-cells = <0>;
158 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
159 status = "disabled";
160 };
161
162 i2c1: i2c@fffac000 {
163 compatible = "atmel,at91sam9260-i2c";
164 reg = <0xfffac000 0x100>;
165 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
166 #address-cells = <1>;
167 #size-cells = <0>;
168 status = "disabled";
169 };
170
171 usart0: serial@fffb0000 {
172 compatible = "atmel,at91sam9260-usart";
173 reg = <0xfffb0000 0x200>;
174 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
175 atmel,use-dma-rx;
176 atmel,use-dma-tx;
177 pinctrl-names = "default";
178 pinctrl-0 = <&pinctrl_usart0>;
179 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
180 clock-names = "usart";
181 status = "disabled";
182 };
183
184 usart1: serial@fffb4000 {
185 compatible = "atmel,at91sam9260-usart";
186 reg = <0xfffb4000 0x200>;
187 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
188 atmel,use-dma-rx;
189 atmel,use-dma-tx;
190 pinctrl-names = "default";
191 pinctrl-0 = <&pinctrl_usart1>;
192 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
193 clock-names = "usart";
194 status = "disabled";
195 };
196
197 usart2: serial@fffb8000 {
198 compatible = "atmel,at91sam9260-usart";
199 reg = <0xfffb8000 0x200>;
200 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
201 atmel,use-dma-rx;
202 atmel,use-dma-tx;
203 pinctrl-names = "default";
204 pinctrl-0 = <&pinctrl_usart2>;
205 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
206 clock-names = "usart";
207 status = "disabled";
208 };
209
210 usart3: serial@fffbc000 {
211 compatible = "atmel,at91sam9260-usart";
212 reg = <0xfffbc000 0x200>;
213 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
214 atmel,use-dma-rx;
215 atmel,use-dma-tx;
216 pinctrl-names = "default";
217 pinctrl-0 = <&pinctrl_usart3>;
218 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
219 clock-names = "usart";
220 status = "disabled";
221 };
222
223 ssc0: ssc@fffc0000 {
224 compatible = "atmel,at91sam9rl-ssc";
225 reg = <0xfffc0000 0x4000>;
226 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
227 pinctrl-names = "default";
228 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
229 status = "disabled";
230 };
231
232 ssc1: ssc@fffc4000 {
233 compatible = "atmel,at91sam9rl-ssc";
234 reg = <0xfffc4000 0x4000>;
235 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
236 pinctrl-names = "default";
237 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
238 status = "disabled";
239 };
240
241 pwm0: pwm@fffc8000 {
242 compatible = "atmel,at91sam9rl-pwm";
243 reg = <0xfffc8000 0x300>;
244 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
245 #pwm-cells = <3>;
246 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
247 clock-names = "pwm_clk";
248 status = "disabled";
249 };
250
251 spi0: spi@fffcc000 {
252 #address-cells = <1>;
253 #size-cells = <0>;
254 compatible = "atmel,at91rm9200-spi";
255 reg = <0xfffcc000 0x200>;
256 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
257 pinctrl-names = "default";
258 pinctrl-0 = <&pinctrl_spi0>;
259 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
260 clock-names = "spi_clk";
261 status = "disabled";
262 };
263
264 adc0: adc@fffd0000 {
265 #address-cells = <1>;
266 #size-cells = <0>;
267 compatible = "atmel,at91sam9rl-adc";
268 reg = <0xfffd0000 0x100>;
269 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
270 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&adc_op_clk>;
271 clock-names = "adc_clk", "adc_op_clk";
272 atmel,adc-use-external-triggers;
273 atmel,adc-channels-used = <0x3f>;
274 atmel,adc-vref = <3300>;
275 atmel,adc-startup-time = <40>;
276 atmel,adc-res = <8 10>;
277 atmel,adc-res-names = "lowres", "highres";
278 atmel,adc-use-res = "highres";
279
280 trigger0 {
281 trigger-name = "timer-counter-0";
282 trigger-value = <0x1>;
283 };
284 trigger1 {
285 trigger-name = "timer-counter-1";
286 trigger-value = <0x3>;
287 };
288
289 trigger2 {
290 trigger-name = "timer-counter-2";
291 trigger-value = <0x5>;
292 };
293
294 trigger3 {
295 trigger-name = "external";
296 trigger-value = <0x13>;
297 trigger-external;
298 };
299 };
300
301 usb0: gadget@fffd4000 {
302 #address-cells = <1>;
303 #size-cells = <0>;
304 compatible = "atmel,at91sam9rl-udc";
305 reg = <0x00600000 0x100000>,
306 <0xfffd4000 0x4000>;
307 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
308 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
309 clock-names = "pclk", "hclk";
310 status = "disabled";
311
312 ep@0 {
313 reg = <0>;
314 atmel,fifo-size = <64>;
315 atmel,nb-banks = <1>;
316 };
317
318 ep@1 {
319 reg = <1>;
320 atmel,fifo-size = <1024>;
321 atmel,nb-banks = <2>;
322 atmel,can-dma;
323 atmel,can-isoc;
324 };
325
326 ep@2 {
327 reg = <2>;
328 atmel,fifo-size = <1024>;
329 atmel,nb-banks = <2>;
330 atmel,can-dma;
331 atmel,can-isoc;
332 };
333
334 ep@3 {
335 reg = <3>;
336 atmel,fifo-size = <1024>;
337 atmel,nb-banks = <3>;
338 atmel,can-dma;
339 };
340
341 ep@4 {
342 reg = <4>;
343 atmel,fifo-size = <1024>;
344 atmel,nb-banks = <3>;
345 atmel,can-dma;
346 };
347
348 ep@5 {
349 reg = <5>;
350 atmel,fifo-size = <1024>;
351 atmel,nb-banks = <3>;
352 atmel,can-dma;
353 atmel,can-isoc;
354 };
355
356 ep@6 {
357 reg = <6>;
358 atmel,fifo-size = <1024>;
359 atmel,nb-banks = <3>;
360 atmel,can-dma;
361 atmel,can-isoc;
362 };
363 };
364
365 dma0: dma-controller@ffffe600 {
366 compatible = "atmel,at91sam9rl-dma";
367 reg = <0xffffe600 0x200>;
368 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
369 #dma-cells = <2>;
370 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
371 clock-names = "dma_clk";
372 };
373
374 ramc0: ramc@ffffea00 {
375 compatible = "atmel,at91sam9260-sdramc";
376 reg = <0xffffea00 0x200>;
377 };
378
379 smc: smc@ffffec00 {
380 compatible = "atmel,at91sam9260-smc", "syscon";
381 reg = <0xffffec00 0x200>;
382 };
383
384 matrix: matrix@ffffee00 {
385 compatible = "atmel,at91sam9rl-matrix", "syscon";
386 reg = <0xffffee00 0x200>;
387 };
388
389 aic: interrupt-controller@fffff000 {
390 #interrupt-cells = <3>;
391 compatible = "atmel,at91rm9200-aic";
392 interrupt-controller;
393 reg = <0xfffff000 0x200>;
394 atmel,external-irqs = <31>;
395 };
396
397 dbgu: serial@fffff200 {
398 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
399 reg = <0xfffff200 0x200>;
400 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
401 pinctrl-names = "default";
402 pinctrl-0 = <&pinctrl_dbgu>;
403 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
404 clock-names = "usart";
405 status = "disabled";
406 };
407
408 pinctrl@fffff400 {
409 #address-cells = <1>;
410 #size-cells = <1>;
411 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
412 ranges = <0xfffff400 0xfffff400 0x800>;
413
414 atmel,mux-mask =
415 /* A B */
416 <0xffffffff 0xe05c6738>, /* pioA */
417 <0xffffffff 0x0000c780>, /* pioB */
418 <0xffffffff 0xe3ffff0e>, /* pioC */
419 <0x003fffff 0x0001ff3c>; /* pioD */
420
421 /* shared pinctrl settings */
422 adc0 {
423 pinctrl_adc0_ts: adc0_ts-0 {
424 atmel,pins =
425 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
426 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
427 <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
428 <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
429 };
430
431 pinctrl_adc0_ad0: adc0_ad0-0 {
432 atmel,pins = <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
433 };
434
435 pinctrl_adc0_ad1: adc0_ad1-0 {
436 atmel,pins = <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
437 };
438
439 pinctrl_adc0_ad2: adc0_ad2-0 {
440 atmel,pins = <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>;
441 };
442
443 pinctrl_adc0_ad3: adc0_ad3-0 {
444 atmel,pins = <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
445 };
446
447 pinctrl_adc0_ad4: adc0_ad4-0 {
448 atmel,pins = <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
449 };
450
451 pinctrl_adc0_ad5: adc0_ad5-0 {
452 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
453 };
454
455 pinctrl_adc0_adtrg: adc0_adtrg-0 {
456 atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
457 };
458 };
459
460 dbgu {
461 pinctrl_dbgu: dbgu-0 {
462 atmel,pins =
463 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
464 <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
465 };
466 };
467
468 ebi {
469 pinctrl_ebi_addr_nand: ebi-addr-0 {
470 atmel,pins =
471 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
472 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
473 };
474 };
475
476 fb {
477 pinctrl_fb: fb-0 {
478 atmel,pins =
479 <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>,
480 <AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
481 <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE>,
482 <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>,
483 <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
484 <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
485 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
486 <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>,
487 <AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE>,
488 <AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
489 <AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>,
490 <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>,
491 <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
492 <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
493 <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>,
494 <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
495 <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
496 <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>,
497 <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
498 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
499 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;
500 };
501 };
502
503 i2c_gpio0 {
504 pinctrl_i2c_gpio0: i2c_gpio0-0 {
505 atmel,pins =
506 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
507 <AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
508 };
509 };
510
511 i2c_gpio1 {
512 pinctrl_i2c_gpio1: i2c_gpio1-0 {
513 atmel,pins =
514 <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
515 <AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
516 };
517 };
518
519 mmc0 {
520 pinctrl_mmc0_clk: mmc0_clk-0 {
521 atmel,pins =
522 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
523 };
524
525 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
526 atmel,pins =
527 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
528 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
529 };
530
531 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
532 atmel,pins =
533 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
534 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
535 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
536 };
537 };
538
539 nand {
540 pinctrl_nand_rb: nand-rb-0 {
541 atmel,pins =
542 <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
543 };
544
545 pinctrl_nand_cs: nand-cs-0 {
546 atmel,pins =
547 <AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
548 };
549
550 pinctrl_nand_oe_we: nand-oe-we-0 {
551 atmel,pins =
552 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>,
553 <AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;
554 };
555 };
556
557 pwm0 {
558 pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
559 atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
560 };
561
562 pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
563 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
564 };
565
566 pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
567 atmel,pins = <AT91_PIOD 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
568 };
569
570 pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
571 atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
572 };
573
574 pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
575 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
576 };
577
578 pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
579 atmel,pins = <AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
580 };
581
582 pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
583 atmel,pins = <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
584 };
585
586 pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
587 atmel,pins = <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
588 };
589
590 pinctrl_pwm0_pwm2_2: pwm0_pwm2-2 {
591 atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
592 };
593
594 pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
595 atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
596 };
597
598 pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
599 atmel,pins = <AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
600 };
601 };
602
603 spi0 {
604 pinctrl_spi0: spi0-0 {
605 atmel,pins =
606 <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
607 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>,
608 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
609 };
610 };
611
612 ssc0 {
613 pinctrl_ssc0_tx: ssc0_tx-0 {
614 atmel,pins =
615 <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
616 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
617 <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
618 };
619
620 pinctrl_ssc0_rx: ssc0_rx-0 {
621 atmel,pins =
622 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
623 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
624 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
625 };
626 };
627
628 ssc1 {
629 pinctrl_ssc1_tx: ssc1_tx-0 {
630 atmel,pins =
631 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
632 <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
633 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
634 };
635
636 pinctrl_ssc1_rx: ssc1_rx-0 {
637 atmel,pins =
638 <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>,
639 <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
640 <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
641 };
642 };
643
644 tcb0 {
645 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
646 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
647 };
648
649 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
650 atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>;
651 };
652
653 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
654 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
655 };
656
657 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
658 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
659 };
660
661 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
662 atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
663 };
664
665 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
666 atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
667 };
668
669 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
670 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
671 };
672
673 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
674 atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
675 };
676
677 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
678 atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
679 };
680 };
681
682 usart0 {
683 pinctrl_usart0: usart0-0 {
684 atmel,pins =
685 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>,
686 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
687 };
688
689 pinctrl_usart0_rts: usart0_rts-0 {
690 atmel,pins =
691 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
692 };
693
694 pinctrl_usart0_cts: usart0_cts-0 {
695 atmel,pins =
696 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
697 };
698
699 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
700 atmel,pins =
701 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>,
702 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
703 };
704
705 pinctrl_usart0_dcd: usart0_dcd-0 {
706 atmel,pins =
707 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
708 };
709
710 pinctrl_usart0_ri: usart0_ri-0 {
711 atmel,pins =
712 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
713 };
714
715 pinctrl_usart0_sck: usart0_sck-0 {
716 atmel,pins =
717 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
718 };
719 };
720
721 usart1 {
722 pinctrl_usart1: usart1-0 {
723 atmel,pins =
724 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE>,
725 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
726 };
727
728 pinctrl_usart1_rts: usart1_rts-0 {
729 atmel,pins =
730 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
731 };
732
733 pinctrl_usart1_cts: usart1_cts-0 {
734 atmel,pins =
735 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
736 };
737
738 pinctrl_usart1_sck: usart1_sck-0 {
739 atmel,pins =
740 <AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
741 };
742 };
743
744 usart2 {
745 pinctrl_usart2: usart2-0 {
746 atmel,pins =
747 <AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>,
748 <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
749 };
750
751 pinctrl_usart2_rts: usart2_rts-0 {
752 atmel,pins =
753 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
754 };
755
756 pinctrl_usart2_cts: usart2_cts-0 {
757 atmel,pins =
758 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
759 };
760
761 pinctrl_usart2_sck: usart2_sck-0 {
762 atmel,pins =
763 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
764 };
765 };
766
767 usart3 {
768 pinctrl_usart3: usart3-0 {
769 atmel,pins =
770 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
771 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
772 };
773
774 pinctrl_usart3_rts: usart3_rts-0 {
775 atmel,pins =
776 <AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
777 };
778
779 pinctrl_usart3_cts: usart3_cts-0 {
780 atmel,pins =
781 <AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
782 };
783
784 pinctrl_usart3_sck: usart3_sck-0 {
785 atmel,pins =
786 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
787 };
788 };
789
790 pioA: gpio@fffff400 {
791 compatible = "atmel,at91rm9200-gpio";
792 reg = <0xfffff400 0x200>;
793 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
794 #gpio-cells = <2>;
795 gpio-controller;
796 interrupt-controller;
797 #interrupt-cells = <2>;
798 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
799 };
800
801 pioB: gpio@fffff600 {
802 compatible = "atmel,at91rm9200-gpio";
803 reg = <0xfffff600 0x200>;
804 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
805 #gpio-cells = <2>;
806 gpio-controller;
807 interrupt-controller;
808 #interrupt-cells = <2>;
809 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
810 };
811
812 pioC: gpio@fffff800 {
813 compatible = "atmel,at91rm9200-gpio";
814 reg = <0xfffff800 0x200>;
815 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
816 #gpio-cells = <2>;
817 gpio-controller;
818 interrupt-controller;
819 #interrupt-cells = <2>;
820 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
821 };
822
823 pioD: gpio@fffffa00 {
824 compatible = "atmel,at91rm9200-gpio";
825 reg = <0xfffffa00 0x200>;
826 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
827 #gpio-cells = <2>;
828 gpio-controller;
829 interrupt-controller;
830 #interrupt-cells = <2>;
831 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
832 };
833 };
834
835 pmc: pmc@fffffc00 {
836 compatible = "atmel,at91sam9rl-pmc", "syscon";
837 reg = <0xfffffc00 0x100>;
838 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
839 #clock-cells = <2>;
840 clocks = <&clk32k>, <&main_xtal>;
841 clock-names = "slow_clk", "main_xtal";
842 };
843
844 rstc@fffffd00 {
845 compatible = "atmel,at91sam9260-rstc";
846 reg = <0xfffffd00 0x10>;
847 clocks = <&clk32k>;
848 };
849
850 shdwc@fffffd10 {
851 compatible = "atmel,at91sam9260-shdwc";
852 reg = <0xfffffd10 0x10>;
853 clocks = <&clk32k>;
854 };
855
856 pit: timer@fffffd30 {
857 compatible = "atmel,at91sam9260-pit";
858 reg = <0xfffffd30 0xf>;
859 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
860 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
861 };
862
863 watchdog@fffffd40 {
864 compatible = "atmel,at91sam9260-wdt";
865 reg = <0xfffffd40 0x10>;
866 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
867 clocks = <&clk32k>;
868 status = "disabled";
869 };
870
871 clk32k: sckc@fffffd50 {
872 compatible = "atmel,at91sam9x5-sckc";
873 reg = <0xfffffd50 0x4>;
874 clocks = <&slow_xtal>;
875 #clock-cells = <0>;
876 };
877
878 rtc@fffffd20 {
879 compatible = "atmel,at91sam9260-rtt";
880 reg = <0xfffffd20 0x10>;
881 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
882 clocks = <&clk32k>;
883 status = "disabled";
884 };
885
886 gpbr: syscon@fffffd60 {
887 compatible = "atmel,at91sam9260-gpbr", "syscon";
888 reg = <0xfffffd60 0x10>;
889 status = "disabled";
890 };
891
892 rtc@fffffe00 {
893 compatible = "atmel,at91rm9200-rtc";
894 reg = <0xfffffe00 0x40>;
895 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
896 clocks = <&clk32k>;
897 status = "disabled";
898 };
899
900 };
901 };
902
903 i2c-gpio-0 {
904 compatible = "i2c-gpio";
905 gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */
906 <&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */
907 i2c-gpio,sda-open-drain;
908 i2c-gpio,scl-open-drain;
909 i2c-gpio,delay-us = <2>; /* ~100 kHz */
910 #address-cells = <1>;
911 #size-cells = <0>;
912 pinctrl-names = "default";
913 pinctrl-0 = <&pinctrl_i2c_gpio0>;
914 status = "disabled";
915 };
916
917 i2c-gpio-1 {
918 compatible = "i2c-gpio";
919 gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */
920 <&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */
921 i2c-gpio,sda-open-drain;
922 i2c-gpio,scl-open-drain;
923 i2c-gpio,delay-us = <2>; /* ~100 kHz */
924 #address-cells = <1>;
925 #size-cells = <0>;
926 pinctrl-names = "default";
927 pinctrl-0 = <&pinctrl_i2c_gpio1>;
928 status = "disabled";
929 };
930};
1/*
2 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
3 *
4 * Copyright (C) 2014 Alexandre Belloni <alexandre.belloni@free-electrons.com>
5 *
6 * Licensed under GPLv2 or later.
7 */
8
9#include "skeleton.dtsi"
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/clock/at91.h>
12#include <dt-bindings/interrupt-controller/irq.h>
13#include <dt-bindings/gpio/gpio.h>
14#include <dt-bindings/pwm/pwm.h>
15
16/ {
17 model = "Atmel AT91SAM9RL family SoC";
18 compatible = "atmel,at91sam9rl", "atmel,at91sam9";
19 interrupt-parent = <&aic>;
20
21 aliases {
22 serial0 = &dbgu;
23 serial1 = &usart0;
24 serial2 = &usart1;
25 serial3 = &usart2;
26 serial4 = &usart3;
27 gpio0 = &pioA;
28 gpio1 = &pioB;
29 gpio2 = &pioC;
30 gpio3 = &pioD;
31 tcb0 = &tcb0;
32 i2c0 = &i2c0;
33 i2c1 = &i2c1;
34 ssc0 = &ssc0;
35 ssc1 = &ssc1;
36 pwm0 = &pwm0;
37 };
38
39 cpus {
40 #address-cells = <0>;
41 #size-cells = <0>;
42
43 cpu {
44 compatible = "arm,arm926ej-s";
45 device_type = "cpu";
46 };
47 };
48
49 memory {
50 reg = <0x20000000 0x04000000>;
51 };
52
53 clocks {
54 slow_xtal: slow_xtal {
55 compatible = "fixed-clock";
56 #clock-cells = <0>;
57 clock-frequency = <0>;
58 };
59
60 main_xtal: main_xtal {
61 compatible = "fixed-clock";
62 #clock-cells = <0>;
63 clock-frequency = <0>;
64 };
65
66 adc_op_clk: adc_op_clk{
67 compatible = "fixed-clock";
68 #clock-cells = <0>;
69 clock-frequency = <1000000>;
70 };
71 };
72
73 sram: sram@00300000 {
74 compatible = "mmio-sram";
75 reg = <0x00300000 0x10000>;
76 };
77
78 ahb {
79 compatible = "simple-bus";
80 #address-cells = <1>;
81 #size-cells = <1>;
82 ranges;
83
84 fb0: fb@00500000 {
85 compatible = "atmel,at91sam9rl-lcdc";
86 reg = <0x00500000 0x1000>;
87 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
88 pinctrl-names = "default";
89 pinctrl-0 = <&pinctrl_fb>;
90 clocks = <&lcd_clk>, <&lcd_clk>;
91 clock-names = "hclk", "lcdc_clk";
92 status = "disabled";
93 };
94
95 nand0: nand@40000000 {
96 compatible = "atmel,at91rm9200-nand";
97 #address-cells = <1>;
98 #size-cells = <1>;
99 reg = <0x40000000 0x10000000>,
100 <0xffffe800 0x200>;
101 atmel,nand-addr-offset = <21>;
102 atmel,nand-cmd-offset = <22>;
103 atmel,nand-has-dma;
104 pinctrl-names = "default";
105 pinctrl-0 = <&pinctrl_nand>;
106 gpios = <&pioD 17 GPIO_ACTIVE_HIGH>,
107 <&pioB 6 GPIO_ACTIVE_HIGH>,
108 <0>;
109 status = "disabled";
110 };
111
112 apb {
113 compatible = "simple-bus";
114 #address-cells = <1>;
115 #size-cells = <1>;
116 ranges;
117
118 tcb0: timer@fffa0000 {
119 compatible = "atmel,at91rm9200-tcb";
120 reg = <0xfffa0000 0x100>;
121 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>,
122 <17 IRQ_TYPE_LEVEL_HIGH 0>,
123 <18 IRQ_TYPE_LEVEL_HIGH 0>;
124 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&clk32k>;
125 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
126 };
127
128 mmc0: mmc@fffa4000 {
129 compatible = "atmel,hsmci";
130 reg = <0xfffa4000 0x600>;
131 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
132 #address-cells = <1>;
133 #size-cells = <0>;
134 pinctrl-names = "default";
135 clocks = <&mci0_clk>;
136 clock-names = "mci_clk";
137 status = "disabled";
138 };
139
140 i2c0: i2c@fffa8000 {
141 compatible = "atmel,at91sam9260-i2c";
142 reg = <0xfffa8000 0x100>;
143 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
144 #address-cells = <1>;
145 #size-cells = <0>;
146 clocks = <&twi0_clk>;
147 status = "disabled";
148 };
149
150 i2c1: i2c@fffac000 {
151 compatible = "atmel,at91sam9260-i2c";
152 reg = <0xfffac000 0x100>;
153 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
154 #address-cells = <1>;
155 #size-cells = <0>;
156 status = "disabled";
157 };
158
159 usart0: serial@fffb0000 {
160 compatible = "atmel,at91sam9260-usart";
161 reg = <0xfffb0000 0x200>;
162 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
163 atmel,use-dma-rx;
164 atmel,use-dma-tx;
165 pinctrl-names = "default";
166 pinctrl-0 = <&pinctrl_usart0>;
167 clocks = <&usart0_clk>;
168 clock-names = "usart";
169 status = "disabled";
170 };
171
172 usart1: serial@fffb4000 {
173 compatible = "atmel,at91sam9260-usart";
174 reg = <0xfffb4000 0x200>;
175 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
176 atmel,use-dma-rx;
177 atmel,use-dma-tx;
178 pinctrl-names = "default";
179 pinctrl-0 = <&pinctrl_usart1>;
180 clocks = <&usart1_clk>;
181 clock-names = "usart";
182 status = "disabled";
183 };
184
185 usart2: serial@fffb8000 {
186 compatible = "atmel,at91sam9260-usart";
187 reg = <0xfffb8000 0x200>;
188 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
189 atmel,use-dma-rx;
190 atmel,use-dma-tx;
191 pinctrl-names = "default";
192 pinctrl-0 = <&pinctrl_usart2>;
193 clocks = <&usart2_clk>;
194 clock-names = "usart";
195 status = "disabled";
196 };
197
198 usart3: serial@fffbc000 {
199 compatible = "atmel,at91sam9260-usart";
200 reg = <0xfffbc000 0x200>;
201 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
202 atmel,use-dma-rx;
203 atmel,use-dma-tx;
204 pinctrl-names = "default";
205 pinctrl-0 = <&pinctrl_usart3>;
206 clocks = <&usart3_clk>;
207 clock-names = "usart";
208 status = "disabled";
209 };
210
211 ssc0: ssc@fffc0000 {
212 compatible = "atmel,at91sam9rl-ssc";
213 reg = <0xfffc0000 0x4000>;
214 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
215 pinctrl-names = "default";
216 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
217 status = "disabled";
218 };
219
220 ssc1: ssc@fffc4000 {
221 compatible = "atmel,at91sam9rl-ssc";
222 reg = <0xfffc4000 0x4000>;
223 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
224 pinctrl-names = "default";
225 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
226 status = "disabled";
227 };
228
229 pwm0: pwm@fffc8000 {
230 compatible = "atmel,at91sam9rl-pwm";
231 reg = <0xfffc8000 0x300>;
232 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
233 #pwm-cells = <3>;
234 clocks = <&pwm_clk>;
235 clock-names = "pwm_clk";
236 status = "disabled";
237 };
238
239 spi0: spi@fffcc000 {
240 #address-cells = <1>;
241 #size-cells = <0>;
242 compatible = "atmel,at91rm9200-spi";
243 reg = <0xfffcc000 0x200>;
244 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
245 pinctrl-names = "default";
246 pinctrl-0 = <&pinctrl_spi0>;
247 clocks = <&spi0_clk>;
248 clock-names = "spi_clk";
249 status = "disabled";
250 };
251
252 adc0: adc@fffd0000 {
253 #address-cells = <1>;
254 #size-cells = <0>;
255 compatible = "atmel,at91sam9rl-adc";
256 reg = <0xfffd0000 0x100>;
257 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
258 clocks = <&adc_clk>, <&adc_op_clk>;
259 clock-names = "adc_clk", "adc_op_clk";
260 atmel,adc-use-external-triggers;
261 atmel,adc-channels-used = <0x3f>;
262 atmel,adc-vref = <3300>;
263 atmel,adc-startup-time = <40>;
264 atmel,adc-res = <8 10>;
265 atmel,adc-res-names = "lowres", "highres";
266 atmel,adc-use-res = "highres";
267
268 trigger0 {
269 trigger-name = "timer-counter-0";
270 trigger-value = <0x1>;
271 };
272 trigger1 {
273 trigger-name = "timer-counter-1";
274 trigger-value = <0x3>;
275 };
276
277 trigger2 {
278 trigger-name = "timer-counter-2";
279 trigger-value = <0x5>;
280 };
281
282 trigger3 {
283 trigger-name = "external";
284 trigger-value = <0x13>;
285 trigger-external;
286 };
287 };
288
289 usb0: gadget@fffd4000 {
290 #address-cells = <1>;
291 #size-cells = <0>;
292 compatible = "atmel,at91sam9rl-udc";
293 reg = <0x00600000 0x100000>,
294 <0xfffd4000 0x4000>;
295 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
296 clocks = <&udphs_clk>, <&utmi>;
297 clock-names = "pclk", "hclk";
298 status = "disabled";
299
300 ep@0 {
301 reg = <0>;
302 atmel,fifo-size = <64>;
303 atmel,nb-banks = <1>;
304 };
305
306 ep@1 {
307 reg = <1>;
308 atmel,fifo-size = <1024>;
309 atmel,nb-banks = <2>;
310 atmel,can-dma;
311 atmel,can-isoc;
312 };
313
314 ep@2 {
315 reg = <2>;
316 atmel,fifo-size = <1024>;
317 atmel,nb-banks = <2>;
318 atmel,can-dma;
319 atmel,can-isoc;
320 };
321
322 ep@3 {
323 reg = <3>;
324 atmel,fifo-size = <1024>;
325 atmel,nb-banks = <3>;
326 atmel,can-dma;
327 };
328
329 ep@4 {
330 reg = <4>;
331 atmel,fifo-size = <1024>;
332 atmel,nb-banks = <3>;
333 atmel,can-dma;
334 };
335
336 ep@5 {
337 reg = <5>;
338 atmel,fifo-size = <1024>;
339 atmel,nb-banks = <3>;
340 atmel,can-dma;
341 atmel,can-isoc;
342 };
343
344 ep@6 {
345 reg = <6>;
346 atmel,fifo-size = <1024>;
347 atmel,nb-banks = <3>;
348 atmel,can-dma;
349 atmel,can-isoc;
350 };
351 };
352
353 dma0: dma-controller@ffffe600 {
354 compatible = "atmel,at91sam9rl-dma";
355 reg = <0xffffe600 0x200>;
356 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
357 #dma-cells = <2>;
358 clocks = <&dma0_clk>;
359 clock-names = "dma_clk";
360 };
361
362 ramc0: ramc@ffffea00 {
363 compatible = "atmel,at91sam9260-sdramc";
364 reg = <0xffffea00 0x200>;
365 };
366
367 aic: interrupt-controller@fffff000 {
368 #interrupt-cells = <3>;
369 compatible = "atmel,at91rm9200-aic";
370 interrupt-controller;
371 reg = <0xfffff000 0x200>;
372 atmel,external-irqs = <31>;
373 };
374
375 dbgu: serial@fffff200 {
376 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
377 reg = <0xfffff200 0x200>;
378 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
379 pinctrl-names = "default";
380 pinctrl-0 = <&pinctrl_dbgu>;
381 clocks = <&mck>;
382 clock-names = "usart";
383 status = "disabled";
384 };
385
386 pinctrl@fffff400 {
387 #address-cells = <1>;
388 #size-cells = <1>;
389 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
390 ranges = <0xfffff400 0xfffff400 0x800>;
391
392 atmel,mux-mask =
393 /* A B */
394 <0xffffffff 0xe05c6738>, /* pioA */
395 <0xffffffff 0x0000c780>, /* pioB */
396 <0xffffffff 0xe3ffff0e>, /* pioC */
397 <0x003fffff 0x0001ff3c>; /* pioD */
398
399 /* shared pinctrl settings */
400 adc0 {
401 pinctrl_adc0_ts: adc0_ts-0 {
402 atmel,pins =
403 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
404 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
405 <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
406 <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
407 };
408
409 pinctrl_adc0_ad0: adc0_ad0-0 {
410 atmel,pins = <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
411 };
412
413 pinctrl_adc0_ad1: adc0_ad1-0 {
414 atmel,pins = <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
415 };
416
417 pinctrl_adc0_ad2: adc0_ad2-0 {
418 atmel,pins = <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>;
419 };
420
421 pinctrl_adc0_ad3: adc0_ad3-0 {
422 atmel,pins = <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
423 };
424
425 pinctrl_adc0_ad4: adc0_ad4-0 {
426 atmel,pins = <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
427 };
428
429 pinctrl_adc0_ad5: adc0_ad5-0 {
430 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
431 };
432
433 pinctrl_adc0_adtrg: adc0_adtrg-0 {
434 atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
435 };
436 };
437
438 dbgu {
439 pinctrl_dbgu: dbgu-0 {
440 atmel,pins =
441 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
442 <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
443 };
444 };
445
446 fb {
447 pinctrl_fb: fb-0 {
448 atmel,pins =
449 <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>,
450 <AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
451 <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE>,
452 <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>,
453 <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
454 <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
455 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
456 <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>,
457 <AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE>,
458 <AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
459 <AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>,
460 <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>,
461 <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
462 <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
463 <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>,
464 <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
465 <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
466 <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>,
467 <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
468 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
469 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;
470 };
471 };
472
473 i2c_gpio0 {
474 pinctrl_i2c_gpio0: i2c_gpio0-0 {
475 atmel,pins =
476 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
477 <AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
478 };
479 };
480
481 i2c_gpio1 {
482 pinctrl_i2c_gpio1: i2c_gpio1-0 {
483 atmel,pins =
484 <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
485 <AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
486 };
487 };
488
489 mmc0 {
490 pinctrl_mmc0_clk: mmc0_clk-0 {
491 atmel,pins =
492 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
493 };
494
495 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
496 atmel,pins =
497 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
498 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
499 };
500
501 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
502 atmel,pins =
503 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
504 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
505 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
506 };
507 };
508
509 nand {
510 pinctrl_nand: nand-0 {
511 atmel,pins =
512 <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
513 <AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
514 };
515
516 pinctrl_nand0_ale_cle: nand_ale_cle-0 {
517 atmel,pins =
518 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
519 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
520 };
521
522 pinctrl_nand0_oe_we: nand_oe_we-0 {
523 atmel,pins =
524 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>,
525 <AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;
526 };
527
528 pinctrl_nand0_cs: nand_cs-0 {
529 atmel,pins =
530 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
531 };
532 };
533
534 pwm0 {
535 pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
536 atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
537 };
538
539 pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
540 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
541 };
542
543 pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
544 atmel,pins = <AT91_PIOD 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
545 };
546
547 pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
548 atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
549 };
550
551 pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
552 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
553 };
554
555 pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
556 atmel,pins = <AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
557 };
558
559 pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
560 atmel,pins = <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
561 };
562
563 pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
564 atmel,pins = <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
565 };
566
567 pinctrl_pwm0_pwm2_2: pwm0_pwm2-2 {
568 atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
569 };
570
571 pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
572 atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
573 };
574
575 pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
576 atmel,pins = <AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
577 };
578 };
579
580 spi0 {
581 pinctrl_spi0: spi0-0 {
582 atmel,pins =
583 <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
584 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>,
585 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
586 };
587 };
588
589 ssc0 {
590 pinctrl_ssc0_tx: ssc0_tx-0 {
591 atmel,pins =
592 <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
593 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
594 <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
595 };
596
597 pinctrl_ssc0_rx: ssc0_rx-0 {
598 atmel,pins =
599 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
600 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
601 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
602 };
603 };
604
605 ssc1 {
606 pinctrl_ssc1_tx: ssc1_tx-0 {
607 atmel,pins =
608 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
609 <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
610 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
611 };
612
613 pinctrl_ssc1_rx: ssc1_rx-0 {
614 atmel,pins =
615 <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>,
616 <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
617 <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
618 };
619 };
620
621 tcb0 {
622 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
623 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
624 };
625
626 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
627 atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>;
628 };
629
630 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
631 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
632 };
633
634 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
635 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
636 };
637
638 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
639 atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
640 };
641
642 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
643 atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
644 };
645
646 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
647 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
648 };
649
650 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
651 atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
652 };
653
654 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
655 atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
656 };
657 };
658
659 usart0 {
660 pinctrl_usart0: usart0-0 {
661 atmel,pins =
662 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>,
663 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
664 };
665
666 pinctrl_usart0_rts: usart0_rts-0 {
667 atmel,pins =
668 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
669 };
670
671 pinctrl_usart0_cts: usart0_cts-0 {
672 atmel,pins =
673 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
674 };
675
676 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
677 atmel,pins =
678 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>,
679 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
680 };
681
682 pinctrl_usart0_dcd: usart0_dcd-0 {
683 atmel,pins =
684 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
685 };
686
687 pinctrl_usart0_ri: usart0_ri-0 {
688 atmel,pins =
689 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
690 };
691
692 pinctrl_usart0_sck: usart0_sck-0 {
693 atmel,pins =
694 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
695 };
696 };
697
698 usart1 {
699 pinctrl_usart1: usart1-0 {
700 atmel,pins =
701 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
702 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
703 };
704
705 pinctrl_usart1_rts: usart1_rts-0 {
706 atmel,pins =
707 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
708 };
709
710 pinctrl_usart1_cts: usart1_cts-0 {
711 atmel,pins =
712 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
713 };
714
715 pinctrl_usart1_sck: usart1_sck-0 {
716 atmel,pins =
717 <AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
718 };
719 };
720
721 usart2 {
722 pinctrl_usart2: usart2-0 {
723 atmel,pins =
724 <AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
725 <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
726 };
727
728 pinctrl_usart2_rts: usart2_rts-0 {
729 atmel,pins =
730 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
731 };
732
733 pinctrl_usart2_cts: usart2_cts-0 {
734 atmel,pins =
735 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
736 };
737
738 pinctrl_usart2_sck: usart2_sck-0 {
739 atmel,pins =
740 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
741 };
742 };
743
744 usart3 {
745 pinctrl_usart3: usart3-0 {
746 atmel,pins =
747 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
748 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
749 };
750
751 pinctrl_usart3_rts: usart3_rts-0 {
752 atmel,pins =
753 <AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
754 };
755
756 pinctrl_usart3_cts: usart3_cts-0 {
757 atmel,pins =
758 <AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
759 };
760
761 pinctrl_usart3_sck: usart3_sck-0 {
762 atmel,pins =
763 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
764 };
765 };
766
767 pioA: gpio@fffff400 {
768 compatible = "atmel,at91rm9200-gpio";
769 reg = <0xfffff400 0x200>;
770 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
771 #gpio-cells = <2>;
772 gpio-controller;
773 interrupt-controller;
774 #interrupt-cells = <2>;
775 clocks = <&pioA_clk>;
776 };
777
778 pioB: gpio@fffff600 {
779 compatible = "atmel,at91rm9200-gpio";
780 reg = <0xfffff600 0x200>;
781 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
782 #gpio-cells = <2>;
783 gpio-controller;
784 interrupt-controller;
785 #interrupt-cells = <2>;
786 clocks = <&pioB_clk>;
787 };
788
789 pioC: gpio@fffff800 {
790 compatible = "atmel,at91rm9200-gpio";
791 reg = <0xfffff800 0x200>;
792 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
793 #gpio-cells = <2>;
794 gpio-controller;
795 interrupt-controller;
796 #interrupt-cells = <2>;
797 clocks = <&pioC_clk>;
798 };
799
800 pioD: gpio@fffffa00 {
801 compatible = "atmel,at91rm9200-gpio";
802 reg = <0xfffffa00 0x200>;
803 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
804 #gpio-cells = <2>;
805 gpio-controller;
806 interrupt-controller;
807 #interrupt-cells = <2>;
808 clocks = <&pioD_clk>;
809 };
810 };
811
812 pmc: pmc@fffffc00 {
813 compatible = "atmel,at91sam9g45-pmc", "syscon";
814 reg = <0xfffffc00 0x100>;
815 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
816 interrupt-controller;
817 #address-cells = <1>;
818 #size-cells = <0>;
819 #interrupt-cells = <1>;
820
821 main: mainck {
822 compatible = "atmel,at91rm9200-clk-main";
823 #clock-cells = <0>;
824 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
825 clocks = <&main_xtal>;
826 };
827
828 plla: pllack {
829 compatible = "atmel,at91rm9200-clk-pll";
830 #clock-cells = <0>;
831 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
832 clocks = <&main>;
833 reg = <0>;
834 atmel,clk-input-range = <1000000 32000000>;
835 #atmel,pll-clk-output-range-cells = <3>;
836 atmel,pll-clk-output-ranges = <80000000 200000000 0>,
837 <190000000 240000000 2>;
838 };
839
840 utmi: utmick {
841 compatible = "atmel,at91sam9x5-clk-utmi";
842 #clock-cells = <0>;
843 interrupt-parent = <&pmc>;
844 interrupts = <AT91_PMC_LOCKU>;
845 clocks = <&main>;
846 };
847
848 mck: masterck {
849 compatible = "atmel,at91rm9200-clk-master";
850 #clock-cells = <0>;
851 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
852 clocks = <&clk32k>, <&main>, <&plla>, <&utmi>;
853 atmel,clk-output-range = <0 94000000>;
854 atmel,clk-divisors = <1 2 4 0>;
855 };
856
857 prog: progck {
858 compatible = "atmel,at91rm9200-clk-programmable";
859 #address-cells = <1>;
860 #size-cells = <0>;
861 interrupt-parent = <&pmc>;
862 clocks = <&clk32k>, <&main>, <&plla>, <&utmi>, <&mck>;
863
864 prog0: prog0 {
865 #clock-cells = <0>;
866 reg = <0>;
867 interrupts = <AT91_PMC_PCKRDY(0)>;
868 };
869
870 prog1: prog1 {
871 #clock-cells = <0>;
872 reg = <1>;
873 interrupts = <AT91_PMC_PCKRDY(1)>;
874 };
875 };
876
877 systemck {
878 compatible = "atmel,at91rm9200-clk-system";
879 #address-cells = <1>;
880 #size-cells = <0>;
881
882 pck0: pck0 {
883 #clock-cells = <0>;
884 reg = <8>;
885 clocks = <&prog0>;
886 };
887
888 pck1: pck1 {
889 #clock-cells = <0>;
890 reg = <9>;
891 clocks = <&prog1>;
892 };
893
894 };
895
896 periphck {
897 compatible = "atmel,at91rm9200-clk-peripheral";
898 #address-cells = <1>;
899 #size-cells = <0>;
900 clocks = <&mck>;
901
902 pioA_clk: pioA_clk {
903 #clock-cells = <0>;
904 reg = <2>;
905 };
906
907 pioB_clk: pioB_clk {
908 #clock-cells = <0>;
909 reg = <3>;
910 };
911
912 pioC_clk: pioC_clk {
913 #clock-cells = <0>;
914 reg = <4>;
915 };
916
917 pioD_clk: pioD_clk {
918 #clock-cells = <0>;
919 reg = <5>;
920 };
921
922 usart0_clk: usart0_clk {
923 #clock-cells = <0>;
924 reg = <6>;
925 };
926
927 usart1_clk: usart1_clk {
928 #clock-cells = <0>;
929 reg = <7>;
930 };
931
932 usart2_clk: usart2_clk {
933 #clock-cells = <0>;
934 reg = <8>;
935 };
936
937 usart3_clk: usart3_clk {
938 #clock-cells = <0>;
939 reg = <9>;
940 };
941
942 mci0_clk: mci0_clk {
943 #clock-cells = <0>;
944 reg = <10>;
945 };
946
947 twi0_clk: twi0_clk {
948 #clock-cells = <0>;
949 reg = <11>;
950 };
951
952 twi1_clk: twi1_clk {
953 #clock-cells = <0>;
954 reg = <12>;
955 };
956
957 spi0_clk: spi0_clk {
958 #clock-cells = <0>;
959 reg = <13>;
960 };
961
962 ssc0_clk: ssc0_clk {
963 #clock-cells = <0>;
964 reg = <14>;
965 };
966
967 ssc1_clk: ssc1_clk {
968 #clock-cells = <0>;
969 reg = <15>;
970 };
971
972 tc0_clk: tc0_clk {
973 #clock-cells = <0>;
974 reg = <16>;
975 };
976
977 tc1_clk: tc1_clk {
978 #clock-cells = <0>;
979 reg = <17>;
980 };
981
982 tc2_clk: tc2_clk {
983 #clock-cells = <0>;
984 reg = <18>;
985 };
986
987 pwm_clk: pwm_clk {
988 #clock-cells = <0>;
989 reg = <19>;
990 };
991
992 adc_clk: adc_clk {
993 #clock-cells = <0>;
994 reg = <20>;
995 };
996
997 dma0_clk: dma0_clk {
998 #clock-cells = <0>;
999 reg = <21>;
1000 };
1001
1002 udphs_clk: udphs_clk {
1003 #clock-cells = <0>;
1004 reg = <22>;
1005 };
1006
1007 lcd_clk: lcd_clk {
1008 #clock-cells = <0>;
1009 reg = <23>;
1010 };
1011 };
1012 };
1013
1014 rstc@fffffd00 {
1015 compatible = "atmel,at91sam9260-rstc";
1016 reg = <0xfffffd00 0x10>;
1017 clocks = <&clk32k>;
1018 };
1019
1020 shdwc@fffffd10 {
1021 compatible = "atmel,at91sam9260-shdwc";
1022 reg = <0xfffffd10 0x10>;
1023 clocks = <&clk32k>;
1024 };
1025
1026 pit: timer@fffffd30 {
1027 compatible = "atmel,at91sam9260-pit";
1028 reg = <0xfffffd30 0xf>;
1029 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1030 clocks = <&mck>;
1031 };
1032
1033 watchdog@fffffd40 {
1034 compatible = "atmel,at91sam9260-wdt";
1035 reg = <0xfffffd40 0x10>;
1036 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1037 clocks = <&clk32k>;
1038 status = "disabled";
1039 };
1040
1041 sckc@fffffd50 {
1042 compatible = "atmel,at91sam9x5-sckc";
1043 reg = <0xfffffd50 0x4>;
1044
1045 slow_osc: slow_osc {
1046 compatible = "atmel,at91sam9x5-clk-slow-osc";
1047 #clock-cells = <0>;
1048 atmel,startup-time-usec = <1200000>;
1049 clocks = <&slow_xtal>;
1050 };
1051
1052 slow_rc_osc: slow_rc_osc {
1053 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1054 #clock-cells = <0>;
1055 atmel,startup-time-usec = <75>;
1056 clock-frequency = <32768>;
1057 clock-accuracy = <50000000>;
1058 };
1059
1060 clk32k: slck {
1061 compatible = "atmel,at91sam9x5-clk-slow";
1062 #clock-cells = <0>;
1063 clocks = <&slow_rc_osc &slow_osc>;
1064 };
1065 };
1066
1067 rtc@fffffd20 {
1068 compatible = "atmel,at91sam9260-rtt";
1069 reg = <0xfffffd20 0x10>;
1070 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1071 clocks = <&clk32k>;
1072 status = "disabled";
1073 };
1074
1075 gpbr: syscon@fffffd60 {
1076 compatible = "atmel,at91sam9260-gpbr", "syscon";
1077 reg = <0xfffffd60 0x10>;
1078 status = "disabled";
1079 };
1080
1081 rtc@fffffe00 {
1082 compatible = "atmel,at91rm9200-rtc";
1083 reg = <0xfffffe00 0x40>;
1084 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1085 clocks = <&clk32k>;
1086 status = "disabled";
1087 };
1088
1089 };
1090 };
1091
1092 i2c-gpio-0 {
1093 compatible = "i2c-gpio";
1094 gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */
1095 <&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */
1096 i2c-gpio,sda-open-drain;
1097 i2c-gpio,scl-open-drain;
1098 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1099 #address-cells = <1>;
1100 #size-cells = <0>;
1101 pinctrl-names = "default";
1102 pinctrl-0 = <&pinctrl_i2c_gpio0>;
1103 status = "disabled";
1104 };
1105
1106 i2c-gpio-1 {
1107 compatible = "i2c-gpio";
1108 gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */
1109 <&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */
1110 i2c-gpio,sda-open-drain;
1111 i2c-gpio,scl-open-drain;
1112 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1113 #address-cells = <1>;
1114 #size-cells = <0>;
1115 pinctrl-names = "default";
1116 pinctrl-0 = <&pinctrl_i2c_gpio1>;
1117 status = "disabled";
1118 };
1119};