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1/*
2 * Device Tree Source for am3517 SoC
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11#include "omap3.dtsi"
12
13/ {
14 aliases {
15 serial3 = &uart4;
16 can = &hecc;
17 };
18
19 ocp@68000000 {
20 am35x_otg_hs: am35x_otg_hs@5c040000 {
21 compatible = "ti,omap3-musb";
22 ti,hwmods = "am35x_otg_hs";
23 status = "disabled";
24 reg = <0x5c040000 0x1000>;
25 interrupts = <71>;
26 interrupt-names = "mc";
27 };
28
29 davinci_emac: ethernet@5c000000 {
30 compatible = "ti,am3517-emac";
31 ti,hwmods = "davinci_emac";
32 status = "disabled";
33 reg = <0x5c000000 0x30000>;
34 interrupts = <67 68 69 70>;
35 syscon = <&scm_conf>;
36 ti,davinci-ctrl-reg-offset = <0x10000>;
37 ti,davinci-ctrl-mod-reg-offset = <0>;
38 ti,davinci-ctrl-ram-offset = <0x20000>;
39 ti,davinci-ctrl-ram-size = <0x2000>;
40 ti,davinci-rmii-en = /bits/ 8 <1>;
41 local-mac-address = [ 00 00 00 00 00 00 ];
42 clocks = <&emac_ick>;
43 clock-names = "ick";
44 };
45
46 davinci_mdio: ethernet@5c030000 {
47 compatible = "ti,davinci_mdio";
48 ti,hwmods = "davinci_mdio";
49 status = "disabled";
50 reg = <0x5c030000 0x1000>;
51 bus_freq = <1000000>;
52 #address-cells = <1>;
53 #size-cells = <0>;
54 clocks = <&emac_fck>;
55 clock-names = "fck";
56 };
57
58 uart4: serial@4809e000 {
59 compatible = "ti,omap3-uart";
60 ti,hwmods = "uart4";
61 status = "disabled";
62 reg = <0x4809e000 0x400>;
63 interrupts = <84>;
64 dmas = <&sdma 55 &sdma 54>;
65 dma-names = "tx", "rx";
66 clock-frequency = <48000000>;
67 };
68
69 omap3_pmx_core2: pinmux@480025d8 {
70 compatible = "ti,omap3-padconf", "pinctrl-single";
71 reg = <0x480025d8 0x24>;
72 #address-cells = <1>;
73 #size-cells = <0>;
74 #pinctrl-cells = <1>;
75 #interrupt-cells = <1>;
76 interrupt-controller;
77 pinctrl-single,register-width = <16>;
78 pinctrl-single,function-mask = <0xff1f>;
79 };
80
81 hecc: can@5c050000 {
82 compatible = "ti,am3517-hecc";
83 status = "disabled";
84 reg = <0x5c050000 0x80>,
85 <0x5c053000 0x180>,
86 <0x5c052000 0x200>;
87 reg-names = "hecc", "hecc-ram", "mbx";
88 interrupts = <24>;
89 clocks = <&hecc_ck>;
90 };
91
92 /*
93 * On am3517 the OCP registers do not seem to be accessible
94 * similar to the omap34xx. Maybe SGX is permanently set to
95 * "OCP bypass mode", or maybe there is OCP_SYSCONFIG that is
96 * write-only at 0x50000e10. We detect SGX based on the SGX
97 * revision register instead of the unreadable OCP revision
98 * register.
99 */
100 sgx_module: target-module@50000000 {
101 compatible = "ti,sysc-omap2", "ti,sysc";
102 reg = <0x50000014 0x4>;
103 reg-names = "rev";
104 clocks = <&sgx_fck>, <&sgx_ick>;
105 clock-names = "fck", "ick";
106 #address-cells = <1>;
107 #size-cells = <1>;
108 ranges = <0 0x50000000 0x4000>;
109
110 /*
111 * Closed source PowerVR driver, no child device
112 * binding or driver in mainline
113 */
114 };
115 };
116};
117
118/* Table Table 5-79 of the TRM shows 480ab000 is reserved */
119&usb_otg_hs {
120 status = "disabled";
121};
122
123&iva {
124 status = "disabled";
125};
126
127&mailbox {
128 status = "disabled";
129};
130
131&mmu_isp {
132 status = "disabled";
133};
134
135/include/ "am35xx-clocks.dtsi"
136/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
1/*
2 * Device Tree Source for am3517 SoC
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11#include "omap3.dtsi"
12
13/ {
14 aliases {
15 serial3 = &uart4;
16 };
17
18 ocp@68000000 {
19 am35x_otg_hs: am35x_otg_hs@5c040000 {
20 compatible = "ti,omap3-musb";
21 ti,hwmods = "am35x_otg_hs";
22 status = "disabled";
23 reg = <0x5c040000 0x1000>;
24 interrupts = <71>;
25 interrupt-names = "mc";
26 };
27
28 davinci_emac: ethernet@0x5c000000 {
29 compatible = "ti,am3517-emac";
30 ti,hwmods = "davinci_emac";
31 status = "disabled";
32 reg = <0x5c000000 0x30000>;
33 interrupts = <67 68 69 70>;
34 syscon = <&scm_conf>;
35 ti,davinci-ctrl-reg-offset = <0x10000>;
36 ti,davinci-ctrl-mod-reg-offset = <0>;
37 ti,davinci-ctrl-ram-offset = <0x20000>;
38 ti,davinci-ctrl-ram-size = <0x2000>;
39 ti,davinci-rmii-en = /bits/ 8 <1>;
40 local-mac-address = [ 00 00 00 00 00 00 ];
41 };
42
43 davinci_mdio: ethernet@0x5c030000 {
44 compatible = "ti,davinci_mdio";
45 ti,hwmods = "davinci_mdio";
46 status = "disabled";
47 reg = <0x5c030000 0x1000>;
48 bus_freq = <1000000>;
49 #address-cells = <1>;
50 #size-cells = <0>;
51 };
52
53 uart4: serial@4809e000 {
54 compatible = "ti,omap3-uart";
55 ti,hwmods = "uart4";
56 status = "disabled";
57 reg = <0x4809e000 0x400>;
58 interrupts = <84>;
59 dmas = <&sdma 55 &sdma 54>;
60 dma-names = "tx", "rx";
61 clock-frequency = <48000000>;
62 };
63
64 omap3_pmx_core2: pinmux@480025d8 {
65 compatible = "ti,omap3-padconf", "pinctrl-single";
66 reg = <0x480025d8 0x24>;
67 #address-cells = <1>;
68 #size-cells = <0>;
69 #pinctrl-cells = <1>;
70 #interrupt-cells = <1>;
71 interrupt-controller;
72 pinctrl-single,register-width = <16>;
73 pinctrl-single,function-mask = <0xff1f>;
74 };
75 };
76};
77
78&iva {
79 status = "disabled";
80};
81
82&mailbox {
83 status = "disabled";
84};
85
86&mmu_isp {
87 status = "disabled";
88};
89
90&smartreflex_mpu_iva {
91 status = "disabled";
92};
93
94/include/ "am35xx-clocks.dtsi"
95/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"