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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
4 * Copyright (C) 2018 Robert Bosch Power Tools GmbH
5 */
6/dts-v1/;
7
8#include "am33xx.dtsi"
9#include <dt-bindings/input/input.h>
10#include <dt-bindings/interrupt-controller/irq.h>
11
12/ {
13 model = "Bosch AM335x Guardian";
14 compatible = "bosch,am335x-guardian", "ti,am33xx";
15
16 chosen {
17 stdout-path = &uart0;
18 tick-timer = &timer2;
19 };
20
21 cpus {
22 cpu@0 {
23 cpu0-supply = <&dcdc2_reg>;
24 };
25 };
26
27 memory@80000000 {
28 device_type = "memory";
29 reg = <0x80000000 0x10000000>; /* 256 MB */
30 };
31
32 gpio_keys {
33 compatible = "gpio-keys";
34 #address-cells = <1>;
35 #size-cells = <0>;
36 pinctrl-names = "default";
37 pinctrl-0 = <&gpio_keys_pins>;
38
39 button21 {
40 label = "guardian-power-button";
41 linux,code = <KEY_POWER>;
42 gpios = <&gpio2 21 0>;
43 wakeup-source;
44 };
45 };
46
47 leds {
48 compatible = "gpio-leds";
49 pinctrl-names = "default";
50 pinctrl-0 = <&leds_pins>;
51
52 led1 {
53 label = "green:heartbeat";
54 gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
55 linux,default-trigger = "heartbeat";
56 default-state = "off";
57 };
58
59 led2 {
60 label = "green:mmc0";
61 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
62 linux,default-trigger = "mmc0";
63 default-state = "off";
64 };
65 };
66
67 panel {
68 compatible = "ti,tilcdc,panel";
69 pinctrl-names = "default", "sleep";
70 pinctrl-0 = <&lcd_pins_default &lcd_disen_pins>;
71 pinctrl-1 = <&lcd_pins_sleep>;
72
73 display-timings {
74 320x240 {
75 hactive = <320>;
76 vactive = <240>;
77 hback-porch = <68>;
78 hfront-porch = <20>;
79 hsync-len = <1>;
80 vback-porch = <18>;
81 vfront-porch = <4>;
82 vsync-len = <1>;
83 clock-frequency = <9000000>;
84 hsync-active = <0>;
85 vsync-active = <0>;
86 };
87 };
88 panel-info {
89 ac-bias = <255>;
90 ac-bias-intrpt = <0>;
91 dma-burst-sz = <16>;
92 bpp = <24>;
93 bus-width = <16>;
94 fdd = <0x80>;
95 sync-edge = <0>;
96 sync-ctrl = <1>;
97 raster-order = <0>;
98 fifo-th = <0>;
99 };
100
101 };
102
103 pwm7: dmtimer-pwm {
104 compatible = "ti,omap-dmtimer-pwm";
105 ti,timers = <&timer7>;
106 pinctrl-names = "default";
107 pinctrl-0 = <&dmtimer7_pins>;
108 };
109
110 vmmcsd_fixed: regulator-3v3 {
111 compatible = "regulator-fixed";
112 regulator-name = "vmmcsd_fixed";
113 regulator-min-microvolt = <3300000>;
114 regulator-max-microvolt = <3300000>;
115 };
116};
117
118&cppi41dma {
119 status = "okay";
120};
121
122&elm {
123 status = "okay";
124};
125
126&gpmc {
127 pinctrl-names = "default";
128 pinctrl-0 = <&nandflash_pins>;
129 ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
130 status = "okay";
131
132 nand@0,0 {
133 compatible = "ti,omap2-nand";
134 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
135 interrupt-parent = <&gpmc>;
136 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
137 <1 IRQ_TYPE_NONE>; /* termcount */
138 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
139 ti,nand-ecc-opt = "bch16";
140 ti,elm-id = <&elm>;
141 nand-bus-width = <8>;
142 gpmc,device-width = <1>;
143 gpmc,sync-clk-ps = <0>;
144 gpmc,cs-on-ns = <0>;
145 gpmc,cs-rd-off-ns = <44>;
146 gpmc,cs-wr-off-ns = <44>;
147 gpmc,adv-on-ns = <6>;
148 gpmc,adv-rd-off-ns = <34>;
149 gpmc,adv-wr-off-ns = <44>;
150 gpmc,we-on-ns = <0>;
151 gpmc,we-off-ns = <40>;
152 gpmc,oe-on-ns = <0>;
153 gpmc,oe-off-ns = <54>;
154 gpmc,access-ns = <64>;
155 gpmc,rd-cycle-ns = <82>;
156 gpmc,wr-cycle-ns = <82>;
157 gpmc,bus-turnaround-ns = <0>;
158 gpmc,cycle2cycle-delay-ns = <0>;
159 gpmc,clk-activation-ns = <0>;
160 gpmc,wr-access-ns = <40>;
161 gpmc,wr-data-mux-bus-ns = <0>;
162
163 /*
164 * MTD partition table
165 *
166 * All SPL-* partitions are sized to minimal length which can
167 * be independently programmable. For NAND flash this is equal
168 * to size of erase-block.
169 */
170 #address-cells = <1>;
171 #size-cells = <1>;
172
173 partition@0 {
174 label = "SPL";
175 reg = <0x0 0x40000>;
176 };
177
178 partition@1 {
179 label = "SPL.backup1";
180 reg = <0x40000 0x40000>;
181 };
182
183 partition@2 {
184 label = "SPL.backup2";
185 reg = <0x80000 0x40000>;
186 };
187
188 partition@3 {
189 label = "SPL.backup3";
190 reg = <0xc0000 0x40000>;
191 };
192
193 partition@4 {
194 label = "u-boot";
195 reg = <0x100000 0x100000>;
196 };
197
198 partition@5 {
199 label = "u-boot.backup1";
200 reg = <0x200000 0x100000>;
201 };
202
203 partition@6 {
204 label = "u-boot-env";
205 reg = <0x300000 0x40000>;
206 };
207
208 partition@7 {
209 label = "u-boot-env.backup1";
210 reg = <0x340000 0x40000>;
211 };
212
213 partition@8 {
214 label = "UBI";
215 reg = <0x380000 0x1fc80000>;
216 };
217 };
218};
219
220&i2c0 {
221 pinctrl-names = "default";
222 pinctrl-0 = <&i2c0_pins>;
223 clock-frequency = <400000>;
224 status = "okay";
225
226 tps: tps@24 {
227 reg = <0x24>;
228 };
229};
230
231&lcdc {
232 blue-and-red-wiring = "crossed";
233 status = "okay";
234};
235
236&mmc1 {
237 bus-width = <0x4>;
238 pinctrl-names = "default";
239 pinctrl-0 = <&mmc1_pins>;
240 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
241 vmmc-supply = <&vmmcsd_fixed>;
242 status = "okay";
243};
244
245&rtc {
246 clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
247 clock-names = "ext-clk", "int-clk";
248 system-power-controller;
249};
250
251&spi0 {
252 ti,pindir-d0-out-d1-in;
253 pinctrl-names = "default";
254 pinctrl-0 = <&spi0_pins>;
255 status = "okay";
256};
257
258#include "tps65217.dtsi"
259
260&tps {
261 ti,pmic-shutdown-controller;
262 interrupt-parent = <&intc>;
263 interrupts = <7>; /* NMI */
264
265 backlight {
266 isel = <1>; /* 1 - ISET1, 2 ISET2 */
267 fdim = <100>; /* TPS65217_BL_FDIM_100HZ */
268 default-brightness = <100>;
269 };
270
271 regulators {
272 dcdc1_reg: regulator@0 {
273 regulator-name = "vdds_dpr";
274 regulator-always-on;
275 };
276
277 dcdc2_reg: regulator@1 {
278 regulator-name = "vdd_mpu";
279 regulator-min-microvolt = <925000>;
280 regulator-max-microvolt = <1351500>;
281 regulator-boot-on;
282 regulator-always-on;
283 };
284
285 dcdc3_reg: regulator@2 {
286 regulator-name = "vdd_core";
287 regulator-min-microvolt = <925000>;
288 regulator-max-microvolt = <1150000>;
289 regulator-boot-on;
290 regulator-always-on;
291 };
292
293 ldo1_reg: regulator@3 {
294 regulator-name = "vio,vrtc,vdds";
295 regulator-always-on;
296 };
297
298 ldo2_reg: regulator@4 {
299 regulator-name = "vdd_3v3aux";
300 regulator-always-on;
301 };
302
303 ldo3_reg: regulator@5 {
304 regulator-name = "vdd_1v8";
305 regulator-min-microvolt = <1800000>;
306 regulator-max-microvolt = <1800000>;
307 regulator-always-on;
308 };
309
310 ldo4_reg: regulator@6 {
311 regulator-name = "vdd_3v3a";
312 regulator-always-on;
313 };
314 };
315};
316
317&tscadc {
318 status = "okay";
319
320 adc {
321 ti,adc-channels = <0 1 2 3 4 5 6>;
322 };
323};
324
325&uart0 {
326 pinctrl-names = "default";
327 pinctrl-0 = <&uart0_pins>;
328 status = "okay";
329};
330
331&usb {
332 status = "okay";
333};
334
335&usb_ctrl_mod {
336 status = "okay";
337};
338
339&usb0 {
340 dr_mode = "peripheral";
341 status = "okay";
342};
343
344&usb0_phy {
345 status = "okay";
346};
347
348&usb1 {
349 dr_mode = "host";
350 status = "okay";
351};
352
353&usb1_phy {
354 status = "okay";
355};
356
357&am33xx_pinmux {
358 pinctrl-names = "default";
359 pinctrl-0 = <&clkout2_pin &gpio_pins>;
360
361 clkout2_pin: pinmux_clkout2_pin {
362 pinctrl-single,pins = <
363 AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
364 >;
365 };
366
367 dmtimer7_pins: pinmux_dmtimer7_pins {
368 pinctrl-single,pins = <
369 AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE5)
370 >;
371 };
372
373 gpio_keys_pins: pinmux_gpio_keys_pins {
374 pinctrl-single,pins = <
375 AM33XX_IOPAD(0x940, PIN_INPUT | MUX_MODE7)
376 >;
377 };
378
379 gpio_pins: pinmux_gpio_pins {
380 pinctrl-single,pins = <
381 AM33XX_IOPAD(0x928, PIN_OUTPUT | MUX_MODE7)
382 AM33XX_IOPAD(0x990, PIN_OUTPUT | MUX_MODE7)
383 >;
384 };
385
386 i2c0_pins: pinmux_i2c0_pins {
387 pinctrl-single,pins = <
388 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)
389 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)
390 >;
391 };
392
393 lcd_disen_pins: pinmux_lcd_disen_pins {
394 pinctrl-single,pins = <
395 AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLUP | SLEWCTRL_SLOW | MUX_MODE7)
396 >;
397 };
398
399 lcd_pins_default: pinmux_lcd_pins_default {
400 pinctrl-single,pins = <
401 AM33XX_IOPAD(0x820, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
402 AM33XX_IOPAD(0x824, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
403 AM33XX_IOPAD(0x828, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
404 AM33XX_IOPAD(0x82c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
405 AM33XX_IOPAD(0x830, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
406 AM33XX_IOPAD(0x834, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
407 AM33XX_IOPAD(0x838, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
408 AM33XX_IOPAD(0x83c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
409 AM33XX_IOPAD(0x8a0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
410 AM33XX_IOPAD(0x8a4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
411 AM33XX_IOPAD(0x8a8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
412 AM33XX_IOPAD(0x8ac, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
413 AM33XX_IOPAD(0x8b0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
414 AM33XX_IOPAD(0x8b4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
415 AM33XX_IOPAD(0x8b8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
416 AM33XX_IOPAD(0x8bc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
417 AM33XX_IOPAD(0x8c0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
418 AM33XX_IOPAD(0x8c4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
419 AM33XX_IOPAD(0x8c8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
420 AM33XX_IOPAD(0x8cc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
421 AM33XX_IOPAD(0x8d0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
422 AM33XX_IOPAD(0x8d4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
423 AM33XX_IOPAD(0x8d8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
424 AM33XX_IOPAD(0x8dc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
425 AM33XX_IOPAD(0x8e0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
426 AM33XX_IOPAD(0x8e4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
427 AM33XX_IOPAD(0x8e8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
428 AM33XX_IOPAD(0x8ec, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
429 >;
430 };
431
432 lcd_pins_sleep: pinmux_lcd_pins_sleep {
433 pinctrl-single,pins = <
434 AM33XX_IOPAD(0x8a0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
435 AM33XX_IOPAD(0x8a4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
436 AM33XX_IOPAD(0x8a8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
437 AM33XX_IOPAD(0x8ac, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
438 AM33XX_IOPAD(0x8b0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
439 AM33XX_IOPAD(0x8b4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
440 AM33XX_IOPAD(0x8b8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
441 AM33XX_IOPAD(0x8bc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
442 AM33XX_IOPAD(0x8c0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
443 AM33XX_IOPAD(0x8c4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
444 AM33XX_IOPAD(0x8c8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
445 AM33XX_IOPAD(0x8cc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
446 AM33XX_IOPAD(0x8d0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
447 AM33XX_IOPAD(0x8d4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
448 AM33XX_IOPAD(0x8d8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
449 AM33XX_IOPAD(0x8dc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
450 AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
451 AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
452 AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
453 AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
454 >;
455 };
456
457 leds_pins: pinmux_leds_pins {
458 pinctrl-single,pins = <
459 AM33XX_IOPAD(0x868, PIN_OUTPUT | MUX_MODE7)
460 AM33XX_IOPAD(0x86c, PIN_OUTPUT | MUX_MODE7)
461 >;
462 };
463
464 mmc1_pins: pinmux_mmc1_pins {
465 pinctrl-single,pins = <
466 AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)
467 AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)
468 AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)
469 AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)
470 AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)
471 AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)
472 AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7)
473 >;
474 };
475
476 spi0_pins: pinmux_spi0_pins {
477 pinctrl-single,pins = <
478 AM33XX_IOPAD(0x950, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
479 AM33XX_IOPAD(0x954, PIN_OUTPUT_PULLUP | MUX_MODE0)
480 AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0)
481 AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLUP | MUX_MODE0)
482 >;
483 };
484
485 uart0_pins: pinmux_uart0_pins {
486 pinctrl-single,pins = <
487 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)
488 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
489 >;
490 };
491
492 nandflash_pins: pinmux_nandflash_pins {
493 pinctrl-single,pins = <
494 AM33XX_IOPAD(0x800, PIN_INPUT | MUX_MODE0)
495 AM33XX_IOPAD(0x804, PIN_INPUT | MUX_MODE0)
496 AM33XX_IOPAD(0x808, PIN_INPUT | MUX_MODE0)
497 AM33XX_IOPAD(0x80c, PIN_INPUT | MUX_MODE0)
498 AM33XX_IOPAD(0x810, PIN_INPUT | MUX_MODE0)
499 AM33XX_IOPAD(0x814, PIN_INPUT | MUX_MODE0)
500 AM33XX_IOPAD(0x818, PIN_INPUT | MUX_MODE0)
501 AM33XX_IOPAD(0x81c, PIN_INPUT | MUX_MODE0)
502 AM33XX_IOPAD(0x870, PIN_INPUT | MUX_MODE0)
503 AM33XX_IOPAD(0x874, PIN_OUTPUT | MUX_MODE0)
504 AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)
505 AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)
506 AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)
507 AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)
508 AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)
509 >;
510 };
511};