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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 2016 BayLibre, SAS
4 * Author: Neil Armstrong <narmstrong@baylibre.com>
5 * Copyright (C) 2014 Endless Mobile
6 *
7 * Written by:
8 * Jasper St. Pierre <jstpierre@mecheye.net>
9 */
10
11#include <linux/component.h>
12#include <linux/module.h>
13#include <linux/of_graph.h>
14#include <linux/platform_device.h>
15#include <linux/soc/amlogic/meson-canvas.h>
16
17#include <drm/drm_atomic_helper.h>
18#include <drm/drm_drv.h>
19#include <drm/drm_fb_helper.h>
20#include <drm/drm_gem_cma_helper.h>
21#include <drm/drm_gem_framebuffer_helper.h>
22#include <drm/drm_irq.h>
23#include <drm/drm_modeset_helper_vtables.h>
24#include <drm/drm_probe_helper.h>
25#include <drm/drm_vblank.h>
26
27#include "meson_crtc.h"
28#include "meson_drv.h"
29#include "meson_overlay.h"
30#include "meson_plane.h"
31#include "meson_registers.h"
32#include "meson_venc_cvbs.h"
33#include "meson_viu.h"
34#include "meson_vpp.h"
35
36#define DRIVER_NAME "meson"
37#define DRIVER_DESC "Amlogic Meson DRM driver"
38
39/**
40 * DOC: Video Processing Unit
41 *
42 * VPU Handles the Global Video Processing, it includes management of the
43 * clocks gates, blocks reset lines and power domains.
44 *
45 * What is missing :
46 *
47 * - Full reset of entire video processing HW blocks
48 * - Scaling and setup of the VPU clock
49 * - Bus clock gates
50 * - Powering up video processing HW blocks
51 * - Powering Up HDMI controller and PHY
52 */
53
54static const struct drm_mode_config_funcs meson_mode_config_funcs = {
55 .atomic_check = drm_atomic_helper_check,
56 .atomic_commit = drm_atomic_helper_commit,
57 .fb_create = drm_gem_fb_create,
58};
59
60static const struct drm_mode_config_helper_funcs meson_mode_config_helpers = {
61 .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
62};
63
64static irqreturn_t meson_irq(int irq, void *arg)
65{
66 struct drm_device *dev = arg;
67 struct meson_drm *priv = dev->dev_private;
68
69 (void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG));
70
71 meson_crtc_irq(priv);
72
73 return IRQ_HANDLED;
74}
75
76static int meson_dumb_create(struct drm_file *file, struct drm_device *dev,
77 struct drm_mode_create_dumb *args)
78{
79 /*
80 * We need 64bytes aligned stride, and PAGE aligned size
81 */
82 args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), SZ_64);
83 args->size = PAGE_ALIGN(args->pitch * args->height);
84
85 return drm_gem_cma_dumb_create_internal(file, dev, args);
86}
87
88DEFINE_DRM_GEM_CMA_FOPS(fops);
89
90static struct drm_driver meson_driver = {
91 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
92
93 /* IRQ */
94 .irq_handler = meson_irq,
95
96 /* PRIME Ops */
97 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
98 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
99 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
100 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
101 .gem_prime_vmap = drm_gem_cma_prime_vmap,
102 .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
103 .gem_prime_mmap = drm_gem_cma_prime_mmap,
104
105 /* GEM Ops */
106 .dumb_create = meson_dumb_create,
107 .gem_free_object_unlocked = drm_gem_cma_free_object,
108 .gem_vm_ops = &drm_gem_cma_vm_ops,
109
110 /* Misc */
111 .fops = &fops,
112 .name = DRIVER_NAME,
113 .desc = DRIVER_DESC,
114 .date = "20161109",
115 .major = 1,
116 .minor = 0,
117};
118
119static bool meson_vpu_has_available_connectors(struct device *dev)
120{
121 struct device_node *ep, *remote;
122
123 /* Parses each endpoint and check if remote exists */
124 for_each_endpoint_of_node(dev->of_node, ep) {
125 /* If the endpoint node exists, consider it enabled */
126 remote = of_graph_get_remote_port(ep);
127 if (remote)
128 return true;
129 }
130
131 return false;
132}
133
134static struct regmap_config meson_regmap_config = {
135 .reg_bits = 32,
136 .val_bits = 32,
137 .reg_stride = 4,
138 .max_register = 0x1000,
139};
140
141static void meson_vpu_init(struct meson_drm *priv)
142{
143 u32 value;
144
145 /*
146 * Slave dc0 and dc5 connected to master port 1.
147 * By default other slaves are connected to master port 0.
148 */
149 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1) |
150 VPU_RDARB_SLAVE_TO_MASTER_PORT(5, 1);
151 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C1));
152
153 /* Slave dc0 connected to master port 1 */
154 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1);
155 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C2));
156
157 /* Slave dc4 and dc7 connected to master port 1 */
158 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(4, 1) |
159 VPU_RDARB_SLAVE_TO_MASTER_PORT(7, 1);
160 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L2C1));
161
162 /* Slave dc1 connected to master port 1 */
163 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(1, 1);
164 writel_relaxed(value, priv->io_base + _REG(VPU_WRARB_MODE_L2C1));
165}
166
167static void meson_remove_framebuffers(void)
168{
169 struct apertures_struct *ap;
170
171 ap = alloc_apertures(1);
172 if (!ap)
173 return;
174
175 /* The framebuffer can be located anywhere in RAM */
176 ap->ranges[0].base = 0;
177 ap->ranges[0].size = ~0;
178
179 drm_fb_helper_remove_conflicting_framebuffers(ap, "meson-drm-fb",
180 false);
181 kfree(ap);
182}
183
184static int meson_drv_bind_master(struct device *dev, bool has_components)
185{
186 struct platform_device *pdev = to_platform_device(dev);
187 struct meson_drm *priv;
188 struct drm_device *drm;
189 struct resource *res;
190 void __iomem *regs;
191 int ret;
192
193 /* Checks if an output connector is available */
194 if (!meson_vpu_has_available_connectors(dev)) {
195 dev_err(dev, "No output connector available\n");
196 return -ENODEV;
197 }
198
199 drm = drm_dev_alloc(&meson_driver, dev);
200 if (IS_ERR(drm))
201 return PTR_ERR(drm);
202
203 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
204 if (!priv) {
205 ret = -ENOMEM;
206 goto free_drm;
207 }
208 drm->dev_private = priv;
209 priv->drm = drm;
210 priv->dev = dev;
211
212 priv->compat = (enum vpu_compatible)of_device_get_match_data(priv->dev);
213
214 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu");
215 regs = devm_ioremap_resource(dev, res);
216 if (IS_ERR(regs)) {
217 ret = PTR_ERR(regs);
218 goto free_drm;
219 }
220
221 priv->io_base = regs;
222
223 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
224 if (!res) {
225 ret = -EINVAL;
226 goto free_drm;
227 }
228 /* Simply ioremap since it may be a shared register zone */
229 regs = devm_ioremap(dev, res->start, resource_size(res));
230 if (!regs) {
231 ret = -EADDRNOTAVAIL;
232 goto free_drm;
233 }
234
235 priv->hhi = devm_regmap_init_mmio(dev, regs,
236 &meson_regmap_config);
237 if (IS_ERR(priv->hhi)) {
238 dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
239 ret = PTR_ERR(priv->hhi);
240 goto free_drm;
241 }
242
243 priv->canvas = meson_canvas_get(dev);
244 if (IS_ERR(priv->canvas)) {
245 ret = PTR_ERR(priv->canvas);
246 goto free_drm;
247 }
248
249 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);
250 if (ret)
251 goto free_drm;
252 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0);
253 if (ret) {
254 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
255 goto free_drm;
256 }
257 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1);
258 if (ret) {
259 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
260 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
261 goto free_drm;
262 }
263 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2);
264 if (ret) {
265 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
266 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
267 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
268 goto free_drm;
269 }
270
271 priv->vsync_irq = platform_get_irq(pdev, 0);
272
273 ret = drm_vblank_init(drm, 1);
274 if (ret)
275 goto free_drm;
276
277 /* Remove early framebuffers (ie. simplefb) */
278 meson_remove_framebuffers();
279
280 drm_mode_config_init(drm);
281 drm->mode_config.max_width = 3840;
282 drm->mode_config.max_height = 2160;
283 drm->mode_config.funcs = &meson_mode_config_funcs;
284 drm->mode_config.helper_private = &meson_mode_config_helpers;
285
286 /* Hardware Initialization */
287
288 meson_vpu_init(priv);
289 meson_venc_init(priv);
290 meson_vpp_init(priv);
291 meson_viu_init(priv);
292
293 /* Encoder Initialization */
294
295 ret = meson_venc_cvbs_create(priv);
296 if (ret)
297 goto free_drm;
298
299 if (has_components) {
300 ret = component_bind_all(drm->dev, drm);
301 if (ret) {
302 dev_err(drm->dev, "Couldn't bind all components\n");
303 goto free_drm;
304 }
305 }
306
307 ret = meson_plane_create(priv);
308 if (ret)
309 goto free_drm;
310
311 ret = meson_overlay_create(priv);
312 if (ret)
313 goto free_drm;
314
315 ret = meson_crtc_create(priv);
316 if (ret)
317 goto free_drm;
318
319 ret = drm_irq_install(drm, priv->vsync_irq);
320 if (ret)
321 goto free_drm;
322
323 drm_mode_config_reset(drm);
324
325 drm_kms_helper_poll_init(drm);
326
327 platform_set_drvdata(pdev, priv);
328
329 ret = drm_dev_register(drm, 0);
330 if (ret)
331 goto uninstall_irq;
332
333 drm_fbdev_generic_setup(drm, 32);
334
335 return 0;
336
337uninstall_irq:
338 drm_irq_uninstall(drm);
339free_drm:
340 drm_dev_put(drm);
341
342 return ret;
343}
344
345static int meson_drv_bind(struct device *dev)
346{
347 return meson_drv_bind_master(dev, true);
348}
349
350static void meson_drv_unbind(struct device *dev)
351{
352 struct meson_drm *priv = dev_get_drvdata(dev);
353 struct drm_device *drm = priv->drm;
354
355 if (priv->canvas) {
356 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
357 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
358 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
359 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2);
360 }
361
362 drm_dev_unregister(drm);
363 drm_irq_uninstall(drm);
364 drm_kms_helper_poll_fini(drm);
365 drm_mode_config_cleanup(drm);
366 drm_dev_put(drm);
367
368}
369
370static const struct component_master_ops meson_drv_master_ops = {
371 .bind = meson_drv_bind,
372 .unbind = meson_drv_unbind,
373};
374
375static int compare_of(struct device *dev, void *data)
376{
377 DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n",
378 dev->of_node, data);
379
380 return dev->of_node == data;
381}
382
383/* Possible connectors nodes to ignore */
384static const struct of_device_id connectors_match[] = {
385 { .compatible = "composite-video-connector" },
386 { .compatible = "svideo-connector" },
387 { .compatible = "hdmi-connector" },
388 { .compatible = "dvi-connector" },
389 {}
390};
391
392static int meson_probe_remote(struct platform_device *pdev,
393 struct component_match **match,
394 struct device_node *parent,
395 struct device_node *remote)
396{
397 struct device_node *ep, *remote_node;
398 int count = 1;
399
400 /* If node is a connector, return and do not add to match table */
401 if (of_match_node(connectors_match, remote))
402 return 1;
403
404 component_match_add(&pdev->dev, match, compare_of, remote);
405
406 for_each_endpoint_of_node(remote, ep) {
407 remote_node = of_graph_get_remote_port_parent(ep);
408 if (!remote_node ||
409 remote_node == parent || /* Ignore parent endpoint */
410 !of_device_is_available(remote_node)) {
411 of_node_put(remote_node);
412 continue;
413 }
414
415 count += meson_probe_remote(pdev, match, remote, remote_node);
416
417 of_node_put(remote_node);
418 }
419
420 return count;
421}
422
423static int meson_drv_probe(struct platform_device *pdev)
424{
425 struct component_match *match = NULL;
426 struct device_node *np = pdev->dev.of_node;
427 struct device_node *ep, *remote;
428 int count = 0;
429
430 for_each_endpoint_of_node(np, ep) {
431 remote = of_graph_get_remote_port_parent(ep);
432 if (!remote || !of_device_is_available(remote)) {
433 of_node_put(remote);
434 continue;
435 }
436
437 count += meson_probe_remote(pdev, &match, np, remote);
438 of_node_put(remote);
439 }
440
441 if (count && !match)
442 return meson_drv_bind_master(&pdev->dev, false);
443
444 /* If some endpoints were found, initialize the nodes */
445 if (count) {
446 dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count);
447
448 return component_master_add_with_match(&pdev->dev,
449 &meson_drv_master_ops,
450 match);
451 }
452
453 /* If no output endpoints were available, simply bail out */
454 return 0;
455};
456
457static const struct of_device_id dt_match[] = {
458 { .compatible = "amlogic,meson-gxbb-vpu",
459 .data = (void *)VPU_COMPATIBLE_GXBB },
460 { .compatible = "amlogic,meson-gxl-vpu",
461 .data = (void *)VPU_COMPATIBLE_GXL },
462 { .compatible = "amlogic,meson-gxm-vpu",
463 .data = (void *)VPU_COMPATIBLE_GXM },
464 { .compatible = "amlogic,meson-g12a-vpu",
465 .data = (void *)VPU_COMPATIBLE_G12A },
466 {}
467};
468MODULE_DEVICE_TABLE(of, dt_match);
469
470static struct platform_driver meson_drm_platform_driver = {
471 .probe = meson_drv_probe,
472 .driver = {
473 .name = "meson-drm",
474 .of_match_table = dt_match,
475 },
476};
477
478module_platform_driver(meson_drm_platform_driver);
479
480MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>");
481MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
482MODULE_DESCRIPTION(DRIVER_DESC);
483MODULE_LICENSE("GPL");
1/*
2 * Copyright (C) 2016 BayLibre, SAS
3 * Author: Neil Armstrong <narmstrong@baylibre.com>
4 * Copyright (C) 2014 Endless Mobile
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of the
9 * License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 *
19 * Written by:
20 * Jasper St. Pierre <jstpierre@mecheye.net>
21 */
22
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/mutex.h>
26#include <linux/platform_device.h>
27#include <linux/of_graph.h>
28
29#include <drm/drmP.h>
30#include <drm/drm_atomic.h>
31#include <drm/drm_atomic_helper.h>
32#include <drm/drm_flip_work.h>
33#include <drm/drm_crtc_helper.h>
34#include <drm/drm_plane_helper.h>
35#include <drm/drm_gem_cma_helper.h>
36#include <drm/drm_fb_cma_helper.h>
37#include <drm/drm_rect.h>
38#include <drm/drm_fb_helper.h>
39
40#include "meson_drv.h"
41#include "meson_plane.h"
42#include "meson_crtc.h"
43#include "meson_venc_cvbs.h"
44
45#include "meson_vpp.h"
46#include "meson_viu.h"
47#include "meson_venc.h"
48#include "meson_canvas.h"
49#include "meson_registers.h"
50
51#define DRIVER_NAME "meson"
52#define DRIVER_DESC "Amlogic Meson DRM driver"
53
54/*
55 * Video Processing Unit
56 *
57 * VPU Handles the Global Video Processing, it includes management of the
58 * clocks gates, blocks reset lines and power domains.
59 *
60 * What is missing :
61 * - Full reset of entire video processing HW blocks
62 * - Scaling and setup of the VPU clock
63 * - Bus clock gates
64 * - Powering up video processing HW blocks
65 * - Powering Up HDMI controller and PHY
66 */
67
68static void meson_fb_output_poll_changed(struct drm_device *dev)
69{
70 struct meson_drm *priv = dev->dev_private;
71
72 drm_fbdev_cma_hotplug_event(priv->fbdev);
73}
74
75static const struct drm_mode_config_funcs meson_mode_config_funcs = {
76 .output_poll_changed = meson_fb_output_poll_changed,
77 .atomic_check = drm_atomic_helper_check,
78 .atomic_commit = drm_atomic_helper_commit,
79 .fb_create = drm_fb_cma_create,
80};
81
82static int meson_enable_vblank(struct drm_device *dev, unsigned int crtc)
83{
84 struct meson_drm *priv = dev->dev_private;
85
86 meson_venc_enable_vsync(priv);
87
88 return 0;
89}
90
91static void meson_disable_vblank(struct drm_device *dev, unsigned int crtc)
92{
93 struct meson_drm *priv = dev->dev_private;
94
95 meson_venc_disable_vsync(priv);
96}
97
98static irqreturn_t meson_irq(int irq, void *arg)
99{
100 struct drm_device *dev = arg;
101 struct meson_drm *priv = dev->dev_private;
102
103 (void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG));
104
105 meson_crtc_irq(priv);
106
107 return IRQ_HANDLED;
108}
109
110static const struct file_operations fops = {
111 .owner = THIS_MODULE,
112 .open = drm_open,
113 .release = drm_release,
114 .unlocked_ioctl = drm_ioctl,
115#ifdef CONFIG_COMPAT
116 .compat_ioctl = drm_compat_ioctl,
117#endif
118 .poll = drm_poll,
119 .read = drm_read,
120 .llseek = no_llseek,
121 .mmap = drm_gem_cma_mmap,
122};
123
124static struct drm_driver meson_driver = {
125 .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM |
126 DRIVER_MODESET | DRIVER_PRIME |
127 DRIVER_ATOMIC,
128
129 /* Vblank */
130 .enable_vblank = meson_enable_vblank,
131 .disable_vblank = meson_disable_vblank,
132 .get_vblank_counter = drm_vblank_no_hw_counter,
133
134 /* IRQ */
135 .irq_handler = meson_irq,
136
137 /* PRIME Ops */
138 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
139 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
140 .gem_prime_import = drm_gem_prime_import,
141 .gem_prime_export = drm_gem_prime_export,
142 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
143 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
144 .gem_prime_vmap = drm_gem_cma_prime_vmap,
145 .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
146 .gem_prime_mmap = drm_gem_cma_prime_mmap,
147
148 /* GEM Ops */
149 .dumb_create = drm_gem_cma_dumb_create,
150 .dumb_destroy = drm_gem_dumb_destroy,
151 .dumb_map_offset = drm_gem_cma_dumb_map_offset,
152 .gem_free_object_unlocked = drm_gem_cma_free_object,
153 .gem_vm_ops = &drm_gem_cma_vm_ops,
154
155 /* Misc */
156 .fops = &fops,
157 .name = DRIVER_NAME,
158 .desc = DRIVER_DESC,
159 .date = "20161109",
160 .major = 1,
161 .minor = 0,
162};
163
164static bool meson_vpu_has_available_connectors(struct device *dev)
165{
166 struct device_node *ep, *remote;
167
168 /* Parses each endpoint and check if remote exists */
169 for_each_endpoint_of_node(dev->of_node, ep) {
170 /* If the endpoint node exists, consider it enabled */
171 remote = of_graph_get_remote_port(ep);
172 if (remote)
173 return true;
174 }
175
176 return false;
177}
178
179static struct regmap_config meson_regmap_config = {
180 .reg_bits = 32,
181 .val_bits = 32,
182 .reg_stride = 4,
183 .max_register = 0x1000,
184};
185
186static int meson_drv_probe(struct platform_device *pdev)
187{
188 struct device *dev = &pdev->dev;
189 struct meson_drm *priv;
190 struct drm_device *drm;
191 struct resource *res;
192 void __iomem *regs;
193 int ret;
194
195 /* Checks if an output connector is available */
196 if (!meson_vpu_has_available_connectors(dev)) {
197 dev_err(dev, "No output connector available\n");
198 return -ENODEV;
199 }
200
201 drm = drm_dev_alloc(&meson_driver, dev);
202 if (IS_ERR(drm))
203 return PTR_ERR(drm);
204
205 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
206 if (!priv) {
207 ret = -ENOMEM;
208 goto free_drm;
209 }
210 drm->dev_private = priv;
211 priv->drm = drm;
212 priv->dev = dev;
213
214 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu");
215 regs = devm_ioremap_resource(dev, res);
216 if (IS_ERR(regs))
217 return PTR_ERR(regs);
218
219 priv->io_base = regs;
220
221 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
222 /* Simply ioremap since it may be a shared register zone */
223 regs = devm_ioremap(dev, res->start, resource_size(res));
224 if (!regs)
225 return -EADDRNOTAVAIL;
226
227 priv->hhi = devm_regmap_init_mmio(dev, regs,
228 &meson_regmap_config);
229 if (IS_ERR(priv->hhi)) {
230 dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
231 return PTR_ERR(priv->hhi);
232 }
233
234 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmc");
235 /* Simply ioremap since it may be a shared register zone */
236 regs = devm_ioremap(dev, res->start, resource_size(res));
237 if (!regs)
238 return -EADDRNOTAVAIL;
239
240 priv->dmc = devm_regmap_init_mmio(dev, regs,
241 &meson_regmap_config);
242 if (IS_ERR(priv->dmc)) {
243 dev_err(&pdev->dev, "Couldn't create the DMC regmap\n");
244 return PTR_ERR(priv->dmc);
245 }
246
247 priv->vsync_irq = platform_get_irq(pdev, 0);
248
249 drm_vblank_init(drm, 1);
250 drm_mode_config_init(drm);
251
252 /* Encoder Initialization */
253
254 ret = meson_venc_cvbs_create(priv);
255 if (ret)
256 goto free_drm;
257
258 /* Hardware Initialization */
259
260 meson_venc_init(priv);
261 meson_vpp_init(priv);
262 meson_viu_init(priv);
263
264 ret = meson_plane_create(priv);
265 if (ret)
266 goto free_drm;
267
268 ret = meson_crtc_create(priv);
269 if (ret)
270 goto free_drm;
271
272 ret = drm_irq_install(drm, priv->vsync_irq);
273 if (ret)
274 goto free_drm;
275
276 drm_mode_config_reset(drm);
277 drm->mode_config.max_width = 8192;
278 drm->mode_config.max_height = 8192;
279 drm->mode_config.funcs = &meson_mode_config_funcs;
280
281 priv->fbdev = drm_fbdev_cma_init(drm, 32,
282 drm->mode_config.num_crtc,
283 drm->mode_config.num_connector);
284 if (IS_ERR(priv->fbdev)) {
285 ret = PTR_ERR(priv->fbdev);
286 goto free_drm;
287 }
288
289 drm_kms_helper_poll_init(drm);
290
291 platform_set_drvdata(pdev, priv);
292
293 ret = drm_dev_register(drm, 0);
294 if (ret)
295 goto free_drm;
296
297 return 0;
298
299free_drm:
300 drm_dev_unref(drm);
301
302 return ret;
303}
304
305static int meson_drv_remove(struct platform_device *pdev)
306{
307 struct drm_device *drm = dev_get_drvdata(&pdev->dev);
308 struct meson_drm *priv = drm->dev_private;
309
310 drm_dev_unregister(drm);
311 drm_kms_helper_poll_fini(drm);
312 drm_fbdev_cma_fini(priv->fbdev);
313 drm_mode_config_cleanup(drm);
314 drm_vblank_cleanup(drm);
315 drm_dev_unref(drm);
316
317 return 0;
318}
319
320static const struct of_device_id dt_match[] = {
321 { .compatible = "amlogic,meson-gxbb-vpu" },
322 { .compatible = "amlogic,meson-gxl-vpu" },
323 { .compatible = "amlogic,meson-gxm-vpu" },
324 {}
325};
326MODULE_DEVICE_TABLE(of, dt_match);
327
328static struct platform_driver meson_drm_platform_driver = {
329 .probe = meson_drv_probe,
330 .remove = meson_drv_remove,
331 .driver = {
332 .owner = THIS_MODULE,
333 .name = DRIVER_NAME,
334 .of_match_table = dt_match,
335 },
336};
337
338module_platform_driver(meson_drm_platform_driver);
339
340MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>");
341MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
342MODULE_DESCRIPTION(DRIVER_DESC);
343MODULE_LICENSE("GPL");