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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Intel CPU Microcode Update Driver for Linux
4 *
5 * Copyright (C) 2000-2006 Tigran Aivazian <aivazian.tigran@gmail.com>
6 * 2006 Shaohua Li <shaohua.li@intel.com>
7 *
8 * Intel CPU microcode early update for Linux
9 *
10 * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
11 * H Peter Anvin" <hpa@zytor.com>
12 */
13
14/*
15 * This needs to be before all headers so that pr_debug in printk.h doesn't turn
16 * printk calls into no_printk().
17 *
18 *#define DEBUG
19 */
20#define pr_fmt(fmt) "microcode: " fmt
21
22#include <linux/earlycpio.h>
23#include <linux/firmware.h>
24#include <linux/uaccess.h>
25#include <linux/vmalloc.h>
26#include <linux/initrd.h>
27#include <linux/kernel.h>
28#include <linux/slab.h>
29#include <linux/cpu.h>
30#include <linux/uio.h>
31#include <linux/mm.h>
32
33#include <asm/microcode_intel.h>
34#include <asm/intel-family.h>
35#include <asm/processor.h>
36#include <asm/tlbflush.h>
37#include <asm/setup.h>
38#include <asm/msr.h>
39
40static const char ucode_path[] = "kernel/x86/microcode/GenuineIntel.bin";
41
42/* Current microcode patch used in early patching on the APs. */
43static struct microcode_intel *intel_ucode_patch;
44
45/* last level cache size per core */
46static int llc_size_per_core;
47
48static inline bool cpu_signatures_match(unsigned int s1, unsigned int p1,
49 unsigned int s2, unsigned int p2)
50{
51 if (s1 != s2)
52 return false;
53
54 /* Processor flags are either both 0 ... */
55 if (!p1 && !p2)
56 return true;
57
58 /* ... or they intersect. */
59 return p1 & p2;
60}
61
62/*
63 * Returns 1 if update has been found, 0 otherwise.
64 */
65static int find_matching_signature(void *mc, unsigned int csig, int cpf)
66{
67 struct microcode_header_intel *mc_hdr = mc;
68 struct extended_sigtable *ext_hdr;
69 struct extended_signature *ext_sig;
70 int i;
71
72 if (cpu_signatures_match(csig, cpf, mc_hdr->sig, mc_hdr->pf))
73 return 1;
74
75 /* Look for ext. headers: */
76 if (get_totalsize(mc_hdr) <= get_datasize(mc_hdr) + MC_HEADER_SIZE)
77 return 0;
78
79 ext_hdr = mc + get_datasize(mc_hdr) + MC_HEADER_SIZE;
80 ext_sig = (void *)ext_hdr + EXT_HEADER_SIZE;
81
82 for (i = 0; i < ext_hdr->count; i++) {
83 if (cpu_signatures_match(csig, cpf, ext_sig->sig, ext_sig->pf))
84 return 1;
85 ext_sig++;
86 }
87 return 0;
88}
89
90/*
91 * Returns 1 if update has been found, 0 otherwise.
92 */
93static int has_newer_microcode(void *mc, unsigned int csig, int cpf, int new_rev)
94{
95 struct microcode_header_intel *mc_hdr = mc;
96
97 if (mc_hdr->rev <= new_rev)
98 return 0;
99
100 return find_matching_signature(mc, csig, cpf);
101}
102
103/*
104 * Given CPU signature and a microcode patch, this function finds if the
105 * microcode patch has matching family and model with the CPU.
106 *
107 * %true - if there's a match
108 * %false - otherwise
109 */
110static bool microcode_matches(struct microcode_header_intel *mc_header,
111 unsigned long sig)
112{
113 unsigned long total_size = get_totalsize(mc_header);
114 unsigned long data_size = get_datasize(mc_header);
115 struct extended_sigtable *ext_header;
116 unsigned int fam_ucode, model_ucode;
117 struct extended_signature *ext_sig;
118 unsigned int fam, model;
119 int ext_sigcount, i;
120
121 fam = x86_family(sig);
122 model = x86_model(sig);
123
124 fam_ucode = x86_family(mc_header->sig);
125 model_ucode = x86_model(mc_header->sig);
126
127 if (fam == fam_ucode && model == model_ucode)
128 return true;
129
130 /* Look for ext. headers: */
131 if (total_size <= data_size + MC_HEADER_SIZE)
132 return false;
133
134 ext_header = (void *) mc_header + data_size + MC_HEADER_SIZE;
135 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
136 ext_sigcount = ext_header->count;
137
138 for (i = 0; i < ext_sigcount; i++) {
139 fam_ucode = x86_family(ext_sig->sig);
140 model_ucode = x86_model(ext_sig->sig);
141
142 if (fam == fam_ucode && model == model_ucode)
143 return true;
144
145 ext_sig++;
146 }
147 return false;
148}
149
150static struct ucode_patch *memdup_patch(void *data, unsigned int size)
151{
152 struct ucode_patch *p;
153
154 p = kzalloc(sizeof(struct ucode_patch), GFP_KERNEL);
155 if (!p)
156 return NULL;
157
158 p->data = kmemdup(data, size, GFP_KERNEL);
159 if (!p->data) {
160 kfree(p);
161 return NULL;
162 }
163
164 return p;
165}
166
167static void save_microcode_patch(void *data, unsigned int size)
168{
169 struct microcode_header_intel *mc_hdr, *mc_saved_hdr;
170 struct ucode_patch *iter, *tmp, *p = NULL;
171 bool prev_found = false;
172 unsigned int sig, pf;
173
174 mc_hdr = (struct microcode_header_intel *)data;
175
176 list_for_each_entry_safe(iter, tmp, µcode_cache, plist) {
177 mc_saved_hdr = (struct microcode_header_intel *)iter->data;
178 sig = mc_saved_hdr->sig;
179 pf = mc_saved_hdr->pf;
180
181 if (find_matching_signature(data, sig, pf)) {
182 prev_found = true;
183
184 if (mc_hdr->rev <= mc_saved_hdr->rev)
185 continue;
186
187 p = memdup_patch(data, size);
188 if (!p)
189 pr_err("Error allocating buffer %p\n", data);
190 else {
191 list_replace(&iter->plist, &p->plist);
192 kfree(iter->data);
193 kfree(iter);
194 }
195 }
196 }
197
198 /*
199 * There weren't any previous patches found in the list cache; save the
200 * newly found.
201 */
202 if (!prev_found) {
203 p = memdup_patch(data, size);
204 if (!p)
205 pr_err("Error allocating buffer for %p\n", data);
206 else
207 list_add_tail(&p->plist, µcode_cache);
208 }
209
210 if (!p)
211 return;
212
213 /*
214 * Save for early loading. On 32-bit, that needs to be a physical
215 * address as the APs are running from physical addresses, before
216 * paging has been enabled.
217 */
218 if (IS_ENABLED(CONFIG_X86_32))
219 intel_ucode_patch = (struct microcode_intel *)__pa_nodebug(p->data);
220 else
221 intel_ucode_patch = p->data;
222}
223
224static int microcode_sanity_check(void *mc, int print_err)
225{
226 unsigned long total_size, data_size, ext_table_size;
227 struct microcode_header_intel *mc_header = mc;
228 struct extended_sigtable *ext_header = NULL;
229 u32 sum, orig_sum, ext_sigcount = 0, i;
230 struct extended_signature *ext_sig;
231
232 total_size = get_totalsize(mc_header);
233 data_size = get_datasize(mc_header);
234
235 if (data_size + MC_HEADER_SIZE > total_size) {
236 if (print_err)
237 pr_err("Error: bad microcode data file size.\n");
238 return -EINVAL;
239 }
240
241 if (mc_header->ldrver != 1 || mc_header->hdrver != 1) {
242 if (print_err)
243 pr_err("Error: invalid/unknown microcode update format.\n");
244 return -EINVAL;
245 }
246
247 ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
248 if (ext_table_size) {
249 u32 ext_table_sum = 0;
250 u32 *ext_tablep;
251
252 if ((ext_table_size < EXT_HEADER_SIZE)
253 || ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
254 if (print_err)
255 pr_err("Error: truncated extended signature table.\n");
256 return -EINVAL;
257 }
258
259 ext_header = mc + MC_HEADER_SIZE + data_size;
260 if (ext_table_size != exttable_size(ext_header)) {
261 if (print_err)
262 pr_err("Error: extended signature table size mismatch.\n");
263 return -EFAULT;
264 }
265
266 ext_sigcount = ext_header->count;
267
268 /*
269 * Check extended table checksum: the sum of all dwords that
270 * comprise a valid table must be 0.
271 */
272 ext_tablep = (u32 *)ext_header;
273
274 i = ext_table_size / sizeof(u32);
275 while (i--)
276 ext_table_sum += ext_tablep[i];
277
278 if (ext_table_sum) {
279 if (print_err)
280 pr_warn("Bad extended signature table checksum, aborting.\n");
281 return -EINVAL;
282 }
283 }
284
285 /*
286 * Calculate the checksum of update data and header. The checksum of
287 * valid update data and header including the extended signature table
288 * must be 0.
289 */
290 orig_sum = 0;
291 i = (MC_HEADER_SIZE + data_size) / sizeof(u32);
292 while (i--)
293 orig_sum += ((u32 *)mc)[i];
294
295 if (orig_sum) {
296 if (print_err)
297 pr_err("Bad microcode data checksum, aborting.\n");
298 return -EINVAL;
299 }
300
301 if (!ext_table_size)
302 return 0;
303
304 /*
305 * Check extended signature checksum: 0 => valid.
306 */
307 for (i = 0; i < ext_sigcount; i++) {
308 ext_sig = (void *)ext_header + EXT_HEADER_SIZE +
309 EXT_SIGNATURE_SIZE * i;
310
311 sum = (mc_header->sig + mc_header->pf + mc_header->cksum) -
312 (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
313 if (sum) {
314 if (print_err)
315 pr_err("Bad extended signature checksum, aborting.\n");
316 return -EINVAL;
317 }
318 }
319 return 0;
320}
321
322/*
323 * Get microcode matching with BSP's model. Only CPUs with the same model as
324 * BSP can stay in the platform.
325 */
326static struct microcode_intel *
327scan_microcode(void *data, size_t size, struct ucode_cpu_info *uci, bool save)
328{
329 struct microcode_header_intel *mc_header;
330 struct microcode_intel *patch = NULL;
331 unsigned int mc_size;
332
333 while (size) {
334 if (size < sizeof(struct microcode_header_intel))
335 break;
336
337 mc_header = (struct microcode_header_intel *)data;
338
339 mc_size = get_totalsize(mc_header);
340 if (!mc_size ||
341 mc_size > size ||
342 microcode_sanity_check(data, 0) < 0)
343 break;
344
345 size -= mc_size;
346
347 if (!microcode_matches(mc_header, uci->cpu_sig.sig)) {
348 data += mc_size;
349 continue;
350 }
351
352 if (save) {
353 save_microcode_patch(data, mc_size);
354 goto next;
355 }
356
357
358 if (!patch) {
359 if (!has_newer_microcode(data,
360 uci->cpu_sig.sig,
361 uci->cpu_sig.pf,
362 uci->cpu_sig.rev))
363 goto next;
364
365 } else {
366 struct microcode_header_intel *phdr = &patch->hdr;
367
368 if (!has_newer_microcode(data,
369 phdr->sig,
370 phdr->pf,
371 phdr->rev))
372 goto next;
373 }
374
375 /* We have a newer patch, save it. */
376 patch = data;
377
378next:
379 data += mc_size;
380 }
381
382 if (size)
383 return NULL;
384
385 return patch;
386}
387
388static int collect_cpu_info_early(struct ucode_cpu_info *uci)
389{
390 unsigned int val[2];
391 unsigned int family, model;
392 struct cpu_signature csig = { 0 };
393 unsigned int eax, ebx, ecx, edx;
394
395 memset(uci, 0, sizeof(*uci));
396
397 eax = 0x00000001;
398 ecx = 0;
399 native_cpuid(&eax, &ebx, &ecx, &edx);
400 csig.sig = eax;
401
402 family = x86_family(eax);
403 model = x86_model(eax);
404
405 if ((model >= 5) || (family > 6)) {
406 /* get processor flags from MSR 0x17 */
407 native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
408 csig.pf = 1 << ((val[1] >> 18) & 7);
409 }
410
411 csig.rev = intel_get_microcode_revision();
412
413 uci->cpu_sig = csig;
414 uci->valid = 1;
415
416 return 0;
417}
418
419static void show_saved_mc(void)
420{
421#ifdef DEBUG
422 int i = 0, j;
423 unsigned int sig, pf, rev, total_size, data_size, date;
424 struct ucode_cpu_info uci;
425 struct ucode_patch *p;
426
427 if (list_empty(µcode_cache)) {
428 pr_debug("no microcode data saved.\n");
429 return;
430 }
431
432 collect_cpu_info_early(&uci);
433
434 sig = uci.cpu_sig.sig;
435 pf = uci.cpu_sig.pf;
436 rev = uci.cpu_sig.rev;
437 pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev);
438
439 list_for_each_entry(p, µcode_cache, plist) {
440 struct microcode_header_intel *mc_saved_header;
441 struct extended_sigtable *ext_header;
442 struct extended_signature *ext_sig;
443 int ext_sigcount;
444
445 mc_saved_header = (struct microcode_header_intel *)p->data;
446
447 sig = mc_saved_header->sig;
448 pf = mc_saved_header->pf;
449 rev = mc_saved_header->rev;
450 date = mc_saved_header->date;
451
452 total_size = get_totalsize(mc_saved_header);
453 data_size = get_datasize(mc_saved_header);
454
455 pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, total size=0x%x, date = %04x-%02x-%02x\n",
456 i++, sig, pf, rev, total_size,
457 date & 0xffff,
458 date >> 24,
459 (date >> 16) & 0xff);
460
461 /* Look for ext. headers: */
462 if (total_size <= data_size + MC_HEADER_SIZE)
463 continue;
464
465 ext_header = (void *)mc_saved_header + data_size + MC_HEADER_SIZE;
466 ext_sigcount = ext_header->count;
467 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
468
469 for (j = 0; j < ext_sigcount; j++) {
470 sig = ext_sig->sig;
471 pf = ext_sig->pf;
472
473 pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n",
474 j, sig, pf);
475
476 ext_sig++;
477 }
478 }
479#endif
480}
481
482/*
483 * Save this microcode patch. It will be loaded early when a CPU is
484 * hot-added or resumes.
485 */
486static void save_mc_for_early(u8 *mc, unsigned int size)
487{
488 /* Synchronization during CPU hotplug. */
489 static DEFINE_MUTEX(x86_cpu_microcode_mutex);
490
491 mutex_lock(&x86_cpu_microcode_mutex);
492
493 save_microcode_patch(mc, size);
494 show_saved_mc();
495
496 mutex_unlock(&x86_cpu_microcode_mutex);
497}
498
499static bool load_builtin_intel_microcode(struct cpio_data *cp)
500{
501 unsigned int eax = 1, ebx, ecx = 0, edx;
502 char name[30];
503
504 if (IS_ENABLED(CONFIG_X86_32))
505 return false;
506
507 native_cpuid(&eax, &ebx, &ecx, &edx);
508
509 sprintf(name, "intel-ucode/%02x-%02x-%02x",
510 x86_family(eax), x86_model(eax), x86_stepping(eax));
511
512 return get_builtin_firmware(cp, name);
513}
514
515/*
516 * Print ucode update info.
517 */
518static void
519print_ucode_info(struct ucode_cpu_info *uci, unsigned int date)
520{
521 pr_info_once("microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n",
522 uci->cpu_sig.rev,
523 date & 0xffff,
524 date >> 24,
525 (date >> 16) & 0xff);
526}
527
528#ifdef CONFIG_X86_32
529
530static int delay_ucode_info;
531static int current_mc_date;
532
533/*
534 * Print early updated ucode info after printk works. This is delayed info dump.
535 */
536void show_ucode_info_early(void)
537{
538 struct ucode_cpu_info uci;
539
540 if (delay_ucode_info) {
541 collect_cpu_info_early(&uci);
542 print_ucode_info(&uci, current_mc_date);
543 delay_ucode_info = 0;
544 }
545}
546
547/*
548 * At this point, we can not call printk() yet. Delay printing microcode info in
549 * show_ucode_info_early() until printk() works.
550 */
551static void print_ucode(struct ucode_cpu_info *uci)
552{
553 struct microcode_intel *mc;
554 int *delay_ucode_info_p;
555 int *current_mc_date_p;
556
557 mc = uci->mc;
558 if (!mc)
559 return;
560
561 delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info);
562 current_mc_date_p = (int *)__pa_nodebug(¤t_mc_date);
563
564 *delay_ucode_info_p = 1;
565 *current_mc_date_p = mc->hdr.date;
566}
567#else
568
569static inline void print_ucode(struct ucode_cpu_info *uci)
570{
571 struct microcode_intel *mc;
572
573 mc = uci->mc;
574 if (!mc)
575 return;
576
577 print_ucode_info(uci, mc->hdr.date);
578}
579#endif
580
581static int apply_microcode_early(struct ucode_cpu_info *uci, bool early)
582{
583 struct microcode_intel *mc;
584 u32 rev;
585
586 mc = uci->mc;
587 if (!mc)
588 return 0;
589
590 /*
591 * Save us the MSR write below - which is a particular expensive
592 * operation - when the other hyperthread has updated the microcode
593 * already.
594 */
595 rev = intel_get_microcode_revision();
596 if (rev >= mc->hdr.rev) {
597 uci->cpu_sig.rev = rev;
598 return UCODE_OK;
599 }
600
601 /*
602 * Writeback and invalidate caches before updating microcode to avoid
603 * internal issues depending on what the microcode is updating.
604 */
605 native_wbinvd();
606
607 /* write microcode via MSR 0x79 */
608 native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
609
610 rev = intel_get_microcode_revision();
611 if (rev != mc->hdr.rev)
612 return -1;
613
614 uci->cpu_sig.rev = rev;
615
616 if (early)
617 print_ucode(uci);
618 else
619 print_ucode_info(uci, mc->hdr.date);
620
621 return 0;
622}
623
624int __init save_microcode_in_initrd_intel(void)
625{
626 struct ucode_cpu_info uci;
627 struct cpio_data cp;
628
629 /*
630 * initrd is going away, clear patch ptr. We will scan the microcode one
631 * last time before jettisoning and save a patch, if found. Then we will
632 * update that pointer too, with a stable patch address to use when
633 * resuming the cores.
634 */
635 intel_ucode_patch = NULL;
636
637 if (!load_builtin_intel_microcode(&cp))
638 cp = find_microcode_in_initrd(ucode_path, false);
639
640 if (!(cp.data && cp.size))
641 return 0;
642
643 collect_cpu_info_early(&uci);
644
645 scan_microcode(cp.data, cp.size, &uci, true);
646
647 show_saved_mc();
648
649 return 0;
650}
651
652/*
653 * @res_patch, output: a pointer to the patch we found.
654 */
655static struct microcode_intel *__load_ucode_intel(struct ucode_cpu_info *uci)
656{
657 static const char *path;
658 struct cpio_data cp;
659 bool use_pa;
660
661 if (IS_ENABLED(CONFIG_X86_32)) {
662 path = (const char *)__pa_nodebug(ucode_path);
663 use_pa = true;
664 } else {
665 path = ucode_path;
666 use_pa = false;
667 }
668
669 /* try built-in microcode first */
670 if (!load_builtin_intel_microcode(&cp))
671 cp = find_microcode_in_initrd(path, use_pa);
672
673 if (!(cp.data && cp.size))
674 return NULL;
675
676 collect_cpu_info_early(uci);
677
678 return scan_microcode(cp.data, cp.size, uci, false);
679}
680
681void __init load_ucode_intel_bsp(void)
682{
683 struct microcode_intel *patch;
684 struct ucode_cpu_info uci;
685
686 patch = __load_ucode_intel(&uci);
687 if (!patch)
688 return;
689
690 uci.mc = patch;
691
692 apply_microcode_early(&uci, true);
693}
694
695void load_ucode_intel_ap(void)
696{
697 struct microcode_intel *patch, **iup;
698 struct ucode_cpu_info uci;
699
700 if (IS_ENABLED(CONFIG_X86_32))
701 iup = (struct microcode_intel **) __pa_nodebug(&intel_ucode_patch);
702 else
703 iup = &intel_ucode_patch;
704
705reget:
706 if (!*iup) {
707 patch = __load_ucode_intel(&uci);
708 if (!patch)
709 return;
710
711 *iup = patch;
712 }
713
714 uci.mc = *iup;
715
716 if (apply_microcode_early(&uci, true)) {
717 /* Mixed-silicon system? Try to refetch the proper patch: */
718 *iup = NULL;
719
720 goto reget;
721 }
722}
723
724static struct microcode_intel *find_patch(struct ucode_cpu_info *uci)
725{
726 struct microcode_header_intel *phdr;
727 struct ucode_patch *iter, *tmp;
728
729 list_for_each_entry_safe(iter, tmp, µcode_cache, plist) {
730
731 phdr = (struct microcode_header_intel *)iter->data;
732
733 if (phdr->rev <= uci->cpu_sig.rev)
734 continue;
735
736 if (!find_matching_signature(phdr,
737 uci->cpu_sig.sig,
738 uci->cpu_sig.pf))
739 continue;
740
741 return iter->data;
742 }
743 return NULL;
744}
745
746void reload_ucode_intel(void)
747{
748 struct microcode_intel *p;
749 struct ucode_cpu_info uci;
750
751 collect_cpu_info_early(&uci);
752
753 p = find_patch(&uci);
754 if (!p)
755 return;
756
757 uci.mc = p;
758
759 apply_microcode_early(&uci, false);
760}
761
762static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
763{
764 static struct cpu_signature prev;
765 struct cpuinfo_x86 *c = &cpu_data(cpu_num);
766 unsigned int val[2];
767
768 memset(csig, 0, sizeof(*csig));
769
770 csig->sig = cpuid_eax(0x00000001);
771
772 if ((c->x86_model >= 5) || (c->x86 > 6)) {
773 /* get processor flags from MSR 0x17 */
774 rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
775 csig->pf = 1 << ((val[1] >> 18) & 7);
776 }
777
778 csig->rev = c->microcode;
779
780 /* No extra locking on prev, races are harmless. */
781 if (csig->sig != prev.sig || csig->pf != prev.pf || csig->rev != prev.rev) {
782 pr_info("sig=0x%x, pf=0x%x, revision=0x%x\n",
783 csig->sig, csig->pf, csig->rev);
784 prev = *csig;
785 }
786
787 return 0;
788}
789
790static enum ucode_state apply_microcode_intel(int cpu)
791{
792 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
793 struct cpuinfo_x86 *c = &cpu_data(cpu);
794 struct microcode_intel *mc;
795 enum ucode_state ret;
796 static int prev_rev;
797 u32 rev;
798
799 /* We should bind the task to the CPU */
800 if (WARN_ON(raw_smp_processor_id() != cpu))
801 return UCODE_ERROR;
802
803 /* Look for a newer patch in our cache: */
804 mc = find_patch(uci);
805 if (!mc) {
806 mc = uci->mc;
807 if (!mc)
808 return UCODE_NFOUND;
809 }
810
811 /*
812 * Save us the MSR write below - which is a particular expensive
813 * operation - when the other hyperthread has updated the microcode
814 * already.
815 */
816 rev = intel_get_microcode_revision();
817 if (rev >= mc->hdr.rev) {
818 ret = UCODE_OK;
819 goto out;
820 }
821
822 /*
823 * Writeback and invalidate caches before updating microcode to avoid
824 * internal issues depending on what the microcode is updating.
825 */
826 native_wbinvd();
827
828 /* write microcode via MSR 0x79 */
829 wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
830
831 rev = intel_get_microcode_revision();
832
833 if (rev != mc->hdr.rev) {
834 pr_err("CPU%d update to revision 0x%x failed\n",
835 cpu, mc->hdr.rev);
836 return UCODE_ERROR;
837 }
838
839 if (rev != prev_rev) {
840 pr_info("updated to revision 0x%x, date = %04x-%02x-%02x\n",
841 rev,
842 mc->hdr.date & 0xffff,
843 mc->hdr.date >> 24,
844 (mc->hdr.date >> 16) & 0xff);
845 prev_rev = rev;
846 }
847
848 ret = UCODE_UPDATED;
849
850out:
851 uci->cpu_sig.rev = rev;
852 c->microcode = rev;
853
854 /* Update boot_cpu_data's revision too, if we're on the BSP: */
855 if (c->cpu_index == boot_cpu_data.cpu_index)
856 boot_cpu_data.microcode = rev;
857
858 return ret;
859}
860
861static enum ucode_state generic_load_microcode(int cpu, struct iov_iter *iter)
862{
863 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
864 unsigned int curr_mc_size = 0, new_mc_size = 0;
865 enum ucode_state ret = UCODE_OK;
866 int new_rev = uci->cpu_sig.rev;
867 u8 *new_mc = NULL, *mc = NULL;
868 unsigned int csig, cpf;
869
870 while (iov_iter_count(iter)) {
871 struct microcode_header_intel mc_header;
872 unsigned int mc_size, data_size;
873 u8 *data;
874
875 if (!copy_from_iter_full(&mc_header, sizeof(mc_header), iter)) {
876 pr_err("error! Truncated or inaccessible header in microcode data file\n");
877 break;
878 }
879
880 mc_size = get_totalsize(&mc_header);
881 if (mc_size < sizeof(mc_header)) {
882 pr_err("error! Bad data in microcode data file (totalsize too small)\n");
883 break;
884 }
885 data_size = mc_size - sizeof(mc_header);
886 if (data_size > iov_iter_count(iter)) {
887 pr_err("error! Bad data in microcode data file (truncated file?)\n");
888 break;
889 }
890
891 /* For performance reasons, reuse mc area when possible */
892 if (!mc || mc_size > curr_mc_size) {
893 vfree(mc);
894 mc = vmalloc(mc_size);
895 if (!mc)
896 break;
897 curr_mc_size = mc_size;
898 }
899
900 memcpy(mc, &mc_header, sizeof(mc_header));
901 data = mc + sizeof(mc_header);
902 if (!copy_from_iter_full(data, data_size, iter) ||
903 microcode_sanity_check(mc, 1) < 0) {
904 break;
905 }
906
907 csig = uci->cpu_sig.sig;
908 cpf = uci->cpu_sig.pf;
909 if (has_newer_microcode(mc, csig, cpf, new_rev)) {
910 vfree(new_mc);
911 new_rev = mc_header.rev;
912 new_mc = mc;
913 new_mc_size = mc_size;
914 mc = NULL; /* trigger new vmalloc */
915 ret = UCODE_NEW;
916 }
917 }
918
919 vfree(mc);
920
921 if (iov_iter_count(iter)) {
922 vfree(new_mc);
923 return UCODE_ERROR;
924 }
925
926 if (!new_mc)
927 return UCODE_NFOUND;
928
929 vfree(uci->mc);
930 uci->mc = (struct microcode_intel *)new_mc;
931
932 /*
933 * If early loading microcode is supported, save this mc into
934 * permanent memory. So it will be loaded early when a CPU is hot added
935 * or resumes.
936 */
937 save_mc_for_early(new_mc, new_mc_size);
938
939 pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
940 cpu, new_rev, uci->cpu_sig.rev);
941
942 return ret;
943}
944
945static bool is_blacklisted(unsigned int cpu)
946{
947 struct cpuinfo_x86 *c = &cpu_data(cpu);
948
949 /*
950 * Late loading on model 79 with microcode revision less than 0x0b000021
951 * and LLC size per core bigger than 2.5MB may result in a system hang.
952 * This behavior is documented in item BDF90, #334165 (Intel Xeon
953 * Processor E7-8800/4800 v4 Product Family).
954 */
955 if (c->x86 == 6 &&
956 c->x86_model == INTEL_FAM6_BROADWELL_X &&
957 c->x86_stepping == 0x01 &&
958 llc_size_per_core > 2621440 &&
959 c->microcode < 0x0b000021) {
960 pr_err_once("Erratum BDF90: late loading with revision < 0x0b000021 (0x%x) disabled.\n", c->microcode);
961 pr_err_once("Please consider either early loading through initrd/built-in or a potential BIOS update.\n");
962 return true;
963 }
964
965 return false;
966}
967
968static enum ucode_state request_microcode_fw(int cpu, struct device *device,
969 bool refresh_fw)
970{
971 struct cpuinfo_x86 *c = &cpu_data(cpu);
972 const struct firmware *firmware;
973 struct iov_iter iter;
974 enum ucode_state ret;
975 struct kvec kvec;
976 char name[30];
977
978 if (is_blacklisted(cpu))
979 return UCODE_NFOUND;
980
981 sprintf(name, "intel-ucode/%02x-%02x-%02x",
982 c->x86, c->x86_model, c->x86_stepping);
983
984 if (request_firmware_direct(&firmware, name, device)) {
985 pr_debug("data file %s load failed\n", name);
986 return UCODE_NFOUND;
987 }
988
989 kvec.iov_base = (void *)firmware->data;
990 kvec.iov_len = firmware->size;
991 iov_iter_kvec(&iter, WRITE, &kvec, 1, firmware->size);
992 ret = generic_load_microcode(cpu, &iter);
993
994 release_firmware(firmware);
995
996 return ret;
997}
998
999static enum ucode_state
1000request_microcode_user(int cpu, const void __user *buf, size_t size)
1001{
1002 struct iov_iter iter;
1003 struct iovec iov;
1004
1005 if (is_blacklisted(cpu))
1006 return UCODE_NFOUND;
1007
1008 iov.iov_base = (void __user *)buf;
1009 iov.iov_len = size;
1010 iov_iter_init(&iter, WRITE, &iov, 1, size);
1011
1012 return generic_load_microcode(cpu, &iter);
1013}
1014
1015static struct microcode_ops microcode_intel_ops = {
1016 .request_microcode_user = request_microcode_user,
1017 .request_microcode_fw = request_microcode_fw,
1018 .collect_cpu_info = collect_cpu_info,
1019 .apply_microcode = apply_microcode_intel,
1020};
1021
1022static int __init calc_llc_size_per_core(struct cpuinfo_x86 *c)
1023{
1024 u64 llc_size = c->x86_cache_size * 1024ULL;
1025
1026 do_div(llc_size, c->x86_max_cores);
1027
1028 return (int)llc_size;
1029}
1030
1031struct microcode_ops * __init init_intel_microcode(void)
1032{
1033 struct cpuinfo_x86 *c = &boot_cpu_data;
1034
1035 if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
1036 cpu_has(c, X86_FEATURE_IA64)) {
1037 pr_err("Intel CPU family 0x%x not supported\n", c->x86);
1038 return NULL;
1039 }
1040
1041 llc_size_per_core = calc_llc_size_per_core(c);
1042
1043 return µcode_intel_ops;
1044}
1/*
2 * Intel CPU Microcode Update Driver for Linux
3 *
4 * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
5 * 2006 Shaohua Li <shaohua.li@intel.com>
6 *
7 * Intel CPU microcode early update for Linux
8 *
9 * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
10 * H Peter Anvin" <hpa@zytor.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
16 */
17
18/*
19 * This needs to be before all headers so that pr_debug in printk.h doesn't turn
20 * printk calls into no_printk().
21 *
22 *#define DEBUG
23 */
24#define pr_fmt(fmt) "microcode: " fmt
25
26#include <linux/earlycpio.h>
27#include <linux/firmware.h>
28#include <linux/uaccess.h>
29#include <linux/vmalloc.h>
30#include <linux/initrd.h>
31#include <linux/kernel.h>
32#include <linux/slab.h>
33#include <linux/cpu.h>
34#include <linux/mm.h>
35
36#include <asm/microcode_intel.h>
37#include <asm/processor.h>
38#include <asm/tlbflush.h>
39#include <asm/setup.h>
40#include <asm/msr.h>
41
42static const char ucode_path[] = "kernel/x86/microcode/GenuineIntel.bin";
43
44/* Current microcode patch used in early patching on the APs. */
45struct microcode_intel *intel_ucode_patch;
46
47static inline bool cpu_signatures_match(unsigned int s1, unsigned int p1,
48 unsigned int s2, unsigned int p2)
49{
50 if (s1 != s2)
51 return false;
52
53 /* Processor flags are either both 0 ... */
54 if (!p1 && !p2)
55 return true;
56
57 /* ... or they intersect. */
58 return p1 & p2;
59}
60
61/*
62 * Returns 1 if update has been found, 0 otherwise.
63 */
64static int find_matching_signature(void *mc, unsigned int csig, int cpf)
65{
66 struct microcode_header_intel *mc_hdr = mc;
67 struct extended_sigtable *ext_hdr;
68 struct extended_signature *ext_sig;
69 int i;
70
71 if (cpu_signatures_match(csig, cpf, mc_hdr->sig, mc_hdr->pf))
72 return 1;
73
74 /* Look for ext. headers: */
75 if (get_totalsize(mc_hdr) <= get_datasize(mc_hdr) + MC_HEADER_SIZE)
76 return 0;
77
78 ext_hdr = mc + get_datasize(mc_hdr) + MC_HEADER_SIZE;
79 ext_sig = (void *)ext_hdr + EXT_HEADER_SIZE;
80
81 for (i = 0; i < ext_hdr->count; i++) {
82 if (cpu_signatures_match(csig, cpf, ext_sig->sig, ext_sig->pf))
83 return 1;
84 ext_sig++;
85 }
86 return 0;
87}
88
89/*
90 * Returns 1 if update has been found, 0 otherwise.
91 */
92static int has_newer_microcode(void *mc, unsigned int csig, int cpf, int new_rev)
93{
94 struct microcode_header_intel *mc_hdr = mc;
95
96 if (mc_hdr->rev <= new_rev)
97 return 0;
98
99 return find_matching_signature(mc, csig, cpf);
100}
101
102/*
103 * Given CPU signature and a microcode patch, this function finds if the
104 * microcode patch has matching family and model with the CPU.
105 *
106 * %true - if there's a match
107 * %false - otherwise
108 */
109static bool microcode_matches(struct microcode_header_intel *mc_header,
110 unsigned long sig)
111{
112 unsigned long total_size = get_totalsize(mc_header);
113 unsigned long data_size = get_datasize(mc_header);
114 struct extended_sigtable *ext_header;
115 unsigned int fam_ucode, model_ucode;
116 struct extended_signature *ext_sig;
117 unsigned int fam, model;
118 int ext_sigcount, i;
119
120 fam = x86_family(sig);
121 model = x86_model(sig);
122
123 fam_ucode = x86_family(mc_header->sig);
124 model_ucode = x86_model(mc_header->sig);
125
126 if (fam == fam_ucode && model == model_ucode)
127 return true;
128
129 /* Look for ext. headers: */
130 if (total_size <= data_size + MC_HEADER_SIZE)
131 return false;
132
133 ext_header = (void *) mc_header + data_size + MC_HEADER_SIZE;
134 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
135 ext_sigcount = ext_header->count;
136
137 for (i = 0; i < ext_sigcount; i++) {
138 fam_ucode = x86_family(ext_sig->sig);
139 model_ucode = x86_model(ext_sig->sig);
140
141 if (fam == fam_ucode && model == model_ucode)
142 return true;
143
144 ext_sig++;
145 }
146 return false;
147}
148
149static struct ucode_patch *__alloc_microcode_buf(void *data, unsigned int size)
150{
151 struct ucode_patch *p;
152
153 p = kzalloc(sizeof(struct ucode_patch), GFP_KERNEL);
154 if (!p)
155 return ERR_PTR(-ENOMEM);
156
157 p->data = kmemdup(data, size, GFP_KERNEL);
158 if (!p->data) {
159 kfree(p);
160 return ERR_PTR(-ENOMEM);
161 }
162
163 return p;
164}
165
166static void save_microcode_patch(void *data, unsigned int size)
167{
168 struct microcode_header_intel *mc_hdr, *mc_saved_hdr;
169 struct ucode_patch *iter, *tmp, *p;
170 bool prev_found = false;
171 unsigned int sig, pf;
172
173 mc_hdr = (struct microcode_header_intel *)data;
174
175 list_for_each_entry_safe(iter, tmp, µcode_cache, plist) {
176 mc_saved_hdr = (struct microcode_header_intel *)iter->data;
177 sig = mc_saved_hdr->sig;
178 pf = mc_saved_hdr->pf;
179
180 if (find_matching_signature(data, sig, pf)) {
181 prev_found = true;
182
183 if (mc_hdr->rev <= mc_saved_hdr->rev)
184 continue;
185
186 p = __alloc_microcode_buf(data, size);
187 if (IS_ERR(p))
188 pr_err("Error allocating buffer %p\n", data);
189 else
190 list_replace(&iter->plist, &p->plist);
191 }
192 }
193
194 /*
195 * There weren't any previous patches found in the list cache; save the
196 * newly found.
197 */
198 if (!prev_found) {
199 p = __alloc_microcode_buf(data, size);
200 if (IS_ERR(p))
201 pr_err("Error allocating buffer for %p\n", data);
202 else
203 list_add_tail(&p->plist, µcode_cache);
204 }
205}
206
207static int microcode_sanity_check(void *mc, int print_err)
208{
209 unsigned long total_size, data_size, ext_table_size;
210 struct microcode_header_intel *mc_header = mc;
211 struct extended_sigtable *ext_header = NULL;
212 u32 sum, orig_sum, ext_sigcount = 0, i;
213 struct extended_signature *ext_sig;
214
215 total_size = get_totalsize(mc_header);
216 data_size = get_datasize(mc_header);
217
218 if (data_size + MC_HEADER_SIZE > total_size) {
219 if (print_err)
220 pr_err("Error: bad microcode data file size.\n");
221 return -EINVAL;
222 }
223
224 if (mc_header->ldrver != 1 || mc_header->hdrver != 1) {
225 if (print_err)
226 pr_err("Error: invalid/unknown microcode update format.\n");
227 return -EINVAL;
228 }
229
230 ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
231 if (ext_table_size) {
232 u32 ext_table_sum = 0;
233 u32 *ext_tablep;
234
235 if ((ext_table_size < EXT_HEADER_SIZE)
236 || ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
237 if (print_err)
238 pr_err("Error: truncated extended signature table.\n");
239 return -EINVAL;
240 }
241
242 ext_header = mc + MC_HEADER_SIZE + data_size;
243 if (ext_table_size != exttable_size(ext_header)) {
244 if (print_err)
245 pr_err("Error: extended signature table size mismatch.\n");
246 return -EFAULT;
247 }
248
249 ext_sigcount = ext_header->count;
250
251 /*
252 * Check extended table checksum: the sum of all dwords that
253 * comprise a valid table must be 0.
254 */
255 ext_tablep = (u32 *)ext_header;
256
257 i = ext_table_size / sizeof(u32);
258 while (i--)
259 ext_table_sum += ext_tablep[i];
260
261 if (ext_table_sum) {
262 if (print_err)
263 pr_warn("Bad extended signature table checksum, aborting.\n");
264 return -EINVAL;
265 }
266 }
267
268 /*
269 * Calculate the checksum of update data and header. The checksum of
270 * valid update data and header including the extended signature table
271 * must be 0.
272 */
273 orig_sum = 0;
274 i = (MC_HEADER_SIZE + data_size) / sizeof(u32);
275 while (i--)
276 orig_sum += ((u32 *)mc)[i];
277
278 if (orig_sum) {
279 if (print_err)
280 pr_err("Bad microcode data checksum, aborting.\n");
281 return -EINVAL;
282 }
283
284 if (!ext_table_size)
285 return 0;
286
287 /*
288 * Check extended signature checksum: 0 => valid.
289 */
290 for (i = 0; i < ext_sigcount; i++) {
291 ext_sig = (void *)ext_header + EXT_HEADER_SIZE +
292 EXT_SIGNATURE_SIZE * i;
293
294 sum = (mc_header->sig + mc_header->pf + mc_header->cksum) -
295 (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
296 if (sum) {
297 if (print_err)
298 pr_err("Bad extended signature checksum, aborting.\n");
299 return -EINVAL;
300 }
301 }
302 return 0;
303}
304
305/*
306 * Get microcode matching with BSP's model. Only CPUs with the same model as
307 * BSP can stay in the platform.
308 */
309static struct microcode_intel *
310scan_microcode(void *data, size_t size, struct ucode_cpu_info *uci, bool save)
311{
312 struct microcode_header_intel *mc_header;
313 struct microcode_intel *patch = NULL;
314 unsigned int mc_size;
315
316 while (size) {
317 if (size < sizeof(struct microcode_header_intel))
318 break;
319
320 mc_header = (struct microcode_header_intel *)data;
321
322 mc_size = get_totalsize(mc_header);
323 if (!mc_size ||
324 mc_size > size ||
325 microcode_sanity_check(data, 0) < 0)
326 break;
327
328 size -= mc_size;
329
330 if (!microcode_matches(mc_header, uci->cpu_sig.sig)) {
331 data += mc_size;
332 continue;
333 }
334
335 if (save) {
336 save_microcode_patch(data, mc_size);
337 goto next;
338 }
339
340
341 if (!patch) {
342 if (!has_newer_microcode(data,
343 uci->cpu_sig.sig,
344 uci->cpu_sig.pf,
345 uci->cpu_sig.rev))
346 goto next;
347
348 } else {
349 struct microcode_header_intel *phdr = &patch->hdr;
350
351 if (!has_newer_microcode(data,
352 phdr->sig,
353 phdr->pf,
354 phdr->rev))
355 goto next;
356 }
357
358 /* We have a newer patch, save it. */
359 patch = data;
360
361next:
362 data += mc_size;
363 }
364
365 if (size)
366 return NULL;
367
368 return patch;
369}
370
371static int collect_cpu_info_early(struct ucode_cpu_info *uci)
372{
373 unsigned int val[2];
374 unsigned int family, model;
375 struct cpu_signature csig = { 0 };
376 unsigned int eax, ebx, ecx, edx;
377
378 memset(uci, 0, sizeof(*uci));
379
380 eax = 0x00000001;
381 ecx = 0;
382 native_cpuid(&eax, &ebx, &ecx, &edx);
383 csig.sig = eax;
384
385 family = x86_family(eax);
386 model = x86_model(eax);
387
388 if ((model >= 5) || (family > 6)) {
389 /* get processor flags from MSR 0x17 */
390 native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
391 csig.pf = 1 << ((val[1] >> 18) & 7);
392 }
393
394 csig.rev = intel_get_microcode_revision();
395
396 uci->cpu_sig = csig;
397 uci->valid = 1;
398
399 return 0;
400}
401
402static void show_saved_mc(void)
403{
404#ifdef DEBUG
405 int i = 0, j;
406 unsigned int sig, pf, rev, total_size, data_size, date;
407 struct ucode_cpu_info uci;
408 struct ucode_patch *p;
409
410 if (list_empty(µcode_cache)) {
411 pr_debug("no microcode data saved.\n");
412 return;
413 }
414
415 collect_cpu_info_early(&uci);
416
417 sig = uci.cpu_sig.sig;
418 pf = uci.cpu_sig.pf;
419 rev = uci.cpu_sig.rev;
420 pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev);
421
422 list_for_each_entry(p, µcode_cache, plist) {
423 struct microcode_header_intel *mc_saved_header;
424 struct extended_sigtable *ext_header;
425 struct extended_signature *ext_sig;
426 int ext_sigcount;
427
428 mc_saved_header = (struct microcode_header_intel *)p->data;
429
430 sig = mc_saved_header->sig;
431 pf = mc_saved_header->pf;
432 rev = mc_saved_header->rev;
433 date = mc_saved_header->date;
434
435 total_size = get_totalsize(mc_saved_header);
436 data_size = get_datasize(mc_saved_header);
437
438 pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, total size=0x%x, date = %04x-%02x-%02x\n",
439 i++, sig, pf, rev, total_size,
440 date & 0xffff,
441 date >> 24,
442 (date >> 16) & 0xff);
443
444 /* Look for ext. headers: */
445 if (total_size <= data_size + MC_HEADER_SIZE)
446 continue;
447
448 ext_header = (void *)mc_saved_header + data_size + MC_HEADER_SIZE;
449 ext_sigcount = ext_header->count;
450 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
451
452 for (j = 0; j < ext_sigcount; j++) {
453 sig = ext_sig->sig;
454 pf = ext_sig->pf;
455
456 pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n",
457 j, sig, pf);
458
459 ext_sig++;
460 }
461 }
462#endif
463}
464
465/*
466 * Save this microcode patch. It will be loaded early when a CPU is
467 * hot-added or resumes.
468 */
469static void save_mc_for_early(u8 *mc, unsigned int size)
470{
471#ifdef CONFIG_HOTPLUG_CPU
472 /* Synchronization during CPU hotplug. */
473 static DEFINE_MUTEX(x86_cpu_microcode_mutex);
474
475 mutex_lock(&x86_cpu_microcode_mutex);
476
477 save_microcode_patch(mc, size);
478 show_saved_mc();
479
480 mutex_unlock(&x86_cpu_microcode_mutex);
481#endif
482}
483
484static bool load_builtin_intel_microcode(struct cpio_data *cp)
485{
486 unsigned int eax = 1, ebx, ecx = 0, edx;
487 char name[30];
488
489 if (IS_ENABLED(CONFIG_X86_32))
490 return false;
491
492 native_cpuid(&eax, &ebx, &ecx, &edx);
493
494 sprintf(name, "intel-ucode/%02x-%02x-%02x",
495 x86_family(eax), x86_model(eax), x86_stepping(eax));
496
497 return get_builtin_firmware(cp, name);
498}
499
500/*
501 * Print ucode update info.
502 */
503static void
504print_ucode_info(struct ucode_cpu_info *uci, unsigned int date)
505{
506 pr_info_once("microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n",
507 uci->cpu_sig.rev,
508 date & 0xffff,
509 date >> 24,
510 (date >> 16) & 0xff);
511}
512
513#ifdef CONFIG_X86_32
514
515static int delay_ucode_info;
516static int current_mc_date;
517
518/*
519 * Print early updated ucode info after printk works. This is delayed info dump.
520 */
521void show_ucode_info_early(void)
522{
523 struct ucode_cpu_info uci;
524
525 if (delay_ucode_info) {
526 collect_cpu_info_early(&uci);
527 print_ucode_info(&uci, current_mc_date);
528 delay_ucode_info = 0;
529 }
530}
531
532/*
533 * At this point, we can not call printk() yet. Delay printing microcode info in
534 * show_ucode_info_early() until printk() works.
535 */
536static void print_ucode(struct ucode_cpu_info *uci)
537{
538 struct microcode_intel *mc;
539 int *delay_ucode_info_p;
540 int *current_mc_date_p;
541
542 mc = uci->mc;
543 if (!mc)
544 return;
545
546 delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info);
547 current_mc_date_p = (int *)__pa_nodebug(¤t_mc_date);
548
549 *delay_ucode_info_p = 1;
550 *current_mc_date_p = mc->hdr.date;
551}
552#else
553
554/*
555 * Flush global tlb. We only do this in x86_64 where paging has been enabled
556 * already and PGE should be enabled as well.
557 */
558static inline void flush_tlb_early(void)
559{
560 __native_flush_tlb_global_irq_disabled();
561}
562
563static inline void print_ucode(struct ucode_cpu_info *uci)
564{
565 struct microcode_intel *mc;
566
567 mc = uci->mc;
568 if (!mc)
569 return;
570
571 print_ucode_info(uci, mc->hdr.date);
572}
573#endif
574
575static int apply_microcode_early(struct ucode_cpu_info *uci, bool early)
576{
577 struct microcode_intel *mc;
578 u32 rev;
579
580 mc = uci->mc;
581 if (!mc)
582 return 0;
583
584 /* write microcode via MSR 0x79 */
585 native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
586
587 rev = intel_get_microcode_revision();
588 if (rev != mc->hdr.rev)
589 return -1;
590
591#ifdef CONFIG_X86_64
592 /* Flush global tlb. This is precaution. */
593 flush_tlb_early();
594#endif
595 uci->cpu_sig.rev = rev;
596
597 if (early)
598 print_ucode(uci);
599 else
600 print_ucode_info(uci, mc->hdr.date);
601
602 return 0;
603}
604
605int __init save_microcode_in_initrd_intel(void)
606{
607 struct ucode_cpu_info uci;
608 struct cpio_data cp;
609
610 if (!load_builtin_intel_microcode(&cp))
611 cp = find_microcode_in_initrd(ucode_path, false);
612
613 if (!(cp.data && cp.size))
614 return 0;
615
616 collect_cpu_info_early(&uci);
617
618 scan_microcode(cp.data, cp.size, &uci, true);
619
620 show_saved_mc();
621
622 return 0;
623}
624
625/*
626 * @res_patch, output: a pointer to the patch we found.
627 */
628static struct microcode_intel *__load_ucode_intel(struct ucode_cpu_info *uci)
629{
630 static const char *path;
631 struct cpio_data cp;
632 bool use_pa;
633
634 if (IS_ENABLED(CONFIG_X86_32)) {
635 path = (const char *)__pa_nodebug(ucode_path);
636 use_pa = true;
637 } else {
638 path = ucode_path;
639 use_pa = false;
640 }
641
642 /* try built-in microcode first */
643 if (!load_builtin_intel_microcode(&cp))
644 cp = find_microcode_in_initrd(path, use_pa);
645
646 if (!(cp.data && cp.size))
647 return NULL;
648
649 collect_cpu_info_early(uci);
650
651 return scan_microcode(cp.data, cp.size, uci, false);
652}
653
654void __init load_ucode_intel_bsp(void)
655{
656 struct microcode_intel *patch;
657 struct ucode_cpu_info uci;
658
659 patch = __load_ucode_intel(&uci);
660 if (!patch)
661 return;
662
663 uci.mc = patch;
664
665 apply_microcode_early(&uci, true);
666}
667
668void load_ucode_intel_ap(void)
669{
670 struct microcode_intel *patch, **iup;
671 struct ucode_cpu_info uci;
672
673 if (IS_ENABLED(CONFIG_X86_32))
674 iup = (struct microcode_intel **) __pa_nodebug(&intel_ucode_patch);
675 else
676 iup = &intel_ucode_patch;
677
678reget:
679 if (!*iup) {
680 patch = __load_ucode_intel(&uci);
681 if (!patch)
682 return;
683
684 *iup = patch;
685 }
686
687 uci.mc = *iup;
688
689 if (apply_microcode_early(&uci, true)) {
690 /* Mixed-silicon system? Try to refetch the proper patch: */
691 *iup = NULL;
692
693 goto reget;
694 }
695}
696
697static struct microcode_intel *find_patch(struct ucode_cpu_info *uci)
698{
699 struct microcode_header_intel *phdr;
700 struct ucode_patch *iter, *tmp;
701
702 list_for_each_entry_safe(iter, tmp, µcode_cache, plist) {
703
704 phdr = (struct microcode_header_intel *)iter->data;
705
706 if (phdr->rev <= uci->cpu_sig.rev)
707 continue;
708
709 if (!find_matching_signature(phdr,
710 uci->cpu_sig.sig,
711 uci->cpu_sig.pf))
712 continue;
713
714 return iter->data;
715 }
716 return NULL;
717}
718
719void reload_ucode_intel(void)
720{
721 struct microcode_intel *p;
722 struct ucode_cpu_info uci;
723
724 collect_cpu_info_early(&uci);
725
726 p = find_patch(&uci);
727 if (!p)
728 return;
729
730 uci.mc = p;
731
732 apply_microcode_early(&uci, false);
733}
734
735static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
736{
737 static struct cpu_signature prev;
738 struct cpuinfo_x86 *c = &cpu_data(cpu_num);
739 unsigned int val[2];
740
741 memset(csig, 0, sizeof(*csig));
742
743 csig->sig = cpuid_eax(0x00000001);
744
745 if ((c->x86_model >= 5) || (c->x86 > 6)) {
746 /* get processor flags from MSR 0x17 */
747 rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
748 csig->pf = 1 << ((val[1] >> 18) & 7);
749 }
750
751 csig->rev = c->microcode;
752
753 /* No extra locking on prev, races are harmless. */
754 if (csig->sig != prev.sig || csig->pf != prev.pf || csig->rev != prev.rev) {
755 pr_info("sig=0x%x, pf=0x%x, revision=0x%x\n",
756 csig->sig, csig->pf, csig->rev);
757 prev = *csig;
758 }
759
760 return 0;
761}
762
763static int apply_microcode_intel(int cpu)
764{
765 struct microcode_intel *mc;
766 struct ucode_cpu_info *uci;
767 struct cpuinfo_x86 *c;
768 static int prev_rev;
769 u32 rev;
770
771 /* We should bind the task to the CPU */
772 if (WARN_ON(raw_smp_processor_id() != cpu))
773 return -1;
774
775 uci = ucode_cpu_info + cpu;
776 mc = uci->mc;
777 if (!mc) {
778 /* Look for a newer patch in our cache: */
779 mc = find_patch(uci);
780 if (!mc)
781 return 0;
782 }
783
784 /* write microcode via MSR 0x79 */
785 wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
786
787 rev = intel_get_microcode_revision();
788
789 if (rev != mc->hdr.rev) {
790 pr_err("CPU%d update to revision 0x%x failed\n",
791 cpu, mc->hdr.rev);
792 return -1;
793 }
794
795 if (rev != prev_rev) {
796 pr_info("updated to revision 0x%x, date = %04x-%02x-%02x\n",
797 rev,
798 mc->hdr.date & 0xffff,
799 mc->hdr.date >> 24,
800 (mc->hdr.date >> 16) & 0xff);
801 prev_rev = rev;
802 }
803
804 c = &cpu_data(cpu);
805
806 uci->cpu_sig.rev = rev;
807 c->microcode = rev;
808
809 return 0;
810}
811
812static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
813 int (*get_ucode_data)(void *, const void *, size_t))
814{
815 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
816 u8 *ucode_ptr = data, *new_mc = NULL, *mc = NULL;
817 int new_rev = uci->cpu_sig.rev;
818 unsigned int leftover = size;
819 unsigned int curr_mc_size = 0, new_mc_size = 0;
820 unsigned int csig, cpf;
821
822 while (leftover) {
823 struct microcode_header_intel mc_header;
824 unsigned int mc_size;
825
826 if (leftover < sizeof(mc_header)) {
827 pr_err("error! Truncated header in microcode data file\n");
828 break;
829 }
830
831 if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header)))
832 break;
833
834 mc_size = get_totalsize(&mc_header);
835 if (!mc_size || mc_size > leftover) {
836 pr_err("error! Bad data in microcode data file\n");
837 break;
838 }
839
840 /* For performance reasons, reuse mc area when possible */
841 if (!mc || mc_size > curr_mc_size) {
842 vfree(mc);
843 mc = vmalloc(mc_size);
844 if (!mc)
845 break;
846 curr_mc_size = mc_size;
847 }
848
849 if (get_ucode_data(mc, ucode_ptr, mc_size) ||
850 microcode_sanity_check(mc, 1) < 0) {
851 break;
852 }
853
854 csig = uci->cpu_sig.sig;
855 cpf = uci->cpu_sig.pf;
856 if (has_newer_microcode(mc, csig, cpf, new_rev)) {
857 vfree(new_mc);
858 new_rev = mc_header.rev;
859 new_mc = mc;
860 new_mc_size = mc_size;
861 mc = NULL; /* trigger new vmalloc */
862 }
863
864 ucode_ptr += mc_size;
865 leftover -= mc_size;
866 }
867
868 vfree(mc);
869
870 if (leftover) {
871 vfree(new_mc);
872 return UCODE_ERROR;
873 }
874
875 if (!new_mc)
876 return UCODE_NFOUND;
877
878 vfree(uci->mc);
879 uci->mc = (struct microcode_intel *)new_mc;
880
881 /*
882 * If early loading microcode is supported, save this mc into
883 * permanent memory. So it will be loaded early when a CPU is hot added
884 * or resumes.
885 */
886 save_mc_for_early(new_mc, new_mc_size);
887
888 pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
889 cpu, new_rev, uci->cpu_sig.rev);
890
891 return UCODE_OK;
892}
893
894static int get_ucode_fw(void *to, const void *from, size_t n)
895{
896 memcpy(to, from, n);
897 return 0;
898}
899
900static enum ucode_state request_microcode_fw(int cpu, struct device *device,
901 bool refresh_fw)
902{
903 char name[30];
904 struct cpuinfo_x86 *c = &cpu_data(cpu);
905 const struct firmware *firmware;
906 enum ucode_state ret;
907
908 sprintf(name, "intel-ucode/%02x-%02x-%02x",
909 c->x86, c->x86_model, c->x86_mask);
910
911 if (request_firmware_direct(&firmware, name, device)) {
912 pr_debug("data file %s load failed\n", name);
913 return UCODE_NFOUND;
914 }
915
916 ret = generic_load_microcode(cpu, (void *)firmware->data,
917 firmware->size, &get_ucode_fw);
918
919 release_firmware(firmware);
920
921 return ret;
922}
923
924static int get_ucode_user(void *to, const void *from, size_t n)
925{
926 return copy_from_user(to, from, n);
927}
928
929static enum ucode_state
930request_microcode_user(int cpu, const void __user *buf, size_t size)
931{
932 return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user);
933}
934
935static struct microcode_ops microcode_intel_ops = {
936 .request_microcode_user = request_microcode_user,
937 .request_microcode_fw = request_microcode_fw,
938 .collect_cpu_info = collect_cpu_info,
939 .apply_microcode = apply_microcode_intel,
940};
941
942struct microcode_ops * __init init_intel_microcode(void)
943{
944 struct cpuinfo_x86 *c = &boot_cpu_data;
945
946 if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
947 cpu_has(c, X86_FEATURE_IA64)) {
948 pr_err("Intel CPU family 0x%x not supported\n", c->x86);
949 return NULL;
950 }
951
952 return µcode_intel_ops;
953}