Linux Audio

Check our new training course

Loading...
Note: File does not exist in v5.4.
  1/*
  2 * Blackfin On-Chip Sport Emulated UART Driver
  3 *
  4 * Copyright 2006-2009 Analog Devices Inc.
  5 *
  6 * Enter bugs at http://blackfin.uclinux.org/
  7 *
  8 * Licensed under the GPL-2 or later.
  9 */
 10
 11/*
 12 * This driver and the hardware supported are in term of EE-191 of ADI.
 13 * http://www.analog.com/static/imported-files/application_notes/EE191.pdf 
 14 * This application note describe how to implement a UART on a Sharc DSP,
 15 * but this driver is implemented on Blackfin Processor.
 16 * Transmit Frame Sync is not used by this driver to transfer data out.
 17 */
 18
 19/* #define DEBUG */
 20
 21#define DRV_NAME "bfin-sport-uart"
 22#define DEVICE_NAME	"ttySS"
 23#define pr_fmt(fmt) DRV_NAME ": " fmt
 24
 25#include <linux/module.h>
 26#include <linux/ioport.h>
 27#include <linux/io.h>
 28#include <linux/init.h>
 29#include <linux/console.h>
 30#include <linux/sysrq.h>
 31#include <linux/slab.h>
 32#include <linux/platform_device.h>
 33#include <linux/tty.h>
 34#include <linux/tty_flip.h>
 35#include <linux/serial_core.h>
 36
 37#include <asm/bfin_sport.h>
 38#include <asm/delay.h>
 39#include <asm/portmux.h>
 40
 41#include "bfin_sport_uart.h"
 42
 43struct sport_uart_port {
 44	struct uart_port	port;
 45	int			err_irq;
 46	unsigned short		csize;
 47	unsigned short		rxmask;
 48	unsigned short		txmask1;
 49	unsigned short		txmask2;
 50	unsigned char		stopb;
 51/*	unsigned char		parib; */
 52#ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
 53	int cts_pin;
 54	int rts_pin;
 55#endif
 56};
 57
 58static int sport_uart_tx_chars(struct sport_uart_port *up);
 59static void sport_stop_tx(struct uart_port *port);
 60
 61static inline void tx_one_byte(struct sport_uart_port *up, unsigned int value)
 62{
 63	pr_debug("%s value:%x, mask1=0x%x, mask2=0x%x\n", __func__, value,
 64		up->txmask1, up->txmask2);
 65
 66	/* Place Start and Stop bits */
 67	__asm__ __volatile__ (
 68		"%[val] <<= 1;"
 69		"%[val] = %[val] & %[mask1];"
 70		"%[val] = %[val] | %[mask2];"
 71		: [val]"+d"(value)
 72		: [mask1]"d"(up->txmask1), [mask2]"d"(up->txmask2)
 73		: "ASTAT"
 74	);
 75	pr_debug("%s value:%x\n", __func__, value);
 76
 77	SPORT_PUT_TX(up, value);
 78}
 79
 80static inline unsigned char rx_one_byte(struct sport_uart_port *up)
 81{
 82	unsigned int value;
 83	unsigned char extract;
 84	u32 tmp_mask1, tmp_mask2, tmp_shift, tmp;
 85
 86	if ((up->csize + up->stopb) > 7)
 87		value = SPORT_GET_RX32(up);
 88	else
 89		value = SPORT_GET_RX(up);
 90
 91	pr_debug("%s value:%x, cs=%d, mask=0x%x\n", __func__, value,
 92		up->csize, up->rxmask);
 93
 94	/* Extract data */
 95	__asm__ __volatile__ (
 96		"%[extr] = 0;"
 97		"%[mask1] = %[rxmask];"
 98		"%[mask2] = 0x0200(Z);"
 99		"%[shift] = 0;"
100		"LSETUP(.Lloop_s, .Lloop_e) LC0 = %[lc];"
101		".Lloop_s:"
102		"%[tmp] = extract(%[val], %[mask1].L)(Z);"
103		"%[tmp] <<= %[shift];"
104		"%[extr] = %[extr] | %[tmp];"
105		"%[mask1] = %[mask1] - %[mask2];"
106		".Lloop_e:"
107		"%[shift] += 1;"
108		: [extr]"=&d"(extract), [shift]"=&d"(tmp_shift), [tmp]"=&d"(tmp),
109		  [mask1]"=&d"(tmp_mask1), [mask2]"=&d"(tmp_mask2)
110		: [val]"d"(value), [rxmask]"d"(up->rxmask), [lc]"a"(up->csize)
111		: "ASTAT", "LB0", "LC0", "LT0"
112	);
113
114	pr_debug("	extract:%x\n", extract);
115	return extract;
116}
117
118static int sport_uart_setup(struct sport_uart_port *up, int size, int baud_rate)
119{
120	int tclkdiv, rclkdiv;
121	unsigned int sclk = get_sclk();
122
123	/* Set TCR1 and TCR2, TFSR is not enabled for uart */
124	SPORT_PUT_TCR1(up, (LATFS | ITFS | TFSR | TLSBIT | ITCLK));
125	SPORT_PUT_TCR2(up, size + 1);
126	pr_debug("%s TCR1:%x, TCR2:%x\n", __func__, SPORT_GET_TCR1(up), SPORT_GET_TCR2(up));
127
128	/* Set RCR1 and RCR2 */
129	SPORT_PUT_RCR1(up, (RCKFE | LARFS | LRFS | RFSR | IRCLK));
130	SPORT_PUT_RCR2(up, (size + 1) * 2 - 1);
131	pr_debug("%s RCR1:%x, RCR2:%x\n", __func__, SPORT_GET_RCR1(up), SPORT_GET_RCR2(up));
132
133	tclkdiv = sclk / (2 * baud_rate) - 1;
134	/* The actual uart baud rate of devices vary between +/-2%. The sport
135	 * RX sample rate should be faster than the double of the worst case,
136	 * otherwise, wrong data are received. So, set sport RX clock to be
137	 * 3% faster.
138	 */
139	rclkdiv = sclk / (2 * baud_rate * 2 * 97 / 100) - 1;
140	SPORT_PUT_TCLKDIV(up, tclkdiv);
141	SPORT_PUT_RCLKDIV(up, rclkdiv);
142	SSYNC();
143	pr_debug("%s sclk:%d, baud_rate:%d, tclkdiv:%d, rclkdiv:%d\n",
144			__func__, sclk, baud_rate, tclkdiv, rclkdiv);
145
146	return 0;
147}
148
149static irqreturn_t sport_uart_rx_irq(int irq, void *dev_id)
150{
151	struct sport_uart_port *up = dev_id;
152	struct tty_struct *tty = up->port.state->port.tty;
153	unsigned int ch;
154
155	spin_lock(&up->port.lock);
156
157	while (SPORT_GET_STAT(up) & RXNE) {
158		ch = rx_one_byte(up);
159		up->port.icount.rx++;
160
161		if (!uart_handle_sysrq_char(&up->port, ch))
162			tty_insert_flip_char(tty, ch, TTY_NORMAL);
163	}
164	tty_flip_buffer_push(tty);
165
166	spin_unlock(&up->port.lock);
167
168	return IRQ_HANDLED;
169}
170
171static irqreturn_t sport_uart_tx_irq(int irq, void *dev_id)
172{
173	struct sport_uart_port *up = dev_id;
174
175	spin_lock(&up->port.lock);
176	sport_uart_tx_chars(up);
177	spin_unlock(&up->port.lock);
178
179	return IRQ_HANDLED;
180}
181
182static irqreturn_t sport_uart_err_irq(int irq, void *dev_id)
183{
184	struct sport_uart_port *up = dev_id;
185	struct tty_struct *tty = up->port.state->port.tty;
186	unsigned int stat = SPORT_GET_STAT(up);
187
188	spin_lock(&up->port.lock);
189
190	/* Overflow in RX FIFO */
191	if (stat & ROVF) {
192		up->port.icount.overrun++;
193		tty_insert_flip_char(tty, 0, TTY_OVERRUN);
194		SPORT_PUT_STAT(up, ROVF); /* Clear ROVF bit */
195	}
196	/* These should not happen */
197	if (stat & (TOVF | TUVF | RUVF)) {
198		pr_err("SPORT Error:%s %s %s\n",
199		       (stat & TOVF) ? "TX overflow" : "",
200		       (stat & TUVF) ? "TX underflow" : "",
201		       (stat & RUVF) ? "RX underflow" : "");
202		SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
203		SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) & ~RSPEN);
204	}
205	SSYNC();
206
207	spin_unlock(&up->port.lock);
208	return IRQ_HANDLED;
209}
210
211#ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
212static unsigned int sport_get_mctrl(struct uart_port *port)
213{
214	struct sport_uart_port *up = (struct sport_uart_port *)port;
215	if (up->cts_pin < 0)
216		return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
217
218	/* CTS PIN is negative assertive. */
219	if (SPORT_UART_GET_CTS(up))
220		return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
221	else
222		return TIOCM_DSR | TIOCM_CAR;
223}
224
225static void sport_set_mctrl(struct uart_port *port, unsigned int mctrl)
226{
227	struct sport_uart_port *up = (struct sport_uart_port *)port;
228	if (up->rts_pin < 0)
229		return;
230
231	/* RTS PIN is negative assertive. */
232	if (mctrl & TIOCM_RTS)
233		SPORT_UART_ENABLE_RTS(up);
234	else
235		SPORT_UART_DISABLE_RTS(up);
236}
237
238/*
239 * Handle any change of modem status signal.
240 */
241static irqreturn_t sport_mctrl_cts_int(int irq, void *dev_id)
242{
243	struct sport_uart_port *up = (struct sport_uart_port *)dev_id;
244	unsigned int status;
245
246	status = sport_get_mctrl(&up->port);
247	uart_handle_cts_change(&up->port, status & TIOCM_CTS);
248
249	return IRQ_HANDLED;
250}
251#else
252static unsigned int sport_get_mctrl(struct uart_port *port)
253{
254	pr_debug("%s enter\n", __func__);
255	return TIOCM_CTS | TIOCM_CD | TIOCM_DSR;
256}
257
258static void sport_set_mctrl(struct uart_port *port, unsigned int mctrl)
259{
260	pr_debug("%s enter\n", __func__);
261}
262#endif
263
264/* Reqeust IRQ, Setup clock */
265static int sport_startup(struct uart_port *port)
266{
267	struct sport_uart_port *up = (struct sport_uart_port *)port;
268	int ret;
269
270	pr_debug("%s enter\n", __func__);
271	ret = request_irq(up->port.irq, sport_uart_rx_irq, 0,
272		"SPORT_UART_RX", up);
273	if (ret) {
274		dev_err(port->dev, "unable to request SPORT RX interrupt\n");
275		return ret;
276	}
277
278	ret = request_irq(up->port.irq+1, sport_uart_tx_irq, 0,
279		"SPORT_UART_TX", up);
280	if (ret) {
281		dev_err(port->dev, "unable to request SPORT TX interrupt\n");
282		goto fail1;
283	}
284
285	ret = request_irq(up->err_irq, sport_uart_err_irq, 0,
286		"SPORT_UART_STATUS", up);
287	if (ret) {
288		dev_err(port->dev, "unable to request SPORT status interrupt\n");
289		goto fail2;
290	}
291
292#ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
293	if (up->cts_pin >= 0) {
294		if (request_irq(gpio_to_irq(up->cts_pin),
295			sport_mctrl_cts_int,
296			IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
297			0, "BFIN_SPORT_UART_CTS", up)) {
298			up->cts_pin = -1;
299			dev_info(port->dev, "Unable to attach BlackFin UART over SPORT CTS interrupt. So, disable it.\n");
300		}
301	}
302	if (up->rts_pin >= 0) {
303		if (gpio_request(up->rts_pin, DRV_NAME)) {
304			dev_info(port->dev, "fail to request RTS PIN at GPIO_%d\n", up->rts_pin);
305			up->rts_pin = -1;
306		} else
307			gpio_direction_output(up->rts_pin, 0);
308	}
309#endif
310
311	return 0;
312 fail2:
313	free_irq(up->port.irq+1, up);
314 fail1:
315	free_irq(up->port.irq, up);
316
317	return ret;
318}
319
320/*
321 * sport_uart_tx_chars
322 *
323 * ret 1 means need to enable sport.
324 * ret 0 means do nothing.
325 */
326static int sport_uart_tx_chars(struct sport_uart_port *up)
327{
328	struct circ_buf *xmit = &up->port.state->xmit;
329
330	if (SPORT_GET_STAT(up) & TXF)
331		return 0;
332
333	if (up->port.x_char) {
334		tx_one_byte(up, up->port.x_char);
335		up->port.icount.tx++;
336		up->port.x_char = 0;
337		return 1;
338	}
339
340	if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
341		/* The waiting loop to stop SPORT TX from TX interrupt is
342		 * too long. This may block SPORT RX interrupts and cause
343		 * RX FIFO overflow. So, do stop sport TX only after the last
344		 * char in TX FIFO is moved into the shift register.
345		 */
346		if (SPORT_GET_STAT(up) & TXHRE)
347			sport_stop_tx(&up->port);
348		return 0;
349	}
350
351	while(!(SPORT_GET_STAT(up) & TXF) && !uart_circ_empty(xmit)) {
352		tx_one_byte(up, xmit->buf[xmit->tail]);
353		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE -1);
354		up->port.icount.tx++;
355	}
356
357	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
358		uart_write_wakeup(&up->port);
359
360	return 1;
361}
362
363static unsigned int sport_tx_empty(struct uart_port *port)
364{
365	struct sport_uart_port *up = (struct sport_uart_port *)port;
366	unsigned int stat;
367
368	stat = SPORT_GET_STAT(up);
369	pr_debug("%s stat:%04x\n", __func__, stat);
370	if (stat & TXHRE) {
371		return TIOCSER_TEMT;
372	} else
373		return 0;
374}
375
376static void sport_stop_tx(struct uart_port *port)
377{
378	struct sport_uart_port *up = (struct sport_uart_port *)port;
379
380	pr_debug("%s enter\n", __func__);
381
382	if (!(SPORT_GET_TCR1(up) & TSPEN))
383		return;
384
385	/* Although the hold register is empty, last byte is still in shift
386	 * register and not sent out yet. So, put a dummy data into TX FIFO.
387	 * Then, sport tx stops when last byte is shift out and the dummy
388	 * data is moved into the shift register.
389	 */
390	SPORT_PUT_TX(up, 0xffff);
391	while (!(SPORT_GET_STAT(up) & TXHRE))
392		cpu_relax();
393
394	SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
395	SSYNC();
396
397	return;
398}
399
400static void sport_start_tx(struct uart_port *port)
401{
402	struct sport_uart_port *up = (struct sport_uart_port *)port;
403
404	pr_debug("%s enter\n", __func__);
405
406	/* Write data into SPORT FIFO before enable SPROT to transmit */
407	if (sport_uart_tx_chars(up)) {
408		/* Enable transmit, then an interrupt will generated */
409		SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
410		SSYNC();
411	}
412
413	pr_debug("%s exit\n", __func__);
414}
415
416static void sport_stop_rx(struct uart_port *port)
417{
418	struct sport_uart_port *up = (struct sport_uart_port *)port;
419
420	pr_debug("%s enter\n", __func__);
421	/* Disable sport to stop rx */
422	SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) & ~RSPEN));
423	SSYNC();
424}
425
426static void sport_enable_ms(struct uart_port *port)
427{
428	pr_debug("%s enter\n", __func__);
429}
430
431static void sport_break_ctl(struct uart_port *port, int break_state)
432{
433	pr_debug("%s enter\n", __func__);
434}
435
436static void sport_shutdown(struct uart_port *port)
437{
438	struct sport_uart_port *up = (struct sport_uart_port *)port;
439
440	dev_dbg(port->dev, "%s enter\n", __func__);
441
442	/* Disable sport */
443	SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
444	SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) & ~RSPEN));
445	SSYNC();
446
447	free_irq(up->port.irq, up);
448	free_irq(up->port.irq+1, up);
449	free_irq(up->err_irq, up);
450#ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
451	if (up->cts_pin >= 0)
452		free_irq(gpio_to_irq(up->cts_pin), up);
453	if (up->rts_pin >= 0)
454		gpio_free(up->rts_pin);
455#endif
456}
457
458static const char *sport_type(struct uart_port *port)
459{
460	struct sport_uart_port *up = (struct sport_uart_port *)port;
461
462	pr_debug("%s enter\n", __func__);
463	return up->port.type == PORT_BFIN_SPORT ? "BFIN-SPORT-UART" : NULL;
464}
465
466static void sport_release_port(struct uart_port *port)
467{
468	pr_debug("%s enter\n", __func__);
469}
470
471static int sport_request_port(struct uart_port *port)
472{
473	pr_debug("%s enter\n", __func__);
474	return 0;
475}
476
477static void sport_config_port(struct uart_port *port, int flags)
478{
479	struct sport_uart_port *up = (struct sport_uart_port *)port;
480
481	pr_debug("%s enter\n", __func__);
482	up->port.type = PORT_BFIN_SPORT;
483}
484
485static int sport_verify_port(struct uart_port *port, struct serial_struct *ser)
486{
487	pr_debug("%s enter\n", __func__);
488	return 0;
489}
490
491static void sport_set_termios(struct uart_port *port,
492		struct ktermios *termios, struct ktermios *old)
493{
494	struct sport_uart_port *up = (struct sport_uart_port *)port;
495	unsigned long flags;
496	int i;
497
498	pr_debug("%s enter, c_cflag:%08x\n", __func__, termios->c_cflag);
499
500	switch (termios->c_cflag & CSIZE) {
501	case CS8:
502		up->csize = 8;
503		break;
504	case CS7:
505		up->csize = 7;
506		break;
507	case CS6:
508		up->csize = 6;
509		break;
510	case CS5:
511		up->csize = 5;
512		break;
513	default:
514		pr_warning("requested word length not supported\n");
515	}
516
517	if (termios->c_cflag & CSTOPB) {
518		up->stopb = 1;
519	}
520	if (termios->c_cflag & PARENB) {
521		pr_warning("PAREN bits is not supported yet\n");
522		/* up->parib = 1; */
523	}
524
525	spin_lock_irqsave(&up->port.lock, flags);
526
527	port->read_status_mask = 0;
528
529	/*
530	 * Characters to ignore
531	 */
532	port->ignore_status_mask = 0;
533
534	/* RX extract mask */
535	up->rxmask = 0x01 | (((up->csize + up->stopb) * 2 - 1) << 0x8);
536	/* TX masks, 8 bit data and 1 bit stop for example:
537	 * mask1 = b#0111111110
538	 * mask2 = b#1000000000
539	 */
540	for (i = 0, up->txmask1 = 0; i < up->csize; i++)
541		up->txmask1 |= (1<<i);
542	up->txmask2 = (1<<i);
543	if (up->stopb) {
544		++i;
545		up->txmask2 |= (1<<i);
546	}
547	up->txmask1 <<= 1;
548	up->txmask2 <<= 1;
549	/* uart baud rate */
550	port->uartclk = uart_get_baud_rate(port, termios, old, 0, get_sclk()/16);
551
552	/* Disable UART */
553	SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
554	SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) & ~RSPEN);
555
556	sport_uart_setup(up, up->csize + up->stopb, port->uartclk);
557
558	/* driver TX line high after config, one dummy data is
559	 * necessary to stop sport after shift one byte
560	 */
561	SPORT_PUT_TX(up, 0xffff);
562	SPORT_PUT_TX(up, 0xffff);
563	SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
564	SSYNC();
565	while (!(SPORT_GET_STAT(up) & TXHRE))
566		cpu_relax();
567	SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
568	SSYNC();
569
570	/* Port speed changed, update the per-port timeout. */
571	uart_update_timeout(port, termios->c_cflag, port->uartclk);
572
573	/* Enable sport rx */
574	SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) | RSPEN);
575	SSYNC();
576
577	spin_unlock_irqrestore(&up->port.lock, flags);
578}
579
580struct uart_ops sport_uart_ops = {
581	.tx_empty	= sport_tx_empty,
582	.set_mctrl	= sport_set_mctrl,
583	.get_mctrl	= sport_get_mctrl,
584	.stop_tx	= sport_stop_tx,
585	.start_tx	= sport_start_tx,
586	.stop_rx	= sport_stop_rx,
587	.enable_ms	= sport_enable_ms,
588	.break_ctl	= sport_break_ctl,
589	.startup	= sport_startup,
590	.shutdown	= sport_shutdown,
591	.set_termios	= sport_set_termios,
592	.type		= sport_type,
593	.release_port	= sport_release_port,
594	.request_port	= sport_request_port,
595	.config_port	= sport_config_port,
596	.verify_port	= sport_verify_port,
597};
598
599#define BFIN_SPORT_UART_MAX_PORTS 4
600
601static struct sport_uart_port *bfin_sport_uart_ports[BFIN_SPORT_UART_MAX_PORTS];
602
603#ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
604#define CLASS_BFIN_SPORT_CONSOLE	"bfin-sport-console"
605
606static int __init
607sport_uart_console_setup(struct console *co, char *options)
608{
609	struct sport_uart_port *up;
610	int baud = 57600;
611	int bits = 8;
612	int parity = 'n';
613# ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
614	int flow = 'r';
615# else
616	int flow = 'n';
617# endif
618
619	/* Check whether an invalid uart number has been specified */
620	if (co->index < 0 || co->index >= BFIN_SPORT_UART_MAX_PORTS)
621		return -ENODEV;
622
623	up = bfin_sport_uart_ports[co->index];
624	if (!up)
625		return -ENODEV;
626
627	if (options)
628		uart_parse_options(options, &baud, &parity, &bits, &flow);
629
630	return uart_set_options(&up->port, co, baud, parity, bits, flow);
631}
632
633static void sport_uart_console_putchar(struct uart_port *port, int ch)
634{
635	struct sport_uart_port *up = (struct sport_uart_port *)port;
636
637	while (SPORT_GET_STAT(up) & TXF)
638		barrier();
639
640	tx_one_byte(up, ch);
641}
642
643/*
644 * Interrupts are disabled on entering
645 */
646static void
647sport_uart_console_write(struct console *co, const char *s, unsigned int count)
648{
649	struct sport_uart_port *up = bfin_sport_uart_ports[co->index];
650	unsigned long flags;
651
652	spin_lock_irqsave(&up->port.lock, flags);
653
654	if (SPORT_GET_TCR1(up) & TSPEN)
655		uart_console_write(&up->port, s, count, sport_uart_console_putchar);
656	else {
657		/* dummy data to start sport */
658		while (SPORT_GET_STAT(up) & TXF)
659			barrier();
660		SPORT_PUT_TX(up, 0xffff);
661		/* Enable transmit, then an interrupt will generated */
662		SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
663		SSYNC();
664
665		uart_console_write(&up->port, s, count, sport_uart_console_putchar);
666
667		/* Although the hold register is empty, last byte is still in shift
668		 * register and not sent out yet. So, put a dummy data into TX FIFO.
669		 * Then, sport tx stops when last byte is shift out and the dummy
670		 * data is moved into the shift register.
671		 */
672		while (SPORT_GET_STAT(up) & TXF)
673			barrier();
674		SPORT_PUT_TX(up, 0xffff);
675		while (!(SPORT_GET_STAT(up) & TXHRE))
676			barrier();
677
678		/* Stop sport tx transfer */
679		SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
680		SSYNC();
681	}
682
683	spin_unlock_irqrestore(&up->port.lock, flags);
684}
685
686static struct uart_driver sport_uart_reg;
687
688static struct console sport_uart_console = {
689	.name		= DEVICE_NAME,
690	.write		= sport_uart_console_write,
691	.device		= uart_console_device,
692	.setup		= sport_uart_console_setup,
693	.flags		= CON_PRINTBUFFER,
694	.index		= -1,
695	.data		= &sport_uart_reg,
696};
697
698#define SPORT_UART_CONSOLE	(&sport_uart_console)
699#else
700#define SPORT_UART_CONSOLE	NULL
701#endif /* CONFIG_SERIAL_BFIN_SPORT_CONSOLE */
702
703
704static struct uart_driver sport_uart_reg = {
705	.owner		= THIS_MODULE,
706	.driver_name	= DRV_NAME,
707	.dev_name	= DEVICE_NAME,
708	.major		= 204,
709	.minor		= 84,
710	.nr		= BFIN_SPORT_UART_MAX_PORTS,
711	.cons		= SPORT_UART_CONSOLE,
712};
713
714#ifdef CONFIG_PM
715static int sport_uart_suspend(struct device *dev)
716{
717	struct sport_uart_port *sport = dev_get_drvdata(dev);
718
719	dev_dbg(dev, "%s enter\n", __func__);
720	if (sport)
721		uart_suspend_port(&sport_uart_reg, &sport->port);
722
723	return 0;
724}
725
726static int sport_uart_resume(struct device *dev)
727{
728	struct sport_uart_port *sport = dev_get_drvdata(dev);
729
730	dev_dbg(dev, "%s enter\n", __func__);
731	if (sport)
732		uart_resume_port(&sport_uart_reg, &sport->port);
733
734	return 0;
735}
736
737static struct dev_pm_ops bfin_sport_uart_dev_pm_ops = {
738	.suspend	= sport_uart_suspend,
739	.resume		= sport_uart_resume,
740};
741#endif
742
743static int __devinit sport_uart_probe(struct platform_device *pdev)
744{
745	struct resource *res;
746	struct sport_uart_port *sport;
747	int ret = 0;
748
749	dev_dbg(&pdev->dev, "%s enter\n", __func__);
750
751	if (pdev->id < 0 || pdev->id >= BFIN_SPORT_UART_MAX_PORTS) {
752		dev_err(&pdev->dev, "Wrong sport uart platform device id.\n");
753		return -ENOENT;
754	}
755
756	if (bfin_sport_uart_ports[pdev->id] == NULL) {
757		bfin_sport_uart_ports[pdev->id] =
758			kzalloc(sizeof(struct sport_uart_port), GFP_KERNEL);
759		sport = bfin_sport_uart_ports[pdev->id];
760		if (!sport) {
761			dev_err(&pdev->dev,
762				"Fail to malloc sport_uart_port\n");
763			return -ENOMEM;
764		}
765
766		ret = peripheral_request_list(
767			(unsigned short *)pdev->dev.platform_data, DRV_NAME);
768		if (ret) {
769			dev_err(&pdev->dev,
770				"Fail to request SPORT peripherals\n");
771			goto out_error_free_mem;
772		}
773
774		spin_lock_init(&sport->port.lock);
775		sport->port.fifosize  = SPORT_TX_FIFO_SIZE,
776		sport->port.ops       = &sport_uart_ops;
777		sport->port.line      = pdev->id;
778		sport->port.iotype    = UPIO_MEM;
779		sport->port.flags     = UPF_BOOT_AUTOCONF;
780
781		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
782		if (res == NULL) {
783			dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
784			ret = -ENOENT;
785			goto out_error_free_peripherals;
786		}
787
788		sport->port.membase = ioremap(res->start, resource_size(res));
789		if (!sport->port.membase) {
790			dev_err(&pdev->dev, "Cannot map sport IO\n");
791			ret = -ENXIO;
792			goto out_error_free_peripherals;
793		}
794		sport->port.mapbase = res->start;
795
796		sport->port.irq = platform_get_irq(pdev, 0);
797		if ((int)sport->port.irq < 0) {
798			dev_err(&pdev->dev, "No sport RX/TX IRQ specified\n");
799			ret = -ENOENT;
800			goto out_error_unmap;
801		}
802
803		sport->err_irq = platform_get_irq(pdev, 1);
804		if (sport->err_irq < 0) {
805			dev_err(&pdev->dev, "No sport status IRQ specified\n");
806			ret = -ENOENT;
807			goto out_error_unmap;
808		}
809#ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
810		res = platform_get_resource(pdev, IORESOURCE_IO, 0);
811		if (res == NULL)
812			sport->cts_pin = -1;
813		else {
814			sport->cts_pin = res->start;
815			sport->port.flags |= ASYNC_CTS_FLOW;
816		}
817
818		res = platform_get_resource(pdev, IORESOURCE_IO, 1);
819		if (res == NULL)
820			sport->rts_pin = -1;
821		else
822			sport->rts_pin = res->start;
823#endif
824	}
825
826#ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
827	if (!is_early_platform_device(pdev)) {
828#endif
829		sport = bfin_sport_uart_ports[pdev->id];
830		sport->port.dev = &pdev->dev;
831		dev_set_drvdata(&pdev->dev, sport);
832		ret = uart_add_one_port(&sport_uart_reg, &sport->port);
833#ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
834	}
835#endif
836	if (!ret)
837		return 0;
838
839	if (sport) {
840out_error_unmap:
841		iounmap(sport->port.membase);
842out_error_free_peripherals:
843		peripheral_free_list(
844			(unsigned short *)pdev->dev.platform_data);
845out_error_free_mem:
846		kfree(sport);
847		bfin_sport_uart_ports[pdev->id] = NULL;
848	}
849
850	return ret;
851}
852
853static int __devexit sport_uart_remove(struct platform_device *pdev)
854{
855	struct sport_uart_port *sport = platform_get_drvdata(pdev);
856
857	dev_dbg(&pdev->dev, "%s enter\n", __func__);
858	dev_set_drvdata(&pdev->dev, NULL);
859
860	if (sport) {
861		uart_remove_one_port(&sport_uart_reg, &sport->port);
862		iounmap(sport->port.membase);
863		peripheral_free_list(
864			(unsigned short *)pdev->dev.platform_data);
865		kfree(sport);
866		bfin_sport_uart_ports[pdev->id] = NULL;
867	}
868
869	return 0;
870}
871
872static struct platform_driver sport_uart_driver = {
873	.probe		= sport_uart_probe,
874	.remove		= __devexit_p(sport_uart_remove),
875	.driver		= {
876		.name	= DRV_NAME,
877#ifdef CONFIG_PM
878		.pm	= &bfin_sport_uart_dev_pm_ops,
879#endif
880	},
881};
882
883#ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
884static __initdata struct early_platform_driver early_sport_uart_driver = {
885	.class_str = CLASS_BFIN_SPORT_CONSOLE,
886	.pdrv = &sport_uart_driver,
887	.requested_id = EARLY_PLATFORM_ID_UNSET,
888};
889
890static int __init sport_uart_rs_console_init(void)
891{
892	early_platform_driver_register(&early_sport_uart_driver, DRV_NAME);
893
894	early_platform_driver_probe(CLASS_BFIN_SPORT_CONSOLE,
895		BFIN_SPORT_UART_MAX_PORTS, 0);
896
897	register_console(&sport_uart_console);
898
899	return 0;
900}
901console_initcall(sport_uart_rs_console_init);
902#endif
903
904static int __init sport_uart_init(void)
905{
906	int ret;
907
908	pr_info("Blackfin uart over sport driver\n");
909
910	ret = uart_register_driver(&sport_uart_reg);
911	if (ret) {
912		pr_err("failed to register %s:%d\n",
913				sport_uart_reg.driver_name, ret);
914		return ret;
915	}
916
917	ret = platform_driver_register(&sport_uart_driver);
918	if (ret) {
919		pr_err("failed to register sport uart driver:%d\n", ret);
920		uart_unregister_driver(&sport_uart_reg);
921	}
922
923	return ret;
924}
925module_init(sport_uart_init);
926
927static void __exit sport_uart_exit(void)
928{
929	platform_driver_unregister(&sport_uart_driver);
930	uart_unregister_driver(&sport_uart_reg);
931}
932module_exit(sport_uart_exit);
933
934MODULE_AUTHOR("Sonic Zhang, Roy Huang");
935MODULE_DESCRIPTION("Blackfin serial over SPORT driver");
936MODULE_LICENSE("GPL");