Loading...
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Driver for the serial port on the 21285 StrongArm-110 core logic chip.
4 *
5 * Based on drivers/char/serial.c
6 */
7#include <linux/module.h>
8#include <linux/tty.h>
9#include <linux/ioport.h>
10#include <linux/init.h>
11#include <linux/console.h>
12#include <linux/device.h>
13#include <linux/tty_flip.h>
14#include <linux/serial_core.h>
15#include <linux/serial.h>
16#include <linux/io.h>
17
18#include <asm/irq.h>
19#include <asm/mach-types.h>
20#include <asm/system_info.h>
21#include <asm/hardware/dec21285.h>
22#include <mach/hardware.h>
23
24#define BAUD_BASE (mem_fclk_21285/64)
25
26#define SERIAL_21285_NAME "ttyFB"
27#define SERIAL_21285_MAJOR 204
28#define SERIAL_21285_MINOR 4
29
30#define RXSTAT_DUMMY_READ 0x80000000
31#define RXSTAT_FRAME (1 << 0)
32#define RXSTAT_PARITY (1 << 1)
33#define RXSTAT_OVERRUN (1 << 2)
34#define RXSTAT_ANYERR (RXSTAT_FRAME|RXSTAT_PARITY|RXSTAT_OVERRUN)
35
36#define H_UBRLCR_BREAK (1 << 0)
37#define H_UBRLCR_PARENB (1 << 1)
38#define H_UBRLCR_PAREVN (1 << 2)
39#define H_UBRLCR_STOPB (1 << 3)
40#define H_UBRLCR_FIFO (1 << 4)
41
42static const char serial21285_name[] = "Footbridge UART";
43
44#define tx_enabled(port) ((port)->unused[0])
45#define rx_enabled(port) ((port)->unused[1])
46
47/*
48 * The documented expression for selecting the divisor is:
49 * BAUD_BASE / baud - 1
50 * However, typically BAUD_BASE is not divisible by baud, so
51 * we want to select the divisor that gives us the minimum
52 * error. Therefore, we want:
53 * int(BAUD_BASE / baud - 0.5) ->
54 * int(BAUD_BASE / baud - (baud >> 1) / baud) ->
55 * int((BAUD_BASE - (baud >> 1)) / baud)
56 */
57
58static void serial21285_stop_tx(struct uart_port *port)
59{
60 if (tx_enabled(port)) {
61 disable_irq_nosync(IRQ_CONTX);
62 tx_enabled(port) = 0;
63 }
64}
65
66static void serial21285_start_tx(struct uart_port *port)
67{
68 if (!tx_enabled(port)) {
69 enable_irq(IRQ_CONTX);
70 tx_enabled(port) = 1;
71 }
72}
73
74static void serial21285_stop_rx(struct uart_port *port)
75{
76 if (rx_enabled(port)) {
77 disable_irq_nosync(IRQ_CONRX);
78 rx_enabled(port) = 0;
79 }
80}
81
82static irqreturn_t serial21285_rx_chars(int irq, void *dev_id)
83{
84 struct uart_port *port = dev_id;
85 unsigned int status, ch, flag, rxs, max_count = 256;
86
87 status = *CSR_UARTFLG;
88 while (!(status & 0x10) && max_count--) {
89 ch = *CSR_UARTDR;
90 flag = TTY_NORMAL;
91 port->icount.rx++;
92
93 rxs = *CSR_RXSTAT | RXSTAT_DUMMY_READ;
94 if (unlikely(rxs & RXSTAT_ANYERR)) {
95 if (rxs & RXSTAT_PARITY)
96 port->icount.parity++;
97 else if (rxs & RXSTAT_FRAME)
98 port->icount.frame++;
99 if (rxs & RXSTAT_OVERRUN)
100 port->icount.overrun++;
101
102 rxs &= port->read_status_mask;
103
104 if (rxs & RXSTAT_PARITY)
105 flag = TTY_PARITY;
106 else if (rxs & RXSTAT_FRAME)
107 flag = TTY_FRAME;
108 }
109
110 uart_insert_char(port, rxs, RXSTAT_OVERRUN, ch, flag);
111
112 status = *CSR_UARTFLG;
113 }
114 tty_flip_buffer_push(&port->state->port);
115
116 return IRQ_HANDLED;
117}
118
119static irqreturn_t serial21285_tx_chars(int irq, void *dev_id)
120{
121 struct uart_port *port = dev_id;
122 struct circ_buf *xmit = &port->state->xmit;
123 int count = 256;
124
125 if (port->x_char) {
126 *CSR_UARTDR = port->x_char;
127 port->icount.tx++;
128 port->x_char = 0;
129 goto out;
130 }
131 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
132 serial21285_stop_tx(port);
133 goto out;
134 }
135
136 do {
137 *CSR_UARTDR = xmit->buf[xmit->tail];
138 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
139 port->icount.tx++;
140 if (uart_circ_empty(xmit))
141 break;
142 } while (--count > 0 && !(*CSR_UARTFLG & 0x20));
143
144 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
145 uart_write_wakeup(port);
146
147 if (uart_circ_empty(xmit))
148 serial21285_stop_tx(port);
149
150 out:
151 return IRQ_HANDLED;
152}
153
154static unsigned int serial21285_tx_empty(struct uart_port *port)
155{
156 return (*CSR_UARTFLG & 8) ? 0 : TIOCSER_TEMT;
157}
158
159/* no modem control lines */
160static unsigned int serial21285_get_mctrl(struct uart_port *port)
161{
162 return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
163}
164
165static void serial21285_set_mctrl(struct uart_port *port, unsigned int mctrl)
166{
167}
168
169static void serial21285_break_ctl(struct uart_port *port, int break_state)
170{
171 unsigned long flags;
172 unsigned int h_lcr;
173
174 spin_lock_irqsave(&port->lock, flags);
175 h_lcr = *CSR_H_UBRLCR;
176 if (break_state)
177 h_lcr |= H_UBRLCR_BREAK;
178 else
179 h_lcr &= ~H_UBRLCR_BREAK;
180 *CSR_H_UBRLCR = h_lcr;
181 spin_unlock_irqrestore(&port->lock, flags);
182}
183
184static int serial21285_startup(struct uart_port *port)
185{
186 int ret;
187
188 tx_enabled(port) = 1;
189 rx_enabled(port) = 1;
190
191 ret = request_irq(IRQ_CONRX, serial21285_rx_chars, 0,
192 serial21285_name, port);
193 if (ret == 0) {
194 ret = request_irq(IRQ_CONTX, serial21285_tx_chars, 0,
195 serial21285_name, port);
196 if (ret)
197 free_irq(IRQ_CONRX, port);
198 }
199
200 return ret;
201}
202
203static void serial21285_shutdown(struct uart_port *port)
204{
205 free_irq(IRQ_CONTX, port);
206 free_irq(IRQ_CONRX, port);
207}
208
209static void
210serial21285_set_termios(struct uart_port *port, struct ktermios *termios,
211 struct ktermios *old)
212{
213 unsigned long flags;
214 unsigned int baud, quot, h_lcr, b;
215
216 /*
217 * We don't support modem control lines.
218 */
219 termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR);
220 termios->c_cflag |= CLOCAL;
221
222 /*
223 * We don't support BREAK character recognition.
224 */
225 termios->c_iflag &= ~(IGNBRK | BRKINT);
226
227 /*
228 * Ask the core to calculate the divisor for us.
229 */
230 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
231 quot = uart_get_divisor(port, baud);
232 b = port->uartclk / (16 * quot);
233 tty_termios_encode_baud_rate(termios, b, b);
234
235 switch (termios->c_cflag & CSIZE) {
236 case CS5:
237 h_lcr = 0x00;
238 break;
239 case CS6:
240 h_lcr = 0x20;
241 break;
242 case CS7:
243 h_lcr = 0x40;
244 break;
245 default: /* CS8 */
246 h_lcr = 0x60;
247 break;
248 }
249
250 if (termios->c_cflag & CSTOPB)
251 h_lcr |= H_UBRLCR_STOPB;
252 if (termios->c_cflag & PARENB) {
253 h_lcr |= H_UBRLCR_PARENB;
254 if (!(termios->c_cflag & PARODD))
255 h_lcr |= H_UBRLCR_PAREVN;
256 }
257
258 if (port->fifosize)
259 h_lcr |= H_UBRLCR_FIFO;
260
261 spin_lock_irqsave(&port->lock, flags);
262
263 /*
264 * Update the per-port timeout.
265 */
266 uart_update_timeout(port, termios->c_cflag, baud);
267
268 /*
269 * Which character status flags are we interested in?
270 */
271 port->read_status_mask = RXSTAT_OVERRUN;
272 if (termios->c_iflag & INPCK)
273 port->read_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY;
274
275 /*
276 * Which character status flags should we ignore?
277 */
278 port->ignore_status_mask = 0;
279 if (termios->c_iflag & IGNPAR)
280 port->ignore_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY;
281 if (termios->c_iflag & IGNBRK && termios->c_iflag & IGNPAR)
282 port->ignore_status_mask |= RXSTAT_OVERRUN;
283
284 /*
285 * Ignore all characters if CREAD is not set.
286 */
287 if ((termios->c_cflag & CREAD) == 0)
288 port->ignore_status_mask |= RXSTAT_DUMMY_READ;
289
290 quot -= 1;
291
292 *CSR_UARTCON = 0;
293 *CSR_L_UBRLCR = quot & 0xff;
294 *CSR_M_UBRLCR = (quot >> 8) & 0x0f;
295 *CSR_H_UBRLCR = h_lcr;
296 *CSR_UARTCON = 1;
297
298 spin_unlock_irqrestore(&port->lock, flags);
299}
300
301static const char *serial21285_type(struct uart_port *port)
302{
303 return port->type == PORT_21285 ? "DC21285" : NULL;
304}
305
306static void serial21285_release_port(struct uart_port *port)
307{
308 release_mem_region(port->mapbase, 32);
309}
310
311static int serial21285_request_port(struct uart_port *port)
312{
313 return request_mem_region(port->mapbase, 32, serial21285_name)
314 != NULL ? 0 : -EBUSY;
315}
316
317static void serial21285_config_port(struct uart_port *port, int flags)
318{
319 if (flags & UART_CONFIG_TYPE && serial21285_request_port(port) == 0)
320 port->type = PORT_21285;
321}
322
323/*
324 * verify the new serial_struct (for TIOCSSERIAL).
325 */
326static int serial21285_verify_port(struct uart_port *port, struct serial_struct *ser)
327{
328 int ret = 0;
329 if (ser->type != PORT_UNKNOWN && ser->type != PORT_21285)
330 ret = -EINVAL;
331 if (ser->irq <= 0)
332 ret = -EINVAL;
333 if (ser->baud_base != port->uartclk / 16)
334 ret = -EINVAL;
335 return ret;
336}
337
338static const struct uart_ops serial21285_ops = {
339 .tx_empty = serial21285_tx_empty,
340 .get_mctrl = serial21285_get_mctrl,
341 .set_mctrl = serial21285_set_mctrl,
342 .stop_tx = serial21285_stop_tx,
343 .start_tx = serial21285_start_tx,
344 .stop_rx = serial21285_stop_rx,
345 .break_ctl = serial21285_break_ctl,
346 .startup = serial21285_startup,
347 .shutdown = serial21285_shutdown,
348 .set_termios = serial21285_set_termios,
349 .type = serial21285_type,
350 .release_port = serial21285_release_port,
351 .request_port = serial21285_request_port,
352 .config_port = serial21285_config_port,
353 .verify_port = serial21285_verify_port,
354};
355
356static struct uart_port serial21285_port = {
357 .mapbase = 0x42000160,
358 .iotype = UPIO_MEM,
359 .irq = 0,
360 .fifosize = 16,
361 .ops = &serial21285_ops,
362 .flags = UPF_BOOT_AUTOCONF,
363};
364
365static void serial21285_setup_ports(void)
366{
367 serial21285_port.uartclk = mem_fclk_21285 / 4;
368}
369
370#ifdef CONFIG_SERIAL_21285_CONSOLE
371static void serial21285_console_putchar(struct uart_port *port, int ch)
372{
373 while (*CSR_UARTFLG & 0x20)
374 barrier();
375 *CSR_UARTDR = ch;
376}
377
378static void
379serial21285_console_write(struct console *co, const char *s,
380 unsigned int count)
381{
382 uart_console_write(&serial21285_port, s, count, serial21285_console_putchar);
383}
384
385static void __init
386serial21285_get_options(struct uart_port *port, int *baud,
387 int *parity, int *bits)
388{
389 if (*CSR_UARTCON == 1) {
390 unsigned int tmp;
391
392 tmp = *CSR_H_UBRLCR;
393 switch (tmp & 0x60) {
394 case 0x00:
395 *bits = 5;
396 break;
397 case 0x20:
398 *bits = 6;
399 break;
400 case 0x40:
401 *bits = 7;
402 break;
403 default:
404 case 0x60:
405 *bits = 8;
406 break;
407 }
408
409 if (tmp & H_UBRLCR_PARENB) {
410 *parity = 'o';
411 if (tmp & H_UBRLCR_PAREVN)
412 *parity = 'e';
413 }
414
415 tmp = *CSR_L_UBRLCR | (*CSR_M_UBRLCR << 8);
416
417 *baud = port->uartclk / (16 * (tmp + 1));
418 }
419}
420
421static int __init serial21285_console_setup(struct console *co, char *options)
422{
423 struct uart_port *port = &serial21285_port;
424 int baud = 9600;
425 int bits = 8;
426 int parity = 'n';
427 int flow = 'n';
428
429 if (machine_is_personal_server())
430 baud = 57600;
431
432 /*
433 * Check whether an invalid uart number has been specified, and
434 * if so, search for the first available port that does have
435 * console support.
436 */
437 if (options)
438 uart_parse_options(options, &baud, &parity, &bits, &flow);
439 else
440 serial21285_get_options(port, &baud, &parity, &bits);
441
442 return uart_set_options(port, co, baud, parity, bits, flow);
443}
444
445static struct uart_driver serial21285_reg;
446
447static struct console serial21285_console =
448{
449 .name = SERIAL_21285_NAME,
450 .write = serial21285_console_write,
451 .device = uart_console_device,
452 .setup = serial21285_console_setup,
453 .flags = CON_PRINTBUFFER,
454 .index = -1,
455 .data = &serial21285_reg,
456};
457
458static int __init rs285_console_init(void)
459{
460 serial21285_setup_ports();
461 register_console(&serial21285_console);
462 return 0;
463}
464console_initcall(rs285_console_init);
465
466#define SERIAL_21285_CONSOLE &serial21285_console
467#else
468#define SERIAL_21285_CONSOLE NULL
469#endif
470
471static struct uart_driver serial21285_reg = {
472 .owner = THIS_MODULE,
473 .driver_name = "ttyFB",
474 .dev_name = "ttyFB",
475 .major = SERIAL_21285_MAJOR,
476 .minor = SERIAL_21285_MINOR,
477 .nr = 1,
478 .cons = SERIAL_21285_CONSOLE,
479};
480
481static int __init serial21285_init(void)
482{
483 int ret;
484
485 printk(KERN_INFO "Serial: 21285 driver\n");
486
487 serial21285_setup_ports();
488
489 ret = uart_register_driver(&serial21285_reg);
490 if (ret == 0)
491 uart_add_one_port(&serial21285_reg, &serial21285_port);
492
493 return ret;
494}
495
496static void __exit serial21285_exit(void)
497{
498 uart_remove_one_port(&serial21285_reg, &serial21285_port);
499 uart_unregister_driver(&serial21285_reg);
500}
501
502module_init(serial21285_init);
503module_exit(serial21285_exit);
504
505MODULE_LICENSE("GPL");
506MODULE_DESCRIPTION("Intel Footbridge (21285) serial driver");
507MODULE_ALIAS_CHARDEV(SERIAL_21285_MAJOR, SERIAL_21285_MINOR);
1/*
2 * Driver for the serial port on the 21285 StrongArm-110 core logic chip.
3 *
4 * Based on drivers/char/serial.c
5 */
6#include <linux/module.h>
7#include <linux/tty.h>
8#include <linux/ioport.h>
9#include <linux/init.h>
10#include <linux/console.h>
11#include <linux/device.h>
12#include <linux/tty_flip.h>
13#include <linux/serial_core.h>
14#include <linux/serial.h>
15#include <linux/io.h>
16
17#include <asm/irq.h>
18#include <asm/mach-types.h>
19#include <asm/system_info.h>
20#include <asm/hardware/dec21285.h>
21#include <mach/hardware.h>
22
23#define BAUD_BASE (mem_fclk_21285/64)
24
25#define SERIAL_21285_NAME "ttyFB"
26#define SERIAL_21285_MAJOR 204
27#define SERIAL_21285_MINOR 4
28
29#define RXSTAT_DUMMY_READ 0x80000000
30#define RXSTAT_FRAME (1 << 0)
31#define RXSTAT_PARITY (1 << 1)
32#define RXSTAT_OVERRUN (1 << 2)
33#define RXSTAT_ANYERR (RXSTAT_FRAME|RXSTAT_PARITY|RXSTAT_OVERRUN)
34
35#define H_UBRLCR_BREAK (1 << 0)
36#define H_UBRLCR_PARENB (1 << 1)
37#define H_UBRLCR_PAREVN (1 << 2)
38#define H_UBRLCR_STOPB (1 << 3)
39#define H_UBRLCR_FIFO (1 << 4)
40
41static const char serial21285_name[] = "Footbridge UART";
42
43#define tx_enabled(port) ((port)->unused[0])
44#define rx_enabled(port) ((port)->unused[1])
45
46/*
47 * The documented expression for selecting the divisor is:
48 * BAUD_BASE / baud - 1
49 * However, typically BAUD_BASE is not divisible by baud, so
50 * we want to select the divisor that gives us the minimum
51 * error. Therefore, we want:
52 * int(BAUD_BASE / baud - 0.5) ->
53 * int(BAUD_BASE / baud - (baud >> 1) / baud) ->
54 * int((BAUD_BASE - (baud >> 1)) / baud)
55 */
56
57static void serial21285_stop_tx(struct uart_port *port)
58{
59 if (tx_enabled(port)) {
60 disable_irq_nosync(IRQ_CONTX);
61 tx_enabled(port) = 0;
62 }
63}
64
65static void serial21285_start_tx(struct uart_port *port)
66{
67 if (!tx_enabled(port)) {
68 enable_irq(IRQ_CONTX);
69 tx_enabled(port) = 1;
70 }
71}
72
73static void serial21285_stop_rx(struct uart_port *port)
74{
75 if (rx_enabled(port)) {
76 disable_irq_nosync(IRQ_CONRX);
77 rx_enabled(port) = 0;
78 }
79}
80
81static void serial21285_enable_ms(struct uart_port *port)
82{
83}
84
85static irqreturn_t serial21285_rx_chars(int irq, void *dev_id)
86{
87 struct uart_port *port = dev_id;
88 struct tty_struct *tty = port->state->port.tty;
89 unsigned int status, ch, flag, rxs, max_count = 256;
90
91 status = *CSR_UARTFLG;
92 while (!(status & 0x10) && max_count--) {
93 ch = *CSR_UARTDR;
94 flag = TTY_NORMAL;
95 port->icount.rx++;
96
97 rxs = *CSR_RXSTAT | RXSTAT_DUMMY_READ;
98 if (unlikely(rxs & RXSTAT_ANYERR)) {
99 if (rxs & RXSTAT_PARITY)
100 port->icount.parity++;
101 else if (rxs & RXSTAT_FRAME)
102 port->icount.frame++;
103 if (rxs & RXSTAT_OVERRUN)
104 port->icount.overrun++;
105
106 rxs &= port->read_status_mask;
107
108 if (rxs & RXSTAT_PARITY)
109 flag = TTY_PARITY;
110 else if (rxs & RXSTAT_FRAME)
111 flag = TTY_FRAME;
112 }
113
114 uart_insert_char(port, rxs, RXSTAT_OVERRUN, ch, flag);
115
116 status = *CSR_UARTFLG;
117 }
118 tty_flip_buffer_push(tty);
119
120 return IRQ_HANDLED;
121}
122
123static irqreturn_t serial21285_tx_chars(int irq, void *dev_id)
124{
125 struct uart_port *port = dev_id;
126 struct circ_buf *xmit = &port->state->xmit;
127 int count = 256;
128
129 if (port->x_char) {
130 *CSR_UARTDR = port->x_char;
131 port->icount.tx++;
132 port->x_char = 0;
133 goto out;
134 }
135 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
136 serial21285_stop_tx(port);
137 goto out;
138 }
139
140 do {
141 *CSR_UARTDR = xmit->buf[xmit->tail];
142 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
143 port->icount.tx++;
144 if (uart_circ_empty(xmit))
145 break;
146 } while (--count > 0 && !(*CSR_UARTFLG & 0x20));
147
148 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
149 uart_write_wakeup(port);
150
151 if (uart_circ_empty(xmit))
152 serial21285_stop_tx(port);
153
154 out:
155 return IRQ_HANDLED;
156}
157
158static unsigned int serial21285_tx_empty(struct uart_port *port)
159{
160 return (*CSR_UARTFLG & 8) ? 0 : TIOCSER_TEMT;
161}
162
163/* no modem control lines */
164static unsigned int serial21285_get_mctrl(struct uart_port *port)
165{
166 return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
167}
168
169static void serial21285_set_mctrl(struct uart_port *port, unsigned int mctrl)
170{
171}
172
173static void serial21285_break_ctl(struct uart_port *port, int break_state)
174{
175 unsigned long flags;
176 unsigned int h_lcr;
177
178 spin_lock_irqsave(&port->lock, flags);
179 h_lcr = *CSR_H_UBRLCR;
180 if (break_state)
181 h_lcr |= H_UBRLCR_BREAK;
182 else
183 h_lcr &= ~H_UBRLCR_BREAK;
184 *CSR_H_UBRLCR = h_lcr;
185 spin_unlock_irqrestore(&port->lock, flags);
186}
187
188static int serial21285_startup(struct uart_port *port)
189{
190 int ret;
191
192 tx_enabled(port) = 1;
193 rx_enabled(port) = 1;
194
195 ret = request_irq(IRQ_CONRX, serial21285_rx_chars, 0,
196 serial21285_name, port);
197 if (ret == 0) {
198 ret = request_irq(IRQ_CONTX, serial21285_tx_chars, 0,
199 serial21285_name, port);
200 if (ret)
201 free_irq(IRQ_CONRX, port);
202 }
203
204 return ret;
205}
206
207static void serial21285_shutdown(struct uart_port *port)
208{
209 free_irq(IRQ_CONTX, port);
210 free_irq(IRQ_CONRX, port);
211}
212
213static void
214serial21285_set_termios(struct uart_port *port, struct ktermios *termios,
215 struct ktermios *old)
216{
217 unsigned long flags;
218 unsigned int baud, quot, h_lcr, b;
219
220 /*
221 * We don't support modem control lines.
222 */
223 termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR);
224 termios->c_cflag |= CLOCAL;
225
226 /*
227 * We don't support BREAK character recognition.
228 */
229 termios->c_iflag &= ~(IGNBRK | BRKINT);
230
231 /*
232 * Ask the core to calculate the divisor for us.
233 */
234 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
235 quot = uart_get_divisor(port, baud);
236 b = port->uartclk / (16 * quot);
237 tty_termios_encode_baud_rate(termios, b, b);
238
239 switch (termios->c_cflag & CSIZE) {
240 case CS5:
241 h_lcr = 0x00;
242 break;
243 case CS6:
244 h_lcr = 0x20;
245 break;
246 case CS7:
247 h_lcr = 0x40;
248 break;
249 default: /* CS8 */
250 h_lcr = 0x60;
251 break;
252 }
253
254 if (termios->c_cflag & CSTOPB)
255 h_lcr |= H_UBRLCR_STOPB;
256 if (termios->c_cflag & PARENB) {
257 h_lcr |= H_UBRLCR_PARENB;
258 if (!(termios->c_cflag & PARODD))
259 h_lcr |= H_UBRLCR_PAREVN;
260 }
261
262 if (port->fifosize)
263 h_lcr |= H_UBRLCR_FIFO;
264
265 spin_lock_irqsave(&port->lock, flags);
266
267 /*
268 * Update the per-port timeout.
269 */
270 uart_update_timeout(port, termios->c_cflag, baud);
271
272 /*
273 * Which character status flags are we interested in?
274 */
275 port->read_status_mask = RXSTAT_OVERRUN;
276 if (termios->c_iflag & INPCK)
277 port->read_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY;
278
279 /*
280 * Which character status flags should we ignore?
281 */
282 port->ignore_status_mask = 0;
283 if (termios->c_iflag & IGNPAR)
284 port->ignore_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY;
285 if (termios->c_iflag & IGNBRK && termios->c_iflag & IGNPAR)
286 port->ignore_status_mask |= RXSTAT_OVERRUN;
287
288 /*
289 * Ignore all characters if CREAD is not set.
290 */
291 if ((termios->c_cflag & CREAD) == 0)
292 port->ignore_status_mask |= RXSTAT_DUMMY_READ;
293
294 quot -= 1;
295
296 *CSR_UARTCON = 0;
297 *CSR_L_UBRLCR = quot & 0xff;
298 *CSR_M_UBRLCR = (quot >> 8) & 0x0f;
299 *CSR_H_UBRLCR = h_lcr;
300 *CSR_UARTCON = 1;
301
302 spin_unlock_irqrestore(&port->lock, flags);
303}
304
305static const char *serial21285_type(struct uart_port *port)
306{
307 return port->type == PORT_21285 ? "DC21285" : NULL;
308}
309
310static void serial21285_release_port(struct uart_port *port)
311{
312 release_mem_region(port->mapbase, 32);
313}
314
315static int serial21285_request_port(struct uart_port *port)
316{
317 return request_mem_region(port->mapbase, 32, serial21285_name)
318 != NULL ? 0 : -EBUSY;
319}
320
321static void serial21285_config_port(struct uart_port *port, int flags)
322{
323 if (flags & UART_CONFIG_TYPE && serial21285_request_port(port) == 0)
324 port->type = PORT_21285;
325}
326
327/*
328 * verify the new serial_struct (for TIOCSSERIAL).
329 */
330static int serial21285_verify_port(struct uart_port *port, struct serial_struct *ser)
331{
332 int ret = 0;
333 if (ser->type != PORT_UNKNOWN && ser->type != PORT_21285)
334 ret = -EINVAL;
335 if (ser->irq <= 0)
336 ret = -EINVAL;
337 if (ser->baud_base != port->uartclk / 16)
338 ret = -EINVAL;
339 return ret;
340}
341
342static struct uart_ops serial21285_ops = {
343 .tx_empty = serial21285_tx_empty,
344 .get_mctrl = serial21285_get_mctrl,
345 .set_mctrl = serial21285_set_mctrl,
346 .stop_tx = serial21285_stop_tx,
347 .start_tx = serial21285_start_tx,
348 .stop_rx = serial21285_stop_rx,
349 .enable_ms = serial21285_enable_ms,
350 .break_ctl = serial21285_break_ctl,
351 .startup = serial21285_startup,
352 .shutdown = serial21285_shutdown,
353 .set_termios = serial21285_set_termios,
354 .type = serial21285_type,
355 .release_port = serial21285_release_port,
356 .request_port = serial21285_request_port,
357 .config_port = serial21285_config_port,
358 .verify_port = serial21285_verify_port,
359};
360
361static struct uart_port serial21285_port = {
362 .mapbase = 0x42000160,
363 .iotype = UPIO_MEM,
364 .irq = 0,
365 .fifosize = 16,
366 .ops = &serial21285_ops,
367 .flags = UPF_BOOT_AUTOCONF,
368};
369
370static void serial21285_setup_ports(void)
371{
372 serial21285_port.uartclk = mem_fclk_21285 / 4;
373}
374
375#ifdef CONFIG_SERIAL_21285_CONSOLE
376static void serial21285_console_putchar(struct uart_port *port, int ch)
377{
378 while (*CSR_UARTFLG & 0x20)
379 barrier();
380 *CSR_UARTDR = ch;
381}
382
383static void
384serial21285_console_write(struct console *co, const char *s,
385 unsigned int count)
386{
387 uart_console_write(&serial21285_port, s, count, serial21285_console_putchar);
388}
389
390static void __init
391serial21285_get_options(struct uart_port *port, int *baud,
392 int *parity, int *bits)
393{
394 if (*CSR_UARTCON == 1) {
395 unsigned int tmp;
396
397 tmp = *CSR_H_UBRLCR;
398 switch (tmp & 0x60) {
399 case 0x00:
400 *bits = 5;
401 break;
402 case 0x20:
403 *bits = 6;
404 break;
405 case 0x40:
406 *bits = 7;
407 break;
408 default:
409 case 0x60:
410 *bits = 8;
411 break;
412 }
413
414 if (tmp & H_UBRLCR_PARENB) {
415 *parity = 'o';
416 if (tmp & H_UBRLCR_PAREVN)
417 *parity = 'e';
418 }
419
420 tmp = *CSR_L_UBRLCR | (*CSR_M_UBRLCR << 8);
421
422 *baud = port->uartclk / (16 * (tmp + 1));
423 }
424}
425
426static int __init serial21285_console_setup(struct console *co, char *options)
427{
428 struct uart_port *port = &serial21285_port;
429 int baud = 9600;
430 int bits = 8;
431 int parity = 'n';
432 int flow = 'n';
433
434 if (machine_is_personal_server())
435 baud = 57600;
436
437 /*
438 * Check whether an invalid uart number has been specified, and
439 * if so, search for the first available port that does have
440 * console support.
441 */
442 if (options)
443 uart_parse_options(options, &baud, &parity, &bits, &flow);
444 else
445 serial21285_get_options(port, &baud, &parity, &bits);
446
447 return uart_set_options(port, co, baud, parity, bits, flow);
448}
449
450static struct uart_driver serial21285_reg;
451
452static struct console serial21285_console =
453{
454 .name = SERIAL_21285_NAME,
455 .write = serial21285_console_write,
456 .device = uart_console_device,
457 .setup = serial21285_console_setup,
458 .flags = CON_PRINTBUFFER,
459 .index = -1,
460 .data = &serial21285_reg,
461};
462
463static int __init rs285_console_init(void)
464{
465 serial21285_setup_ports();
466 register_console(&serial21285_console);
467 return 0;
468}
469console_initcall(rs285_console_init);
470
471#define SERIAL_21285_CONSOLE &serial21285_console
472#else
473#define SERIAL_21285_CONSOLE NULL
474#endif
475
476static struct uart_driver serial21285_reg = {
477 .owner = THIS_MODULE,
478 .driver_name = "ttyFB",
479 .dev_name = "ttyFB",
480 .major = SERIAL_21285_MAJOR,
481 .minor = SERIAL_21285_MINOR,
482 .nr = 1,
483 .cons = SERIAL_21285_CONSOLE,
484};
485
486static int __init serial21285_init(void)
487{
488 int ret;
489
490 printk(KERN_INFO "Serial: 21285 driver\n");
491
492 serial21285_setup_ports();
493
494 ret = uart_register_driver(&serial21285_reg);
495 if (ret == 0)
496 uart_add_one_port(&serial21285_reg, &serial21285_port);
497
498 return ret;
499}
500
501static void __exit serial21285_exit(void)
502{
503 uart_remove_one_port(&serial21285_reg, &serial21285_port);
504 uart_unregister_driver(&serial21285_reg);
505}
506
507module_init(serial21285_init);
508module_exit(serial21285_exit);
509
510MODULE_LICENSE("GPL");
511MODULE_DESCRIPTION("Intel Footbridge (21285) serial driver");
512MODULE_ALIAS_CHARDEV(SERIAL_21285_MAJOR, SERIAL_21285_MINOR);