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1/*
2 * Copyright 2007-2008 Nouveau Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24#ifndef __NOUVEAU_DISPBIOS_H__
25#define __NOUVEAU_DISPBIOS_H__
26
27#define DCB_MAX_NUM_ENTRIES 16
28#define DCB_MAX_NUM_I2C_ENTRIES 16
29#define DCB_MAX_NUM_GPIO_ENTRIES 32
30#define DCB_MAX_NUM_CONNECTOR_ENTRIES 16
31
32#define DCB_LOC_ON_CHIP 0
33
34#define ROM16(x) get_unaligned_le16(&(x))
35#define ROM32(x) get_unaligned_le32(&(x))
36#define ROMPTR(d,x) ({ \
37 struct nouveau_drm *drm = nouveau_drm((d)); \
38 ROM16(x) ? &drm->vbios.data[ROM16(x)] : NULL; \
39})
40
41struct bit_entry {
42 uint8_t id;
43 uint8_t version;
44 uint16_t length;
45 uint16_t offset;
46 uint8_t *data;
47};
48
49int bit_table(struct drm_device *, u8 id, struct bit_entry *);
50
51#include <subdev/bios/dcb.h>
52#include <subdev/bios/conn.h>
53
54struct dcb_table {
55 uint8_t version;
56 int entries;
57 struct dcb_output entry[DCB_MAX_NUM_ENTRIES];
58};
59
60enum nouveau_or {
61 DCB_OUTPUT_A = (1 << 0),
62 DCB_OUTPUT_B = (1 << 1),
63 DCB_OUTPUT_C = (1 << 2)
64};
65
66enum LVDS_script {
67 /* Order *does* matter here */
68 LVDS_INIT = 1,
69 LVDS_RESET,
70 LVDS_BACKLIGHT_ON,
71 LVDS_BACKLIGHT_OFF,
72 LVDS_PANEL_ON,
73 LVDS_PANEL_OFF
74};
75
76struct nvbios {
77 struct drm_device *dev;
78 enum {
79 NVBIOS_BMP,
80 NVBIOS_BIT
81 } type;
82 uint16_t offset;
83 uint32_t length;
84 uint8_t *data;
85
86 uint8_t chip_version;
87
88 uint32_t dactestval;
89 uint32_t tvdactestval;
90 uint8_t digital_min_front_porch;
91 bool fp_no_ddc;
92
93 spinlock_t lock;
94
95 bool execute;
96
97 uint8_t major_version;
98 uint8_t feature_byte;
99 bool is_mobile;
100
101 uint32_t fmaxvco, fminvco;
102
103 bool old_style_init;
104 uint16_t init_script_tbls_ptr;
105 uint16_t extra_init_script_tbl_ptr;
106
107 uint16_t ram_restrict_tbl_ptr;
108 uint8_t ram_restrict_group_count;
109
110 struct dcb_table dcb;
111
112 struct {
113 int crtchead;
114 } state;
115
116 struct {
117 uint16_t fptablepointer; /* also used by tmds */
118 uint16_t fpxlatetableptr;
119 int xlatwidth;
120 uint16_t lvdsmanufacturerpointer;
121 uint16_t fpxlatemanufacturertableptr;
122 uint16_t mode_ptr;
123 uint16_t xlated_entry;
124 bool power_off_for_reset;
125 bool reset_after_pclk_change;
126 bool dual_link;
127 bool link_c_increment;
128 bool if_is_24bit;
129 int duallink_transition_clk;
130 uint8_t strapless_is_24bit;
131 uint8_t *edid;
132
133 /* will need resetting after suspend */
134 int last_script_invoc;
135 bool lvds_init_run;
136 } fp;
137
138 struct {
139 uint16_t output0_script_ptr;
140 uint16_t output1_script_ptr;
141 } tmds;
142
143 struct {
144 uint16_t mem_init_tbl_ptr;
145 uint16_t sdr_seq_tbl_ptr;
146 uint16_t ddr_seq_tbl_ptr;
147
148 struct {
149 uint8_t crt, tv, panel;
150 } i2c_indices;
151
152 uint16_t lvds_single_a_script_ptr;
153 } legacy;
154};
155
156void *olddcb_table(struct drm_device *);
157void *olddcb_outp(struct drm_device *, u8 idx);
158int olddcb_outp_foreach(struct drm_device *, void *data,
159 int (*)(struct drm_device *, void *, int idx, u8 *outp));
160u8 *olddcb_conntab(struct drm_device *);
161u8 *olddcb_conn(struct drm_device *, u8 idx);
162
163int nouveau_bios_init(struct drm_device *);
164void nouveau_bios_takedown(struct drm_device *dev);
165int nouveau_run_vbios_init(struct drm_device *);
166struct dcb_connector_table_entry *
167nouveau_bios_connector_entry(struct drm_device *, int index);
168bool nouveau_bios_fp_mode(struct drm_device *, struct drm_display_mode *);
169uint8_t *nouveau_bios_embedded_edid(struct drm_device *);
170int nouveau_bios_parse_lvds_table(struct drm_device *, int pxclk,
171 bool *dl, bool *if_is_24bit);
172int run_tmds_table(struct drm_device *, struct dcb_output *,
173 int head, int pxclk);
174int call_lvds_script(struct drm_device *, struct dcb_output *, int head,
175 enum LVDS_script, int pxclk);
176
177#endif
1/*
2 * Copyright 2007-2008 Nouveau Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24#ifndef __NOUVEAU_BIOS_H__
25#define __NOUVEAU_BIOS_H__
26
27#include "nvreg.h"
28#include "nouveau_i2c.h"
29
30#define DCB_MAX_NUM_ENTRIES 16
31#define DCB_MAX_NUM_I2C_ENTRIES 16
32#define DCB_MAX_NUM_GPIO_ENTRIES 32
33#define DCB_MAX_NUM_CONNECTOR_ENTRIES 16
34
35#define DCB_LOC_ON_CHIP 0
36
37#define ROM16(x) le16_to_cpu(*(u16 *)&(x))
38#define ROM32(x) le32_to_cpu(*(u32 *)&(x))
39#define ROM48(x) ({ u8 *p = &(x); (u64)ROM16(p[4]) << 32 | ROM32(p[0]); })
40#define ROM64(x) le64_to_cpu(*(u64 *)&(x))
41#define ROMPTR(d,x) ({ \
42 struct drm_nouveau_private *dev_priv = (d)->dev_private; \
43 ROM16(x) ? &dev_priv->vbios.data[ROM16(x)] : NULL; \
44})
45
46struct bit_entry {
47 uint8_t id;
48 uint8_t version;
49 uint16_t length;
50 uint16_t offset;
51 uint8_t *data;
52};
53
54int bit_table(struct drm_device *, u8 id, struct bit_entry *);
55
56enum dcb_gpio_tag {
57 DCB_GPIO_PANEL_POWER = 0x01,
58 DCB_GPIO_TVDAC0 = 0x0c,
59 DCB_GPIO_TVDAC1 = 0x2d,
60 DCB_GPIO_PWM_FAN = 0x09,
61 DCB_GPIO_FAN_SENSE = 0x3d,
62 DCB_GPIO_UNUSED = 0xff
63};
64
65enum dcb_connector_type {
66 DCB_CONNECTOR_VGA = 0x00,
67 DCB_CONNECTOR_TV_0 = 0x10,
68 DCB_CONNECTOR_TV_1 = 0x11,
69 DCB_CONNECTOR_TV_3 = 0x13,
70 DCB_CONNECTOR_DVI_I = 0x30,
71 DCB_CONNECTOR_DVI_D = 0x31,
72 DCB_CONNECTOR_DMS59_0 = 0x38,
73 DCB_CONNECTOR_DMS59_1 = 0x39,
74 DCB_CONNECTOR_LVDS = 0x40,
75 DCB_CONNECTOR_LVDS_SPWG = 0x41,
76 DCB_CONNECTOR_DP = 0x46,
77 DCB_CONNECTOR_eDP = 0x47,
78 DCB_CONNECTOR_HDMI_0 = 0x60,
79 DCB_CONNECTOR_HDMI_1 = 0x61,
80 DCB_CONNECTOR_DMS59_DP0 = 0x64,
81 DCB_CONNECTOR_DMS59_DP1 = 0x65,
82 DCB_CONNECTOR_NONE = 0xff
83};
84
85enum dcb_type {
86 OUTPUT_ANALOG = 0,
87 OUTPUT_TV = 1,
88 OUTPUT_TMDS = 2,
89 OUTPUT_LVDS = 3,
90 OUTPUT_DP = 6,
91 OUTPUT_EOL = 14, /* DCB 4.0+, appears to be end-of-list */
92 OUTPUT_UNUSED = 15,
93 OUTPUT_ANY = -1
94};
95
96struct dcb_entry {
97 int index; /* may not be raw dcb index if merging has happened */
98 enum dcb_type type;
99 uint8_t i2c_index;
100 uint8_t heads;
101 uint8_t connector;
102 uint8_t bus;
103 uint8_t location;
104 uint8_t or;
105 bool duallink_possible;
106 union {
107 struct sor_conf {
108 int link;
109 } sorconf;
110 struct {
111 int maxfreq;
112 } crtconf;
113 struct {
114 struct sor_conf sor;
115 bool use_straps_for_mode;
116 bool use_acpi_for_edid;
117 bool use_power_scripts;
118 } lvdsconf;
119 struct {
120 bool has_component_output;
121 } tvconf;
122 struct {
123 struct sor_conf sor;
124 int link_nr;
125 int link_bw;
126 } dpconf;
127 struct {
128 struct sor_conf sor;
129 int slave_addr;
130 } tmdsconf;
131 };
132 bool i2c_upper_default;
133};
134
135struct dcb_table {
136 uint8_t version;
137 int entries;
138 struct dcb_entry entry[DCB_MAX_NUM_ENTRIES];
139};
140
141enum nouveau_or {
142 OUTPUT_A = (1 << 0),
143 OUTPUT_B = (1 << 1),
144 OUTPUT_C = (1 << 2)
145};
146
147enum LVDS_script {
148 /* Order *does* matter here */
149 LVDS_INIT = 1,
150 LVDS_RESET,
151 LVDS_BACKLIGHT_ON,
152 LVDS_BACKLIGHT_OFF,
153 LVDS_PANEL_ON,
154 LVDS_PANEL_OFF
155};
156
157/* these match types in pll limits table version 0x40,
158 * nouveau uses them on all chipsets internally where a
159 * specific pll needs to be referenced, but the exact
160 * register isn't known.
161 */
162enum pll_types {
163 PLL_CORE = 0x01,
164 PLL_SHADER = 0x02,
165 PLL_UNK03 = 0x03,
166 PLL_MEMORY = 0x04,
167 PLL_VDEC = 0x05,
168 PLL_UNK40 = 0x40,
169 PLL_UNK41 = 0x41,
170 PLL_UNK42 = 0x42,
171 PLL_VPLL0 = 0x80,
172 PLL_VPLL1 = 0x81,
173 PLL_MAX = 0xff
174};
175
176struct pll_lims {
177 u32 reg;
178
179 struct {
180 int minfreq;
181 int maxfreq;
182 int min_inputfreq;
183 int max_inputfreq;
184
185 uint8_t min_m;
186 uint8_t max_m;
187 uint8_t min_n;
188 uint8_t max_n;
189 } vco1, vco2;
190
191 uint8_t max_log2p;
192 /*
193 * for most pre nv50 cards setting a log2P of 7 (the common max_log2p
194 * value) is no different to 6 (at least for vplls) so allowing the MNP
195 * calc to use 7 causes the generated clock to be out by a factor of 2.
196 * however, max_log2p cannot be fixed-up during parsing as the
197 * unmodified max_log2p value is still needed for setting mplls, hence
198 * an additional max_usable_log2p member
199 */
200 uint8_t max_usable_log2p;
201 uint8_t log2p_bias;
202
203 uint8_t min_p;
204 uint8_t max_p;
205
206 int refclk;
207};
208
209struct nvbios {
210 struct drm_device *dev;
211 enum {
212 NVBIOS_BMP,
213 NVBIOS_BIT
214 } type;
215 uint16_t offset;
216 uint32_t length;
217 uint8_t *data;
218
219 uint8_t chip_version;
220
221 uint32_t dactestval;
222 uint32_t tvdactestval;
223 uint8_t digital_min_front_porch;
224 bool fp_no_ddc;
225
226 spinlock_t lock;
227
228 bool execute;
229
230 uint8_t major_version;
231 uint8_t feature_byte;
232 bool is_mobile;
233
234 uint32_t fmaxvco, fminvco;
235
236 bool old_style_init;
237 uint16_t init_script_tbls_ptr;
238 uint16_t extra_init_script_tbl_ptr;
239 uint16_t macro_index_tbl_ptr;
240 uint16_t macro_tbl_ptr;
241 uint16_t condition_tbl_ptr;
242 uint16_t io_condition_tbl_ptr;
243 uint16_t io_flag_condition_tbl_ptr;
244 uint16_t init_function_tbl_ptr;
245
246 uint16_t pll_limit_tbl_ptr;
247 uint16_t ram_restrict_tbl_ptr;
248 uint8_t ram_restrict_group_count;
249
250 uint16_t some_script_ptr; /* BIT I + 14 */
251 uint16_t init96_tbl_ptr; /* BIT I + 16 */
252
253 struct dcb_table dcb;
254
255 struct {
256 int crtchead;
257 } state;
258
259 struct {
260 struct dcb_entry *output;
261 int crtc;
262 uint16_t script_table_ptr;
263 } display;
264
265 struct {
266 uint16_t fptablepointer; /* also used by tmds */
267 uint16_t fpxlatetableptr;
268 int xlatwidth;
269 uint16_t lvdsmanufacturerpointer;
270 uint16_t fpxlatemanufacturertableptr;
271 uint16_t mode_ptr;
272 uint16_t xlated_entry;
273 bool power_off_for_reset;
274 bool reset_after_pclk_change;
275 bool dual_link;
276 bool link_c_increment;
277 bool if_is_24bit;
278 int duallink_transition_clk;
279 uint8_t strapless_is_24bit;
280 uint8_t *edid;
281
282 /* will need resetting after suspend */
283 int last_script_invoc;
284 bool lvds_init_run;
285 } fp;
286
287 struct {
288 uint16_t output0_script_ptr;
289 uint16_t output1_script_ptr;
290 } tmds;
291
292 struct {
293 uint16_t mem_init_tbl_ptr;
294 uint16_t sdr_seq_tbl_ptr;
295 uint16_t ddr_seq_tbl_ptr;
296
297 struct {
298 uint8_t crt, tv, panel;
299 } i2c_indices;
300
301 uint16_t lvds_single_a_script_ptr;
302 } legacy;
303};
304
305void *dcb_table(struct drm_device *);
306void *dcb_outp(struct drm_device *, u8 idx);
307int dcb_outp_foreach(struct drm_device *, void *data,
308 int (*)(struct drm_device *, void *, int idx, u8 *outp));
309u8 *dcb_conntab(struct drm_device *);
310u8 *dcb_conn(struct drm_device *, u8 idx);
311
312#endif