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1// SPDX-License-Identifier: GPL-2.0-only
2/**
3 * imr.c -- Intel Isolated Memory Region driver
4 *
5 * Copyright(c) 2013 Intel Corporation.
6 * Copyright(c) 2015 Bryan O'Donoghue <pure.logic@nexus-software.ie>
7 *
8 * IMR registers define an isolated region of memory that can
9 * be masked to prohibit certain system agents from accessing memory.
10 * When a device behind a masked port performs an access - snooped or
11 * not, an IMR may optionally prevent that transaction from changing
12 * the state of memory or from getting correct data in response to the
13 * operation.
14 *
15 * Write data will be dropped and reads will return 0xFFFFFFFF, the
16 * system will reset and system BIOS will print out an error message to
17 * inform the user that an IMR has been violated.
18 *
19 * This code is based on the Linux MTRR code and reference code from
20 * Intel's Quark BSP EFI, Linux and grub code.
21 *
22 * See quark-x1000-datasheet.pdf for register definitions.
23 * http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/quark-x1000-datasheet.pdf
24 */
25
26#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27
28#include <asm-generic/sections.h>
29#include <asm/cpu_device_id.h>
30#include <asm/imr.h>
31#include <asm/iosf_mbi.h>
32#include <linux/debugfs.h>
33#include <linux/init.h>
34#include <linux/mm.h>
35#include <linux/types.h>
36
37struct imr_device {
38 bool init;
39 struct mutex lock;
40 int max_imr;
41 int reg_base;
42};
43
44static struct imr_device imr_dev;
45
46/*
47 * IMR read/write mask control registers.
48 * See quark-x1000-datasheet.pdf sections 12.7.4.5 and 12.7.4.6 for
49 * bit definitions.
50 *
51 * addr_hi
52 * 31 Lock bit
53 * 30:24 Reserved
54 * 23:2 1 KiB aligned lo address
55 * 1:0 Reserved
56 *
57 * addr_hi
58 * 31:24 Reserved
59 * 23:2 1 KiB aligned hi address
60 * 1:0 Reserved
61 */
62#define IMR_LOCK BIT(31)
63
64struct imr_regs {
65 u32 addr_lo;
66 u32 addr_hi;
67 u32 rmask;
68 u32 wmask;
69};
70
71#define IMR_NUM_REGS (sizeof(struct imr_regs)/sizeof(u32))
72#define IMR_SHIFT 8
73#define imr_to_phys(x) ((x) << IMR_SHIFT)
74#define phys_to_imr(x) ((x) >> IMR_SHIFT)
75
76/**
77 * imr_is_enabled - true if an IMR is enabled false otherwise.
78 *
79 * Determines if an IMR is enabled based on address range and read/write
80 * mask. An IMR set with an address range set to zero and a read/write
81 * access mask set to all is considered to be disabled. An IMR in any
82 * other state - for example set to zero but without read/write access
83 * all is considered to be enabled. This definition of disabled is how
84 * firmware switches off an IMR and is maintained in kernel for
85 * consistency.
86 *
87 * @imr: pointer to IMR descriptor.
88 * @return: true if IMR enabled false if disabled.
89 */
90static inline int imr_is_enabled(struct imr_regs *imr)
91{
92 return !(imr->rmask == IMR_READ_ACCESS_ALL &&
93 imr->wmask == IMR_WRITE_ACCESS_ALL &&
94 imr_to_phys(imr->addr_lo) == 0 &&
95 imr_to_phys(imr->addr_hi) == 0);
96}
97
98/**
99 * imr_read - read an IMR at a given index.
100 *
101 * Requires caller to hold imr mutex.
102 *
103 * @idev: pointer to imr_device structure.
104 * @imr_id: IMR entry to read.
105 * @imr: IMR structure representing address and access masks.
106 * @return: 0 on success or error code passed from mbi_iosf on failure.
107 */
108static int imr_read(struct imr_device *idev, u32 imr_id, struct imr_regs *imr)
109{
110 u32 reg = imr_id * IMR_NUM_REGS + idev->reg_base;
111 int ret;
112
113 ret = iosf_mbi_read(QRK_MBI_UNIT_MM, MBI_REG_READ, reg++, &imr->addr_lo);
114 if (ret)
115 return ret;
116
117 ret = iosf_mbi_read(QRK_MBI_UNIT_MM, MBI_REG_READ, reg++, &imr->addr_hi);
118 if (ret)
119 return ret;
120
121 ret = iosf_mbi_read(QRK_MBI_UNIT_MM, MBI_REG_READ, reg++, &imr->rmask);
122 if (ret)
123 return ret;
124
125 return iosf_mbi_read(QRK_MBI_UNIT_MM, MBI_REG_READ, reg++, &imr->wmask);
126}
127
128/**
129 * imr_write - write an IMR at a given index.
130 *
131 * Requires caller to hold imr mutex.
132 * Note lock bits need to be written independently of address bits.
133 *
134 * @idev: pointer to imr_device structure.
135 * @imr_id: IMR entry to write.
136 * @imr: IMR structure representing address and access masks.
137 * @return: 0 on success or error code passed from mbi_iosf on failure.
138 */
139static int imr_write(struct imr_device *idev, u32 imr_id, struct imr_regs *imr)
140{
141 unsigned long flags;
142 u32 reg = imr_id * IMR_NUM_REGS + idev->reg_base;
143 int ret;
144
145 local_irq_save(flags);
146
147 ret = iosf_mbi_write(QRK_MBI_UNIT_MM, MBI_REG_WRITE, reg++, imr->addr_lo);
148 if (ret)
149 goto failed;
150
151 ret = iosf_mbi_write(QRK_MBI_UNIT_MM, MBI_REG_WRITE, reg++, imr->addr_hi);
152 if (ret)
153 goto failed;
154
155 ret = iosf_mbi_write(QRK_MBI_UNIT_MM, MBI_REG_WRITE, reg++, imr->rmask);
156 if (ret)
157 goto failed;
158
159 ret = iosf_mbi_write(QRK_MBI_UNIT_MM, MBI_REG_WRITE, reg++, imr->wmask);
160 if (ret)
161 goto failed;
162
163 local_irq_restore(flags);
164 return 0;
165failed:
166 /*
167 * If writing to the IOSF failed then we're in an unknown state,
168 * likely a very bad state. An IMR in an invalid state will almost
169 * certainly lead to a memory access violation.
170 */
171 local_irq_restore(flags);
172 WARN(ret, "IOSF-MBI write fail range 0x%08x-0x%08x unreliable\n",
173 imr_to_phys(imr->addr_lo), imr_to_phys(imr->addr_hi) + IMR_MASK);
174
175 return ret;
176}
177
178/**
179 * imr_dbgfs_state_show - print state of IMR registers.
180 *
181 * @s: pointer to seq_file for output.
182 * @unused: unused parameter.
183 * @return: 0 on success or error code passed from mbi_iosf on failure.
184 */
185static int imr_dbgfs_state_show(struct seq_file *s, void *unused)
186{
187 phys_addr_t base;
188 phys_addr_t end;
189 int i;
190 struct imr_device *idev = s->private;
191 struct imr_regs imr;
192 size_t size;
193 int ret = -ENODEV;
194
195 mutex_lock(&idev->lock);
196
197 for (i = 0; i < idev->max_imr; i++) {
198
199 ret = imr_read(idev, i, &imr);
200 if (ret)
201 break;
202
203 /*
204 * Remember to add IMR_ALIGN bytes to size to indicate the
205 * inherent IMR_ALIGN size bytes contained in the masked away
206 * lower ten bits.
207 */
208 if (imr_is_enabled(&imr)) {
209 base = imr_to_phys(imr.addr_lo);
210 end = imr_to_phys(imr.addr_hi) + IMR_MASK;
211 size = end - base + 1;
212 } else {
213 base = 0;
214 end = 0;
215 size = 0;
216 }
217 seq_printf(s, "imr%02i: base=%pa, end=%pa, size=0x%08zx "
218 "rmask=0x%08x, wmask=0x%08x, %s, %s\n", i,
219 &base, &end, size, imr.rmask, imr.wmask,
220 imr_is_enabled(&imr) ? "enabled " : "disabled",
221 imr.addr_lo & IMR_LOCK ? "locked" : "unlocked");
222 }
223
224 mutex_unlock(&idev->lock);
225 return ret;
226}
227DEFINE_SHOW_ATTRIBUTE(imr_dbgfs_state);
228
229/**
230 * imr_debugfs_register - register debugfs hooks.
231 *
232 * @idev: pointer to imr_device structure.
233 */
234static void imr_debugfs_register(struct imr_device *idev)
235{
236 debugfs_create_file("imr_state", 0444, NULL, idev,
237 &imr_dbgfs_state_fops);
238}
239
240/**
241 * imr_check_params - check passed address range IMR alignment and non-zero size
242 *
243 * @base: base address of intended IMR.
244 * @size: size of intended IMR.
245 * @return: zero on valid range -EINVAL on unaligned base/size.
246 */
247static int imr_check_params(phys_addr_t base, size_t size)
248{
249 if ((base & IMR_MASK) || (size & IMR_MASK)) {
250 pr_err("base %pa size 0x%08zx must align to 1KiB\n",
251 &base, size);
252 return -EINVAL;
253 }
254 if (size == 0)
255 return -EINVAL;
256
257 return 0;
258}
259
260/**
261 * imr_raw_size - account for the IMR_ALIGN bytes that addr_hi appends.
262 *
263 * IMR addr_hi has a built in offset of plus IMR_ALIGN (0x400) bytes from the
264 * value in the register. We need to subtract IMR_ALIGN bytes from input sizes
265 * as a result.
266 *
267 * @size: input size bytes.
268 * @return: reduced size.
269 */
270static inline size_t imr_raw_size(size_t size)
271{
272 return size - IMR_ALIGN;
273}
274
275/**
276 * imr_address_overlap - detects an address overlap.
277 *
278 * @addr: address to check against an existing IMR.
279 * @imr: imr being checked.
280 * @return: true for overlap false for no overlap.
281 */
282static inline int imr_address_overlap(phys_addr_t addr, struct imr_regs *imr)
283{
284 return addr >= imr_to_phys(imr->addr_lo) && addr <= imr_to_phys(imr->addr_hi);
285}
286
287/**
288 * imr_add_range - add an Isolated Memory Region.
289 *
290 * @base: physical base address of region aligned to 1KiB.
291 * @size: physical size of region in bytes must be aligned to 1KiB.
292 * @read_mask: read access mask.
293 * @write_mask: write access mask.
294 * @return: zero on success or negative value indicating error.
295 */
296int imr_add_range(phys_addr_t base, size_t size,
297 unsigned int rmask, unsigned int wmask)
298{
299 phys_addr_t end;
300 unsigned int i;
301 struct imr_device *idev = &imr_dev;
302 struct imr_regs imr;
303 size_t raw_size;
304 int reg;
305 int ret;
306
307 if (WARN_ONCE(idev->init == false, "driver not initialized"))
308 return -ENODEV;
309
310 ret = imr_check_params(base, size);
311 if (ret)
312 return ret;
313
314 /* Tweak the size value. */
315 raw_size = imr_raw_size(size);
316 end = base + raw_size;
317
318 /*
319 * Check for reserved IMR value common to firmware, kernel and grub
320 * indicating a disabled IMR.
321 */
322 imr.addr_lo = phys_to_imr(base);
323 imr.addr_hi = phys_to_imr(end);
324 imr.rmask = rmask;
325 imr.wmask = wmask;
326 if (!imr_is_enabled(&imr))
327 return -ENOTSUPP;
328
329 mutex_lock(&idev->lock);
330
331 /*
332 * Find a free IMR while checking for an existing overlapping range.
333 * Note there's no restriction in silicon to prevent IMR overlaps.
334 * For the sake of simplicity and ease in defining/debugging an IMR
335 * memory map we exclude IMR overlaps.
336 */
337 reg = -1;
338 for (i = 0; i < idev->max_imr; i++) {
339 ret = imr_read(idev, i, &imr);
340 if (ret)
341 goto failed;
342
343 /* Find overlap @ base or end of requested range. */
344 ret = -EINVAL;
345 if (imr_is_enabled(&imr)) {
346 if (imr_address_overlap(base, &imr))
347 goto failed;
348 if (imr_address_overlap(end, &imr))
349 goto failed;
350 } else {
351 reg = i;
352 }
353 }
354
355 /* Error out if we have no free IMR entries. */
356 if (reg == -1) {
357 ret = -ENOMEM;
358 goto failed;
359 }
360
361 pr_debug("add %d phys %pa-%pa size %zx mask 0x%08x wmask 0x%08x\n",
362 reg, &base, &end, raw_size, rmask, wmask);
363
364 /* Enable IMR at specified range and access mask. */
365 imr.addr_lo = phys_to_imr(base);
366 imr.addr_hi = phys_to_imr(end);
367 imr.rmask = rmask;
368 imr.wmask = wmask;
369
370 ret = imr_write(idev, reg, &imr);
371 if (ret < 0) {
372 /*
373 * In the highly unlikely event iosf_mbi_write failed
374 * attempt to rollback the IMR setup skipping the trapping
375 * of further IOSF write failures.
376 */
377 imr.addr_lo = 0;
378 imr.addr_hi = 0;
379 imr.rmask = IMR_READ_ACCESS_ALL;
380 imr.wmask = IMR_WRITE_ACCESS_ALL;
381 imr_write(idev, reg, &imr);
382 }
383failed:
384 mutex_unlock(&idev->lock);
385 return ret;
386}
387EXPORT_SYMBOL_GPL(imr_add_range);
388
389/**
390 * __imr_remove_range - delete an Isolated Memory Region.
391 *
392 * This function allows you to delete an IMR by its index specified by reg or
393 * by address range specified by base and size respectively. If you specify an
394 * index on its own the base and size parameters are ignored.
395 * imr_remove_range(0, base, size); delete IMR at index 0 base/size ignored.
396 * imr_remove_range(-1, base, size); delete IMR from base to base+size.
397 *
398 * @reg: imr index to remove.
399 * @base: physical base address of region aligned to 1 KiB.
400 * @size: physical size of region in bytes aligned to 1 KiB.
401 * @return: -EINVAL on invalid range or out or range id
402 * -ENODEV if reg is valid but no IMR exists or is locked
403 * 0 on success.
404 */
405static int __imr_remove_range(int reg, phys_addr_t base, size_t size)
406{
407 phys_addr_t end;
408 bool found = false;
409 unsigned int i;
410 struct imr_device *idev = &imr_dev;
411 struct imr_regs imr;
412 size_t raw_size;
413 int ret = 0;
414
415 if (WARN_ONCE(idev->init == false, "driver not initialized"))
416 return -ENODEV;
417
418 /*
419 * Validate address range if deleting by address, else we are
420 * deleting by index where base and size will be ignored.
421 */
422 if (reg == -1) {
423 ret = imr_check_params(base, size);
424 if (ret)
425 return ret;
426 }
427
428 /* Tweak the size value. */
429 raw_size = imr_raw_size(size);
430 end = base + raw_size;
431
432 mutex_lock(&idev->lock);
433
434 if (reg >= 0) {
435 /* If a specific IMR is given try to use it. */
436 ret = imr_read(idev, reg, &imr);
437 if (ret)
438 goto failed;
439
440 if (!imr_is_enabled(&imr) || imr.addr_lo & IMR_LOCK) {
441 ret = -ENODEV;
442 goto failed;
443 }
444 found = true;
445 } else {
446 /* Search for match based on address range. */
447 for (i = 0; i < idev->max_imr; i++) {
448 ret = imr_read(idev, i, &imr);
449 if (ret)
450 goto failed;
451
452 if (!imr_is_enabled(&imr) || imr.addr_lo & IMR_LOCK)
453 continue;
454
455 if ((imr_to_phys(imr.addr_lo) == base) &&
456 (imr_to_phys(imr.addr_hi) == end)) {
457 found = true;
458 reg = i;
459 break;
460 }
461 }
462 }
463
464 if (!found) {
465 ret = -ENODEV;
466 goto failed;
467 }
468
469 pr_debug("remove %d phys %pa-%pa size %zx\n", reg, &base, &end, raw_size);
470
471 /* Tear down the IMR. */
472 imr.addr_lo = 0;
473 imr.addr_hi = 0;
474 imr.rmask = IMR_READ_ACCESS_ALL;
475 imr.wmask = IMR_WRITE_ACCESS_ALL;
476
477 ret = imr_write(idev, reg, &imr);
478
479failed:
480 mutex_unlock(&idev->lock);
481 return ret;
482}
483
484/**
485 * imr_remove_range - delete an Isolated Memory Region by address
486 *
487 * This function allows you to delete an IMR by an address range specified
488 * by base and size respectively.
489 * imr_remove_range(base, size); delete IMR from base to base+size.
490 *
491 * @base: physical base address of region aligned to 1 KiB.
492 * @size: physical size of region in bytes aligned to 1 KiB.
493 * @return: -EINVAL on invalid range or out or range id
494 * -ENODEV if reg is valid but no IMR exists or is locked
495 * 0 on success.
496 */
497int imr_remove_range(phys_addr_t base, size_t size)
498{
499 return __imr_remove_range(-1, base, size);
500}
501EXPORT_SYMBOL_GPL(imr_remove_range);
502
503/**
504 * imr_clear - delete an Isolated Memory Region by index
505 *
506 * This function allows you to delete an IMR by an address range specified
507 * by the index of the IMR. Useful for initial sanitization of the IMR
508 * address map.
509 * imr_ge(base, size); delete IMR from base to base+size.
510 *
511 * @reg: imr index to remove.
512 * @return: -EINVAL on invalid range or out or range id
513 * -ENODEV if reg is valid but no IMR exists or is locked
514 * 0 on success.
515 */
516static inline int imr_clear(int reg)
517{
518 return __imr_remove_range(reg, 0, 0);
519}
520
521/**
522 * imr_fixup_memmap - Tear down IMRs used during bootup.
523 *
524 * BIOS and Grub both setup IMRs around compressed kernel, initrd memory
525 * that need to be removed before the kernel hands out one of the IMR
526 * encased addresses to a downstream DMA agent such as the SD or Ethernet.
527 * IMRs on Galileo are setup to immediately reset the system on violation.
528 * As a result if you're running a root filesystem from SD - you'll need
529 * the boot-time IMRs torn down or you'll find seemingly random resets when
530 * using your filesystem.
531 *
532 * @idev: pointer to imr_device structure.
533 * @return:
534 */
535static void __init imr_fixup_memmap(struct imr_device *idev)
536{
537 phys_addr_t base = virt_to_phys(&_text);
538 size_t size = virt_to_phys(&__end_rodata) - base;
539 unsigned long start, end;
540 int i;
541 int ret;
542
543 /* Tear down all existing unlocked IMRs. */
544 for (i = 0; i < idev->max_imr; i++)
545 imr_clear(i);
546
547 start = (unsigned long)_text;
548 end = (unsigned long)__end_rodata - 1;
549
550 /*
551 * Setup an unlocked IMR around the physical extent of the kernel
552 * from the beginning of the .text secton to the end of the
553 * .rodata section as one physically contiguous block.
554 *
555 * We don't round up @size since it is already PAGE_SIZE aligned.
556 * See vmlinux.lds.S for details.
557 */
558 ret = imr_add_range(base, size, IMR_CPU, IMR_CPU);
559 if (ret < 0) {
560 pr_err("unable to setup IMR for kernel: %zu KiB (%lx - %lx)\n",
561 size / 1024, start, end);
562 } else {
563 pr_info("protecting kernel .text - .rodata: %zu KiB (%lx - %lx)\n",
564 size / 1024, start, end);
565 }
566
567}
568
569static const struct x86_cpu_id imr_ids[] __initconst = {
570 { X86_VENDOR_INTEL, 5, 9 }, /* Intel Quark SoC X1000. */
571 {}
572};
573
574/**
575 * imr_init - entry point for IMR driver.
576 *
577 * return: -ENODEV for no IMR support 0 if good to go.
578 */
579static int __init imr_init(void)
580{
581 struct imr_device *idev = &imr_dev;
582
583 if (!x86_match_cpu(imr_ids) || !iosf_mbi_available())
584 return -ENODEV;
585
586 idev->max_imr = QUARK_X1000_IMR_MAX;
587 idev->reg_base = QUARK_X1000_IMR_REGBASE;
588 idev->init = true;
589
590 mutex_init(&idev->lock);
591 imr_debugfs_register(idev);
592 imr_fixup_memmap(idev);
593 return 0;
594}
595device_initcall(imr_init);