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v5.4
  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * OpenRISC setup.c
  4 *
  5 * Linux architectural port borrowing liberally from similar works of
  6 * others.  All original copyrights apply as per the original source
  7 * declaration.
  8 *
  9 * Modifications for the OpenRISC architecture:
 10 * Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
 11 * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
 12 *
 
 
 
 
 
 13 * This file handles the architecture-dependent parts of initialization
 14 */
 15
 16#include <linux/errno.h>
 17#include <linux/sched.h>
 18#include <linux/kernel.h>
 19#include <linux/mm.h>
 20#include <linux/stddef.h>
 21#include <linux/unistd.h>
 22#include <linux/ptrace.h>
 23#include <linux/slab.h>
 24#include <linux/tty.h>
 25#include <linux/ioport.h>
 26#include <linux/delay.h>
 27#include <linux/console.h>
 28#include <linux/init.h>
 29#include <linux/memblock.h>
 30#include <linux/seq_file.h>
 31#include <linux/serial.h>
 32#include <linux/initrd.h>
 33#include <linux/of_fdt.h>
 34#include <linux/of.h>
 
 35#include <linux/device.h>
 
 36
 37#include <asm/sections.h>
 38#include <asm/pgtable.h>
 39#include <asm/types.h>
 40#include <asm/setup.h>
 41#include <asm/io.h>
 42#include <asm/cpuinfo.h>
 43#include <asm/delay.h>
 44
 45#include "vmlinux.h"
 46
 47static void __init setup_memory(void)
 
 
 48{
 
 49	unsigned long ram_start_pfn;
 
 50	unsigned long ram_end_pfn;
 51	phys_addr_t memory_start, memory_end;
 52	struct memblock_region *region;
 53
 54	memory_end = memory_start = 0;
 55
 56	/* Find main memory where is the kernel, we assume its the only one */
 57	for_each_memblock(memory, region) {
 58		memory_start = region->base;
 59		memory_end = region->base + region->size;
 60		printk(KERN_INFO "%s: Memory: 0x%x-0x%x\n", __func__,
 61		       memory_start, memory_end);
 62	}
 63
 64	if (!memory_end) {
 65		panic("No memory!");
 66	}
 67
 68	ram_start_pfn = PFN_UP(memory_start);
 
 
 69	ram_end_pfn = PFN_DOWN(memblock_end_of_DRAM());
 70
 71	/* setup bootmem globals (we use no_bootmem, but mm still depends on this) */
 72	min_low_pfn = ram_start_pfn;
 73	max_low_pfn = ram_end_pfn;
 74	max_pfn = ram_end_pfn;
 75
 76	/*
 77	 * initialize the boot-time allocator (with low memory only).
 78	 *
 79	 * This makes the memory from the end of the kernel to the end of
 80	 * RAM usable.
 
 81	 */
 82	memblock_reserve(__pa(_stext), _end - _stext);
 83
 84	early_init_fdt_reserve_self();
 85	early_init_fdt_scan_reserved_mem();
 
 
 
 
 
 
 
 
 86
 87	memblock_dump_all();
 88}
 89
 90struct cpuinfo_or1k cpuinfo_or1k[NR_CPUS];
 91
 92static void print_cpuinfo(void)
 93{
 94	unsigned long upr = mfspr(SPR_UPR);
 95	unsigned long vr = mfspr(SPR_VR);
 96	unsigned int version;
 97	unsigned int revision;
 98	struct cpuinfo_or1k *cpuinfo = &cpuinfo_or1k[smp_processor_id()];
 99
100	version = (vr & SPR_VR_VER) >> 24;
101	revision = (vr & SPR_VR_REV);
102
103	printk(KERN_INFO "CPU: OpenRISC-%x (revision %d) @%d MHz\n",
104	       version, revision, cpuinfo->clock_frequency / 1000000);
105
106	if (!(upr & SPR_UPR_UP)) {
107		printk(KERN_INFO
108		       "-- no UPR register... unable to detect configuration\n");
109		return;
110	}
111
112	if (upr & SPR_UPR_DCP)
113		printk(KERN_INFO
114		       "-- dcache: %4d bytes total, %2d bytes/line, %d way(s)\n",
115		       cpuinfo->dcache_size, cpuinfo->dcache_block_size,
116		       cpuinfo->dcache_ways);
117	else
118		printk(KERN_INFO "-- dcache disabled\n");
119	if (upr & SPR_UPR_ICP)
120		printk(KERN_INFO
121		       "-- icache: %4d bytes total, %2d bytes/line, %d way(s)\n",
122		       cpuinfo->icache_size, cpuinfo->icache_block_size,
123		       cpuinfo->icache_ways);
124	else
125		printk(KERN_INFO "-- icache disabled\n");
126
127	if (upr & SPR_UPR_DMP)
128		printk(KERN_INFO "-- dmmu: %4d entries, %lu way(s)\n",
129		       1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2),
130		       1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW));
131	if (upr & SPR_UPR_IMP)
132		printk(KERN_INFO "-- immu: %4d entries, %lu way(s)\n",
133		       1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2),
134		       1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW));
135
136	printk(KERN_INFO "-- additional features:\n");
137	if (upr & SPR_UPR_DUP)
138		printk(KERN_INFO "-- debug unit\n");
139	if (upr & SPR_UPR_PCUP)
140		printk(KERN_INFO "-- performance counters\n");
141	if (upr & SPR_UPR_PMP)
142		printk(KERN_INFO "-- power management\n");
143	if (upr & SPR_UPR_PICP)
144		printk(KERN_INFO "-- PIC\n");
145	if (upr & SPR_UPR_TTP)
146		printk(KERN_INFO "-- timer\n");
147	if (upr & SPR_UPR_CUP)
148		printk(KERN_INFO "-- custom unit(s)\n");
149}
150
151static struct device_node *setup_find_cpu_node(int cpu)
152{
153	u32 hwid;
154	struct device_node *cpun;
155
156	for_each_of_cpu_node(cpun) {
157		if (of_property_read_u32(cpun, "reg", &hwid))
158			continue;
159		if (hwid == cpu)
160			return cpun;
161	}
162
163	return NULL;
164}
165
166void __init setup_cpuinfo(void)
167{
168	struct device_node *cpu;
169	unsigned long iccfgr, dccfgr;
170	unsigned long cache_set_size;
171	int cpu_id = smp_processor_id();
172	struct cpuinfo_or1k *cpuinfo = &cpuinfo_or1k[cpu_id];
173
174	cpu = setup_find_cpu_node(cpu_id);
175	if (!cpu)
176		panic("Couldn't find CPU%d in device tree...\n", cpu_id);
177
178	iccfgr = mfspr(SPR_ICCFGR);
179	cpuinfo->icache_ways = 1 << (iccfgr & SPR_ICCFGR_NCW);
180	cache_set_size = 1 << ((iccfgr & SPR_ICCFGR_NCS) >> 3);
181	cpuinfo->icache_block_size = 16 << ((iccfgr & SPR_ICCFGR_CBS) >> 7);
182	cpuinfo->icache_size =
183	    cache_set_size * cpuinfo->icache_ways * cpuinfo->icache_block_size;
184
185	dccfgr = mfspr(SPR_DCCFGR);
186	cpuinfo->dcache_ways = 1 << (dccfgr & SPR_DCCFGR_NCW);
187	cache_set_size = 1 << ((dccfgr & SPR_DCCFGR_NCS) >> 3);
188	cpuinfo->dcache_block_size = 16 << ((dccfgr & SPR_DCCFGR_CBS) >> 7);
189	cpuinfo->dcache_size =
190	    cache_set_size * cpuinfo->dcache_ways * cpuinfo->dcache_block_size;
191
192	if (of_property_read_u32(cpu, "clock-frequency",
193				 &cpuinfo->clock_frequency)) {
194		printk(KERN_WARNING
195		       "Device tree missing CPU 'clock-frequency' parameter."
196		       "Assuming frequency 25MHZ"
197		       "This is probably not what you want.");
198	}
199
200	cpuinfo->coreid = mfspr(SPR_COREID);
201
202	of_node_put(cpu);
203
204	print_cpuinfo();
205}
206
207/**
208 * or32_early_setup
209 *
210 * Handles the pointer to the device tree that this kernel is to use
211 * for establishing the available platform devices.
212 *
213 * Falls back on built-in device tree in case null pointer is passed.
214 */
215
216void __init or32_early_setup(void *fdt)
217{
218	if (fdt)
219		pr_info("FDT at %p\n", fdt);
220	else {
221		fdt = __dtb_start;
222		pr_info("Compiled-in FDT at %p\n", fdt);
 
223	}
224	early_init_devtree(fdt);
225}
226
 
 
 
 
 
 
 
 
 
227static inline unsigned long extract_value_bits(unsigned long reg,
228					       short bit_nr, short width)
229{
230	return (reg >> bit_nr) & (0 << width);
231}
232
233static inline unsigned long extract_value(unsigned long reg, unsigned long mask)
234{
235	while (!(mask & 0x1)) {
236		reg = reg >> 1;
237		mask = mask >> 1;
238	}
239	return mask & reg;
240}
241
242void __init detect_unit_config(unsigned long upr, unsigned long mask,
243			       char *text, void (*func) (void))
244{
245	if (text != NULL)
246		printk("%s", text);
247
248	if (upr & mask) {
249		if (func != NULL)
250			func();
251		else
252			printk("present\n");
253	} else
254		printk("not present\n");
255}
256
257/*
258 * calibrate_delay
259 *
260 * Lightweight calibrate_delay implementation that calculates loops_per_jiffy
261 * from the clock frequency passed in via the device tree
262 *
263 */
264
265void calibrate_delay(void)
266{
267	const int *val;
268	struct device_node *cpu = setup_find_cpu_node(smp_processor_id());
269
270	val = of_get_property(cpu, "clock-frequency", NULL);
271	if (!val)
272		panic("no cpu 'clock-frequency' parameter in device tree");
273	loops_per_jiffy = *val / HZ;
274	pr_cont("%lu.%02lu BogoMIPS (lpj=%lu)\n",
275		loops_per_jiffy / (500000 / HZ),
276		(loops_per_jiffy / (5000 / HZ)) % 100, loops_per_jiffy);
277}
278
279void __init setup_arch(char **cmdline_p)
280{
281	unflatten_and_copy_device_tree();
282
283	setup_cpuinfo();
284
285#ifdef CONFIG_SMP
286	smp_init_cpus();
287#endif
288
289	/* process 1's initial memory region is the kernel code/data */
290	init_mm.start_code = (unsigned long)_stext;
291	init_mm.end_code = (unsigned long)_etext;
292	init_mm.end_data = (unsigned long)_edata;
293	init_mm.brk = (unsigned long)_end;
294
295#ifdef CONFIG_BLK_DEV_INITRD
296	initrd_start = (unsigned long)&__initrd_start;
297	initrd_end = (unsigned long)&__initrd_end;
298	if (initrd_start == initrd_end) {
299		initrd_start = 0;
300		initrd_end = 0;
301	}
302	initrd_below_start_ok = 1;
303#endif
304
305	/* setup memblock allocator */
306	setup_memory();
307
308	/* paging_init() sets up the MMU and marks all pages as reserved */
309	paging_init();
310
311#if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
312	if (!conswitchp)
313		conswitchp = &dummy_con;
314#endif
315
316	*cmdline_p = boot_command_line;
317
318	printk(KERN_INFO "OpenRISC Linux -- http://openrisc.io\n");
319}
320
321static int show_cpuinfo(struct seq_file *m, void *v)
322{
323	unsigned int vr, cpucfgr;
324	unsigned int avr;
325	unsigned int version;
326	struct cpuinfo_or1k *cpuinfo = v;
327
328	vr = mfspr(SPR_VR);
329	cpucfgr = mfspr(SPR_CPUCFGR);
330
331#ifdef CONFIG_SMP
332	seq_printf(m, "processor\t\t: %d\n", cpuinfo->coreid);
333#endif
334	if (vr & SPR_VR_UVRP) {
335		vr = mfspr(SPR_VR2);
336		version = vr & SPR_VR2_VER;
337		avr = mfspr(SPR_AVR);
338		seq_printf(m, "cpu architecture\t: "
339			   "OpenRISC 1000 (%d.%d-rev%d)\n",
340			   (avr >> 24) & 0xff,
341			   (avr >> 16) & 0xff,
342			   (avr >> 8) & 0xff);
343		seq_printf(m, "cpu implementation id\t: 0x%x\n",
344			   (vr & SPR_VR2_CPUID) >> 24);
345		seq_printf(m, "cpu version\t\t: 0x%x\n", version);
346	} else {
347		version = (vr & SPR_VR_VER) >> 24;
348		seq_printf(m, "cpu\t\t\t: OpenRISC-%x\n", version);
349		seq_printf(m, "revision\t\t: %d\n", vr & SPR_VR_REV);
350	}
351	seq_printf(m, "frequency\t\t: %ld\n", loops_per_jiffy * HZ);
352	seq_printf(m, "dcache size\t\t: %d bytes\n", cpuinfo->dcache_size);
353	seq_printf(m, "dcache block size\t: %d bytes\n",
354		   cpuinfo->dcache_block_size);
355	seq_printf(m, "dcache ways\t\t: %d\n", cpuinfo->dcache_ways);
356	seq_printf(m, "icache size\t\t: %d bytes\n", cpuinfo->icache_size);
357	seq_printf(m, "icache block size\t: %d bytes\n",
358		   cpuinfo->icache_block_size);
359	seq_printf(m, "icache ways\t\t: %d\n", cpuinfo->icache_ways);
360	seq_printf(m, "immu\t\t\t: %d entries, %lu ways\n",
361		   1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2),
362		   1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW));
363	seq_printf(m, "dmmu\t\t\t: %d entries, %lu ways\n",
364		   1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2),
365		   1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW));
366	seq_printf(m, "bogomips\t\t: %lu.%02lu\n",
367		   (loops_per_jiffy * HZ) / 500000,
368		   ((loops_per_jiffy * HZ) / 5000) % 100);
369
370	seq_puts(m, "features\t\t: ");
371	seq_printf(m, "%s ", cpucfgr & SPR_CPUCFGR_OB32S ? "orbis32" : "");
372	seq_printf(m, "%s ", cpucfgr & SPR_CPUCFGR_OB64S ? "orbis64" : "");
373	seq_printf(m, "%s ", cpucfgr & SPR_CPUCFGR_OF32S ? "orfpx32" : "");
374	seq_printf(m, "%s ", cpucfgr & SPR_CPUCFGR_OF64S ? "orfpx64" : "");
375	seq_printf(m, "%s ", cpucfgr & SPR_CPUCFGR_OV64S ? "orvdx64" : "");
376	seq_puts(m, "\n");
377
378	seq_puts(m, "\n");
379
380	return 0;
381}
382
383static void *c_start(struct seq_file *m, loff_t *pos)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
384{
385	*pos = cpumask_next(*pos - 1, cpu_online_mask);
386	if ((*pos) < nr_cpu_ids)
387		return &cpuinfo_or1k[*pos];
388	return NULL;
389}
390
391static void *c_next(struct seq_file *m, void *v, loff_t *pos)
392{
393	(*pos)++;
394	return c_start(m, pos);
395}
396
397static void c_stop(struct seq_file *m, void *v)
398{
399}
400
401const struct seq_operations cpuinfo_op = {
402	.start = c_start,
403	.next = c_next,
404	.stop = c_stop,
405	.show = show_cpuinfo,
406};
v3.5.6
 
  1/*
  2 * OpenRISC setup.c
  3 *
  4 * Linux architectural port borrowing liberally from similar works of
  5 * others.  All original copyrights apply as per the original source
  6 * declaration.
  7 *
  8 * Modifications for the OpenRISC architecture:
  9 * Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
 10 * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
 11 *
 12 *      This program is free software; you can redistribute it and/or
 13 *      modify it under the terms of the GNU General Public License
 14 *      as published by the Free Software Foundation; either version
 15 *      2 of the License, or (at your option) any later version.
 16 *
 17 * This file handles the architecture-dependent parts of initialization
 18 */
 19
 20#include <linux/errno.h>
 21#include <linux/sched.h>
 22#include <linux/kernel.h>
 23#include <linux/mm.h>
 24#include <linux/stddef.h>
 25#include <linux/unistd.h>
 26#include <linux/ptrace.h>
 27#include <linux/slab.h>
 28#include <linux/tty.h>
 29#include <linux/ioport.h>
 30#include <linux/delay.h>
 31#include <linux/console.h>
 32#include <linux/init.h>
 33#include <linux/bootmem.h>
 34#include <linux/seq_file.h>
 35#include <linux/serial.h>
 36#include <linux/initrd.h>
 37#include <linux/of_fdt.h>
 38#include <linux/of.h>
 39#include <linux/memblock.h>
 40#include <linux/device.h>
 41#include <linux/of_platform.h>
 42
 43#include <asm/segment.h>
 44#include <asm/pgtable.h>
 45#include <asm/types.h>
 46#include <asm/setup.h>
 47#include <asm/io.h>
 48#include <asm/cpuinfo.h>
 49#include <asm/delay.h>
 50
 51#include "vmlinux.h"
 52
 53char __initdata cmd_line[COMMAND_LINE_SIZE] = CONFIG_CMDLINE;
 54
 55static unsigned long __init setup_memory(void)
 56{
 57	unsigned long bootmap_size;
 58	unsigned long ram_start_pfn;
 59	unsigned long free_ram_start_pfn;
 60	unsigned long ram_end_pfn;
 61	phys_addr_t memory_start, memory_end;
 62	struct memblock_region *region;
 63
 64	memory_end = memory_start = 0;
 65
 66	/* Find main memory where is the kernel */
 67	for_each_memblock(memory, region) {
 68		memory_start = region->base;
 69		memory_end = region->base + region->size;
 70		printk(KERN_INFO "%s: Memory: 0x%x-0x%x\n", __func__,
 71		       memory_start, memory_end);
 72	}
 73
 74	if (!memory_end) {
 75		panic("No memory!");
 76	}
 77
 78	ram_start_pfn = PFN_UP(memory_start);
 79	/* free_ram_start_pfn is first page after kernel */
 80	free_ram_start_pfn = PFN_UP(__pa(&_end));
 81	ram_end_pfn = PFN_DOWN(memblock_end_of_DRAM());
 82
 
 
 
 83	max_pfn = ram_end_pfn;
 84
 85	/*
 86	 * initialize the boot-time allocator (with low memory only).
 87	 *
 88	 * This makes the memory from the end of the kernel to the end of
 89	 * RAM usable.
 90	 * init_bootmem sets the global values min_low_pfn, max_low_pfn.
 91	 */
 92	bootmap_size = init_bootmem(free_ram_start_pfn,
 93				    ram_end_pfn - ram_start_pfn);
 94	free_bootmem(PFN_PHYS(free_ram_start_pfn),
 95		     (ram_end_pfn - free_ram_start_pfn) << PAGE_SHIFT);
 96	reserve_bootmem(PFN_PHYS(free_ram_start_pfn), bootmap_size,
 97			BOOTMEM_DEFAULT);
 98
 99	for_each_memblock(reserved, region) {
100		printk(KERN_INFO "Reserved - 0x%08x-0x%08x\n",
101		       (u32) region->base, (u32) region->size);
102		reserve_bootmem(region->base, region->size, BOOTMEM_DEFAULT);
103	}
104
105	return ram_end_pfn;
106}
107
108struct cpuinfo cpuinfo;
109
110static void print_cpuinfo(void)
111{
112	unsigned long upr = mfspr(SPR_UPR);
113	unsigned long vr = mfspr(SPR_VR);
114	unsigned int version;
115	unsigned int revision;
 
116
117	version = (vr & SPR_VR_VER) >> 24;
118	revision = (vr & SPR_VR_REV);
119
120	printk(KERN_INFO "CPU: OpenRISC-%x (revision %d) @%d MHz\n",
121	       version, revision, cpuinfo.clock_frequency / 1000000);
122
123	if (!(upr & SPR_UPR_UP)) {
124		printk(KERN_INFO
125		       "-- no UPR register... unable to detect configuration\n");
126		return;
127	}
128
129	if (upr & SPR_UPR_DCP)
130		printk(KERN_INFO
131		       "-- dcache: %4d bytes total, %2d bytes/line, %d way(s)\n",
132		       cpuinfo.dcache_size, cpuinfo.dcache_block_size, 1);
 
133	else
134		printk(KERN_INFO "-- dcache disabled\n");
135	if (upr & SPR_UPR_ICP)
136		printk(KERN_INFO
137		       "-- icache: %4d bytes total, %2d bytes/line, %d way(s)\n",
138		       cpuinfo.icache_size, cpuinfo.icache_block_size, 1);
 
139	else
140		printk(KERN_INFO "-- icache disabled\n");
141
142	if (upr & SPR_UPR_DMP)
143		printk(KERN_INFO "-- dmmu: %4d entries, %lu way(s)\n",
144		       1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2),
145		       1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW));
146	if (upr & SPR_UPR_IMP)
147		printk(KERN_INFO "-- immu: %4d entries, %lu way(s)\n",
148		       1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2),
149		       1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW));
150
151	printk(KERN_INFO "-- additional features:\n");
152	if (upr & SPR_UPR_DUP)
153		printk(KERN_INFO "-- debug unit\n");
154	if (upr & SPR_UPR_PCUP)
155		printk(KERN_INFO "-- performance counters\n");
156	if (upr & SPR_UPR_PMP)
157		printk(KERN_INFO "-- power management\n");
158	if (upr & SPR_UPR_PICP)
159		printk(KERN_INFO "-- PIC\n");
160	if (upr & SPR_UPR_TTP)
161		printk(KERN_INFO "-- timer\n");
162	if (upr & SPR_UPR_CUP)
163		printk(KERN_INFO "-- custom unit(s)\n");
164}
165
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
166void __init setup_cpuinfo(void)
167{
168	struct device_node *cpu;
169	unsigned long iccfgr, dccfgr;
170	unsigned long cache_set_size, cache_ways;
 
 
171
172	cpu = of_find_compatible_node(NULL, NULL, "opencores,or1200-rtlsvn481");
173	if (!cpu)
174		panic("No compatible CPU found in device tree...\n");
175
176	iccfgr = mfspr(SPR_ICCFGR);
177	cache_ways = 1 << (iccfgr & SPR_ICCFGR_NCW);
178	cache_set_size = 1 << ((iccfgr & SPR_ICCFGR_NCS) >> 3);
179	cpuinfo.icache_block_size = 16 << ((iccfgr & SPR_ICCFGR_CBS) >> 7);
180	cpuinfo.icache_size =
181	    cache_set_size * cache_ways * cpuinfo.icache_block_size;
182
183	dccfgr = mfspr(SPR_DCCFGR);
184	cache_ways = 1 << (dccfgr & SPR_DCCFGR_NCW);
185	cache_set_size = 1 << ((dccfgr & SPR_DCCFGR_NCS) >> 3);
186	cpuinfo.dcache_block_size = 16 << ((dccfgr & SPR_DCCFGR_CBS) >> 7);
187	cpuinfo.dcache_size =
188	    cache_set_size * cache_ways * cpuinfo.dcache_block_size;
189
190	if (of_property_read_u32(cpu, "clock-frequency",
191				 &cpuinfo.clock_frequency)) {
192		printk(KERN_WARNING
193		       "Device tree missing CPU 'clock-frequency' parameter."
194		       "Assuming frequency 25MHZ"
195		       "This is probably not what you want.");
196	}
197
 
 
198	of_node_put(cpu);
199
200	print_cpuinfo();
201}
202
203/**
204 * or32_early_setup
205 *
206 * Handles the pointer to the device tree that this kernel is to use
207 * for establishing the available platform devices.
208 *
209 * Falls back on built-in device tree in case null pointer is passed.
210 */
211
212void __init or32_early_setup(unsigned int fdt)
213{
214	if (fdt) {
215		early_init_devtree((void*) fdt);
216		printk(KERN_INFO "FDT at 0x%08x\n", fdt);
217	} else {
218		early_init_devtree(__dtb_start);
219		printk(KERN_INFO "Compiled-in FDT at %p\n", __dtb_start);
220	}
 
221}
222
223static int __init openrisc_device_probe(void)
224{
225	of_platform_populate(NULL, NULL, NULL, NULL);
226
227	return 0;
228}
229
230device_initcall(openrisc_device_probe);
231
232static inline unsigned long extract_value_bits(unsigned long reg,
233					       short bit_nr, short width)
234{
235	return (reg >> bit_nr) & (0 << width);
236}
237
238static inline unsigned long extract_value(unsigned long reg, unsigned long mask)
239{
240	while (!(mask & 0x1)) {
241		reg = reg >> 1;
242		mask = mask >> 1;
243	}
244	return mask & reg;
245}
246
247void __init detect_unit_config(unsigned long upr, unsigned long mask,
248			       char *text, void (*func) (void))
249{
250	if (text != NULL)
251		printk("%s", text);
252
253	if (upr & mask) {
254		if (func != NULL)
255			func();
256		else
257			printk("present\n");
258	} else
259		printk("not present\n");
260}
261
262/*
263 * calibrate_delay
264 *
265 * Lightweight calibrate_delay implementation that calculates loops_per_jiffy
266 * from the clock frequency passed in via the device tree
267 *
268 */
269
270void __cpuinit calibrate_delay(void)
271{
272	const int *val;
273	struct device_node *cpu = NULL;
274	cpu = of_find_compatible_node(NULL, NULL, "opencores,or1200-rtlsvn481");
275	val = of_get_property(cpu, "clock-frequency", NULL);
276	if (!val)
277		panic("no cpu 'clock-frequency' parameter in device tree");
278	loops_per_jiffy = *val / HZ;
279	pr_cont("%lu.%02lu BogoMIPS (lpj=%lu)\n",
280		loops_per_jiffy / (500000 / HZ),
281		(loops_per_jiffy / (5000 / HZ)) % 100, loops_per_jiffy);
282}
283
284void __init setup_arch(char **cmdline_p)
285{
286	unsigned long max_low_pfn;
287
288	unflatten_device_tree();
289
290	setup_cpuinfo();
 
 
291
292	/* process 1's initial memory region is the kernel code/data */
293	init_mm.start_code = (unsigned long)&_stext;
294	init_mm.end_code = (unsigned long)&_etext;
295	init_mm.end_data = (unsigned long)&_edata;
296	init_mm.brk = (unsigned long)&_end;
297
298#ifdef CONFIG_BLK_DEV_INITRD
299	initrd_start = (unsigned long)&__initrd_start;
300	initrd_end = (unsigned long)&__initrd_end;
301	if (initrd_start == initrd_end) {
302		initrd_start = 0;
303		initrd_end = 0;
304	}
305	initrd_below_start_ok = 1;
306#endif
307
308	/* setup bootmem allocator */
309	max_low_pfn = setup_memory();
310
311	/* paging_init() sets up the MMU and marks all pages as reserved */
312	paging_init();
313
314#if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
315	if (!conswitchp)
316		conswitchp = &dummy_con;
317#endif
318
319	*cmdline_p = cmd_line;
320
321	printk(KERN_INFO "OpenRISC Linux -- http://openrisc.net\n");
322}
323
324static int show_cpuinfo(struct seq_file *m, void *v)
325{
326	unsigned long vr;
327	int version, revision;
 
 
328
329	vr = mfspr(SPR_VR);
330	version = (vr & SPR_VR_VER) >> 24;
331	revision = vr & SPR_VR_REV;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
332
333	return seq_printf(m,
334			  "cpu\t\t: OpenRISC-%x\n"
335			  "revision\t: %d\n"
336			  "frequency\t: %ld\n"
337			  "dcache size\t: %d bytes\n"
338			  "dcache block size\t: %d bytes\n"
339			  "icache size\t: %d bytes\n"
340			  "icache block size\t: %d bytes\n"
341			  "immu\t\t: %d entries, %lu ways\n"
342			  "dmmu\t\t: %d entries, %lu ways\n"
343			  "bogomips\t: %lu.%02lu\n",
344			  version,
345			  revision,
346			  loops_per_jiffy * HZ,
347			  cpuinfo.dcache_size,
348			  cpuinfo.dcache_block_size,
349			  cpuinfo.icache_size,
350			  cpuinfo.icache_block_size,
351			  1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2),
352			  1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW),
353			  1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2),
354			  1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW),
355			  (loops_per_jiffy * HZ) / 500000,
356			  ((loops_per_jiffy * HZ) / 5000) % 100);
357}
358
359static void *c_start(struct seq_file *m, loff_t * pos)
360{
361	/* We only have one CPU... */
362	return *pos < 1 ? (void *)1 : NULL;
 
 
363}
364
365static void *c_next(struct seq_file *m, void *v, loff_t * pos)
366{
367	++*pos;
368	return NULL;
369}
370
371static void c_stop(struct seq_file *m, void *v)
372{
373}
374
375const struct seq_operations cpuinfo_op = {
376	.start = c_start,
377	.next = c_next,
378	.stop = c_stop,
379	.show = show_cpuinfo,
380};