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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * AMD CPU Microcode Update Driver for Linux
4 *
5 * This driver allows to upgrade microcode on F10h AMD
6 * CPUs and later.
7 *
8 * Copyright (C) 2008-2011 Advanced Micro Devices Inc.
9 * 2013-2018 Borislav Petkov <bp@alien8.de>
10 *
11 * Author: Peter Oruba <peter.oruba@amd.com>
12 *
13 * Based on work by:
14 * Tigran Aivazian <aivazian.tigran@gmail.com>
15 *
16 * early loader:
17 * Copyright (C) 2013 Advanced Micro Devices, Inc.
18 *
19 * Author: Jacob Shin <jacob.shin@amd.com>
20 * Fixes: Borislav Petkov <bp@suse.de>
21 */
22#define pr_fmt(fmt) "microcode: " fmt
23
24#include <linux/earlycpio.h>
25#include <linux/firmware.h>
26#include <linux/uaccess.h>
27#include <linux/vmalloc.h>
28#include <linux/initrd.h>
29#include <linux/kernel.h>
30#include <linux/pci.h>
31
32#include <asm/microcode_amd.h>
33#include <asm/microcode.h>
34#include <asm/processor.h>
35#include <asm/setup.h>
36#include <asm/cpu.h>
37#include <asm/msr.h>
38
39static struct equiv_cpu_table {
40 unsigned int num_entries;
41 struct equiv_cpu_entry *entry;
42} equiv_table;
43
44/*
45 * This points to the current valid container of microcode patches which we will
46 * save from the initrd/builtin before jettisoning its contents. @mc is the
47 * microcode patch we found to match.
48 */
49struct cont_desc {
50 struct microcode_amd *mc;
51 u32 cpuid_1_eax;
52 u32 psize;
53 u8 *data;
54 size_t size;
55};
56
57static u32 ucode_new_rev;
58static u8 amd_ucode_patch[PATCH_MAX_SIZE];
59
60/*
61 * Microcode patch container file is prepended to the initrd in cpio
62 * format. See Documentation/x86/microcode.rst
63 */
64static const char
65ucode_path[] __maybe_unused = "kernel/x86/microcode/AuthenticAMD.bin";
66
67static u16 find_equiv_id(struct equiv_cpu_table *et, u32 sig)
68{
69 unsigned int i;
70
71 if (!et || !et->num_entries)
72 return 0;
73
74 for (i = 0; i < et->num_entries; i++) {
75 struct equiv_cpu_entry *e = &et->entry[i];
76
77 if (sig == e->installed_cpu)
78 return e->equiv_cpu;
79
80 e++;
81 }
82 return 0;
83}
84
85/*
86 * Check whether there is a valid microcode container file at the beginning
87 * of @buf of size @buf_size. Set @early to use this function in the early path.
88 */
89static bool verify_container(const u8 *buf, size_t buf_size, bool early)
90{
91 u32 cont_magic;
92
93 if (buf_size <= CONTAINER_HDR_SZ) {
94 if (!early)
95 pr_debug("Truncated microcode container header.\n");
96
97 return false;
98 }
99
100 cont_magic = *(const u32 *)buf;
101 if (cont_magic != UCODE_MAGIC) {
102 if (!early)
103 pr_debug("Invalid magic value (0x%08x).\n", cont_magic);
104
105 return false;
106 }
107
108 return true;
109}
110
111/*
112 * Check whether there is a valid, non-truncated CPU equivalence table at the
113 * beginning of @buf of size @buf_size. Set @early to use this function in the
114 * early path.
115 */
116static bool verify_equivalence_table(const u8 *buf, size_t buf_size, bool early)
117{
118 const u32 *hdr = (const u32 *)buf;
119 u32 cont_type, equiv_tbl_len;
120
121 if (!verify_container(buf, buf_size, early))
122 return false;
123
124 cont_type = hdr[1];
125 if (cont_type != UCODE_EQUIV_CPU_TABLE_TYPE) {
126 if (!early)
127 pr_debug("Wrong microcode container equivalence table type: %u.\n",
128 cont_type);
129
130 return false;
131 }
132
133 buf_size -= CONTAINER_HDR_SZ;
134
135 equiv_tbl_len = hdr[2];
136 if (equiv_tbl_len < sizeof(struct equiv_cpu_entry) ||
137 buf_size < equiv_tbl_len) {
138 if (!early)
139 pr_debug("Truncated equivalence table.\n");
140
141 return false;
142 }
143
144 return true;
145}
146
147/*
148 * Check whether there is a valid, non-truncated microcode patch section at the
149 * beginning of @buf of size @buf_size. Set @early to use this function in the
150 * early path.
151 *
152 * On success, @sh_psize returns the patch size according to the section header,
153 * to the caller.
154 */
155static bool
156__verify_patch_section(const u8 *buf, size_t buf_size, u32 *sh_psize, bool early)
157{
158 u32 p_type, p_size;
159 const u32 *hdr;
160
161 if (buf_size < SECTION_HDR_SIZE) {
162 if (!early)
163 pr_debug("Truncated patch section.\n");
164
165 return false;
166 }
167
168 hdr = (const u32 *)buf;
169 p_type = hdr[0];
170 p_size = hdr[1];
171
172 if (p_type != UCODE_UCODE_TYPE) {
173 if (!early)
174 pr_debug("Invalid type field (0x%x) in container file section header.\n",
175 p_type);
176
177 return false;
178 }
179
180 if (p_size < sizeof(struct microcode_header_amd)) {
181 if (!early)
182 pr_debug("Patch of size %u too short.\n", p_size);
183
184 return false;
185 }
186
187 *sh_psize = p_size;
188
189 return true;
190}
191
192/*
193 * Check whether the passed remaining file @buf_size is large enough to contain
194 * a patch of the indicated @sh_psize (and also whether this size does not
195 * exceed the per-family maximum). @sh_psize is the size read from the section
196 * header.
197 */
198static unsigned int __verify_patch_size(u8 family, u32 sh_psize, size_t buf_size)
199{
200 u32 max_size;
201
202 if (family >= 0x15)
203 return min_t(u32, sh_psize, buf_size);
204
205#define F1XH_MPB_MAX_SIZE 2048
206#define F14H_MPB_MAX_SIZE 1824
207
208 switch (family) {
209 case 0x10 ... 0x12:
210 max_size = F1XH_MPB_MAX_SIZE;
211 break;
212 case 0x14:
213 max_size = F14H_MPB_MAX_SIZE;
214 break;
215 default:
216 WARN(1, "%s: WTF family: 0x%x\n", __func__, family);
217 return 0;
218 break;
219 }
220
221 if (sh_psize > min_t(u32, buf_size, max_size))
222 return 0;
223
224 return sh_psize;
225}
226
227/*
228 * Verify the patch in @buf.
229 *
230 * Returns:
231 * negative: on error
232 * positive: patch is not for this family, skip it
233 * 0: success
234 */
235static int
236verify_patch(u8 family, const u8 *buf, size_t buf_size, u32 *patch_size, bool early)
237{
238 struct microcode_header_amd *mc_hdr;
239 unsigned int ret;
240 u32 sh_psize;
241 u16 proc_id;
242 u8 patch_fam;
243
244 if (!__verify_patch_section(buf, buf_size, &sh_psize, early))
245 return -1;
246
247 /*
248 * The section header length is not included in this indicated size
249 * but is present in the leftover file length so we need to subtract
250 * it before passing this value to the function below.
251 */
252 buf_size -= SECTION_HDR_SIZE;
253
254 /*
255 * Check if the remaining buffer is big enough to contain a patch of
256 * size sh_psize, as the section claims.
257 */
258 if (buf_size < sh_psize) {
259 if (!early)
260 pr_debug("Patch of size %u truncated.\n", sh_psize);
261
262 return -1;
263 }
264
265 ret = __verify_patch_size(family, sh_psize, buf_size);
266 if (!ret) {
267 if (!early)
268 pr_debug("Per-family patch size mismatch.\n");
269 return -1;
270 }
271
272 *patch_size = sh_psize;
273
274 mc_hdr = (struct microcode_header_amd *)(buf + SECTION_HDR_SIZE);
275 if (mc_hdr->nb_dev_id || mc_hdr->sb_dev_id) {
276 if (!early)
277 pr_err("Patch-ID 0x%08x: chipset-specific code unsupported.\n", mc_hdr->patch_id);
278 return -1;
279 }
280
281 proc_id = mc_hdr->processor_rev_id;
282 patch_fam = 0xf + (proc_id >> 12);
283 if (patch_fam != family)
284 return 1;
285
286 return 0;
287}
288
289/*
290 * This scans the ucode blob for the proper container as we can have multiple
291 * containers glued together. Returns the equivalence ID from the equivalence
292 * table or 0 if none found.
293 * Returns the amount of bytes consumed while scanning. @desc contains all the
294 * data we're going to use in later stages of the application.
295 */
296static size_t parse_container(u8 *ucode, size_t size, struct cont_desc *desc)
297{
298 struct equiv_cpu_table table;
299 size_t orig_size = size;
300 u32 *hdr = (u32 *)ucode;
301 u16 eq_id;
302 u8 *buf;
303
304 if (!verify_equivalence_table(ucode, size, true))
305 return 0;
306
307 buf = ucode;
308
309 table.entry = (struct equiv_cpu_entry *)(buf + CONTAINER_HDR_SZ);
310 table.num_entries = hdr[2] / sizeof(struct equiv_cpu_entry);
311
312 /*
313 * Find the equivalence ID of our CPU in this table. Even if this table
314 * doesn't contain a patch for the CPU, scan through the whole container
315 * so that it can be skipped in case there are other containers appended.
316 */
317 eq_id = find_equiv_id(&table, desc->cpuid_1_eax);
318
319 buf += hdr[2] + CONTAINER_HDR_SZ;
320 size -= hdr[2] + CONTAINER_HDR_SZ;
321
322 /*
323 * Scan through the rest of the container to find where it ends. We do
324 * some basic sanity-checking too.
325 */
326 while (size > 0) {
327 struct microcode_amd *mc;
328 u32 patch_size;
329 int ret;
330
331 ret = verify_patch(x86_family(desc->cpuid_1_eax), buf, size, &patch_size, true);
332 if (ret < 0) {
333 /*
334 * Patch verification failed, skip to the next
335 * container, if there's one:
336 */
337 goto out;
338 } else if (ret > 0) {
339 goto skip;
340 }
341
342 mc = (struct microcode_amd *)(buf + SECTION_HDR_SIZE);
343 if (eq_id == mc->hdr.processor_rev_id) {
344 desc->psize = patch_size;
345 desc->mc = mc;
346 }
347
348skip:
349 /* Skip patch section header too: */
350 buf += patch_size + SECTION_HDR_SIZE;
351 size -= patch_size + SECTION_HDR_SIZE;
352 }
353
354 /*
355 * If we have found a patch (desc->mc), it means we're looking at the
356 * container which has a patch for this CPU so return 0 to mean, @ucode
357 * already points to the proper container. Otherwise, we return the size
358 * we scanned so that we can advance to the next container in the
359 * buffer.
360 */
361 if (desc->mc) {
362 desc->data = ucode;
363 desc->size = orig_size - size;
364
365 return 0;
366 }
367
368out:
369 return orig_size - size;
370}
371
372/*
373 * Scan the ucode blob for the proper container as we can have multiple
374 * containers glued together.
375 */
376static void scan_containers(u8 *ucode, size_t size, struct cont_desc *desc)
377{
378 while (size) {
379 size_t s = parse_container(ucode, size, desc);
380 if (!s)
381 return;
382
383 /* catch wraparound */
384 if (size >= s) {
385 ucode += s;
386 size -= s;
387 } else {
388 return;
389 }
390 }
391}
392
393static int __apply_microcode_amd(struct microcode_amd *mc)
394{
395 u32 rev, dummy;
396
397 native_wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc->hdr.data_code);
398
399 /* verify patch application was successful */
400 native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
401 if (rev != mc->hdr.patch_id)
402 return -1;
403
404 return 0;
405}
406
407/*
408 * Early load occurs before we can vmalloc(). So we look for the microcode
409 * patch container file in initrd, traverse equivalent cpu table, look for a
410 * matching microcode patch, and update, all in initrd memory in place.
411 * When vmalloc() is available for use later -- on 64-bit during first AP load,
412 * and on 32-bit during save_microcode_in_initrd_amd() -- we can call
413 * load_microcode_amd() to save equivalent cpu table and microcode patches in
414 * kernel heap memory.
415 *
416 * Returns true if container found (sets @desc), false otherwise.
417 */
418static bool
419apply_microcode_early_amd(u32 cpuid_1_eax, void *ucode, size_t size, bool save_patch)
420{
421 struct cont_desc desc = { 0 };
422 u8 (*patch)[PATCH_MAX_SIZE];
423 struct microcode_amd *mc;
424 u32 rev, dummy, *new_rev;
425 bool ret = false;
426
427#ifdef CONFIG_X86_32
428 new_rev = (u32 *)__pa_nodebug(&ucode_new_rev);
429 patch = (u8 (*)[PATCH_MAX_SIZE])__pa_nodebug(&amd_ucode_patch);
430#else
431 new_rev = &ucode_new_rev;
432 patch = &amd_ucode_patch;
433#endif
434
435 desc.cpuid_1_eax = cpuid_1_eax;
436
437 scan_containers(ucode, size, &desc);
438
439 mc = desc.mc;
440 if (!mc)
441 return ret;
442
443 native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
444 if (rev >= mc->hdr.patch_id)
445 return ret;
446
447 if (!__apply_microcode_amd(mc)) {
448 *new_rev = mc->hdr.patch_id;
449 ret = true;
450
451 if (save_patch)
452 memcpy(patch, mc, min_t(u32, desc.psize, PATCH_MAX_SIZE));
453 }
454
455 return ret;
456}
457
458static bool get_builtin_microcode(struct cpio_data *cp, unsigned int family)
459{
460#ifdef CONFIG_X86_64
461 char fw_name[36] = "amd-ucode/microcode_amd.bin";
462
463 if (family >= 0x15)
464 snprintf(fw_name, sizeof(fw_name),
465 "amd-ucode/microcode_amd_fam%.2xh.bin", family);
466
467 return get_builtin_firmware(cp, fw_name);
468#else
469 return false;
470#endif
471}
472
473static void __load_ucode_amd(unsigned int cpuid_1_eax, struct cpio_data *ret)
474{
475 struct ucode_cpu_info *uci;
476 struct cpio_data cp;
477 const char *path;
478 bool use_pa;
479
480 if (IS_ENABLED(CONFIG_X86_32)) {
481 uci = (struct ucode_cpu_info *)__pa_nodebug(ucode_cpu_info);
482 path = (const char *)__pa_nodebug(ucode_path);
483 use_pa = true;
484 } else {
485 uci = ucode_cpu_info;
486 path = ucode_path;
487 use_pa = false;
488 }
489
490 if (!get_builtin_microcode(&cp, x86_family(cpuid_1_eax)))
491 cp = find_microcode_in_initrd(path, use_pa);
492
493 /* Needed in load_microcode_amd() */
494 uci->cpu_sig.sig = cpuid_1_eax;
495
496 *ret = cp;
497}
498
499void __init load_ucode_amd_bsp(unsigned int cpuid_1_eax)
500{
501 struct cpio_data cp = { };
502
503 __load_ucode_amd(cpuid_1_eax, &cp);
504 if (!(cp.data && cp.size))
505 return;
506
507 apply_microcode_early_amd(cpuid_1_eax, cp.data, cp.size, true);
508}
509
510void load_ucode_amd_ap(unsigned int cpuid_1_eax)
511{
512 struct microcode_amd *mc;
513 struct cpio_data cp;
514 u32 *new_rev, rev, dummy;
515
516 if (IS_ENABLED(CONFIG_X86_32)) {
517 mc = (struct microcode_amd *)__pa_nodebug(amd_ucode_patch);
518 new_rev = (u32 *)__pa_nodebug(&ucode_new_rev);
519 } else {
520 mc = (struct microcode_amd *)amd_ucode_patch;
521 new_rev = &ucode_new_rev;
522 }
523
524 native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
525
526 /* Check whether we have saved a new patch already: */
527 if (*new_rev && rev < mc->hdr.patch_id) {
528 if (!__apply_microcode_amd(mc)) {
529 *new_rev = mc->hdr.patch_id;
530 return;
531 }
532 }
533
534 __load_ucode_amd(cpuid_1_eax, &cp);
535 if (!(cp.data && cp.size))
536 return;
537
538 apply_microcode_early_amd(cpuid_1_eax, cp.data, cp.size, false);
539}
540
541static enum ucode_state
542load_microcode_amd(bool save, u8 family, const u8 *data, size_t size);
543
544int __init save_microcode_in_initrd_amd(unsigned int cpuid_1_eax)
545{
546 struct cont_desc desc = { 0 };
547 enum ucode_state ret;
548 struct cpio_data cp;
549
550 cp = find_microcode_in_initrd(ucode_path, false);
551 if (!(cp.data && cp.size))
552 return -EINVAL;
553
554 desc.cpuid_1_eax = cpuid_1_eax;
555
556 scan_containers(cp.data, cp.size, &desc);
557 if (!desc.mc)
558 return -EINVAL;
559
560 ret = load_microcode_amd(true, x86_family(cpuid_1_eax), desc.data, desc.size);
561 if (ret > UCODE_UPDATED)
562 return -EINVAL;
563
564 return 0;
565}
566
567void reload_ucode_amd(void)
568{
569 struct microcode_amd *mc;
570 u32 rev, dummy;
571
572 mc = (struct microcode_amd *)amd_ucode_patch;
573
574 rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
575
576 if (rev < mc->hdr.patch_id) {
577 if (!__apply_microcode_amd(mc)) {
578 ucode_new_rev = mc->hdr.patch_id;
579 pr_info("reload patch_level=0x%08x\n", ucode_new_rev);
580 }
581 }
582}
583static u16 __find_equiv_id(unsigned int cpu)
584{
585 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
586 return find_equiv_id(&equiv_table, uci->cpu_sig.sig);
587}
588
589/*
590 * a small, trivial cache of per-family ucode patches
591 */
592static struct ucode_patch *cache_find_patch(u16 equiv_cpu)
593{
594 struct ucode_patch *p;
595
596 list_for_each_entry(p, µcode_cache, plist)
597 if (p->equiv_cpu == equiv_cpu)
598 return p;
599 return NULL;
600}
601
602static void update_cache(struct ucode_patch *new_patch)
603{
604 struct ucode_patch *p;
605
606 list_for_each_entry(p, µcode_cache, plist) {
607 if (p->equiv_cpu == new_patch->equiv_cpu) {
608 if (p->patch_id >= new_patch->patch_id) {
609 /* we already have the latest patch */
610 kfree(new_patch->data);
611 kfree(new_patch);
612 return;
613 }
614
615 list_replace(&p->plist, &new_patch->plist);
616 kfree(p->data);
617 kfree(p);
618 return;
619 }
620 }
621 /* no patch found, add it */
622 list_add_tail(&new_patch->plist, µcode_cache);
623}
624
625static void free_cache(void)
626{
627 struct ucode_patch *p, *tmp;
628
629 list_for_each_entry_safe(p, tmp, µcode_cache, plist) {
630 __list_del(p->plist.prev, p->plist.next);
631 kfree(p->data);
632 kfree(p);
633 }
634}
635
636static struct ucode_patch *find_patch(unsigned int cpu)
637{
638 u16 equiv_id;
639
640 equiv_id = __find_equiv_id(cpu);
641 if (!equiv_id)
642 return NULL;
643
644 return cache_find_patch(equiv_id);
645}
646
647static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
648{
649 struct cpuinfo_x86 *c = &cpu_data(cpu);
650 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
651 struct ucode_patch *p;
652
653 csig->sig = cpuid_eax(0x00000001);
654 csig->rev = c->microcode;
655
656 /*
657 * a patch could have been loaded early, set uci->mc so that
658 * mc_bp_resume() can call apply_microcode()
659 */
660 p = find_patch(cpu);
661 if (p && (p->patch_id == csig->rev))
662 uci->mc = p->data;
663
664 pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev);
665
666 return 0;
667}
668
669static enum ucode_state apply_microcode_amd(int cpu)
670{
671 struct cpuinfo_x86 *c = &cpu_data(cpu);
672 struct microcode_amd *mc_amd;
673 struct ucode_cpu_info *uci;
674 struct ucode_patch *p;
675 enum ucode_state ret;
676 u32 rev, dummy;
677
678 BUG_ON(raw_smp_processor_id() != cpu);
679
680 uci = ucode_cpu_info + cpu;
681
682 p = find_patch(cpu);
683 if (!p)
684 return UCODE_NFOUND;
685
686 mc_amd = p->data;
687 uci->mc = p->data;
688
689 rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
690
691 /* need to apply patch? */
692 if (rev >= mc_amd->hdr.patch_id) {
693 ret = UCODE_OK;
694 goto out;
695 }
696
697 if (__apply_microcode_amd(mc_amd)) {
698 pr_err("CPU%d: update failed for patch_level=0x%08x\n",
699 cpu, mc_amd->hdr.patch_id);
700 return UCODE_ERROR;
701 }
702
703 rev = mc_amd->hdr.patch_id;
704 ret = UCODE_UPDATED;
705
706 pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev);
707
708out:
709 uci->cpu_sig.rev = rev;
710 c->microcode = rev;
711
712 /* Update boot_cpu_data's revision too, if we're on the BSP: */
713 if (c->cpu_index == boot_cpu_data.cpu_index)
714 boot_cpu_data.microcode = rev;
715
716 return ret;
717}
718
719static size_t install_equiv_cpu_table(const u8 *buf, size_t buf_size)
720{
721 u32 equiv_tbl_len;
722 const u32 *hdr;
723
724 if (!verify_equivalence_table(buf, buf_size, false))
725 return 0;
726
727 hdr = (const u32 *)buf;
728 equiv_tbl_len = hdr[2];
729
730 equiv_table.entry = vmalloc(equiv_tbl_len);
731 if (!equiv_table.entry) {
732 pr_err("failed to allocate equivalent CPU table\n");
733 return 0;
734 }
735
736 memcpy(equiv_table.entry, buf + CONTAINER_HDR_SZ, equiv_tbl_len);
737 equiv_table.num_entries = equiv_tbl_len / sizeof(struct equiv_cpu_entry);
738
739 /* add header length */
740 return equiv_tbl_len + CONTAINER_HDR_SZ;
741}
742
743static void free_equiv_cpu_table(void)
744{
745 vfree(equiv_table.entry);
746 memset(&equiv_table, 0, sizeof(equiv_table));
747}
748
749static void cleanup(void)
750{
751 free_equiv_cpu_table();
752 free_cache();
753}
754
755/*
756 * Return a non-negative value even if some of the checks failed so that
757 * we can skip over the next patch. If we return a negative value, we
758 * signal a grave error like a memory allocation has failed and the
759 * driver cannot continue functioning normally. In such cases, we tear
760 * down everything we've used up so far and exit.
761 */
762static int verify_and_add_patch(u8 family, u8 *fw, unsigned int leftover,
763 unsigned int *patch_size)
764{
765 struct microcode_header_amd *mc_hdr;
766 struct ucode_patch *patch;
767 u16 proc_id;
768 int ret;
769
770 ret = verify_patch(family, fw, leftover, patch_size, false);
771 if (ret)
772 return ret;
773
774 patch = kzalloc(sizeof(*patch), GFP_KERNEL);
775 if (!patch) {
776 pr_err("Patch allocation failure.\n");
777 return -EINVAL;
778 }
779
780 patch->data = kmemdup(fw + SECTION_HDR_SIZE, *patch_size, GFP_KERNEL);
781 if (!patch->data) {
782 pr_err("Patch data allocation failure.\n");
783 kfree(patch);
784 return -EINVAL;
785 }
786
787 mc_hdr = (struct microcode_header_amd *)(fw + SECTION_HDR_SIZE);
788 proc_id = mc_hdr->processor_rev_id;
789
790 INIT_LIST_HEAD(&patch->plist);
791 patch->patch_id = mc_hdr->patch_id;
792 patch->equiv_cpu = proc_id;
793
794 pr_debug("%s: Added patch_id: 0x%08x, proc_id: 0x%04x\n",
795 __func__, patch->patch_id, proc_id);
796
797 /* ... and add to cache. */
798 update_cache(patch);
799
800 return 0;
801}
802
803static enum ucode_state __load_microcode_amd(u8 family, const u8 *data,
804 size_t size)
805{
806 u8 *fw = (u8 *)data;
807 size_t offset;
808
809 offset = install_equiv_cpu_table(data, size);
810 if (!offset)
811 return UCODE_ERROR;
812
813 fw += offset;
814 size -= offset;
815
816 if (*(u32 *)fw != UCODE_UCODE_TYPE) {
817 pr_err("invalid type field in container file section header\n");
818 free_equiv_cpu_table();
819 return UCODE_ERROR;
820 }
821
822 while (size > 0) {
823 unsigned int crnt_size = 0;
824 int ret;
825
826 ret = verify_and_add_patch(family, fw, size, &crnt_size);
827 if (ret < 0)
828 return UCODE_ERROR;
829
830 fw += crnt_size + SECTION_HDR_SIZE;
831 size -= (crnt_size + SECTION_HDR_SIZE);
832 }
833
834 return UCODE_OK;
835}
836
837static enum ucode_state
838load_microcode_amd(bool save, u8 family, const u8 *data, size_t size)
839{
840 struct ucode_patch *p;
841 enum ucode_state ret;
842
843 /* free old equiv table */
844 free_equiv_cpu_table();
845
846 ret = __load_microcode_amd(family, data, size);
847 if (ret != UCODE_OK) {
848 cleanup();
849 return ret;
850 }
851
852 p = find_patch(0);
853 if (!p) {
854 return ret;
855 } else {
856 if (boot_cpu_data.microcode >= p->patch_id)
857 return ret;
858
859 ret = UCODE_NEW;
860 }
861
862 /* save BSP's matching patch for early load */
863 if (!save)
864 return ret;
865
866 memset(amd_ucode_patch, 0, PATCH_MAX_SIZE);
867 memcpy(amd_ucode_patch, p->data, min_t(u32, ksize(p->data), PATCH_MAX_SIZE));
868
869 return ret;
870}
871
872/*
873 * AMD microcode firmware naming convention, up to family 15h they are in
874 * the legacy file:
875 *
876 * amd-ucode/microcode_amd.bin
877 *
878 * This legacy file is always smaller than 2K in size.
879 *
880 * Beginning with family 15h, they are in family-specific firmware files:
881 *
882 * amd-ucode/microcode_amd_fam15h.bin
883 * amd-ucode/microcode_amd_fam16h.bin
884 * ...
885 *
886 * These might be larger than 2K.
887 */
888static enum ucode_state request_microcode_amd(int cpu, struct device *device,
889 bool refresh_fw)
890{
891 char fw_name[36] = "amd-ucode/microcode_amd.bin";
892 struct cpuinfo_x86 *c = &cpu_data(cpu);
893 bool bsp = c->cpu_index == boot_cpu_data.cpu_index;
894 enum ucode_state ret = UCODE_NFOUND;
895 const struct firmware *fw;
896
897 /* reload ucode container only on the boot cpu */
898 if (!refresh_fw || !bsp)
899 return UCODE_OK;
900
901 if (c->x86 >= 0x15)
902 snprintf(fw_name, sizeof(fw_name), "amd-ucode/microcode_amd_fam%.2xh.bin", c->x86);
903
904 if (request_firmware_direct(&fw, (const char *)fw_name, device)) {
905 pr_debug("failed to load file %s\n", fw_name);
906 goto out;
907 }
908
909 ret = UCODE_ERROR;
910 if (!verify_container(fw->data, fw->size, false))
911 goto fw_release;
912
913 ret = load_microcode_amd(bsp, c->x86, fw->data, fw->size);
914
915 fw_release:
916 release_firmware(fw);
917
918 out:
919 return ret;
920}
921
922static enum ucode_state
923request_microcode_user(int cpu, const void __user *buf, size_t size)
924{
925 return UCODE_ERROR;
926}
927
928static void microcode_fini_cpu_amd(int cpu)
929{
930 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
931
932 uci->mc = NULL;
933}
934
935static struct microcode_ops microcode_amd_ops = {
936 .request_microcode_user = request_microcode_user,
937 .request_microcode_fw = request_microcode_amd,
938 .collect_cpu_info = collect_cpu_info_amd,
939 .apply_microcode = apply_microcode_amd,
940 .microcode_fini_cpu = microcode_fini_cpu_amd,
941};
942
943struct microcode_ops * __init init_amd_microcode(void)
944{
945 struct cpuinfo_x86 *c = &boot_cpu_data;
946
947 if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
948 pr_warn("AMD CPU family 0x%x not supported\n", c->x86);
949 return NULL;
950 }
951
952 if (ucode_new_rev)
953 pr_info_once("microcode updated early to new patch_level=0x%08x\n",
954 ucode_new_rev);
955
956 return µcode_amd_ops;
957}
958
959void __exit exit_amd_microcode(void)
960{
961 cleanup();
962}