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1/***********************license start***************
2 * Author: Cavium Networks
3 *
4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK
6 *
7 * Copyright (c) 2003-2017 Cavium, Inc.
8 *
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
17 * details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * or visit http://www.gnu.org/licenses/.
23 *
24 * This file may also be available under a different license from Cavium.
25 * Contact Cavium Networks for more information
26 ***********************license end**************************************/
27
28#ifndef __CVMX_PCIERCX_DEFS_H__
29#define __CVMX_PCIERCX_DEFS_H__
30
31#include <uapi/asm/bitfield.h>
32
33#define CVMX_PCIERCX_CFG001(block_id) (0x0000000000000004ull)
34#define CVMX_PCIERCX_CFG006(block_id) (0x0000000000000018ull)
35#define CVMX_PCIERCX_CFG008(block_id) (0x0000000000000020ull)
36#define CVMX_PCIERCX_CFG009(block_id) (0x0000000000000024ull)
37#define CVMX_PCIERCX_CFG010(block_id) (0x0000000000000028ull)
38#define CVMX_PCIERCX_CFG011(block_id) (0x000000000000002Cull)
39#define CVMX_PCIERCX_CFG030(block_id) (0x0000000000000078ull)
40#define CVMX_PCIERCX_CFG031(block_id) (0x000000000000007Cull)
41#define CVMX_PCIERCX_CFG032(block_id) (0x0000000000000080ull)
42#define CVMX_PCIERCX_CFG034(block_id) (0x0000000000000088ull)
43#define CVMX_PCIERCX_CFG035(block_id) (0x000000000000008Cull)
44#define CVMX_PCIERCX_CFG040(block_id) (0x00000000000000A0ull)
45#define CVMX_PCIERCX_CFG066(block_id) (0x0000000000000108ull)
46#define CVMX_PCIERCX_CFG069(block_id) (0x0000000000000114ull)
47#define CVMX_PCIERCX_CFG070(block_id) (0x0000000000000118ull)
48#define CVMX_PCIERCX_CFG075(block_id) (0x000000000000012Cull)
49#define CVMX_PCIERCX_CFG448(block_id) (0x0000000000000700ull)
50#define CVMX_PCIERCX_CFG452(block_id) (0x0000000000000710ull)
51#define CVMX_PCIERCX_CFG455(block_id) (0x000000000000071Cull)
52#define CVMX_PCIERCX_CFG515(block_id) (0x000000000000080Cull)
53
54union cvmx_pciercx_cfg001 {
55 uint32_t u32;
56 struct cvmx_pciercx_cfg001_s {
57 __BITFIELD_FIELD(uint32_t dpe:1,
58 __BITFIELD_FIELD(uint32_t sse:1,
59 __BITFIELD_FIELD(uint32_t rma:1,
60 __BITFIELD_FIELD(uint32_t rta:1,
61 __BITFIELD_FIELD(uint32_t sta:1,
62 __BITFIELD_FIELD(uint32_t devt:2,
63 __BITFIELD_FIELD(uint32_t mdpe:1,
64 __BITFIELD_FIELD(uint32_t fbb:1,
65 __BITFIELD_FIELD(uint32_t reserved_22_22:1,
66 __BITFIELD_FIELD(uint32_t m66:1,
67 __BITFIELD_FIELD(uint32_t cl:1,
68 __BITFIELD_FIELD(uint32_t i_stat:1,
69 __BITFIELD_FIELD(uint32_t reserved_11_18:8,
70 __BITFIELD_FIELD(uint32_t i_dis:1,
71 __BITFIELD_FIELD(uint32_t fbbe:1,
72 __BITFIELD_FIELD(uint32_t see:1,
73 __BITFIELD_FIELD(uint32_t ids_wcc:1,
74 __BITFIELD_FIELD(uint32_t per:1,
75 __BITFIELD_FIELD(uint32_t vps:1,
76 __BITFIELD_FIELD(uint32_t mwice:1,
77 __BITFIELD_FIELD(uint32_t scse:1,
78 __BITFIELD_FIELD(uint32_t me:1,
79 __BITFIELD_FIELD(uint32_t msae:1,
80 __BITFIELD_FIELD(uint32_t isae:1,
81 ;))))))))))))))))))))))))
82 } s;
83};
84
85union cvmx_pciercx_cfg006 {
86 uint32_t u32;
87 struct cvmx_pciercx_cfg006_s {
88 __BITFIELD_FIELD(uint32_t slt:8,
89 __BITFIELD_FIELD(uint32_t subbnum:8,
90 __BITFIELD_FIELD(uint32_t sbnum:8,
91 __BITFIELD_FIELD(uint32_t pbnum:8,
92 ;))))
93 } s;
94};
95
96union cvmx_pciercx_cfg008 {
97 uint32_t u32;
98 struct cvmx_pciercx_cfg008_s {
99 __BITFIELD_FIELD(uint32_t ml_addr:12,
100 __BITFIELD_FIELD(uint32_t reserved_16_19:4,
101 __BITFIELD_FIELD(uint32_t mb_addr:12,
102 __BITFIELD_FIELD(uint32_t reserved_0_3:4,
103 ;))))
104 } s;
105};
106
107union cvmx_pciercx_cfg009 {
108 uint32_t u32;
109 struct cvmx_pciercx_cfg009_s {
110 __BITFIELD_FIELD(uint32_t lmem_limit:12,
111 __BITFIELD_FIELD(uint32_t reserved_17_19:3,
112 __BITFIELD_FIELD(uint32_t mem64b:1,
113 __BITFIELD_FIELD(uint32_t lmem_base:12,
114 __BITFIELD_FIELD(uint32_t reserved_1_3:3,
115 __BITFIELD_FIELD(uint32_t mem64a:1,
116 ;))))))
117 } s;
118};
119
120union cvmx_pciercx_cfg010 {
121 uint32_t u32;
122 struct cvmx_pciercx_cfg010_s {
123 uint32_t umem_base;
124 } s;
125};
126
127union cvmx_pciercx_cfg011 {
128 uint32_t u32;
129 struct cvmx_pciercx_cfg011_s {
130 uint32_t umem_limit;
131 } s;
132};
133
134union cvmx_pciercx_cfg030 {
135 uint32_t u32;
136 struct cvmx_pciercx_cfg030_s {
137 __BITFIELD_FIELD(uint32_t reserved_22_31:10,
138 __BITFIELD_FIELD(uint32_t tp:1,
139 __BITFIELD_FIELD(uint32_t ap_d:1,
140 __BITFIELD_FIELD(uint32_t ur_d:1,
141 __BITFIELD_FIELD(uint32_t fe_d:1,
142 __BITFIELD_FIELD(uint32_t nfe_d:1,
143 __BITFIELD_FIELD(uint32_t ce_d:1,
144 __BITFIELD_FIELD(uint32_t reserved_15_15:1,
145 __BITFIELD_FIELD(uint32_t mrrs:3,
146 __BITFIELD_FIELD(uint32_t ns_en:1,
147 __BITFIELD_FIELD(uint32_t ap_en:1,
148 __BITFIELD_FIELD(uint32_t pf_en:1,
149 __BITFIELD_FIELD(uint32_t etf_en:1,
150 __BITFIELD_FIELD(uint32_t mps:3,
151 __BITFIELD_FIELD(uint32_t ro_en:1,
152 __BITFIELD_FIELD(uint32_t ur_en:1,
153 __BITFIELD_FIELD(uint32_t fe_en:1,
154 __BITFIELD_FIELD(uint32_t nfe_en:1,
155 __BITFIELD_FIELD(uint32_t ce_en:1,
156 ;)))))))))))))))))))
157 } s;
158};
159
160union cvmx_pciercx_cfg031 {
161 uint32_t u32;
162 struct cvmx_pciercx_cfg031_s {
163 __BITFIELD_FIELD(uint32_t pnum:8,
164 __BITFIELD_FIELD(uint32_t reserved_23_23:1,
165 __BITFIELD_FIELD(uint32_t aspm:1,
166 __BITFIELD_FIELD(uint32_t lbnc:1,
167 __BITFIELD_FIELD(uint32_t dllarc:1,
168 __BITFIELD_FIELD(uint32_t sderc:1,
169 __BITFIELD_FIELD(uint32_t cpm:1,
170 __BITFIELD_FIELD(uint32_t l1el:3,
171 __BITFIELD_FIELD(uint32_t l0el:3,
172 __BITFIELD_FIELD(uint32_t aslpms:2,
173 __BITFIELD_FIELD(uint32_t mlw:6,
174 __BITFIELD_FIELD(uint32_t mls:4,
175 ;))))))))))))
176 } s;
177};
178
179union cvmx_pciercx_cfg032 {
180 uint32_t u32;
181 struct cvmx_pciercx_cfg032_s {
182 __BITFIELD_FIELD(uint32_t lab:1,
183 __BITFIELD_FIELD(uint32_t lbm:1,
184 __BITFIELD_FIELD(uint32_t dlla:1,
185 __BITFIELD_FIELD(uint32_t scc:1,
186 __BITFIELD_FIELD(uint32_t lt:1,
187 __BITFIELD_FIELD(uint32_t reserved_26_26:1,
188 __BITFIELD_FIELD(uint32_t nlw:6,
189 __BITFIELD_FIELD(uint32_t ls:4,
190 __BITFIELD_FIELD(uint32_t reserved_12_15:4,
191 __BITFIELD_FIELD(uint32_t lab_int_enb:1,
192 __BITFIELD_FIELD(uint32_t lbm_int_enb:1,
193 __BITFIELD_FIELD(uint32_t hawd:1,
194 __BITFIELD_FIELD(uint32_t ecpm:1,
195 __BITFIELD_FIELD(uint32_t es:1,
196 __BITFIELD_FIELD(uint32_t ccc:1,
197 __BITFIELD_FIELD(uint32_t rl:1,
198 __BITFIELD_FIELD(uint32_t ld:1,
199 __BITFIELD_FIELD(uint32_t rcb:1,
200 __BITFIELD_FIELD(uint32_t reserved_2_2:1,
201 __BITFIELD_FIELD(uint32_t aslpc:2,
202 ;))))))))))))))))))))
203 } s;
204};
205
206union cvmx_pciercx_cfg034 {
207 uint32_t u32;
208 struct cvmx_pciercx_cfg034_s {
209 __BITFIELD_FIELD(uint32_t reserved_25_31:7,
210 __BITFIELD_FIELD(uint32_t dlls_c:1,
211 __BITFIELD_FIELD(uint32_t emis:1,
212 __BITFIELD_FIELD(uint32_t pds:1,
213 __BITFIELD_FIELD(uint32_t mrlss:1,
214 __BITFIELD_FIELD(uint32_t ccint_d:1,
215 __BITFIELD_FIELD(uint32_t pd_c:1,
216 __BITFIELD_FIELD(uint32_t mrls_c:1,
217 __BITFIELD_FIELD(uint32_t pf_d:1,
218 __BITFIELD_FIELD(uint32_t abp_d:1,
219 __BITFIELD_FIELD(uint32_t reserved_13_15:3,
220 __BITFIELD_FIELD(uint32_t dlls_en:1,
221 __BITFIELD_FIELD(uint32_t emic:1,
222 __BITFIELD_FIELD(uint32_t pcc:1,
223 __BITFIELD_FIELD(uint32_t pic:1,
224 __BITFIELD_FIELD(uint32_t aic:1,
225 __BITFIELD_FIELD(uint32_t hpint_en:1,
226 __BITFIELD_FIELD(uint32_t ccint_en:1,
227 __BITFIELD_FIELD(uint32_t pd_en:1,
228 __BITFIELD_FIELD(uint32_t mrls_en:1,
229 __BITFIELD_FIELD(uint32_t pf_en:1,
230 __BITFIELD_FIELD(uint32_t abp_en:1,
231 ;))))))))))))))))))))))
232 } s;
233};
234
235union cvmx_pciercx_cfg035 {
236 uint32_t u32;
237 struct cvmx_pciercx_cfg035_s {
238 __BITFIELD_FIELD(uint32_t reserved_17_31:15,
239 __BITFIELD_FIELD(uint32_t crssv:1,
240 __BITFIELD_FIELD(uint32_t reserved_5_15:11,
241 __BITFIELD_FIELD(uint32_t crssve:1,
242 __BITFIELD_FIELD(uint32_t pmeie:1,
243 __BITFIELD_FIELD(uint32_t sefee:1,
244 __BITFIELD_FIELD(uint32_t senfee:1,
245 __BITFIELD_FIELD(uint32_t secee:1,
246 ;))))))))
247 } s;
248};
249
250union cvmx_pciercx_cfg040 {
251 uint32_t u32;
252 struct cvmx_pciercx_cfg040_s {
253 __BITFIELD_FIELD(uint32_t reserved_22_31:10,
254 __BITFIELD_FIELD(uint32_t ler:1,
255 __BITFIELD_FIELD(uint32_t ep3s:1,
256 __BITFIELD_FIELD(uint32_t ep2s:1,
257 __BITFIELD_FIELD(uint32_t ep1s:1,
258 __BITFIELD_FIELD(uint32_t eqc:1,
259 __BITFIELD_FIELD(uint32_t cdl:1,
260 __BITFIELD_FIELD(uint32_t cde:4,
261 __BITFIELD_FIELD(uint32_t csos:1,
262 __BITFIELD_FIELD(uint32_t emc:1,
263 __BITFIELD_FIELD(uint32_t tm:3,
264 __BITFIELD_FIELD(uint32_t sde:1,
265 __BITFIELD_FIELD(uint32_t hasd:1,
266 __BITFIELD_FIELD(uint32_t ec:1,
267 __BITFIELD_FIELD(uint32_t tls:4,
268 ;)))))))))))))))
269 } s;
270};
271
272union cvmx_pciercx_cfg070 {
273 uint32_t u32;
274 struct cvmx_pciercx_cfg070_s {
275 __BITFIELD_FIELD(uint32_t reserved_12_31:20,
276 __BITFIELD_FIELD(uint32_t tplp:1,
277 __BITFIELD_FIELD(uint32_t reserved_9_10:2,
278 __BITFIELD_FIELD(uint32_t ce:1,
279 __BITFIELD_FIELD(uint32_t cc:1,
280 __BITFIELD_FIELD(uint32_t ge:1,
281 __BITFIELD_FIELD(uint32_t gc:1,
282 __BITFIELD_FIELD(uint32_t fep:5,
283 ;))))))))
284 } s;
285};
286
287union cvmx_pciercx_cfg075 {
288 uint32_t u32;
289 struct cvmx_pciercx_cfg075_s {
290 __BITFIELD_FIELD(uint32_t reserved_3_31:29,
291 __BITFIELD_FIELD(uint32_t fere:1,
292 __BITFIELD_FIELD(uint32_t nfere:1,
293 __BITFIELD_FIELD(uint32_t cere:1,
294 ;))))
295 } s;
296};
297
298union cvmx_pciercx_cfg448 {
299 uint32_t u32;
300 struct cvmx_pciercx_cfg448_s {
301 __BITFIELD_FIELD(uint32_t rtl:16,
302 __BITFIELD_FIELD(uint32_t rtltl:16,
303 ;))
304 } s;
305};
306
307union cvmx_pciercx_cfg452 {
308 uint32_t u32;
309 struct cvmx_pciercx_cfg452_s {
310 __BITFIELD_FIELD(uint32_t reserved_26_31:6,
311 __BITFIELD_FIELD(uint32_t eccrc:1,
312 __BITFIELD_FIELD(uint32_t reserved_22_24:3,
313 __BITFIELD_FIELD(uint32_t lme:6,
314 __BITFIELD_FIELD(uint32_t reserved_12_15:4,
315 __BITFIELD_FIELD(uint32_t link_rate:4,
316 __BITFIELD_FIELD(uint32_t flm:1,
317 __BITFIELD_FIELD(uint32_t reserved_6_6:1,
318 __BITFIELD_FIELD(uint32_t dllle:1,
319 __BITFIELD_FIELD(uint32_t reserved_4_4:1,
320 __BITFIELD_FIELD(uint32_t ra:1,
321 __BITFIELD_FIELD(uint32_t le:1,
322 __BITFIELD_FIELD(uint32_t sd:1,
323 __BITFIELD_FIELD(uint32_t omr:1,
324 ;))))))))))))))
325 } s;
326};
327
328union cvmx_pciercx_cfg455 {
329 uint32_t u32;
330 struct cvmx_pciercx_cfg455_s {
331 __BITFIELD_FIELD(uint32_t m_cfg0_filt:1,
332 __BITFIELD_FIELD(uint32_t m_io_filt:1,
333 __BITFIELD_FIELD(uint32_t msg_ctrl:1,
334 __BITFIELD_FIELD(uint32_t m_cpl_ecrc_filt:1,
335 __BITFIELD_FIELD(uint32_t m_ecrc_filt:1,
336 __BITFIELD_FIELD(uint32_t m_cpl_len_err:1,
337 __BITFIELD_FIELD(uint32_t m_cpl_attr_err:1,
338 __BITFIELD_FIELD(uint32_t m_cpl_tc_err:1,
339 __BITFIELD_FIELD(uint32_t m_cpl_fun_err:1,
340 __BITFIELD_FIELD(uint32_t m_cpl_rid_err:1,
341 __BITFIELD_FIELD(uint32_t m_cpl_tag_err:1,
342 __BITFIELD_FIELD(uint32_t m_lk_filt:1,
343 __BITFIELD_FIELD(uint32_t m_cfg1_filt:1,
344 __BITFIELD_FIELD(uint32_t m_bar_match:1,
345 __BITFIELD_FIELD(uint32_t m_pois_filt:1,
346 __BITFIELD_FIELD(uint32_t m_fun:1,
347 __BITFIELD_FIELD(uint32_t dfcwt:1,
348 __BITFIELD_FIELD(uint32_t reserved_11_14:4,
349 __BITFIELD_FIELD(uint32_t skpiv:11,
350 ;)))))))))))))))))))
351 } s;
352};
353
354union cvmx_pciercx_cfg515 {
355 uint32_t u32;
356 struct cvmx_pciercx_cfg515_s {
357 __BITFIELD_FIELD(uint32_t reserved_21_31:11,
358 __BITFIELD_FIELD(uint32_t s_d_e:1,
359 __BITFIELD_FIELD(uint32_t ctcrb:1,
360 __BITFIELD_FIELD(uint32_t cpyts:1,
361 __BITFIELD_FIELD(uint32_t dsc:1,
362 __BITFIELD_FIELD(uint32_t le:9,
363 __BITFIELD_FIELD(uint32_t n_fts:8,
364 ;)))))))
365 } s;
366};
367
368#endif
1/***********************license start***************
2 * Author: Cavium Networks
3 *
4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK
6 *
7 * Copyright (c) 2003-2011 Cavium Networks
8 *
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
17 * details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * or visit http://www.gnu.org/licenses/.
23 *
24 * This file may also be available under a different license from Cavium.
25 * Contact Cavium Networks for more information
26 ***********************license end**************************************/
27
28#ifndef __CVMX_PCIERCX_DEFS_H__
29#define __CVMX_PCIERCX_DEFS_H__
30
31#define CVMX_PCIERCX_CFG000(block_id) (0x0000000000000000ull)
32#define CVMX_PCIERCX_CFG001(block_id) (0x0000000000000004ull)
33#define CVMX_PCIERCX_CFG002(block_id) (0x0000000000000008ull)
34#define CVMX_PCIERCX_CFG003(block_id) (0x000000000000000Cull)
35#define CVMX_PCIERCX_CFG004(block_id) (0x0000000000000010ull)
36#define CVMX_PCIERCX_CFG005(block_id) (0x0000000000000014ull)
37#define CVMX_PCIERCX_CFG006(block_id) (0x0000000000000018ull)
38#define CVMX_PCIERCX_CFG007(block_id) (0x000000000000001Cull)
39#define CVMX_PCIERCX_CFG008(block_id) (0x0000000000000020ull)
40#define CVMX_PCIERCX_CFG009(block_id) (0x0000000000000024ull)
41#define CVMX_PCIERCX_CFG010(block_id) (0x0000000000000028ull)
42#define CVMX_PCIERCX_CFG011(block_id) (0x000000000000002Cull)
43#define CVMX_PCIERCX_CFG012(block_id) (0x0000000000000030ull)
44#define CVMX_PCIERCX_CFG013(block_id) (0x0000000000000034ull)
45#define CVMX_PCIERCX_CFG014(block_id) (0x0000000000000038ull)
46#define CVMX_PCIERCX_CFG015(block_id) (0x000000000000003Cull)
47#define CVMX_PCIERCX_CFG016(block_id) (0x0000000000000040ull)
48#define CVMX_PCIERCX_CFG017(block_id) (0x0000000000000044ull)
49#define CVMX_PCIERCX_CFG020(block_id) (0x0000000000000050ull)
50#define CVMX_PCIERCX_CFG021(block_id) (0x0000000000000054ull)
51#define CVMX_PCIERCX_CFG022(block_id) (0x0000000000000058ull)
52#define CVMX_PCIERCX_CFG023(block_id) (0x000000000000005Cull)
53#define CVMX_PCIERCX_CFG028(block_id) (0x0000000000000070ull)
54#define CVMX_PCIERCX_CFG029(block_id) (0x0000000000000074ull)
55#define CVMX_PCIERCX_CFG030(block_id) (0x0000000000000078ull)
56#define CVMX_PCIERCX_CFG031(block_id) (0x000000000000007Cull)
57#define CVMX_PCIERCX_CFG032(block_id) (0x0000000000000080ull)
58#define CVMX_PCIERCX_CFG033(block_id) (0x0000000000000084ull)
59#define CVMX_PCIERCX_CFG034(block_id) (0x0000000000000088ull)
60#define CVMX_PCIERCX_CFG035(block_id) (0x000000000000008Cull)
61#define CVMX_PCIERCX_CFG036(block_id) (0x0000000000000090ull)
62#define CVMX_PCIERCX_CFG037(block_id) (0x0000000000000094ull)
63#define CVMX_PCIERCX_CFG038(block_id) (0x0000000000000098ull)
64#define CVMX_PCIERCX_CFG039(block_id) (0x000000000000009Cull)
65#define CVMX_PCIERCX_CFG040(block_id) (0x00000000000000A0ull)
66#define CVMX_PCIERCX_CFG041(block_id) (0x00000000000000A4ull)
67#define CVMX_PCIERCX_CFG042(block_id) (0x00000000000000A8ull)
68#define CVMX_PCIERCX_CFG064(block_id) (0x0000000000000100ull)
69#define CVMX_PCIERCX_CFG065(block_id) (0x0000000000000104ull)
70#define CVMX_PCIERCX_CFG066(block_id) (0x0000000000000108ull)
71#define CVMX_PCIERCX_CFG067(block_id) (0x000000000000010Cull)
72#define CVMX_PCIERCX_CFG068(block_id) (0x0000000000000110ull)
73#define CVMX_PCIERCX_CFG069(block_id) (0x0000000000000114ull)
74#define CVMX_PCIERCX_CFG070(block_id) (0x0000000000000118ull)
75#define CVMX_PCIERCX_CFG071(block_id) (0x000000000000011Cull)
76#define CVMX_PCIERCX_CFG072(block_id) (0x0000000000000120ull)
77#define CVMX_PCIERCX_CFG073(block_id) (0x0000000000000124ull)
78#define CVMX_PCIERCX_CFG074(block_id) (0x0000000000000128ull)
79#define CVMX_PCIERCX_CFG075(block_id) (0x000000000000012Cull)
80#define CVMX_PCIERCX_CFG076(block_id) (0x0000000000000130ull)
81#define CVMX_PCIERCX_CFG077(block_id) (0x0000000000000134ull)
82#define CVMX_PCIERCX_CFG448(block_id) (0x0000000000000700ull)
83#define CVMX_PCIERCX_CFG449(block_id) (0x0000000000000704ull)
84#define CVMX_PCIERCX_CFG450(block_id) (0x0000000000000708ull)
85#define CVMX_PCIERCX_CFG451(block_id) (0x000000000000070Cull)
86#define CVMX_PCIERCX_CFG452(block_id) (0x0000000000000710ull)
87#define CVMX_PCIERCX_CFG453(block_id) (0x0000000000000714ull)
88#define CVMX_PCIERCX_CFG454(block_id) (0x0000000000000718ull)
89#define CVMX_PCIERCX_CFG455(block_id) (0x000000000000071Cull)
90#define CVMX_PCIERCX_CFG456(block_id) (0x0000000000000720ull)
91#define CVMX_PCIERCX_CFG458(block_id) (0x0000000000000728ull)
92#define CVMX_PCIERCX_CFG459(block_id) (0x000000000000072Cull)
93#define CVMX_PCIERCX_CFG460(block_id) (0x0000000000000730ull)
94#define CVMX_PCIERCX_CFG461(block_id) (0x0000000000000734ull)
95#define CVMX_PCIERCX_CFG462(block_id) (0x0000000000000738ull)
96#define CVMX_PCIERCX_CFG463(block_id) (0x000000000000073Cull)
97#define CVMX_PCIERCX_CFG464(block_id) (0x0000000000000740ull)
98#define CVMX_PCIERCX_CFG465(block_id) (0x0000000000000744ull)
99#define CVMX_PCIERCX_CFG466(block_id) (0x0000000000000748ull)
100#define CVMX_PCIERCX_CFG467(block_id) (0x000000000000074Cull)
101#define CVMX_PCIERCX_CFG468(block_id) (0x0000000000000750ull)
102#define CVMX_PCIERCX_CFG490(block_id) (0x00000000000007A8ull)
103#define CVMX_PCIERCX_CFG491(block_id) (0x00000000000007ACull)
104#define CVMX_PCIERCX_CFG492(block_id) (0x00000000000007B0ull)
105#define CVMX_PCIERCX_CFG515(block_id) (0x000000000000080Cull)
106#define CVMX_PCIERCX_CFG516(block_id) (0x0000000000000810ull)
107#define CVMX_PCIERCX_CFG517(block_id) (0x0000000000000814ull)
108
109union cvmx_pciercx_cfg000 {
110 uint32_t u32;
111 struct cvmx_pciercx_cfg000_s {
112 uint32_t devid:16;
113 uint32_t vendid:16;
114 } s;
115 struct cvmx_pciercx_cfg000_s cn52xx;
116 struct cvmx_pciercx_cfg000_s cn52xxp1;
117 struct cvmx_pciercx_cfg000_s cn56xx;
118 struct cvmx_pciercx_cfg000_s cn56xxp1;
119 struct cvmx_pciercx_cfg000_s cn61xx;
120 struct cvmx_pciercx_cfg000_s cn63xx;
121 struct cvmx_pciercx_cfg000_s cn63xxp1;
122 struct cvmx_pciercx_cfg000_s cn66xx;
123 struct cvmx_pciercx_cfg000_s cn68xx;
124 struct cvmx_pciercx_cfg000_s cn68xxp1;
125};
126
127union cvmx_pciercx_cfg001 {
128 uint32_t u32;
129 struct cvmx_pciercx_cfg001_s {
130 uint32_t dpe:1;
131 uint32_t sse:1;
132 uint32_t rma:1;
133 uint32_t rta:1;
134 uint32_t sta:1;
135 uint32_t devt:2;
136 uint32_t mdpe:1;
137 uint32_t fbb:1;
138 uint32_t reserved_22_22:1;
139 uint32_t m66:1;
140 uint32_t cl:1;
141 uint32_t i_stat:1;
142 uint32_t reserved_11_18:8;
143 uint32_t i_dis:1;
144 uint32_t fbbe:1;
145 uint32_t see:1;
146 uint32_t ids_wcc:1;
147 uint32_t per:1;
148 uint32_t vps:1;
149 uint32_t mwice:1;
150 uint32_t scse:1;
151 uint32_t me:1;
152 uint32_t msae:1;
153 uint32_t isae:1;
154 } s;
155 struct cvmx_pciercx_cfg001_s cn52xx;
156 struct cvmx_pciercx_cfg001_s cn52xxp1;
157 struct cvmx_pciercx_cfg001_s cn56xx;
158 struct cvmx_pciercx_cfg001_s cn56xxp1;
159 struct cvmx_pciercx_cfg001_s cn61xx;
160 struct cvmx_pciercx_cfg001_s cn63xx;
161 struct cvmx_pciercx_cfg001_s cn63xxp1;
162 struct cvmx_pciercx_cfg001_s cn66xx;
163 struct cvmx_pciercx_cfg001_s cn68xx;
164 struct cvmx_pciercx_cfg001_s cn68xxp1;
165};
166
167union cvmx_pciercx_cfg002 {
168 uint32_t u32;
169 struct cvmx_pciercx_cfg002_s {
170 uint32_t bcc:8;
171 uint32_t sc:8;
172 uint32_t pi:8;
173 uint32_t rid:8;
174 } s;
175 struct cvmx_pciercx_cfg002_s cn52xx;
176 struct cvmx_pciercx_cfg002_s cn52xxp1;
177 struct cvmx_pciercx_cfg002_s cn56xx;
178 struct cvmx_pciercx_cfg002_s cn56xxp1;
179 struct cvmx_pciercx_cfg002_s cn61xx;
180 struct cvmx_pciercx_cfg002_s cn63xx;
181 struct cvmx_pciercx_cfg002_s cn63xxp1;
182 struct cvmx_pciercx_cfg002_s cn66xx;
183 struct cvmx_pciercx_cfg002_s cn68xx;
184 struct cvmx_pciercx_cfg002_s cn68xxp1;
185};
186
187union cvmx_pciercx_cfg003 {
188 uint32_t u32;
189 struct cvmx_pciercx_cfg003_s {
190 uint32_t bist:8;
191 uint32_t mfd:1;
192 uint32_t chf:7;
193 uint32_t lt:8;
194 uint32_t cls:8;
195 } s;
196 struct cvmx_pciercx_cfg003_s cn52xx;
197 struct cvmx_pciercx_cfg003_s cn52xxp1;
198 struct cvmx_pciercx_cfg003_s cn56xx;
199 struct cvmx_pciercx_cfg003_s cn56xxp1;
200 struct cvmx_pciercx_cfg003_s cn61xx;
201 struct cvmx_pciercx_cfg003_s cn63xx;
202 struct cvmx_pciercx_cfg003_s cn63xxp1;
203 struct cvmx_pciercx_cfg003_s cn66xx;
204 struct cvmx_pciercx_cfg003_s cn68xx;
205 struct cvmx_pciercx_cfg003_s cn68xxp1;
206};
207
208union cvmx_pciercx_cfg004 {
209 uint32_t u32;
210 struct cvmx_pciercx_cfg004_s {
211 uint32_t reserved_0_31:32;
212 } s;
213 struct cvmx_pciercx_cfg004_s cn52xx;
214 struct cvmx_pciercx_cfg004_s cn52xxp1;
215 struct cvmx_pciercx_cfg004_s cn56xx;
216 struct cvmx_pciercx_cfg004_s cn56xxp1;
217 struct cvmx_pciercx_cfg004_s cn61xx;
218 struct cvmx_pciercx_cfg004_s cn63xx;
219 struct cvmx_pciercx_cfg004_s cn63xxp1;
220 struct cvmx_pciercx_cfg004_s cn66xx;
221 struct cvmx_pciercx_cfg004_s cn68xx;
222 struct cvmx_pciercx_cfg004_s cn68xxp1;
223};
224
225union cvmx_pciercx_cfg005 {
226 uint32_t u32;
227 struct cvmx_pciercx_cfg005_s {
228 uint32_t reserved_0_31:32;
229 } s;
230 struct cvmx_pciercx_cfg005_s cn52xx;
231 struct cvmx_pciercx_cfg005_s cn52xxp1;
232 struct cvmx_pciercx_cfg005_s cn56xx;
233 struct cvmx_pciercx_cfg005_s cn56xxp1;
234 struct cvmx_pciercx_cfg005_s cn61xx;
235 struct cvmx_pciercx_cfg005_s cn63xx;
236 struct cvmx_pciercx_cfg005_s cn63xxp1;
237 struct cvmx_pciercx_cfg005_s cn66xx;
238 struct cvmx_pciercx_cfg005_s cn68xx;
239 struct cvmx_pciercx_cfg005_s cn68xxp1;
240};
241
242union cvmx_pciercx_cfg006 {
243 uint32_t u32;
244 struct cvmx_pciercx_cfg006_s {
245 uint32_t slt:8;
246 uint32_t subbnum:8;
247 uint32_t sbnum:8;
248 uint32_t pbnum:8;
249 } s;
250 struct cvmx_pciercx_cfg006_s cn52xx;
251 struct cvmx_pciercx_cfg006_s cn52xxp1;
252 struct cvmx_pciercx_cfg006_s cn56xx;
253 struct cvmx_pciercx_cfg006_s cn56xxp1;
254 struct cvmx_pciercx_cfg006_s cn61xx;
255 struct cvmx_pciercx_cfg006_s cn63xx;
256 struct cvmx_pciercx_cfg006_s cn63xxp1;
257 struct cvmx_pciercx_cfg006_s cn66xx;
258 struct cvmx_pciercx_cfg006_s cn68xx;
259 struct cvmx_pciercx_cfg006_s cn68xxp1;
260};
261
262union cvmx_pciercx_cfg007 {
263 uint32_t u32;
264 struct cvmx_pciercx_cfg007_s {
265 uint32_t dpe:1;
266 uint32_t sse:1;
267 uint32_t rma:1;
268 uint32_t rta:1;
269 uint32_t sta:1;
270 uint32_t devt:2;
271 uint32_t mdpe:1;
272 uint32_t fbb:1;
273 uint32_t reserved_22_22:1;
274 uint32_t m66:1;
275 uint32_t reserved_16_20:5;
276 uint32_t lio_limi:4;
277 uint32_t reserved_9_11:3;
278 uint32_t io32b:1;
279 uint32_t lio_base:4;
280 uint32_t reserved_1_3:3;
281 uint32_t io32a:1;
282 } s;
283 struct cvmx_pciercx_cfg007_s cn52xx;
284 struct cvmx_pciercx_cfg007_s cn52xxp1;
285 struct cvmx_pciercx_cfg007_s cn56xx;
286 struct cvmx_pciercx_cfg007_s cn56xxp1;
287 struct cvmx_pciercx_cfg007_s cn61xx;
288 struct cvmx_pciercx_cfg007_s cn63xx;
289 struct cvmx_pciercx_cfg007_s cn63xxp1;
290 struct cvmx_pciercx_cfg007_s cn66xx;
291 struct cvmx_pciercx_cfg007_s cn68xx;
292 struct cvmx_pciercx_cfg007_s cn68xxp1;
293};
294
295union cvmx_pciercx_cfg008 {
296 uint32_t u32;
297 struct cvmx_pciercx_cfg008_s {
298 uint32_t ml_addr:12;
299 uint32_t reserved_16_19:4;
300 uint32_t mb_addr:12;
301 uint32_t reserved_0_3:4;
302 } s;
303 struct cvmx_pciercx_cfg008_s cn52xx;
304 struct cvmx_pciercx_cfg008_s cn52xxp1;
305 struct cvmx_pciercx_cfg008_s cn56xx;
306 struct cvmx_pciercx_cfg008_s cn56xxp1;
307 struct cvmx_pciercx_cfg008_s cn61xx;
308 struct cvmx_pciercx_cfg008_s cn63xx;
309 struct cvmx_pciercx_cfg008_s cn63xxp1;
310 struct cvmx_pciercx_cfg008_s cn66xx;
311 struct cvmx_pciercx_cfg008_s cn68xx;
312 struct cvmx_pciercx_cfg008_s cn68xxp1;
313};
314
315union cvmx_pciercx_cfg009 {
316 uint32_t u32;
317 struct cvmx_pciercx_cfg009_s {
318 uint32_t lmem_limit:12;
319 uint32_t reserved_17_19:3;
320 uint32_t mem64b:1;
321 uint32_t lmem_base:12;
322 uint32_t reserved_1_3:3;
323 uint32_t mem64a:1;
324 } s;
325 struct cvmx_pciercx_cfg009_s cn52xx;
326 struct cvmx_pciercx_cfg009_s cn52xxp1;
327 struct cvmx_pciercx_cfg009_s cn56xx;
328 struct cvmx_pciercx_cfg009_s cn56xxp1;
329 struct cvmx_pciercx_cfg009_s cn61xx;
330 struct cvmx_pciercx_cfg009_s cn63xx;
331 struct cvmx_pciercx_cfg009_s cn63xxp1;
332 struct cvmx_pciercx_cfg009_s cn66xx;
333 struct cvmx_pciercx_cfg009_s cn68xx;
334 struct cvmx_pciercx_cfg009_s cn68xxp1;
335};
336
337union cvmx_pciercx_cfg010 {
338 uint32_t u32;
339 struct cvmx_pciercx_cfg010_s {
340 uint32_t umem_base:32;
341 } s;
342 struct cvmx_pciercx_cfg010_s cn52xx;
343 struct cvmx_pciercx_cfg010_s cn52xxp1;
344 struct cvmx_pciercx_cfg010_s cn56xx;
345 struct cvmx_pciercx_cfg010_s cn56xxp1;
346 struct cvmx_pciercx_cfg010_s cn61xx;
347 struct cvmx_pciercx_cfg010_s cn63xx;
348 struct cvmx_pciercx_cfg010_s cn63xxp1;
349 struct cvmx_pciercx_cfg010_s cn66xx;
350 struct cvmx_pciercx_cfg010_s cn68xx;
351 struct cvmx_pciercx_cfg010_s cn68xxp1;
352};
353
354union cvmx_pciercx_cfg011 {
355 uint32_t u32;
356 struct cvmx_pciercx_cfg011_s {
357 uint32_t umem_limit:32;
358 } s;
359 struct cvmx_pciercx_cfg011_s cn52xx;
360 struct cvmx_pciercx_cfg011_s cn52xxp1;
361 struct cvmx_pciercx_cfg011_s cn56xx;
362 struct cvmx_pciercx_cfg011_s cn56xxp1;
363 struct cvmx_pciercx_cfg011_s cn61xx;
364 struct cvmx_pciercx_cfg011_s cn63xx;
365 struct cvmx_pciercx_cfg011_s cn63xxp1;
366 struct cvmx_pciercx_cfg011_s cn66xx;
367 struct cvmx_pciercx_cfg011_s cn68xx;
368 struct cvmx_pciercx_cfg011_s cn68xxp1;
369};
370
371union cvmx_pciercx_cfg012 {
372 uint32_t u32;
373 struct cvmx_pciercx_cfg012_s {
374 uint32_t uio_limit:16;
375 uint32_t uio_base:16;
376 } s;
377 struct cvmx_pciercx_cfg012_s cn52xx;
378 struct cvmx_pciercx_cfg012_s cn52xxp1;
379 struct cvmx_pciercx_cfg012_s cn56xx;
380 struct cvmx_pciercx_cfg012_s cn56xxp1;
381 struct cvmx_pciercx_cfg012_s cn61xx;
382 struct cvmx_pciercx_cfg012_s cn63xx;
383 struct cvmx_pciercx_cfg012_s cn63xxp1;
384 struct cvmx_pciercx_cfg012_s cn66xx;
385 struct cvmx_pciercx_cfg012_s cn68xx;
386 struct cvmx_pciercx_cfg012_s cn68xxp1;
387};
388
389union cvmx_pciercx_cfg013 {
390 uint32_t u32;
391 struct cvmx_pciercx_cfg013_s {
392 uint32_t reserved_8_31:24;
393 uint32_t cp:8;
394 } s;
395 struct cvmx_pciercx_cfg013_s cn52xx;
396 struct cvmx_pciercx_cfg013_s cn52xxp1;
397 struct cvmx_pciercx_cfg013_s cn56xx;
398 struct cvmx_pciercx_cfg013_s cn56xxp1;
399 struct cvmx_pciercx_cfg013_s cn61xx;
400 struct cvmx_pciercx_cfg013_s cn63xx;
401 struct cvmx_pciercx_cfg013_s cn63xxp1;
402 struct cvmx_pciercx_cfg013_s cn66xx;
403 struct cvmx_pciercx_cfg013_s cn68xx;
404 struct cvmx_pciercx_cfg013_s cn68xxp1;
405};
406
407union cvmx_pciercx_cfg014 {
408 uint32_t u32;
409 struct cvmx_pciercx_cfg014_s {
410 uint32_t reserved_0_31:32;
411 } s;
412 struct cvmx_pciercx_cfg014_s cn52xx;
413 struct cvmx_pciercx_cfg014_s cn52xxp1;
414 struct cvmx_pciercx_cfg014_s cn56xx;
415 struct cvmx_pciercx_cfg014_s cn56xxp1;
416 struct cvmx_pciercx_cfg014_s cn61xx;
417 struct cvmx_pciercx_cfg014_s cn63xx;
418 struct cvmx_pciercx_cfg014_s cn63xxp1;
419 struct cvmx_pciercx_cfg014_s cn66xx;
420 struct cvmx_pciercx_cfg014_s cn68xx;
421 struct cvmx_pciercx_cfg014_s cn68xxp1;
422};
423
424union cvmx_pciercx_cfg015 {
425 uint32_t u32;
426 struct cvmx_pciercx_cfg015_s {
427 uint32_t reserved_28_31:4;
428 uint32_t dtsees:1;
429 uint32_t dts:1;
430 uint32_t sdt:1;
431 uint32_t pdt:1;
432 uint32_t fbbe:1;
433 uint32_t sbrst:1;
434 uint32_t mam:1;
435 uint32_t vga16d:1;
436 uint32_t vgae:1;
437 uint32_t isae:1;
438 uint32_t see:1;
439 uint32_t pere:1;
440 uint32_t inta:8;
441 uint32_t il:8;
442 } s;
443 struct cvmx_pciercx_cfg015_s cn52xx;
444 struct cvmx_pciercx_cfg015_s cn52xxp1;
445 struct cvmx_pciercx_cfg015_s cn56xx;
446 struct cvmx_pciercx_cfg015_s cn56xxp1;
447 struct cvmx_pciercx_cfg015_s cn61xx;
448 struct cvmx_pciercx_cfg015_s cn63xx;
449 struct cvmx_pciercx_cfg015_s cn63xxp1;
450 struct cvmx_pciercx_cfg015_s cn66xx;
451 struct cvmx_pciercx_cfg015_s cn68xx;
452 struct cvmx_pciercx_cfg015_s cn68xxp1;
453};
454
455union cvmx_pciercx_cfg016 {
456 uint32_t u32;
457 struct cvmx_pciercx_cfg016_s {
458 uint32_t pmes:5;
459 uint32_t d2s:1;
460 uint32_t d1s:1;
461 uint32_t auxc:3;
462 uint32_t dsi:1;
463 uint32_t reserved_20_20:1;
464 uint32_t pme_clock:1;
465 uint32_t pmsv:3;
466 uint32_t ncp:8;
467 uint32_t pmcid:8;
468 } s;
469 struct cvmx_pciercx_cfg016_s cn52xx;
470 struct cvmx_pciercx_cfg016_s cn52xxp1;
471 struct cvmx_pciercx_cfg016_s cn56xx;
472 struct cvmx_pciercx_cfg016_s cn56xxp1;
473 struct cvmx_pciercx_cfg016_s cn61xx;
474 struct cvmx_pciercx_cfg016_s cn63xx;
475 struct cvmx_pciercx_cfg016_s cn63xxp1;
476 struct cvmx_pciercx_cfg016_s cn66xx;
477 struct cvmx_pciercx_cfg016_s cn68xx;
478 struct cvmx_pciercx_cfg016_s cn68xxp1;
479};
480
481union cvmx_pciercx_cfg017 {
482 uint32_t u32;
483 struct cvmx_pciercx_cfg017_s {
484 uint32_t pmdia:8;
485 uint32_t bpccee:1;
486 uint32_t bd3h:1;
487 uint32_t reserved_16_21:6;
488 uint32_t pmess:1;
489 uint32_t pmedsia:2;
490 uint32_t pmds:4;
491 uint32_t pmeens:1;
492 uint32_t reserved_4_7:4;
493 uint32_t nsr:1;
494 uint32_t reserved_2_2:1;
495 uint32_t ps:2;
496 } s;
497 struct cvmx_pciercx_cfg017_s cn52xx;
498 struct cvmx_pciercx_cfg017_s cn52xxp1;
499 struct cvmx_pciercx_cfg017_s cn56xx;
500 struct cvmx_pciercx_cfg017_s cn56xxp1;
501 struct cvmx_pciercx_cfg017_s cn61xx;
502 struct cvmx_pciercx_cfg017_s cn63xx;
503 struct cvmx_pciercx_cfg017_s cn63xxp1;
504 struct cvmx_pciercx_cfg017_s cn66xx;
505 struct cvmx_pciercx_cfg017_s cn68xx;
506 struct cvmx_pciercx_cfg017_s cn68xxp1;
507};
508
509union cvmx_pciercx_cfg020 {
510 uint32_t u32;
511 struct cvmx_pciercx_cfg020_s {
512 uint32_t reserved_25_31:7;
513 uint32_t pvm:1;
514 uint32_t m64:1;
515 uint32_t mme:3;
516 uint32_t mmc:3;
517 uint32_t msien:1;
518 uint32_t ncp:8;
519 uint32_t msicid:8;
520 } s;
521 struct cvmx_pciercx_cfg020_cn52xx {
522 uint32_t reserved_24_31:8;
523 uint32_t m64:1;
524 uint32_t mme:3;
525 uint32_t mmc:3;
526 uint32_t msien:1;
527 uint32_t ncp:8;
528 uint32_t msicid:8;
529 } cn52xx;
530 struct cvmx_pciercx_cfg020_cn52xx cn52xxp1;
531 struct cvmx_pciercx_cfg020_cn52xx cn56xx;
532 struct cvmx_pciercx_cfg020_cn52xx cn56xxp1;
533 struct cvmx_pciercx_cfg020_s cn61xx;
534 struct cvmx_pciercx_cfg020_cn52xx cn63xx;
535 struct cvmx_pciercx_cfg020_cn52xx cn63xxp1;
536 struct cvmx_pciercx_cfg020_cn52xx cn66xx;
537 struct cvmx_pciercx_cfg020_cn52xx cn68xx;
538 struct cvmx_pciercx_cfg020_cn52xx cn68xxp1;
539};
540
541union cvmx_pciercx_cfg021 {
542 uint32_t u32;
543 struct cvmx_pciercx_cfg021_s {
544 uint32_t lmsi:30;
545 uint32_t reserved_0_1:2;
546 } s;
547 struct cvmx_pciercx_cfg021_s cn52xx;
548 struct cvmx_pciercx_cfg021_s cn52xxp1;
549 struct cvmx_pciercx_cfg021_s cn56xx;
550 struct cvmx_pciercx_cfg021_s cn56xxp1;
551 struct cvmx_pciercx_cfg021_s cn61xx;
552 struct cvmx_pciercx_cfg021_s cn63xx;
553 struct cvmx_pciercx_cfg021_s cn63xxp1;
554 struct cvmx_pciercx_cfg021_s cn66xx;
555 struct cvmx_pciercx_cfg021_s cn68xx;
556 struct cvmx_pciercx_cfg021_s cn68xxp1;
557};
558
559union cvmx_pciercx_cfg022 {
560 uint32_t u32;
561 struct cvmx_pciercx_cfg022_s {
562 uint32_t umsi:32;
563 } s;
564 struct cvmx_pciercx_cfg022_s cn52xx;
565 struct cvmx_pciercx_cfg022_s cn52xxp1;
566 struct cvmx_pciercx_cfg022_s cn56xx;
567 struct cvmx_pciercx_cfg022_s cn56xxp1;
568 struct cvmx_pciercx_cfg022_s cn61xx;
569 struct cvmx_pciercx_cfg022_s cn63xx;
570 struct cvmx_pciercx_cfg022_s cn63xxp1;
571 struct cvmx_pciercx_cfg022_s cn66xx;
572 struct cvmx_pciercx_cfg022_s cn68xx;
573 struct cvmx_pciercx_cfg022_s cn68xxp1;
574};
575
576union cvmx_pciercx_cfg023 {
577 uint32_t u32;
578 struct cvmx_pciercx_cfg023_s {
579 uint32_t reserved_16_31:16;
580 uint32_t msimd:16;
581 } s;
582 struct cvmx_pciercx_cfg023_s cn52xx;
583 struct cvmx_pciercx_cfg023_s cn52xxp1;
584 struct cvmx_pciercx_cfg023_s cn56xx;
585 struct cvmx_pciercx_cfg023_s cn56xxp1;
586 struct cvmx_pciercx_cfg023_s cn61xx;
587 struct cvmx_pciercx_cfg023_s cn63xx;
588 struct cvmx_pciercx_cfg023_s cn63xxp1;
589 struct cvmx_pciercx_cfg023_s cn66xx;
590 struct cvmx_pciercx_cfg023_s cn68xx;
591 struct cvmx_pciercx_cfg023_s cn68xxp1;
592};
593
594union cvmx_pciercx_cfg028 {
595 uint32_t u32;
596 struct cvmx_pciercx_cfg028_s {
597 uint32_t reserved_30_31:2;
598 uint32_t imn:5;
599 uint32_t si:1;
600 uint32_t dpt:4;
601 uint32_t pciecv:4;
602 uint32_t ncp:8;
603 uint32_t pcieid:8;
604 } s;
605 struct cvmx_pciercx_cfg028_s cn52xx;
606 struct cvmx_pciercx_cfg028_s cn52xxp1;
607 struct cvmx_pciercx_cfg028_s cn56xx;
608 struct cvmx_pciercx_cfg028_s cn56xxp1;
609 struct cvmx_pciercx_cfg028_s cn61xx;
610 struct cvmx_pciercx_cfg028_s cn63xx;
611 struct cvmx_pciercx_cfg028_s cn63xxp1;
612 struct cvmx_pciercx_cfg028_s cn66xx;
613 struct cvmx_pciercx_cfg028_s cn68xx;
614 struct cvmx_pciercx_cfg028_s cn68xxp1;
615};
616
617union cvmx_pciercx_cfg029 {
618 uint32_t u32;
619 struct cvmx_pciercx_cfg029_s {
620 uint32_t reserved_28_31:4;
621 uint32_t cspls:2;
622 uint32_t csplv:8;
623 uint32_t reserved_16_17:2;
624 uint32_t rber:1;
625 uint32_t reserved_12_14:3;
626 uint32_t el1al:3;
627 uint32_t el0al:3;
628 uint32_t etfs:1;
629 uint32_t pfs:2;
630 uint32_t mpss:3;
631 } s;
632 struct cvmx_pciercx_cfg029_s cn52xx;
633 struct cvmx_pciercx_cfg029_s cn52xxp1;
634 struct cvmx_pciercx_cfg029_s cn56xx;
635 struct cvmx_pciercx_cfg029_s cn56xxp1;
636 struct cvmx_pciercx_cfg029_s cn61xx;
637 struct cvmx_pciercx_cfg029_s cn63xx;
638 struct cvmx_pciercx_cfg029_s cn63xxp1;
639 struct cvmx_pciercx_cfg029_s cn66xx;
640 struct cvmx_pciercx_cfg029_s cn68xx;
641 struct cvmx_pciercx_cfg029_s cn68xxp1;
642};
643
644union cvmx_pciercx_cfg030 {
645 uint32_t u32;
646 struct cvmx_pciercx_cfg030_s {
647 uint32_t reserved_22_31:10;
648 uint32_t tp:1;
649 uint32_t ap_d:1;
650 uint32_t ur_d:1;
651 uint32_t fe_d:1;
652 uint32_t nfe_d:1;
653 uint32_t ce_d:1;
654 uint32_t reserved_15_15:1;
655 uint32_t mrrs:3;
656 uint32_t ns_en:1;
657 uint32_t ap_en:1;
658 uint32_t pf_en:1;
659 uint32_t etf_en:1;
660 uint32_t mps:3;
661 uint32_t ro_en:1;
662 uint32_t ur_en:1;
663 uint32_t fe_en:1;
664 uint32_t nfe_en:1;
665 uint32_t ce_en:1;
666 } s;
667 struct cvmx_pciercx_cfg030_s cn52xx;
668 struct cvmx_pciercx_cfg030_s cn52xxp1;
669 struct cvmx_pciercx_cfg030_s cn56xx;
670 struct cvmx_pciercx_cfg030_s cn56xxp1;
671 struct cvmx_pciercx_cfg030_s cn61xx;
672 struct cvmx_pciercx_cfg030_s cn63xx;
673 struct cvmx_pciercx_cfg030_s cn63xxp1;
674 struct cvmx_pciercx_cfg030_s cn66xx;
675 struct cvmx_pciercx_cfg030_s cn68xx;
676 struct cvmx_pciercx_cfg030_s cn68xxp1;
677};
678
679union cvmx_pciercx_cfg031 {
680 uint32_t u32;
681 struct cvmx_pciercx_cfg031_s {
682 uint32_t pnum:8;
683 uint32_t reserved_23_23:1;
684 uint32_t aspm:1;
685 uint32_t lbnc:1;
686 uint32_t dllarc:1;
687 uint32_t sderc:1;
688 uint32_t cpm:1;
689 uint32_t l1el:3;
690 uint32_t l0el:3;
691 uint32_t aslpms:2;
692 uint32_t mlw:6;
693 uint32_t mls:4;
694 } s;
695 struct cvmx_pciercx_cfg031_cn52xx {
696 uint32_t pnum:8;
697 uint32_t reserved_22_23:2;
698 uint32_t lbnc:1;
699 uint32_t dllarc:1;
700 uint32_t sderc:1;
701 uint32_t cpm:1;
702 uint32_t l1el:3;
703 uint32_t l0el:3;
704 uint32_t aslpms:2;
705 uint32_t mlw:6;
706 uint32_t mls:4;
707 } cn52xx;
708 struct cvmx_pciercx_cfg031_cn52xx cn52xxp1;
709 struct cvmx_pciercx_cfg031_cn52xx cn56xx;
710 struct cvmx_pciercx_cfg031_cn52xx cn56xxp1;
711 struct cvmx_pciercx_cfg031_s cn61xx;
712 struct cvmx_pciercx_cfg031_cn52xx cn63xx;
713 struct cvmx_pciercx_cfg031_cn52xx cn63xxp1;
714 struct cvmx_pciercx_cfg031_s cn66xx;
715 struct cvmx_pciercx_cfg031_s cn68xx;
716 struct cvmx_pciercx_cfg031_cn52xx cn68xxp1;
717};
718
719union cvmx_pciercx_cfg032 {
720 uint32_t u32;
721 struct cvmx_pciercx_cfg032_s {
722 uint32_t lab:1;
723 uint32_t lbm:1;
724 uint32_t dlla:1;
725 uint32_t scc:1;
726 uint32_t lt:1;
727 uint32_t reserved_26_26:1;
728 uint32_t nlw:6;
729 uint32_t ls:4;
730 uint32_t reserved_12_15:4;
731 uint32_t lab_int_enb:1;
732 uint32_t lbm_int_enb:1;
733 uint32_t hawd:1;
734 uint32_t ecpm:1;
735 uint32_t es:1;
736 uint32_t ccc:1;
737 uint32_t rl:1;
738 uint32_t ld:1;
739 uint32_t rcb:1;
740 uint32_t reserved_2_2:1;
741 uint32_t aslpc:2;
742 } s;
743 struct cvmx_pciercx_cfg032_s cn52xx;
744 struct cvmx_pciercx_cfg032_s cn52xxp1;
745 struct cvmx_pciercx_cfg032_s cn56xx;
746 struct cvmx_pciercx_cfg032_s cn56xxp1;
747 struct cvmx_pciercx_cfg032_s cn61xx;
748 struct cvmx_pciercx_cfg032_s cn63xx;
749 struct cvmx_pciercx_cfg032_s cn63xxp1;
750 struct cvmx_pciercx_cfg032_s cn66xx;
751 struct cvmx_pciercx_cfg032_s cn68xx;
752 struct cvmx_pciercx_cfg032_s cn68xxp1;
753};
754
755union cvmx_pciercx_cfg033 {
756 uint32_t u32;
757 struct cvmx_pciercx_cfg033_s {
758 uint32_t ps_num:13;
759 uint32_t nccs:1;
760 uint32_t emip:1;
761 uint32_t sp_ls:2;
762 uint32_t sp_lv:8;
763 uint32_t hp_c:1;
764 uint32_t hp_s:1;
765 uint32_t pip:1;
766 uint32_t aip:1;
767 uint32_t mrlsp:1;
768 uint32_t pcp:1;
769 uint32_t abp:1;
770 } s;
771 struct cvmx_pciercx_cfg033_s cn52xx;
772 struct cvmx_pciercx_cfg033_s cn52xxp1;
773 struct cvmx_pciercx_cfg033_s cn56xx;
774 struct cvmx_pciercx_cfg033_s cn56xxp1;
775 struct cvmx_pciercx_cfg033_s cn61xx;
776 struct cvmx_pciercx_cfg033_s cn63xx;
777 struct cvmx_pciercx_cfg033_s cn63xxp1;
778 struct cvmx_pciercx_cfg033_s cn66xx;
779 struct cvmx_pciercx_cfg033_s cn68xx;
780 struct cvmx_pciercx_cfg033_s cn68xxp1;
781};
782
783union cvmx_pciercx_cfg034 {
784 uint32_t u32;
785 struct cvmx_pciercx_cfg034_s {
786 uint32_t reserved_25_31:7;
787 uint32_t dlls_c:1;
788 uint32_t emis:1;
789 uint32_t pds:1;
790 uint32_t mrlss:1;
791 uint32_t ccint_d:1;
792 uint32_t pd_c:1;
793 uint32_t mrls_c:1;
794 uint32_t pf_d:1;
795 uint32_t abp_d:1;
796 uint32_t reserved_13_15:3;
797 uint32_t dlls_en:1;
798 uint32_t emic:1;
799 uint32_t pcc:1;
800 uint32_t pic:2;
801 uint32_t aic:2;
802 uint32_t hpint_en:1;
803 uint32_t ccint_en:1;
804 uint32_t pd_en:1;
805 uint32_t mrls_en:1;
806 uint32_t pf_en:1;
807 uint32_t abp_en:1;
808 } s;
809 struct cvmx_pciercx_cfg034_s cn52xx;
810 struct cvmx_pciercx_cfg034_s cn52xxp1;
811 struct cvmx_pciercx_cfg034_s cn56xx;
812 struct cvmx_pciercx_cfg034_s cn56xxp1;
813 struct cvmx_pciercx_cfg034_s cn61xx;
814 struct cvmx_pciercx_cfg034_s cn63xx;
815 struct cvmx_pciercx_cfg034_s cn63xxp1;
816 struct cvmx_pciercx_cfg034_s cn66xx;
817 struct cvmx_pciercx_cfg034_s cn68xx;
818 struct cvmx_pciercx_cfg034_s cn68xxp1;
819};
820
821union cvmx_pciercx_cfg035 {
822 uint32_t u32;
823 struct cvmx_pciercx_cfg035_s {
824 uint32_t reserved_17_31:15;
825 uint32_t crssv:1;
826 uint32_t reserved_5_15:11;
827 uint32_t crssve:1;
828 uint32_t pmeie:1;
829 uint32_t sefee:1;
830 uint32_t senfee:1;
831 uint32_t secee:1;
832 } s;
833 struct cvmx_pciercx_cfg035_s cn52xx;
834 struct cvmx_pciercx_cfg035_s cn52xxp1;
835 struct cvmx_pciercx_cfg035_s cn56xx;
836 struct cvmx_pciercx_cfg035_s cn56xxp1;
837 struct cvmx_pciercx_cfg035_s cn61xx;
838 struct cvmx_pciercx_cfg035_s cn63xx;
839 struct cvmx_pciercx_cfg035_s cn63xxp1;
840 struct cvmx_pciercx_cfg035_s cn66xx;
841 struct cvmx_pciercx_cfg035_s cn68xx;
842 struct cvmx_pciercx_cfg035_s cn68xxp1;
843};
844
845union cvmx_pciercx_cfg036 {
846 uint32_t u32;
847 struct cvmx_pciercx_cfg036_s {
848 uint32_t reserved_18_31:14;
849 uint32_t pme_pend:1;
850 uint32_t pme_stat:1;
851 uint32_t pme_rid:16;
852 } s;
853 struct cvmx_pciercx_cfg036_s cn52xx;
854 struct cvmx_pciercx_cfg036_s cn52xxp1;
855 struct cvmx_pciercx_cfg036_s cn56xx;
856 struct cvmx_pciercx_cfg036_s cn56xxp1;
857 struct cvmx_pciercx_cfg036_s cn61xx;
858 struct cvmx_pciercx_cfg036_s cn63xx;
859 struct cvmx_pciercx_cfg036_s cn63xxp1;
860 struct cvmx_pciercx_cfg036_s cn66xx;
861 struct cvmx_pciercx_cfg036_s cn68xx;
862 struct cvmx_pciercx_cfg036_s cn68xxp1;
863};
864
865union cvmx_pciercx_cfg037 {
866 uint32_t u32;
867 struct cvmx_pciercx_cfg037_s {
868 uint32_t reserved_14_31:18;
869 uint32_t tph:2;
870 uint32_t reserved_11_11:1;
871 uint32_t noroprpr:1;
872 uint32_t atom128s:1;
873 uint32_t atom64s:1;
874 uint32_t atom32s:1;
875 uint32_t atom_ops:1;
876 uint32_t reserved_5_5:1;
877 uint32_t ctds:1;
878 uint32_t ctrs:4;
879 } s;
880 struct cvmx_pciercx_cfg037_cn52xx {
881 uint32_t reserved_5_31:27;
882 uint32_t ctds:1;
883 uint32_t ctrs:4;
884 } cn52xx;
885 struct cvmx_pciercx_cfg037_cn52xx cn52xxp1;
886 struct cvmx_pciercx_cfg037_cn52xx cn56xx;
887 struct cvmx_pciercx_cfg037_cn52xx cn56xxp1;
888 struct cvmx_pciercx_cfg037_cn61xx {
889 uint32_t reserved_14_31:18;
890 uint32_t tph:2;
891 uint32_t reserved_11_11:1;
892 uint32_t noroprpr:1;
893 uint32_t atom128s:1;
894 uint32_t atom64s:1;
895 uint32_t atom32s:1;
896 uint32_t atom_ops:1;
897 uint32_t ari_fw:1;
898 uint32_t ctds:1;
899 uint32_t ctrs:4;
900 } cn61xx;
901 struct cvmx_pciercx_cfg037_cn52xx cn63xx;
902 struct cvmx_pciercx_cfg037_cn52xx cn63xxp1;
903 struct cvmx_pciercx_cfg037_cn66xx {
904 uint32_t reserved_14_31:18;
905 uint32_t tph:2;
906 uint32_t reserved_11_11:1;
907 uint32_t noroprpr:1;
908 uint32_t atom128s:1;
909 uint32_t atom64s:1;
910 uint32_t atom32s:1;
911 uint32_t atom_ops:1;
912 uint32_t ari:1;
913 uint32_t ctds:1;
914 uint32_t ctrs:4;
915 } cn66xx;
916 struct cvmx_pciercx_cfg037_cn66xx cn68xx;
917 struct cvmx_pciercx_cfg037_cn66xx cn68xxp1;
918};
919
920union cvmx_pciercx_cfg038 {
921 uint32_t u32;
922 struct cvmx_pciercx_cfg038_s {
923 uint32_t reserved_10_31:22;
924 uint32_t id0_cp:1;
925 uint32_t id0_rq:1;
926 uint32_t atom_op_eb:1;
927 uint32_t atom_op:1;
928 uint32_t ari:1;
929 uint32_t ctd:1;
930 uint32_t ctv:4;
931 } s;
932 struct cvmx_pciercx_cfg038_cn52xx {
933 uint32_t reserved_5_31:27;
934 uint32_t ctd:1;
935 uint32_t ctv:4;
936 } cn52xx;
937 struct cvmx_pciercx_cfg038_cn52xx cn52xxp1;
938 struct cvmx_pciercx_cfg038_cn52xx cn56xx;
939 struct cvmx_pciercx_cfg038_cn52xx cn56xxp1;
940 struct cvmx_pciercx_cfg038_s cn61xx;
941 struct cvmx_pciercx_cfg038_cn52xx cn63xx;
942 struct cvmx_pciercx_cfg038_cn52xx cn63xxp1;
943 struct cvmx_pciercx_cfg038_s cn66xx;
944 struct cvmx_pciercx_cfg038_s cn68xx;
945 struct cvmx_pciercx_cfg038_s cn68xxp1;
946};
947
948union cvmx_pciercx_cfg039 {
949 uint32_t u32;
950 struct cvmx_pciercx_cfg039_s {
951 uint32_t reserved_9_31:23;
952 uint32_t cls:1;
953 uint32_t slsv:7;
954 uint32_t reserved_0_0:1;
955 } s;
956 struct cvmx_pciercx_cfg039_cn52xx {
957 uint32_t reserved_0_31:32;
958 } cn52xx;
959 struct cvmx_pciercx_cfg039_cn52xx cn52xxp1;
960 struct cvmx_pciercx_cfg039_cn52xx cn56xx;
961 struct cvmx_pciercx_cfg039_cn52xx cn56xxp1;
962 struct cvmx_pciercx_cfg039_s cn61xx;
963 struct cvmx_pciercx_cfg039_s cn63xx;
964 struct cvmx_pciercx_cfg039_cn52xx cn63xxp1;
965 struct cvmx_pciercx_cfg039_s cn66xx;
966 struct cvmx_pciercx_cfg039_s cn68xx;
967 struct cvmx_pciercx_cfg039_s cn68xxp1;
968};
969
970union cvmx_pciercx_cfg040 {
971 uint32_t u32;
972 struct cvmx_pciercx_cfg040_s {
973 uint32_t reserved_17_31:15;
974 uint32_t cdl:1;
975 uint32_t reserved_13_15:3;
976 uint32_t cde:1;
977 uint32_t csos:1;
978 uint32_t emc:1;
979 uint32_t tm:3;
980 uint32_t sde:1;
981 uint32_t hasd:1;
982 uint32_t ec:1;
983 uint32_t tls:4;
984 } s;
985 struct cvmx_pciercx_cfg040_cn52xx {
986 uint32_t reserved_0_31:32;
987 } cn52xx;
988 struct cvmx_pciercx_cfg040_cn52xx cn52xxp1;
989 struct cvmx_pciercx_cfg040_cn52xx cn56xx;
990 struct cvmx_pciercx_cfg040_cn52xx cn56xxp1;
991 struct cvmx_pciercx_cfg040_s cn61xx;
992 struct cvmx_pciercx_cfg040_s cn63xx;
993 struct cvmx_pciercx_cfg040_s cn63xxp1;
994 struct cvmx_pciercx_cfg040_s cn66xx;
995 struct cvmx_pciercx_cfg040_s cn68xx;
996 struct cvmx_pciercx_cfg040_s cn68xxp1;
997};
998
999union cvmx_pciercx_cfg041 {
1000 uint32_t u32;
1001 struct cvmx_pciercx_cfg041_s {
1002 uint32_t reserved_0_31:32;
1003 } s;
1004 struct cvmx_pciercx_cfg041_s cn52xx;
1005 struct cvmx_pciercx_cfg041_s cn52xxp1;
1006 struct cvmx_pciercx_cfg041_s cn56xx;
1007 struct cvmx_pciercx_cfg041_s cn56xxp1;
1008 struct cvmx_pciercx_cfg041_s cn61xx;
1009 struct cvmx_pciercx_cfg041_s cn63xx;
1010 struct cvmx_pciercx_cfg041_s cn63xxp1;
1011 struct cvmx_pciercx_cfg041_s cn66xx;
1012 struct cvmx_pciercx_cfg041_s cn68xx;
1013 struct cvmx_pciercx_cfg041_s cn68xxp1;
1014};
1015
1016union cvmx_pciercx_cfg042 {
1017 uint32_t u32;
1018 struct cvmx_pciercx_cfg042_s {
1019 uint32_t reserved_0_31:32;
1020 } s;
1021 struct cvmx_pciercx_cfg042_s cn52xx;
1022 struct cvmx_pciercx_cfg042_s cn52xxp1;
1023 struct cvmx_pciercx_cfg042_s cn56xx;
1024 struct cvmx_pciercx_cfg042_s cn56xxp1;
1025 struct cvmx_pciercx_cfg042_s cn61xx;
1026 struct cvmx_pciercx_cfg042_s cn63xx;
1027 struct cvmx_pciercx_cfg042_s cn63xxp1;
1028 struct cvmx_pciercx_cfg042_s cn66xx;
1029 struct cvmx_pciercx_cfg042_s cn68xx;
1030 struct cvmx_pciercx_cfg042_s cn68xxp1;
1031};
1032
1033union cvmx_pciercx_cfg064 {
1034 uint32_t u32;
1035 struct cvmx_pciercx_cfg064_s {
1036 uint32_t nco:12;
1037 uint32_t cv:4;
1038 uint32_t pcieec:16;
1039 } s;
1040 struct cvmx_pciercx_cfg064_s cn52xx;
1041 struct cvmx_pciercx_cfg064_s cn52xxp1;
1042 struct cvmx_pciercx_cfg064_s cn56xx;
1043 struct cvmx_pciercx_cfg064_s cn56xxp1;
1044 struct cvmx_pciercx_cfg064_s cn61xx;
1045 struct cvmx_pciercx_cfg064_s cn63xx;
1046 struct cvmx_pciercx_cfg064_s cn63xxp1;
1047 struct cvmx_pciercx_cfg064_s cn66xx;
1048 struct cvmx_pciercx_cfg064_s cn68xx;
1049 struct cvmx_pciercx_cfg064_s cn68xxp1;
1050};
1051
1052union cvmx_pciercx_cfg065 {
1053 uint32_t u32;
1054 struct cvmx_pciercx_cfg065_s {
1055 uint32_t reserved_25_31:7;
1056 uint32_t uatombs:1;
1057 uint32_t reserved_21_23:3;
1058 uint32_t ures:1;
1059 uint32_t ecrces:1;
1060 uint32_t mtlps:1;
1061 uint32_t ros:1;
1062 uint32_t ucs:1;
1063 uint32_t cas:1;
1064 uint32_t cts:1;
1065 uint32_t fcpes:1;
1066 uint32_t ptlps:1;
1067 uint32_t reserved_6_11:6;
1068 uint32_t sdes:1;
1069 uint32_t dlpes:1;
1070 uint32_t reserved_0_3:4;
1071 } s;
1072 struct cvmx_pciercx_cfg065_cn52xx {
1073 uint32_t reserved_21_31:11;
1074 uint32_t ures:1;
1075 uint32_t ecrces:1;
1076 uint32_t mtlps:1;
1077 uint32_t ros:1;
1078 uint32_t ucs:1;
1079 uint32_t cas:1;
1080 uint32_t cts:1;
1081 uint32_t fcpes:1;
1082 uint32_t ptlps:1;
1083 uint32_t reserved_6_11:6;
1084 uint32_t sdes:1;
1085 uint32_t dlpes:1;
1086 uint32_t reserved_0_3:4;
1087 } cn52xx;
1088 struct cvmx_pciercx_cfg065_cn52xx cn52xxp1;
1089 struct cvmx_pciercx_cfg065_cn52xx cn56xx;
1090 struct cvmx_pciercx_cfg065_cn52xx cn56xxp1;
1091 struct cvmx_pciercx_cfg065_s cn61xx;
1092 struct cvmx_pciercx_cfg065_cn52xx cn63xx;
1093 struct cvmx_pciercx_cfg065_cn52xx cn63xxp1;
1094 struct cvmx_pciercx_cfg065_s cn66xx;
1095 struct cvmx_pciercx_cfg065_s cn68xx;
1096 struct cvmx_pciercx_cfg065_cn52xx cn68xxp1;
1097};
1098
1099union cvmx_pciercx_cfg066 {
1100 uint32_t u32;
1101 struct cvmx_pciercx_cfg066_s {
1102 uint32_t reserved_25_31:7;
1103 uint32_t uatombm:1;
1104 uint32_t reserved_21_23:3;
1105 uint32_t urem:1;
1106 uint32_t ecrcem:1;
1107 uint32_t mtlpm:1;
1108 uint32_t rom:1;
1109 uint32_t ucm:1;
1110 uint32_t cam:1;
1111 uint32_t ctm:1;
1112 uint32_t fcpem:1;
1113 uint32_t ptlpm:1;
1114 uint32_t reserved_6_11:6;
1115 uint32_t sdem:1;
1116 uint32_t dlpem:1;
1117 uint32_t reserved_0_3:4;
1118 } s;
1119 struct cvmx_pciercx_cfg066_cn52xx {
1120 uint32_t reserved_21_31:11;
1121 uint32_t urem:1;
1122 uint32_t ecrcem:1;
1123 uint32_t mtlpm:1;
1124 uint32_t rom:1;
1125 uint32_t ucm:1;
1126 uint32_t cam:1;
1127 uint32_t ctm:1;
1128 uint32_t fcpem:1;
1129 uint32_t ptlpm:1;
1130 uint32_t reserved_6_11:6;
1131 uint32_t sdem:1;
1132 uint32_t dlpem:1;
1133 uint32_t reserved_0_3:4;
1134 } cn52xx;
1135 struct cvmx_pciercx_cfg066_cn52xx cn52xxp1;
1136 struct cvmx_pciercx_cfg066_cn52xx cn56xx;
1137 struct cvmx_pciercx_cfg066_cn52xx cn56xxp1;
1138 struct cvmx_pciercx_cfg066_s cn61xx;
1139 struct cvmx_pciercx_cfg066_cn52xx cn63xx;
1140 struct cvmx_pciercx_cfg066_cn52xx cn63xxp1;
1141 struct cvmx_pciercx_cfg066_s cn66xx;
1142 struct cvmx_pciercx_cfg066_s cn68xx;
1143 struct cvmx_pciercx_cfg066_cn52xx cn68xxp1;
1144};
1145
1146union cvmx_pciercx_cfg067 {
1147 uint32_t u32;
1148 struct cvmx_pciercx_cfg067_s {
1149 uint32_t reserved_25_31:7;
1150 uint32_t uatombs:1;
1151 uint32_t reserved_21_23:3;
1152 uint32_t ures:1;
1153 uint32_t ecrces:1;
1154 uint32_t mtlps:1;
1155 uint32_t ros:1;
1156 uint32_t ucs:1;
1157 uint32_t cas:1;
1158 uint32_t cts:1;
1159 uint32_t fcpes:1;
1160 uint32_t ptlps:1;
1161 uint32_t reserved_6_11:6;
1162 uint32_t sdes:1;
1163 uint32_t dlpes:1;
1164 uint32_t reserved_0_3:4;
1165 } s;
1166 struct cvmx_pciercx_cfg067_cn52xx {
1167 uint32_t reserved_21_31:11;
1168 uint32_t ures:1;
1169 uint32_t ecrces:1;
1170 uint32_t mtlps:1;
1171 uint32_t ros:1;
1172 uint32_t ucs:1;
1173 uint32_t cas:1;
1174 uint32_t cts:1;
1175 uint32_t fcpes:1;
1176 uint32_t ptlps:1;
1177 uint32_t reserved_6_11:6;
1178 uint32_t sdes:1;
1179 uint32_t dlpes:1;
1180 uint32_t reserved_0_3:4;
1181 } cn52xx;
1182 struct cvmx_pciercx_cfg067_cn52xx cn52xxp1;
1183 struct cvmx_pciercx_cfg067_cn52xx cn56xx;
1184 struct cvmx_pciercx_cfg067_cn52xx cn56xxp1;
1185 struct cvmx_pciercx_cfg067_s cn61xx;
1186 struct cvmx_pciercx_cfg067_cn52xx cn63xx;
1187 struct cvmx_pciercx_cfg067_cn52xx cn63xxp1;
1188 struct cvmx_pciercx_cfg067_s cn66xx;
1189 struct cvmx_pciercx_cfg067_s cn68xx;
1190 struct cvmx_pciercx_cfg067_cn52xx cn68xxp1;
1191};
1192
1193union cvmx_pciercx_cfg068 {
1194 uint32_t u32;
1195 struct cvmx_pciercx_cfg068_s {
1196 uint32_t reserved_14_31:18;
1197 uint32_t anfes:1;
1198 uint32_t rtts:1;
1199 uint32_t reserved_9_11:3;
1200 uint32_t rnrs:1;
1201 uint32_t bdllps:1;
1202 uint32_t btlps:1;
1203 uint32_t reserved_1_5:5;
1204 uint32_t res:1;
1205 } s;
1206 struct cvmx_pciercx_cfg068_s cn52xx;
1207 struct cvmx_pciercx_cfg068_s cn52xxp1;
1208 struct cvmx_pciercx_cfg068_s cn56xx;
1209 struct cvmx_pciercx_cfg068_s cn56xxp1;
1210 struct cvmx_pciercx_cfg068_s cn61xx;
1211 struct cvmx_pciercx_cfg068_s cn63xx;
1212 struct cvmx_pciercx_cfg068_s cn63xxp1;
1213 struct cvmx_pciercx_cfg068_s cn66xx;
1214 struct cvmx_pciercx_cfg068_s cn68xx;
1215 struct cvmx_pciercx_cfg068_s cn68xxp1;
1216};
1217
1218union cvmx_pciercx_cfg069 {
1219 uint32_t u32;
1220 struct cvmx_pciercx_cfg069_s {
1221 uint32_t reserved_14_31:18;
1222 uint32_t anfem:1;
1223 uint32_t rttm:1;
1224 uint32_t reserved_9_11:3;
1225 uint32_t rnrm:1;
1226 uint32_t bdllpm:1;
1227 uint32_t btlpm:1;
1228 uint32_t reserved_1_5:5;
1229 uint32_t rem:1;
1230 } s;
1231 struct cvmx_pciercx_cfg069_s cn52xx;
1232 struct cvmx_pciercx_cfg069_s cn52xxp1;
1233 struct cvmx_pciercx_cfg069_s cn56xx;
1234 struct cvmx_pciercx_cfg069_s cn56xxp1;
1235 struct cvmx_pciercx_cfg069_s cn61xx;
1236 struct cvmx_pciercx_cfg069_s cn63xx;
1237 struct cvmx_pciercx_cfg069_s cn63xxp1;
1238 struct cvmx_pciercx_cfg069_s cn66xx;
1239 struct cvmx_pciercx_cfg069_s cn68xx;
1240 struct cvmx_pciercx_cfg069_s cn68xxp1;
1241};
1242
1243union cvmx_pciercx_cfg070 {
1244 uint32_t u32;
1245 struct cvmx_pciercx_cfg070_s {
1246 uint32_t reserved_9_31:23;
1247 uint32_t ce:1;
1248 uint32_t cc:1;
1249 uint32_t ge:1;
1250 uint32_t gc:1;
1251 uint32_t fep:5;
1252 } s;
1253 struct cvmx_pciercx_cfg070_s cn52xx;
1254 struct cvmx_pciercx_cfg070_s cn52xxp1;
1255 struct cvmx_pciercx_cfg070_s cn56xx;
1256 struct cvmx_pciercx_cfg070_s cn56xxp1;
1257 struct cvmx_pciercx_cfg070_s cn61xx;
1258 struct cvmx_pciercx_cfg070_s cn63xx;
1259 struct cvmx_pciercx_cfg070_s cn63xxp1;
1260 struct cvmx_pciercx_cfg070_s cn66xx;
1261 struct cvmx_pciercx_cfg070_s cn68xx;
1262 struct cvmx_pciercx_cfg070_s cn68xxp1;
1263};
1264
1265union cvmx_pciercx_cfg071 {
1266 uint32_t u32;
1267 struct cvmx_pciercx_cfg071_s {
1268 uint32_t dword1:32;
1269 } s;
1270 struct cvmx_pciercx_cfg071_s cn52xx;
1271 struct cvmx_pciercx_cfg071_s cn52xxp1;
1272 struct cvmx_pciercx_cfg071_s cn56xx;
1273 struct cvmx_pciercx_cfg071_s cn56xxp1;
1274 struct cvmx_pciercx_cfg071_s cn61xx;
1275 struct cvmx_pciercx_cfg071_s cn63xx;
1276 struct cvmx_pciercx_cfg071_s cn63xxp1;
1277 struct cvmx_pciercx_cfg071_s cn66xx;
1278 struct cvmx_pciercx_cfg071_s cn68xx;
1279 struct cvmx_pciercx_cfg071_s cn68xxp1;
1280};
1281
1282union cvmx_pciercx_cfg072 {
1283 uint32_t u32;
1284 struct cvmx_pciercx_cfg072_s {
1285 uint32_t dword2:32;
1286 } s;
1287 struct cvmx_pciercx_cfg072_s cn52xx;
1288 struct cvmx_pciercx_cfg072_s cn52xxp1;
1289 struct cvmx_pciercx_cfg072_s cn56xx;
1290 struct cvmx_pciercx_cfg072_s cn56xxp1;
1291 struct cvmx_pciercx_cfg072_s cn61xx;
1292 struct cvmx_pciercx_cfg072_s cn63xx;
1293 struct cvmx_pciercx_cfg072_s cn63xxp1;
1294 struct cvmx_pciercx_cfg072_s cn66xx;
1295 struct cvmx_pciercx_cfg072_s cn68xx;
1296 struct cvmx_pciercx_cfg072_s cn68xxp1;
1297};
1298
1299union cvmx_pciercx_cfg073 {
1300 uint32_t u32;
1301 struct cvmx_pciercx_cfg073_s {
1302 uint32_t dword3:32;
1303 } s;
1304 struct cvmx_pciercx_cfg073_s cn52xx;
1305 struct cvmx_pciercx_cfg073_s cn52xxp1;
1306 struct cvmx_pciercx_cfg073_s cn56xx;
1307 struct cvmx_pciercx_cfg073_s cn56xxp1;
1308 struct cvmx_pciercx_cfg073_s cn61xx;
1309 struct cvmx_pciercx_cfg073_s cn63xx;
1310 struct cvmx_pciercx_cfg073_s cn63xxp1;
1311 struct cvmx_pciercx_cfg073_s cn66xx;
1312 struct cvmx_pciercx_cfg073_s cn68xx;
1313 struct cvmx_pciercx_cfg073_s cn68xxp1;
1314};
1315
1316union cvmx_pciercx_cfg074 {
1317 uint32_t u32;
1318 struct cvmx_pciercx_cfg074_s {
1319 uint32_t dword4:32;
1320 } s;
1321 struct cvmx_pciercx_cfg074_s cn52xx;
1322 struct cvmx_pciercx_cfg074_s cn52xxp1;
1323 struct cvmx_pciercx_cfg074_s cn56xx;
1324 struct cvmx_pciercx_cfg074_s cn56xxp1;
1325 struct cvmx_pciercx_cfg074_s cn61xx;
1326 struct cvmx_pciercx_cfg074_s cn63xx;
1327 struct cvmx_pciercx_cfg074_s cn63xxp1;
1328 struct cvmx_pciercx_cfg074_s cn66xx;
1329 struct cvmx_pciercx_cfg074_s cn68xx;
1330 struct cvmx_pciercx_cfg074_s cn68xxp1;
1331};
1332
1333union cvmx_pciercx_cfg075 {
1334 uint32_t u32;
1335 struct cvmx_pciercx_cfg075_s {
1336 uint32_t reserved_3_31:29;
1337 uint32_t fere:1;
1338 uint32_t nfere:1;
1339 uint32_t cere:1;
1340 } s;
1341 struct cvmx_pciercx_cfg075_s cn52xx;
1342 struct cvmx_pciercx_cfg075_s cn52xxp1;
1343 struct cvmx_pciercx_cfg075_s cn56xx;
1344 struct cvmx_pciercx_cfg075_s cn56xxp1;
1345 struct cvmx_pciercx_cfg075_s cn61xx;
1346 struct cvmx_pciercx_cfg075_s cn63xx;
1347 struct cvmx_pciercx_cfg075_s cn63xxp1;
1348 struct cvmx_pciercx_cfg075_s cn66xx;
1349 struct cvmx_pciercx_cfg075_s cn68xx;
1350 struct cvmx_pciercx_cfg075_s cn68xxp1;
1351};
1352
1353union cvmx_pciercx_cfg076 {
1354 uint32_t u32;
1355 struct cvmx_pciercx_cfg076_s {
1356 uint32_t aeimn:5;
1357 uint32_t reserved_7_26:20;
1358 uint32_t femr:1;
1359 uint32_t nfemr:1;
1360 uint32_t fuf:1;
1361 uint32_t multi_efnfr:1;
1362 uint32_t efnfr:1;
1363 uint32_t multi_ecr:1;
1364 uint32_t ecr:1;
1365 } s;
1366 struct cvmx_pciercx_cfg076_s cn52xx;
1367 struct cvmx_pciercx_cfg076_s cn52xxp1;
1368 struct cvmx_pciercx_cfg076_s cn56xx;
1369 struct cvmx_pciercx_cfg076_s cn56xxp1;
1370 struct cvmx_pciercx_cfg076_s cn61xx;
1371 struct cvmx_pciercx_cfg076_s cn63xx;
1372 struct cvmx_pciercx_cfg076_s cn63xxp1;
1373 struct cvmx_pciercx_cfg076_s cn66xx;
1374 struct cvmx_pciercx_cfg076_s cn68xx;
1375 struct cvmx_pciercx_cfg076_s cn68xxp1;
1376};
1377
1378union cvmx_pciercx_cfg077 {
1379 uint32_t u32;
1380 struct cvmx_pciercx_cfg077_s {
1381 uint32_t efnfsi:16;
1382 uint32_t ecsi:16;
1383 } s;
1384 struct cvmx_pciercx_cfg077_s cn52xx;
1385 struct cvmx_pciercx_cfg077_s cn52xxp1;
1386 struct cvmx_pciercx_cfg077_s cn56xx;
1387 struct cvmx_pciercx_cfg077_s cn56xxp1;
1388 struct cvmx_pciercx_cfg077_s cn61xx;
1389 struct cvmx_pciercx_cfg077_s cn63xx;
1390 struct cvmx_pciercx_cfg077_s cn63xxp1;
1391 struct cvmx_pciercx_cfg077_s cn66xx;
1392 struct cvmx_pciercx_cfg077_s cn68xx;
1393 struct cvmx_pciercx_cfg077_s cn68xxp1;
1394};
1395
1396union cvmx_pciercx_cfg448 {
1397 uint32_t u32;
1398 struct cvmx_pciercx_cfg448_s {
1399 uint32_t rtl:16;
1400 uint32_t rtltl:16;
1401 } s;
1402 struct cvmx_pciercx_cfg448_s cn52xx;
1403 struct cvmx_pciercx_cfg448_s cn52xxp1;
1404 struct cvmx_pciercx_cfg448_s cn56xx;
1405 struct cvmx_pciercx_cfg448_s cn56xxp1;
1406 struct cvmx_pciercx_cfg448_s cn61xx;
1407 struct cvmx_pciercx_cfg448_s cn63xx;
1408 struct cvmx_pciercx_cfg448_s cn63xxp1;
1409 struct cvmx_pciercx_cfg448_s cn66xx;
1410 struct cvmx_pciercx_cfg448_s cn68xx;
1411 struct cvmx_pciercx_cfg448_s cn68xxp1;
1412};
1413
1414union cvmx_pciercx_cfg449 {
1415 uint32_t u32;
1416 struct cvmx_pciercx_cfg449_s {
1417 uint32_t omr:32;
1418 } s;
1419 struct cvmx_pciercx_cfg449_s cn52xx;
1420 struct cvmx_pciercx_cfg449_s cn52xxp1;
1421 struct cvmx_pciercx_cfg449_s cn56xx;
1422 struct cvmx_pciercx_cfg449_s cn56xxp1;
1423 struct cvmx_pciercx_cfg449_s cn61xx;
1424 struct cvmx_pciercx_cfg449_s cn63xx;
1425 struct cvmx_pciercx_cfg449_s cn63xxp1;
1426 struct cvmx_pciercx_cfg449_s cn66xx;
1427 struct cvmx_pciercx_cfg449_s cn68xx;
1428 struct cvmx_pciercx_cfg449_s cn68xxp1;
1429};
1430
1431union cvmx_pciercx_cfg450 {
1432 uint32_t u32;
1433 struct cvmx_pciercx_cfg450_s {
1434 uint32_t lpec:8;
1435 uint32_t reserved_22_23:2;
1436 uint32_t link_state:6;
1437 uint32_t force_link:1;
1438 uint32_t reserved_8_14:7;
1439 uint32_t link_num:8;
1440 } s;
1441 struct cvmx_pciercx_cfg450_s cn52xx;
1442 struct cvmx_pciercx_cfg450_s cn52xxp1;
1443 struct cvmx_pciercx_cfg450_s cn56xx;
1444 struct cvmx_pciercx_cfg450_s cn56xxp1;
1445 struct cvmx_pciercx_cfg450_s cn61xx;
1446 struct cvmx_pciercx_cfg450_s cn63xx;
1447 struct cvmx_pciercx_cfg450_s cn63xxp1;
1448 struct cvmx_pciercx_cfg450_s cn66xx;
1449 struct cvmx_pciercx_cfg450_s cn68xx;
1450 struct cvmx_pciercx_cfg450_s cn68xxp1;
1451};
1452
1453union cvmx_pciercx_cfg451 {
1454 uint32_t u32;
1455 struct cvmx_pciercx_cfg451_s {
1456 uint32_t reserved_31_31:1;
1457 uint32_t easpml1:1;
1458 uint32_t l1el:3;
1459 uint32_t l0el:3;
1460 uint32_t n_fts_cc:8;
1461 uint32_t n_fts:8;
1462 uint32_t ack_freq:8;
1463 } s;
1464 struct cvmx_pciercx_cfg451_cn52xx {
1465 uint32_t reserved_30_31:2;
1466 uint32_t l1el:3;
1467 uint32_t l0el:3;
1468 uint32_t n_fts_cc:8;
1469 uint32_t n_fts:8;
1470 uint32_t ack_freq:8;
1471 } cn52xx;
1472 struct cvmx_pciercx_cfg451_cn52xx cn52xxp1;
1473 struct cvmx_pciercx_cfg451_cn52xx cn56xx;
1474 struct cvmx_pciercx_cfg451_cn52xx cn56xxp1;
1475 struct cvmx_pciercx_cfg451_s cn61xx;
1476 struct cvmx_pciercx_cfg451_cn52xx cn63xx;
1477 struct cvmx_pciercx_cfg451_cn52xx cn63xxp1;
1478 struct cvmx_pciercx_cfg451_s cn66xx;
1479 struct cvmx_pciercx_cfg451_s cn68xx;
1480 struct cvmx_pciercx_cfg451_s cn68xxp1;
1481};
1482
1483union cvmx_pciercx_cfg452 {
1484 uint32_t u32;
1485 struct cvmx_pciercx_cfg452_s {
1486 uint32_t reserved_26_31:6;
1487 uint32_t eccrc:1;
1488 uint32_t reserved_22_24:3;
1489 uint32_t lme:6;
1490 uint32_t reserved_8_15:8;
1491 uint32_t flm:1;
1492 uint32_t reserved_6_6:1;
1493 uint32_t dllle:1;
1494 uint32_t reserved_4_4:1;
1495 uint32_t ra:1;
1496 uint32_t le:1;
1497 uint32_t sd:1;
1498 uint32_t omr:1;
1499 } s;
1500 struct cvmx_pciercx_cfg452_s cn52xx;
1501 struct cvmx_pciercx_cfg452_s cn52xxp1;
1502 struct cvmx_pciercx_cfg452_s cn56xx;
1503 struct cvmx_pciercx_cfg452_s cn56xxp1;
1504 struct cvmx_pciercx_cfg452_cn61xx {
1505 uint32_t reserved_22_31:10;
1506 uint32_t lme:6;
1507 uint32_t reserved_8_15:8;
1508 uint32_t flm:1;
1509 uint32_t reserved_6_6:1;
1510 uint32_t dllle:1;
1511 uint32_t reserved_4_4:1;
1512 uint32_t ra:1;
1513 uint32_t le:1;
1514 uint32_t sd:1;
1515 uint32_t omr:1;
1516 } cn61xx;
1517 struct cvmx_pciercx_cfg452_s cn63xx;
1518 struct cvmx_pciercx_cfg452_s cn63xxp1;
1519 struct cvmx_pciercx_cfg452_cn61xx cn66xx;
1520 struct cvmx_pciercx_cfg452_cn61xx cn68xx;
1521 struct cvmx_pciercx_cfg452_cn61xx cn68xxp1;
1522};
1523
1524union cvmx_pciercx_cfg453 {
1525 uint32_t u32;
1526 struct cvmx_pciercx_cfg453_s {
1527 uint32_t dlld:1;
1528 uint32_t reserved_26_30:5;
1529 uint32_t ack_nak:1;
1530 uint32_t fcd:1;
1531 uint32_t ilst:24;
1532 } s;
1533 struct cvmx_pciercx_cfg453_s cn52xx;
1534 struct cvmx_pciercx_cfg453_s cn52xxp1;
1535 struct cvmx_pciercx_cfg453_s cn56xx;
1536 struct cvmx_pciercx_cfg453_s cn56xxp1;
1537 struct cvmx_pciercx_cfg453_s cn61xx;
1538 struct cvmx_pciercx_cfg453_s cn63xx;
1539 struct cvmx_pciercx_cfg453_s cn63xxp1;
1540 struct cvmx_pciercx_cfg453_s cn66xx;
1541 struct cvmx_pciercx_cfg453_s cn68xx;
1542 struct cvmx_pciercx_cfg453_s cn68xxp1;
1543};
1544
1545union cvmx_pciercx_cfg454 {
1546 uint32_t u32;
1547 struct cvmx_pciercx_cfg454_s {
1548 uint32_t cx_nfunc:3;
1549 uint32_t tmfcwt:5;
1550 uint32_t tmanlt:5;
1551 uint32_t tmrt:5;
1552 uint32_t reserved_11_13:3;
1553 uint32_t nskps:3;
1554 uint32_t reserved_0_7:8;
1555 } s;
1556 struct cvmx_pciercx_cfg454_cn52xx {
1557 uint32_t reserved_29_31:3;
1558 uint32_t tmfcwt:5;
1559 uint32_t tmanlt:5;
1560 uint32_t tmrt:5;
1561 uint32_t reserved_11_13:3;
1562 uint32_t nskps:3;
1563 uint32_t reserved_4_7:4;
1564 uint32_t ntss:4;
1565 } cn52xx;
1566 struct cvmx_pciercx_cfg454_cn52xx cn52xxp1;
1567 struct cvmx_pciercx_cfg454_cn52xx cn56xx;
1568 struct cvmx_pciercx_cfg454_cn52xx cn56xxp1;
1569 struct cvmx_pciercx_cfg454_cn61xx {
1570 uint32_t cx_nfunc:3;
1571 uint32_t tmfcwt:5;
1572 uint32_t tmanlt:5;
1573 uint32_t tmrt:5;
1574 uint32_t reserved_8_13:6;
1575 uint32_t mfuncn:8;
1576 } cn61xx;
1577 struct cvmx_pciercx_cfg454_cn52xx cn63xx;
1578 struct cvmx_pciercx_cfg454_cn52xx cn63xxp1;
1579 struct cvmx_pciercx_cfg454_cn61xx cn66xx;
1580 struct cvmx_pciercx_cfg454_cn61xx cn68xx;
1581 struct cvmx_pciercx_cfg454_cn52xx cn68xxp1;
1582};
1583
1584union cvmx_pciercx_cfg455 {
1585 uint32_t u32;
1586 struct cvmx_pciercx_cfg455_s {
1587 uint32_t m_cfg0_filt:1;
1588 uint32_t m_io_filt:1;
1589 uint32_t msg_ctrl:1;
1590 uint32_t m_cpl_ecrc_filt:1;
1591 uint32_t m_ecrc_filt:1;
1592 uint32_t m_cpl_len_err:1;
1593 uint32_t m_cpl_attr_err:1;
1594 uint32_t m_cpl_tc_err:1;
1595 uint32_t m_cpl_fun_err:1;
1596 uint32_t m_cpl_rid_err:1;
1597 uint32_t m_cpl_tag_err:1;
1598 uint32_t m_lk_filt:1;
1599 uint32_t m_cfg1_filt:1;
1600 uint32_t m_bar_match:1;
1601 uint32_t m_pois_filt:1;
1602 uint32_t m_fun:1;
1603 uint32_t dfcwt:1;
1604 uint32_t reserved_11_14:4;
1605 uint32_t skpiv:11;
1606 } s;
1607 struct cvmx_pciercx_cfg455_s cn52xx;
1608 struct cvmx_pciercx_cfg455_s cn52xxp1;
1609 struct cvmx_pciercx_cfg455_s cn56xx;
1610 struct cvmx_pciercx_cfg455_s cn56xxp1;
1611 struct cvmx_pciercx_cfg455_s cn61xx;
1612 struct cvmx_pciercx_cfg455_s cn63xx;
1613 struct cvmx_pciercx_cfg455_s cn63xxp1;
1614 struct cvmx_pciercx_cfg455_s cn66xx;
1615 struct cvmx_pciercx_cfg455_s cn68xx;
1616 struct cvmx_pciercx_cfg455_s cn68xxp1;
1617};
1618
1619union cvmx_pciercx_cfg456 {
1620 uint32_t u32;
1621 struct cvmx_pciercx_cfg456_s {
1622 uint32_t reserved_4_31:28;
1623 uint32_t m_handle_flush:1;
1624 uint32_t m_dabort_4ucpl:1;
1625 uint32_t m_vend1_drp:1;
1626 uint32_t m_vend0_drp:1;
1627 } s;
1628 struct cvmx_pciercx_cfg456_cn52xx {
1629 uint32_t reserved_2_31:30;
1630 uint32_t m_vend1_drp:1;
1631 uint32_t m_vend0_drp:1;
1632 } cn52xx;
1633 struct cvmx_pciercx_cfg456_cn52xx cn52xxp1;
1634 struct cvmx_pciercx_cfg456_cn52xx cn56xx;
1635 struct cvmx_pciercx_cfg456_cn52xx cn56xxp1;
1636 struct cvmx_pciercx_cfg456_s cn61xx;
1637 struct cvmx_pciercx_cfg456_cn52xx cn63xx;
1638 struct cvmx_pciercx_cfg456_cn52xx cn63xxp1;
1639 struct cvmx_pciercx_cfg456_s cn66xx;
1640 struct cvmx_pciercx_cfg456_s cn68xx;
1641 struct cvmx_pciercx_cfg456_cn52xx cn68xxp1;
1642};
1643
1644union cvmx_pciercx_cfg458 {
1645 uint32_t u32;
1646 struct cvmx_pciercx_cfg458_s {
1647 uint32_t dbg_info_l32:32;
1648 } s;
1649 struct cvmx_pciercx_cfg458_s cn52xx;
1650 struct cvmx_pciercx_cfg458_s cn52xxp1;
1651 struct cvmx_pciercx_cfg458_s cn56xx;
1652 struct cvmx_pciercx_cfg458_s cn56xxp1;
1653 struct cvmx_pciercx_cfg458_s cn61xx;
1654 struct cvmx_pciercx_cfg458_s cn63xx;
1655 struct cvmx_pciercx_cfg458_s cn63xxp1;
1656 struct cvmx_pciercx_cfg458_s cn66xx;
1657 struct cvmx_pciercx_cfg458_s cn68xx;
1658 struct cvmx_pciercx_cfg458_s cn68xxp1;
1659};
1660
1661union cvmx_pciercx_cfg459 {
1662 uint32_t u32;
1663 struct cvmx_pciercx_cfg459_s {
1664 uint32_t dbg_info_u32:32;
1665 } s;
1666 struct cvmx_pciercx_cfg459_s cn52xx;
1667 struct cvmx_pciercx_cfg459_s cn52xxp1;
1668 struct cvmx_pciercx_cfg459_s cn56xx;
1669 struct cvmx_pciercx_cfg459_s cn56xxp1;
1670 struct cvmx_pciercx_cfg459_s cn61xx;
1671 struct cvmx_pciercx_cfg459_s cn63xx;
1672 struct cvmx_pciercx_cfg459_s cn63xxp1;
1673 struct cvmx_pciercx_cfg459_s cn66xx;
1674 struct cvmx_pciercx_cfg459_s cn68xx;
1675 struct cvmx_pciercx_cfg459_s cn68xxp1;
1676};
1677
1678union cvmx_pciercx_cfg460 {
1679 uint32_t u32;
1680 struct cvmx_pciercx_cfg460_s {
1681 uint32_t reserved_20_31:12;
1682 uint32_t tphfcc:8;
1683 uint32_t tpdfcc:12;
1684 } s;
1685 struct cvmx_pciercx_cfg460_s cn52xx;
1686 struct cvmx_pciercx_cfg460_s cn52xxp1;
1687 struct cvmx_pciercx_cfg460_s cn56xx;
1688 struct cvmx_pciercx_cfg460_s cn56xxp1;
1689 struct cvmx_pciercx_cfg460_s cn61xx;
1690 struct cvmx_pciercx_cfg460_s cn63xx;
1691 struct cvmx_pciercx_cfg460_s cn63xxp1;
1692 struct cvmx_pciercx_cfg460_s cn66xx;
1693 struct cvmx_pciercx_cfg460_s cn68xx;
1694 struct cvmx_pciercx_cfg460_s cn68xxp1;
1695};
1696
1697union cvmx_pciercx_cfg461 {
1698 uint32_t u32;
1699 struct cvmx_pciercx_cfg461_s {
1700 uint32_t reserved_20_31:12;
1701 uint32_t tchfcc:8;
1702 uint32_t tcdfcc:12;
1703 } s;
1704 struct cvmx_pciercx_cfg461_s cn52xx;
1705 struct cvmx_pciercx_cfg461_s cn52xxp1;
1706 struct cvmx_pciercx_cfg461_s cn56xx;
1707 struct cvmx_pciercx_cfg461_s cn56xxp1;
1708 struct cvmx_pciercx_cfg461_s cn61xx;
1709 struct cvmx_pciercx_cfg461_s cn63xx;
1710 struct cvmx_pciercx_cfg461_s cn63xxp1;
1711 struct cvmx_pciercx_cfg461_s cn66xx;
1712 struct cvmx_pciercx_cfg461_s cn68xx;
1713 struct cvmx_pciercx_cfg461_s cn68xxp1;
1714};
1715
1716union cvmx_pciercx_cfg462 {
1717 uint32_t u32;
1718 struct cvmx_pciercx_cfg462_s {
1719 uint32_t reserved_20_31:12;
1720 uint32_t tchfcc:8;
1721 uint32_t tcdfcc:12;
1722 } s;
1723 struct cvmx_pciercx_cfg462_s cn52xx;
1724 struct cvmx_pciercx_cfg462_s cn52xxp1;
1725 struct cvmx_pciercx_cfg462_s cn56xx;
1726 struct cvmx_pciercx_cfg462_s cn56xxp1;
1727 struct cvmx_pciercx_cfg462_s cn61xx;
1728 struct cvmx_pciercx_cfg462_s cn63xx;
1729 struct cvmx_pciercx_cfg462_s cn63xxp1;
1730 struct cvmx_pciercx_cfg462_s cn66xx;
1731 struct cvmx_pciercx_cfg462_s cn68xx;
1732 struct cvmx_pciercx_cfg462_s cn68xxp1;
1733};
1734
1735union cvmx_pciercx_cfg463 {
1736 uint32_t u32;
1737 struct cvmx_pciercx_cfg463_s {
1738 uint32_t reserved_3_31:29;
1739 uint32_t rqne:1;
1740 uint32_t trbne:1;
1741 uint32_t rtlpfccnr:1;
1742 } s;
1743 struct cvmx_pciercx_cfg463_s cn52xx;
1744 struct cvmx_pciercx_cfg463_s cn52xxp1;
1745 struct cvmx_pciercx_cfg463_s cn56xx;
1746 struct cvmx_pciercx_cfg463_s cn56xxp1;
1747 struct cvmx_pciercx_cfg463_s cn61xx;
1748 struct cvmx_pciercx_cfg463_s cn63xx;
1749 struct cvmx_pciercx_cfg463_s cn63xxp1;
1750 struct cvmx_pciercx_cfg463_s cn66xx;
1751 struct cvmx_pciercx_cfg463_s cn68xx;
1752 struct cvmx_pciercx_cfg463_s cn68xxp1;
1753};
1754
1755union cvmx_pciercx_cfg464 {
1756 uint32_t u32;
1757 struct cvmx_pciercx_cfg464_s {
1758 uint32_t wrr_vc3:8;
1759 uint32_t wrr_vc2:8;
1760 uint32_t wrr_vc1:8;
1761 uint32_t wrr_vc0:8;
1762 } s;
1763 struct cvmx_pciercx_cfg464_s cn52xx;
1764 struct cvmx_pciercx_cfg464_s cn52xxp1;
1765 struct cvmx_pciercx_cfg464_s cn56xx;
1766 struct cvmx_pciercx_cfg464_s cn56xxp1;
1767 struct cvmx_pciercx_cfg464_s cn61xx;
1768 struct cvmx_pciercx_cfg464_s cn63xx;
1769 struct cvmx_pciercx_cfg464_s cn63xxp1;
1770 struct cvmx_pciercx_cfg464_s cn66xx;
1771 struct cvmx_pciercx_cfg464_s cn68xx;
1772 struct cvmx_pciercx_cfg464_s cn68xxp1;
1773};
1774
1775union cvmx_pciercx_cfg465 {
1776 uint32_t u32;
1777 struct cvmx_pciercx_cfg465_s {
1778 uint32_t wrr_vc7:8;
1779 uint32_t wrr_vc6:8;
1780 uint32_t wrr_vc5:8;
1781 uint32_t wrr_vc4:8;
1782 } s;
1783 struct cvmx_pciercx_cfg465_s cn52xx;
1784 struct cvmx_pciercx_cfg465_s cn52xxp1;
1785 struct cvmx_pciercx_cfg465_s cn56xx;
1786 struct cvmx_pciercx_cfg465_s cn56xxp1;
1787 struct cvmx_pciercx_cfg465_s cn61xx;
1788 struct cvmx_pciercx_cfg465_s cn63xx;
1789 struct cvmx_pciercx_cfg465_s cn63xxp1;
1790 struct cvmx_pciercx_cfg465_s cn66xx;
1791 struct cvmx_pciercx_cfg465_s cn68xx;
1792 struct cvmx_pciercx_cfg465_s cn68xxp1;
1793};
1794
1795union cvmx_pciercx_cfg466 {
1796 uint32_t u32;
1797 struct cvmx_pciercx_cfg466_s {
1798 uint32_t rx_queue_order:1;
1799 uint32_t type_ordering:1;
1800 uint32_t reserved_24_29:6;
1801 uint32_t queue_mode:3;
1802 uint32_t reserved_20_20:1;
1803 uint32_t header_credits:8;
1804 uint32_t data_credits:12;
1805 } s;
1806 struct cvmx_pciercx_cfg466_s cn52xx;
1807 struct cvmx_pciercx_cfg466_s cn52xxp1;
1808 struct cvmx_pciercx_cfg466_s cn56xx;
1809 struct cvmx_pciercx_cfg466_s cn56xxp1;
1810 struct cvmx_pciercx_cfg466_s cn61xx;
1811 struct cvmx_pciercx_cfg466_s cn63xx;
1812 struct cvmx_pciercx_cfg466_s cn63xxp1;
1813 struct cvmx_pciercx_cfg466_s cn66xx;
1814 struct cvmx_pciercx_cfg466_s cn68xx;
1815 struct cvmx_pciercx_cfg466_s cn68xxp1;
1816};
1817
1818union cvmx_pciercx_cfg467 {
1819 uint32_t u32;
1820 struct cvmx_pciercx_cfg467_s {
1821 uint32_t reserved_24_31:8;
1822 uint32_t queue_mode:3;
1823 uint32_t reserved_20_20:1;
1824 uint32_t header_credits:8;
1825 uint32_t data_credits:12;
1826 } s;
1827 struct cvmx_pciercx_cfg467_s cn52xx;
1828 struct cvmx_pciercx_cfg467_s cn52xxp1;
1829 struct cvmx_pciercx_cfg467_s cn56xx;
1830 struct cvmx_pciercx_cfg467_s cn56xxp1;
1831 struct cvmx_pciercx_cfg467_s cn61xx;
1832 struct cvmx_pciercx_cfg467_s cn63xx;
1833 struct cvmx_pciercx_cfg467_s cn63xxp1;
1834 struct cvmx_pciercx_cfg467_s cn66xx;
1835 struct cvmx_pciercx_cfg467_s cn68xx;
1836 struct cvmx_pciercx_cfg467_s cn68xxp1;
1837};
1838
1839union cvmx_pciercx_cfg468 {
1840 uint32_t u32;
1841 struct cvmx_pciercx_cfg468_s {
1842 uint32_t reserved_24_31:8;
1843 uint32_t queue_mode:3;
1844 uint32_t reserved_20_20:1;
1845 uint32_t header_credits:8;
1846 uint32_t data_credits:12;
1847 } s;
1848 struct cvmx_pciercx_cfg468_s cn52xx;
1849 struct cvmx_pciercx_cfg468_s cn52xxp1;
1850 struct cvmx_pciercx_cfg468_s cn56xx;
1851 struct cvmx_pciercx_cfg468_s cn56xxp1;
1852 struct cvmx_pciercx_cfg468_s cn61xx;
1853 struct cvmx_pciercx_cfg468_s cn63xx;
1854 struct cvmx_pciercx_cfg468_s cn63xxp1;
1855 struct cvmx_pciercx_cfg468_s cn66xx;
1856 struct cvmx_pciercx_cfg468_s cn68xx;
1857 struct cvmx_pciercx_cfg468_s cn68xxp1;
1858};
1859
1860union cvmx_pciercx_cfg490 {
1861 uint32_t u32;
1862 struct cvmx_pciercx_cfg490_s {
1863 uint32_t reserved_26_31:6;
1864 uint32_t header_depth:10;
1865 uint32_t reserved_14_15:2;
1866 uint32_t data_depth:14;
1867 } s;
1868 struct cvmx_pciercx_cfg490_s cn52xx;
1869 struct cvmx_pciercx_cfg490_s cn52xxp1;
1870 struct cvmx_pciercx_cfg490_s cn56xx;
1871 struct cvmx_pciercx_cfg490_s cn56xxp1;
1872 struct cvmx_pciercx_cfg490_s cn61xx;
1873 struct cvmx_pciercx_cfg490_s cn63xx;
1874 struct cvmx_pciercx_cfg490_s cn63xxp1;
1875 struct cvmx_pciercx_cfg490_s cn66xx;
1876 struct cvmx_pciercx_cfg490_s cn68xx;
1877 struct cvmx_pciercx_cfg490_s cn68xxp1;
1878};
1879
1880union cvmx_pciercx_cfg491 {
1881 uint32_t u32;
1882 struct cvmx_pciercx_cfg491_s {
1883 uint32_t reserved_26_31:6;
1884 uint32_t header_depth:10;
1885 uint32_t reserved_14_15:2;
1886 uint32_t data_depth:14;
1887 } s;
1888 struct cvmx_pciercx_cfg491_s cn52xx;
1889 struct cvmx_pciercx_cfg491_s cn52xxp1;
1890 struct cvmx_pciercx_cfg491_s cn56xx;
1891 struct cvmx_pciercx_cfg491_s cn56xxp1;
1892 struct cvmx_pciercx_cfg491_s cn61xx;
1893 struct cvmx_pciercx_cfg491_s cn63xx;
1894 struct cvmx_pciercx_cfg491_s cn63xxp1;
1895 struct cvmx_pciercx_cfg491_s cn66xx;
1896 struct cvmx_pciercx_cfg491_s cn68xx;
1897 struct cvmx_pciercx_cfg491_s cn68xxp1;
1898};
1899
1900union cvmx_pciercx_cfg492 {
1901 uint32_t u32;
1902 struct cvmx_pciercx_cfg492_s {
1903 uint32_t reserved_26_31:6;
1904 uint32_t header_depth:10;
1905 uint32_t reserved_14_15:2;
1906 uint32_t data_depth:14;
1907 } s;
1908 struct cvmx_pciercx_cfg492_s cn52xx;
1909 struct cvmx_pciercx_cfg492_s cn52xxp1;
1910 struct cvmx_pciercx_cfg492_s cn56xx;
1911 struct cvmx_pciercx_cfg492_s cn56xxp1;
1912 struct cvmx_pciercx_cfg492_s cn61xx;
1913 struct cvmx_pciercx_cfg492_s cn63xx;
1914 struct cvmx_pciercx_cfg492_s cn63xxp1;
1915 struct cvmx_pciercx_cfg492_s cn66xx;
1916 struct cvmx_pciercx_cfg492_s cn68xx;
1917 struct cvmx_pciercx_cfg492_s cn68xxp1;
1918};
1919
1920union cvmx_pciercx_cfg515 {
1921 uint32_t u32;
1922 struct cvmx_pciercx_cfg515_s {
1923 uint32_t reserved_21_31:11;
1924 uint32_t s_d_e:1;
1925 uint32_t ctcrb:1;
1926 uint32_t cpyts:1;
1927 uint32_t dsc:1;
1928 uint32_t le:9;
1929 uint32_t n_fts:8;
1930 } s;
1931 struct cvmx_pciercx_cfg515_s cn61xx;
1932 struct cvmx_pciercx_cfg515_s cn63xx;
1933 struct cvmx_pciercx_cfg515_s cn63xxp1;
1934 struct cvmx_pciercx_cfg515_s cn66xx;
1935 struct cvmx_pciercx_cfg515_s cn68xx;
1936 struct cvmx_pciercx_cfg515_s cn68xxp1;
1937};
1938
1939union cvmx_pciercx_cfg516 {
1940 uint32_t u32;
1941 struct cvmx_pciercx_cfg516_s {
1942 uint32_t phy_stat:32;
1943 } s;
1944 struct cvmx_pciercx_cfg516_s cn52xx;
1945 struct cvmx_pciercx_cfg516_s cn52xxp1;
1946 struct cvmx_pciercx_cfg516_s cn56xx;
1947 struct cvmx_pciercx_cfg516_s cn56xxp1;
1948 struct cvmx_pciercx_cfg516_s cn61xx;
1949 struct cvmx_pciercx_cfg516_s cn63xx;
1950 struct cvmx_pciercx_cfg516_s cn63xxp1;
1951 struct cvmx_pciercx_cfg516_s cn66xx;
1952 struct cvmx_pciercx_cfg516_s cn68xx;
1953 struct cvmx_pciercx_cfg516_s cn68xxp1;
1954};
1955
1956union cvmx_pciercx_cfg517 {
1957 uint32_t u32;
1958 struct cvmx_pciercx_cfg517_s {
1959 uint32_t phy_ctrl:32;
1960 } s;
1961 struct cvmx_pciercx_cfg517_s cn52xx;
1962 struct cvmx_pciercx_cfg517_s cn52xxp1;
1963 struct cvmx_pciercx_cfg517_s cn56xx;
1964 struct cvmx_pciercx_cfg517_s cn56xxp1;
1965 struct cvmx_pciercx_cfg517_s cn61xx;
1966 struct cvmx_pciercx_cfg517_s cn63xx;
1967 struct cvmx_pciercx_cfg517_s cn63xxp1;
1968 struct cvmx_pciercx_cfg517_s cn66xx;
1969 struct cvmx_pciercx_cfg517_s cn68xx;
1970 struct cvmx_pciercx_cfg517_s cn68xxp1;
1971};
1972
1973#endif