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1/* SPDX-License-Identifier: GPL-2.0 */
2/* thread_info.h: MIPS low-level thread information
3 *
4 * Copyright (C) 2002 David Howells (dhowells@redhat.com)
5 * - Incorporating suggestions made by Linus Torvalds and Dave Miller
6 */
7
8#ifndef _ASM_THREAD_INFO_H
9#define _ASM_THREAD_INFO_H
10
11#ifdef __KERNEL__
12
13
14#ifndef __ASSEMBLY__
15
16#include <asm/processor.h>
17
18/*
19 * low level task data that entry.S needs immediate access to
20 * - this struct should fit entirely inside of one cache line
21 * - this struct shares the supervisor stack pages
22 * - if the contents of this structure are changed, the assembly constants
23 * must also be changed
24 */
25struct thread_info {
26 struct task_struct *task; /* main task structure */
27 unsigned long flags; /* low level flags */
28 unsigned long tp_value; /* thread pointer */
29 __u32 cpu; /* current CPU */
30 int preempt_count; /* 0 => preemptable, <0 => BUG */
31 mm_segment_t addr_limit; /*
32 * thread address space limit:
33 * 0x7fffffff for user-thead
34 * 0xffffffff for kernel-thread
35 */
36 struct pt_regs *regs;
37 long syscall; /* syscall number */
38};
39
40/*
41 * macros/functions for gaining access to the thread information structure
42 */
43#define INIT_THREAD_INFO(tsk) \
44{ \
45 .task = &tsk, \
46 .flags = _TIF_FIXADE, \
47 .cpu = 0, \
48 .preempt_count = INIT_PREEMPT_COUNT, \
49 .addr_limit = KERNEL_DS, \
50}
51
52/* How to get the thread information struct from C. */
53register struct thread_info *__current_thread_info __asm__("$28");
54
55static inline struct thread_info *current_thread_info(void)
56{
57 return __current_thread_info;
58}
59
60#endif /* !__ASSEMBLY__ */
61
62/* thread information allocation */
63#if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_32BIT)
64#define THREAD_SIZE_ORDER (1)
65#endif
66#if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_64BIT)
67#define THREAD_SIZE_ORDER (2)
68#endif
69#ifdef CONFIG_PAGE_SIZE_8KB
70#define THREAD_SIZE_ORDER (1)
71#endif
72#ifdef CONFIG_PAGE_SIZE_16KB
73#define THREAD_SIZE_ORDER (0)
74#endif
75#ifdef CONFIG_PAGE_SIZE_32KB
76#define THREAD_SIZE_ORDER (0)
77#endif
78#ifdef CONFIG_PAGE_SIZE_64KB
79#define THREAD_SIZE_ORDER (0)
80#endif
81
82#define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER)
83#define THREAD_MASK (THREAD_SIZE - 1UL)
84
85#define STACK_WARN (THREAD_SIZE / 8)
86
87/*
88 * thread information flags
89 * - these are process state flags that various assembly files may need to
90 * access
91 * - pending work-to-be-done flags are in LSW
92 * - other flags in MSW
93 */
94#define TIF_SIGPENDING 1 /* signal pending */
95#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
96#define TIF_SYSCALL_AUDIT 3 /* syscall auditing active */
97#define TIF_SECCOMP 4 /* secure computing */
98#define TIF_NOTIFY_RESUME 5 /* callback before returning to user */
99#define TIF_UPROBE 6 /* breakpointed or singlestepping */
100#define TIF_RESTORE_SIGMASK 9 /* restore signal mask in do_signal() */
101#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */
102#define TIF_MEMDIE 18 /* is terminating due to OOM killer */
103#define TIF_NOHZ 19 /* in adaptive nohz mode */
104#define TIF_FIXADE 20 /* Fix address errors in software */
105#define TIF_LOGADE 21 /* Log address errors to syslog */
106#define TIF_32BIT_REGS 22 /* 32-bit general purpose registers */
107#define TIF_32BIT_ADDR 23 /* 32-bit address space (o32/n32) */
108#define TIF_FPUBOUND 24 /* thread bound to FPU-full CPU set */
109#define TIF_LOAD_WATCH 25 /* If set, load watch registers */
110#define TIF_SYSCALL_TRACEPOINT 26 /* syscall tracepoint instrumentation */
111#define TIF_32BIT_FPREGS 27 /* 32-bit floating point registers */
112#define TIF_HYBRID_FPREGS 28 /* 64b FP registers, odd singles in bits 63:32 of even doubles */
113#define TIF_USEDMSA 29 /* MSA has been used this quantum */
114#define TIF_MSA_CTX_LIVE 30 /* MSA context must be preserved */
115#define TIF_SYSCALL_TRACE 31 /* syscall trace active */
116
117#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
118#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
119#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
120#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
121#define _TIF_SECCOMP (1<<TIF_SECCOMP)
122#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
123#define _TIF_UPROBE (1<<TIF_UPROBE)
124#define _TIF_USEDFPU (1<<TIF_USEDFPU)
125#define _TIF_NOHZ (1<<TIF_NOHZ)
126#define _TIF_FIXADE (1<<TIF_FIXADE)
127#define _TIF_LOGADE (1<<TIF_LOGADE)
128#define _TIF_32BIT_REGS (1<<TIF_32BIT_REGS)
129#define _TIF_32BIT_ADDR (1<<TIF_32BIT_ADDR)
130#define _TIF_FPUBOUND (1<<TIF_FPUBOUND)
131#define _TIF_LOAD_WATCH (1<<TIF_LOAD_WATCH)
132#define _TIF_32BIT_FPREGS (1<<TIF_32BIT_FPREGS)
133#define _TIF_HYBRID_FPREGS (1<<TIF_HYBRID_FPREGS)
134#define _TIF_USEDMSA (1<<TIF_USEDMSA)
135#define _TIF_MSA_CTX_LIVE (1<<TIF_MSA_CTX_LIVE)
136#define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT)
137
138#define _TIF_WORK_SYSCALL_ENTRY (_TIF_NOHZ | _TIF_SYSCALL_TRACE | \
139 _TIF_SYSCALL_AUDIT | \
140 _TIF_SYSCALL_TRACEPOINT | _TIF_SECCOMP)
141
142/* work to do in syscall_trace_leave() */
143#define _TIF_WORK_SYSCALL_EXIT (_TIF_NOHZ | _TIF_SYSCALL_TRACE | \
144 _TIF_SYSCALL_AUDIT | _TIF_SYSCALL_TRACEPOINT)
145
146/* work to do on interrupt/exception return */
147#define _TIF_WORK_MASK \
148 (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_NOTIFY_RESUME | \
149 _TIF_UPROBE)
150/* work to do on any return to u-space */
151#define _TIF_ALLWORK_MASK (_TIF_NOHZ | _TIF_WORK_MASK | \
152 _TIF_WORK_SYSCALL_EXIT | \
153 _TIF_SYSCALL_TRACEPOINT)
154
155/*
156 * We stash processor id into a COP0 register to retrieve it fast
157 * at kernel exception entry.
158 */
159#if defined(CONFIG_MIPS_PGD_C0_CONTEXT)
160#define SMP_CPUID_REG 20, 0 /* XCONTEXT */
161#define ASM_SMP_CPUID_REG $20
162#define SMP_CPUID_PTRSHIFT 48
163#else
164#define SMP_CPUID_REG 4, 0 /* CONTEXT */
165#define ASM_SMP_CPUID_REG $4
166#define SMP_CPUID_PTRSHIFT 23
167#endif
168
169#ifdef CONFIG_64BIT
170#define SMP_CPUID_REGSHIFT (SMP_CPUID_PTRSHIFT + 3)
171#else
172#define SMP_CPUID_REGSHIFT (SMP_CPUID_PTRSHIFT + 2)
173#endif
174
175#define ASM_CPUID_MFC0 MFC0
176#define UASM_i_CPUID_MFC0 UASM_i_MFC0
177
178#endif /* __KERNEL__ */
179#endif /* _ASM_THREAD_INFO_H */
1/* thread_info.h: MIPS low-level thread information
2 *
3 * Copyright (C) 2002 David Howells (dhowells@redhat.com)
4 * - Incorporating suggestions made by Linus Torvalds and Dave Miller
5 */
6
7#ifndef _ASM_THREAD_INFO_H
8#define _ASM_THREAD_INFO_H
9
10#ifdef __KERNEL__
11
12
13#ifndef __ASSEMBLY__
14
15#include <asm/processor.h>
16
17/*
18 * low level task data that entry.S needs immediate access to
19 * - this struct should fit entirely inside of one cache line
20 * - this struct shares the supervisor stack pages
21 * - if the contents of this structure are changed, the assembly constants
22 * must also be changed
23 */
24struct thread_info {
25 struct task_struct *task; /* main task structure */
26 struct exec_domain *exec_domain; /* execution domain */
27 unsigned long flags; /* low level flags */
28 unsigned long tp_value; /* thread pointer */
29 __u32 cpu; /* current CPU */
30 int preempt_count; /* 0 => preemptable, <0 => BUG */
31
32 mm_segment_t addr_limit; /*
33 * thread address space limit:
34 * 0x7fffffff for user-thead
35 * 0xffffffff for kernel-thread
36 */
37 struct restart_block restart_block;
38 struct pt_regs *regs;
39};
40
41/*
42 * macros/functions for gaining access to the thread information structure
43 */
44#define INIT_THREAD_INFO(tsk) \
45{ \
46 .task = &tsk, \
47 .exec_domain = &default_exec_domain, \
48 .flags = _TIF_FIXADE, \
49 .cpu = 0, \
50 .preempt_count = INIT_PREEMPT_COUNT, \
51 .addr_limit = KERNEL_DS, \
52 .restart_block = { \
53 .fn = do_no_restart_syscall, \
54 }, \
55}
56
57#define init_thread_info (init_thread_union.thread_info)
58#define init_stack (init_thread_union.stack)
59
60/* How to get the thread information struct from C. */
61static inline struct thread_info *current_thread_info(void)
62{
63 register struct thread_info *__current_thread_info __asm__("$28");
64
65 return __current_thread_info;
66}
67
68#endif /* !__ASSEMBLY__ */
69
70/* thread information allocation */
71#if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_32BIT)
72#define THREAD_SIZE_ORDER (1)
73#endif
74#if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_64BIT)
75#define THREAD_SIZE_ORDER (2)
76#endif
77#ifdef CONFIG_PAGE_SIZE_8KB
78#define THREAD_SIZE_ORDER (1)
79#endif
80#ifdef CONFIG_PAGE_SIZE_16KB
81#define THREAD_SIZE_ORDER (0)
82#endif
83#ifdef CONFIG_PAGE_SIZE_32KB
84#define THREAD_SIZE_ORDER (0)
85#endif
86#ifdef CONFIG_PAGE_SIZE_64KB
87#define THREAD_SIZE_ORDER (0)
88#endif
89
90#define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER)
91#define THREAD_MASK (THREAD_SIZE - 1UL)
92
93#define STACK_WARN (THREAD_SIZE / 8)
94
95/*
96 * thread information flags
97 * - these are process state flags that various assembly files may need to
98 * access
99 * - pending work-to-be-done flags are in LSW
100 * - other flags in MSW
101 */
102#define TIF_SIGPENDING 1 /* signal pending */
103#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
104#define TIF_SYSCALL_AUDIT 3 /* syscall auditing active */
105#define TIF_SECCOMP 4 /* secure computing */
106#define TIF_NOTIFY_RESUME 5 /* callback before returning to user */
107#define TIF_RESTORE_SIGMASK 9 /* restore signal mask in do_signal() */
108#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */
109#define TIF_MEMDIE 18 /* is terminating due to OOM killer */
110#define TIF_NOHZ 19 /* in adaptive nohz mode */
111#define TIF_FIXADE 20 /* Fix address errors in software */
112#define TIF_LOGADE 21 /* Log address errors to syslog */
113#define TIF_32BIT_REGS 22 /* 32-bit general purpose registers */
114#define TIF_32BIT_ADDR 23 /* 32-bit address space (o32/n32) */
115#define TIF_FPUBOUND 24 /* thread bound to FPU-full CPU set */
116#define TIF_LOAD_WATCH 25 /* If set, load watch registers */
117#define TIF_SYSCALL_TRACEPOINT 26 /* syscall tracepoint instrumentation */
118#define TIF_32BIT_FPREGS 27 /* 32-bit floating point registers */
119#define TIF_USEDMSA 29 /* MSA has been used this quantum */
120#define TIF_MSA_CTX_LIVE 30 /* MSA context must be preserved */
121#define TIF_SYSCALL_TRACE 31 /* syscall trace active */
122
123#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
124#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
125#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
126#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
127#define _TIF_SECCOMP (1<<TIF_SECCOMP)
128#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
129#define _TIF_USEDFPU (1<<TIF_USEDFPU)
130#define _TIF_NOHZ (1<<TIF_NOHZ)
131#define _TIF_FIXADE (1<<TIF_FIXADE)
132#define _TIF_LOGADE (1<<TIF_LOGADE)
133#define _TIF_32BIT_REGS (1<<TIF_32BIT_REGS)
134#define _TIF_32BIT_ADDR (1<<TIF_32BIT_ADDR)
135#define _TIF_FPUBOUND (1<<TIF_FPUBOUND)
136#define _TIF_LOAD_WATCH (1<<TIF_LOAD_WATCH)
137#define _TIF_32BIT_FPREGS (1<<TIF_32BIT_FPREGS)
138#define _TIF_USEDMSA (1<<TIF_USEDMSA)
139#define _TIF_MSA_CTX_LIVE (1<<TIF_MSA_CTX_LIVE)
140#define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT)
141
142#define _TIF_WORK_SYSCALL_ENTRY (_TIF_NOHZ | _TIF_SYSCALL_TRACE | \
143 _TIF_SYSCALL_AUDIT | \
144 _TIF_SYSCALL_TRACEPOINT | _TIF_SECCOMP)
145
146/* work to do in syscall_trace_leave() */
147#define _TIF_WORK_SYSCALL_EXIT (_TIF_NOHZ | _TIF_SYSCALL_TRACE | \
148 _TIF_SYSCALL_AUDIT | _TIF_SYSCALL_TRACEPOINT)
149
150/* work to do on interrupt/exception return */
151#define _TIF_WORK_MASK \
152 (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_NOTIFY_RESUME)
153/* work to do on any return to u-space */
154#define _TIF_ALLWORK_MASK (_TIF_NOHZ | _TIF_WORK_MASK | \
155 _TIF_WORK_SYSCALL_EXIT | \
156 _TIF_SYSCALL_TRACEPOINT)
157
158/*
159 * We stash processor id into a COP0 register to retrieve it fast
160 * at kernel exception entry.
161 */
162#if defined(CONFIG_MIPS_MT_SMTC)
163#define SMP_CPUID_REG 2, 2 /* TCBIND */
164#define ASM_SMP_CPUID_REG $2, 2
165#define SMP_CPUID_PTRSHIFT 19
166#elif defined(CONFIG_MIPS_PGD_C0_CONTEXT)
167#define SMP_CPUID_REG 20, 0 /* XCONTEXT */
168#define ASM_SMP_CPUID_REG $20
169#define SMP_CPUID_PTRSHIFT 48
170#else
171#define SMP_CPUID_REG 4, 0 /* CONTEXT */
172#define ASM_SMP_CPUID_REG $4
173#define SMP_CPUID_PTRSHIFT 23
174#endif
175
176#ifdef CONFIG_64BIT
177#define SMP_CPUID_REGSHIFT (SMP_CPUID_PTRSHIFT + 3)
178#else
179#define SMP_CPUID_REGSHIFT (SMP_CPUID_PTRSHIFT + 2)
180#endif
181
182#ifdef CONFIG_MIPS_MT_SMTC
183#define ASM_CPUID_MFC0 mfc0
184#define UASM_i_CPUID_MFC0 uasm_i_mfc0
185#else
186#define ASM_CPUID_MFC0 MFC0
187#define UASM_i_CPUID_MFC0 UASM_i_MFC0
188#endif
189
190#endif /* __KERNEL__ */
191#endif /* _ASM_THREAD_INFO_H */