Loading...
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
4 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
5 */
6#include <linux/compiler.h>
7#include <linux/errno.h>
8#include <linux/sched.h>
9#include <linux/kvm_host.h>
10#include <linux/kvm.h>
11
12#include <asm/unified.h>
13#include <asm/ptrace.h>
14#include <asm/cputype.h>
15#include <asm/kvm_arm.h>
16#include <asm/kvm_coproc.h>
17#include <asm/kvm_emulate.h>
18
19#include <kvm/arm_arch_timer.h>
20
21/******************************************************************************
22 * Cortex-A15 and Cortex-A7 Reset Values
23 */
24
25static struct kvm_regs cortexa_regs_reset = {
26 .usr_regs.ARM_cpsr = SVC_MODE | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT,
27};
28
29
30/*******************************************************************************
31 * Exported reset function
32 */
33
34/**
35 * kvm_reset_vcpu - sets core registers and cp15 registers to reset value
36 * @vcpu: The VCPU pointer
37 *
38 * This function finds the right table above and sets the registers on the
39 * virtual CPU struct to their architecturally defined reset values.
40 */
41int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
42{
43 struct kvm_regs *reset_regs;
44
45 switch (vcpu->arch.target) {
46 case KVM_ARM_TARGET_CORTEX_A7:
47 case KVM_ARM_TARGET_CORTEX_A15:
48 reset_regs = &cortexa_regs_reset;
49 vcpu->arch.midr = read_cpuid_id();
50 break;
51 default:
52 return -ENODEV;
53 }
54
55 /* Reset core registers */
56 memcpy(&vcpu->arch.ctxt.gp_regs, reset_regs, sizeof(vcpu->arch.ctxt.gp_regs));
57
58 /* Reset CP15 registers */
59 kvm_reset_coprocs(vcpu);
60
61 /*
62 * Additional reset state handling that PSCI may have imposed on us.
63 * Must be done after all the sys_reg reset.
64 */
65 if (READ_ONCE(vcpu->arch.reset_state.reset)) {
66 unsigned long target_pc = vcpu->arch.reset_state.pc;
67
68 /* Gracefully handle Thumb2 entry point */
69 if (target_pc & 1) {
70 target_pc &= ~1UL;
71 vcpu_set_thumb(vcpu);
72 }
73
74 /* Propagate caller endianness */
75 if (vcpu->arch.reset_state.be)
76 kvm_vcpu_set_be(vcpu);
77
78 *vcpu_pc(vcpu) = target_pc;
79 vcpu_set_reg(vcpu, 0, vcpu->arch.reset_state.r0);
80
81 vcpu->arch.reset_state.reset = false;
82 }
83
84 /* Reset arch_timer context */
85 return kvm_timer_vcpu_reset(vcpu);
86}
1/*
2 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
3 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
17 */
18#include <linux/compiler.h>
19#include <linux/errno.h>
20#include <linux/sched.h>
21#include <linux/kvm_host.h>
22#include <linux/kvm.h>
23
24#include <asm/unified.h>
25#include <asm/ptrace.h>
26#include <asm/cputype.h>
27#include <asm/kvm_arm.h>
28#include <asm/kvm_coproc.h>
29
30#include <kvm/arm_arch_timer.h>
31
32/******************************************************************************
33 * Cortex-A15 and Cortex-A7 Reset Values
34 */
35
36static struct kvm_regs cortexa_regs_reset = {
37 .usr_regs.ARM_cpsr = SVC_MODE | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT,
38};
39
40static const struct kvm_irq_level cortexa_vtimer_irq = {
41 { .irq = 27 },
42 .level = 1,
43};
44
45
46/*******************************************************************************
47 * Exported reset function
48 */
49
50/**
51 * kvm_reset_vcpu - sets core registers and cp15 registers to reset value
52 * @vcpu: The VCPU pointer
53 *
54 * This function finds the right table above and sets the registers on the
55 * virtual CPU struct to their architectually defined reset values.
56 */
57int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
58{
59 struct kvm_regs *reset_regs;
60 const struct kvm_irq_level *cpu_vtimer_irq;
61
62 switch (vcpu->arch.target) {
63 case KVM_ARM_TARGET_CORTEX_A7:
64 case KVM_ARM_TARGET_CORTEX_A15:
65 reset_regs = &cortexa_regs_reset;
66 vcpu->arch.midr = read_cpuid_id();
67 cpu_vtimer_irq = &cortexa_vtimer_irq;
68 break;
69 default:
70 return -ENODEV;
71 }
72
73 /* Reset core registers */
74 memcpy(&vcpu->arch.regs, reset_regs, sizeof(vcpu->arch.regs));
75
76 /* Reset CP15 registers */
77 kvm_reset_coprocs(vcpu);
78
79 /* Reset arch_timer context */
80 kvm_timer_vcpu_reset(vcpu, cpu_vtimer_irq);
81
82 return 0;
83}