1// SPDX-License-Identifier: GPL-2.0
 2/*
 3 * Copyright (C) 2013 Altera Corporation <www.altera.com>
 
 
 
 
 
 
 
 
 
 
 
 
 4 */
 5
 6/dts-v1/;
 7/* First 4KB has trampoline code for secondary cores. */
 8/memreserve/ 0x00000000 0x0001000;
 9#include "socfpga.dtsi"
10
11/ {
12	soc {
13		clkmgr@ffd04000 {
14			clocks {
15				osc1 {
16					clock-frequency = <25000000>;
17				};
18			};
19		};
20
21		mmc0: dwmmc0@ff704000 {
 
 
22			broken-cd;
23			bus-width = <4>;
24			cap-mmc-highspeed;
25			cap-sd-highspeed;
 
 
 
 
 
 
 
 
 
 
26		};
27
28		sysmgr@ffd08000 {
29			cpu1-start-addr = <0xffd080c4>;
30		};
31	};
32};
33
34&watchdog0 {
35	status = "okay";
 
 
 
 
 
 
 
 
 
 
 
 
 
 
36};

 
 1/*
 2 *  Copyright (C) 2013 Altera Corporation <www.altera.com>
 3 *
 4 * This program is free software; you can redistribute it and/or modify it
 5 * under the terms and conditions of the GNU General Public License,
 6 * version 2, as published by the Free Software Foundation.
 7 *
 8 * This program is distributed in the hope it will be useful, but WITHOUT
 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program.  If not, see <http://www.gnu.org/licenses/>.
15 */
16
17/dts-v1/;
18/include/ "socfpga.dtsi"
 
 
19
20/ {
21	soc {
22		clkmgr@ffd04000 {
23			clocks {
24				osc1 {
25					clock-frequency = <25000000>;
26				};
27			};
28		};
29
30		dwmmc0@ff704000 {
31			num-slots = <1>;
32			supports-highspeed;
33			broken-cd;
34
35			slot@0 {
36				reg = <0>;
37				bus-width = <4>;
38			};
39		};
40
41		serial0@ffc02000 {
42			clock-frequency = <100000000>;
43		};
44
45		serial1@ffc03000 {
46			clock-frequency = <100000000>;
47		};
48
49		sysmgr@ffd08000 {
50			cpu1-start-addr = <0xffd080c4>;
51		};
 
 
52
53		timer0@ffc08000 {
54			clock-frequency = <100000000>;
55		};
56
57		timer1@ffc09000 {
58			clock-frequency = <100000000>;
59		};
60
61		timer2@ffd00000 {
62			clock-frequency = <25000000>;
63		};
64
65		timer3@ffd01000 {
66			clock-frequency = <25000000>;
67		};
68	};
69};