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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * pm9g45.dts - Device Tree file for Ronetix pm9g45 board
4 *
5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
6 */
7/dts-v1/;
8#include "at91sam9g45.dtsi"
9
10/ {
11 model = "Ronetix pm9g45";
12 compatible = "ronetix,pm9g45", "atmel,at91sam9g45", "atmel,at91sam9";
13
14 chosen {
15 bootargs = "console=ttyS0,115200";
16 };
17
18 memory {
19 reg = <0x70000000 0x8000000>;
20 };
21
22 clocks {
23 slow_xtal {
24 clock-frequency = <32768>;
25 };
26
27 main_xtal {
28 clock-frequency = <12000000>;
29 };
30 };
31
32 ahb {
33 apb {
34 dbgu: serial@ffffee00 {
35 status = "okay";
36 };
37
38 pinctrl@fffff200 {
39 nand {
40 pinctrl_nand_rb: nand-rb-0 {
41 atmel,pins =
42 <AT91_PIOD 3 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
43 };
44 };
45
46 mmc {
47 pinctrl_board_mmc: mmc0-board {
48 atmel,pins =
49 <AT91_PIOD 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD6 gpio CD pin pull_up and deglitch */
50 };
51 };
52 };
53
54 tcb0: timer@fff7c000 {
55 timer@0 {
56 compatible = "atmel,tcb-timer";
57 reg = <0>, <1>;
58 };
59
60 timer@2 {
61 compatible = "atmel,tcb-timer";
62 reg = <2>;
63 };
64 };
65
66 mmc0: mmc@fff80000 {
67 pinctrl-0 = <
68 &pinctrl_board_mmc
69 &pinctrl_mmc0_slot0_clk_cmd_dat0
70 &pinctrl_mmc0_slot0_dat1_3>;
71 status = "okay";
72 slot@0 {
73 reg = <0>;
74 bus-width = <4>;
75 cd-gpios = <&pioD 6 GPIO_ACTIVE_HIGH>;
76 };
77 };
78
79 macb0: ethernet@fffbc000 {
80 phy-mode = "rmii";
81 status = "okay";
82 };
83 };
84
85 ebi: ebi@10000000 {
86 status = "okay";
87
88 nand_controller: nand-controller {
89 status = "okay";
90 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
91 pinctrl-names = "default";
92
93 nand@3 {
94 reg = <0x3 0x0 0x800000>;
95 rb-gpios = <&pioD 3 GPIO_ACTIVE_HIGH>;
96 cs-gpios = <&pioC 14 GPIO_ACTIVE_HIGH>;
97 nand-bus-width = <8>;
98 nand-ecc-mode = "soft";
99 nand-on-flash-bbt;
100 label = "atmel_nand";
101
102 partitions {
103 compatible = "fixed-partitions";
104 #address-cells = <1>;
105 #size-cells = <1>;
106
107 at91bootstrap@0 {
108 label = "at91bootstrap";
109 reg = <0x0 0x20000>;
110 };
111
112 barebox@20000 {
113 label = "barebox";
114 reg = <0x20000 0x40000>;
115 };
116
117 bareboxenv@60000 {
118 label = "bareboxenv";
119 reg = <0x60000 0x1A0000>;
120 };
121
122 kernel@200000 {
123 label = "bareboxenv2";
124 reg = <0x200000 0x300000>;
125 };
126
127 kernel@500000 {
128 label = "root";
129 reg = <0x500000 0x400000>;
130 };
131
132 data@900000 {
133 label = "data";
134 reg = <0x900000 0x8340000>;
135 };
136 };
137 };
138 };
139 };
140
141 usb0: ohci@700000 {
142 status = "okay";
143 num-ports = <2>;
144 };
145
146 usb1: ehci@800000 {
147 status = "okay";
148 };
149 };
150
151 leds {
152 compatible = "gpio-leds";
153
154 led0 {
155 label = "led0";
156 gpios = <&pioD 0 GPIO_ACTIVE_LOW>;
157 linux,default-trigger = "nand-disk";
158 };
159
160 led1 {
161 label = "led1";
162 gpios = <&pioD 31 GPIO_ACTIVE_HIGH>;
163 linux,default-trigger = "heartbeat";
164 };
165 };
166
167 gpio_keys {
168 compatible = "gpio-keys";
169 #address-cells = <1>;
170 #size-cells = <0>;
171
172 right {
173 label = "SW4";
174 gpios = <&pioE 7 GPIO_ACTIVE_LOW>;
175 linux,code = <106>;
176 };
177
178 up {
179 label = "SW3";
180 gpios = <&pioE 8 GPIO_ACTIVE_LOW>;
181 linux,code = <103>;
182 };
183 };
184};
1/*
2 * pm9g45.dts - Device Tree file for Ronetix pm9g45 board
3 *
4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 *
6 * Licensed under GPLv2.
7 */
8/dts-v1/;
9#include "at91sam9g45.dtsi"
10
11/ {
12 model = "Ronetix pm9g45";
13 compatible = "ronetix,pm9g45", "atmel,at91sam9g45", "atmel,at91sam9";
14
15 chosen {
16 bootargs = "console=ttyS0,115200";
17 };
18
19 memory {
20 reg = <0x70000000 0x8000000>;
21 };
22
23 clocks {
24 #address-cells = <1>;
25 #size-cells = <1>;
26 ranges;
27
28 main_clock: clock@0 {
29 compatible = "atmel,osc", "fixed-clock";
30 clock-frequency = <12000000>;
31 };
32 };
33
34 ahb {
35 apb {
36 dbgu: serial@ffffee00 {
37 status = "okay";
38 };
39
40 pinctrl@fffff200 {
41
42 board {
43 pinctrl_board_nand: nand0-board {
44 atmel,pins =
45 <AT91_PIOD 3 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD3 gpio RDY pin pull_up*/
46 AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
47 };
48 };
49
50 mmc {
51 pinctrl_board_mmc: mmc0-board {
52 atmel,pins =
53 <AT91_PIOD 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD6 gpio CD pin pull_up and deglitch */
54 };
55 };
56 };
57
58 mmc0: mmc@fff80000 {
59 pinctrl-0 = <
60 &pinctrl_board_mmc
61 &pinctrl_mmc0_slot0_clk_cmd_dat0
62 &pinctrl_mmc0_slot0_dat1_3>;
63 status = "okay";
64 slot@0 {
65 reg = <0>;
66 bus-width = <4>;
67 cd-gpios = <&pioD 6 GPIO_ACTIVE_HIGH>;
68 };
69 };
70
71 macb0: ethernet@fffbc000 {
72 phy-mode = "rmii";
73 status = "okay";
74 };
75
76 };
77
78 nand0: nand@40000000 {
79 nand-bus-width = <8>;
80 nand-ecc-mode = "soft";
81 nand-on-flash-bbt;
82 pinctrl-0 = <&pinctrl_board_nand>;
83
84 gpios = <&pioD 3 GPIO_ACTIVE_HIGH
85 &pioC 14 GPIO_ACTIVE_HIGH
86 0
87 >;
88
89 status = "okay";
90
91 at91bootstrap@0 {
92 label = "at91bootstrap";
93 reg = <0x0 0x20000>;
94 };
95
96 barebox@20000 {
97 label = "barebox";
98 reg = <0x20000 0x40000>;
99 };
100
101 bareboxenv@60000 {
102 label = "bareboxenv";
103 reg = <0x60000 0x1A0000>;
104 };
105
106 kernel@200000 {
107 label = "bareboxenv2";
108 reg = <0x200000 0x300000>;
109 };
110
111 kernel@500000 {
112 label = "root";
113 reg = <0x500000 0x400000>;
114 };
115
116 data@900000 {
117 label = "data";
118 reg = <0x900000 0x8340000>;
119 };
120 };
121
122 usb0: ohci@00700000 {
123 status = "okay";
124 num-ports = <2>;
125 };
126
127 usb1: ehci@00800000 {
128 status = "okay";
129 };
130 };
131
132 leds {
133 compatible = "gpio-leds";
134
135 led0 {
136 label = "led0";
137 gpios = <&pioD 0 GPIO_ACTIVE_LOW>;
138 linux,default-trigger = "nand-disk";
139 };
140
141 led1 {
142 label = "led1";
143 gpios = <&pioD 31 GPIO_ACTIVE_HIGH>;
144 linux,default-trigger = "heartbeat";
145 };
146 };
147
148 gpio_keys {
149 compatible = "gpio-keys";
150 #address-cells = <1>;
151 #size-cells = <0>;
152
153 right {
154 label = "SW4";
155 gpios = <&pioE 7 GPIO_ACTIVE_LOW>;
156 linux,code = <106>;
157 };
158
159 up {
160 label = "SW3";
161 gpios = <&pioE 8 GPIO_ACTIVE_LOW>;
162 linux,code = <103>;
163 };
164 };
165};