1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 2/*
 3 * at91-sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SoM1 board
 4 *
 5 *  Copyright (c) 2017, Microchip Technology Inc.
 6 *                2017 Cristian Birsan <cristian.birsan@microchip.com>
 7 *                2017 Claudiu Beznea <claudiu.beznea@microchip.com>
 8 */
 9#include "sama5d2.dtsi"
10#include "sama5d2-pinfunc.h"
11
12/ {
13	model = "Atmel SAMA5D27 SoM1";
14	compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
15
16	clocks {
17		slow_xtal {
18			clock-frequency = <32768>;
19		};
20
21		main_xtal {
22			clock-frequency = <24000000>;
23		};
24	};
25
26	ahb {
27		apb {
28			qspi1: spi@f0024000 {
29				pinctrl-names = "default";
30				pinctrl-0 = <&pinctrl_qspi1_default>;
31
32				flash@0 {
33					compatible = "jedec,spi-nor";
34					reg = <0>;
35					spi-max-frequency = <80000000>;
36					spi-tx-bus-width = <4>;
37					spi-rx-bus-width = <4>;
38					m25p,fast-read;
39				};
40			};
41
42			macb0: ethernet@f8008000 {
43				pinctrl-names = "default";
44				pinctrl-0 = <&pinctrl_macb0_default>;
45				phy-mode = "rmii";
46
47				ethernet-phy@0 {
48					reg = <0x0>;
49					interrupt-parent = <&pioA>;
50					interrupts = <PIN_PD31 IRQ_TYPE_LEVEL_LOW>;
51					pinctrl-names = "default";
52					pinctrl-0 = <&pinctrl_macb0_phy_irq>;
53				};
54			};
55
56			pinctrl@fc038000 {
57
58				pinctrl_qspi1_default: qspi1_default {
59					sck_cs {
60						pinmux = <PIN_PB5__QSPI1_SCK>,
61							 <PIN_PB6__QSPI1_CS>;
62						bias-disable;
63					};
64
65					data {
66						pinmux = <PIN_PB7__QSPI1_IO0>,
67							 <PIN_PB8__QSPI1_IO1>,
68							 <PIN_PB9__QSPI1_IO2>,
69							 <PIN_PB10__QSPI1_IO3>;
70						bias-pull-up;
71					};
72				};
73
74				pinctrl_macb0_default: macb0_default {
75					pinmux = <PIN_PD9__GTXCK>,
76						 <PIN_PD10__GTXEN>,
77						 <PIN_PD11__GRXDV>,
78						 <PIN_PD12__GRXER>,
79						 <PIN_PD13__GRX0>,
80						 <PIN_PD14__GRX1>,
81						 <PIN_PD15__GTX0>,
82						 <PIN_PD16__GTX1>,
83						 <PIN_PD17__GMDC>,
84						 <PIN_PD18__GMDIO>;
85					bias-disable;
86				};
87
88				pinctrl_macb0_phy_irq: macb0_phy_irq {
89					pinmux = <PIN_PD31__GPIO>;
90					bias-disable;
91				};
92			};
93		};
94	};
95};