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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * linux/arch/parisc/traps.c
4 *
5 * Copyright (C) 1991, 1992 Linus Torvalds
6 * Copyright (C) 1999, 2000 Philipp Rumpf <prumpf@tux.org>
7 */
8
9/*
10 * 'Traps.c' handles hardware traps and faults after we have saved some
11 * state in 'asm.s'.
12 */
13
14#include <linux/sched.h>
15#include <linux/sched/debug.h>
16#include <linux/kernel.h>
17#include <linux/string.h>
18#include <linux/errno.h>
19#include <linux/ptrace.h>
20#include <linux/timer.h>
21#include <linux/delay.h>
22#include <linux/mm.h>
23#include <linux/module.h>
24#include <linux/smp.h>
25#include <linux/spinlock.h>
26#include <linux/init.h>
27#include <linux/interrupt.h>
28#include <linux/console.h>
29#include <linux/bug.h>
30#include <linux/ratelimit.h>
31#include <linux/uaccess.h>
32#include <linux/kdebug.h>
33
34#include <asm/assembly.h>
35#include <asm/io.h>
36#include <asm/irq.h>
37#include <asm/traps.h>
38#include <asm/unaligned.h>
39#include <linux/atomic.h>
40#include <asm/smp.h>
41#include <asm/pdc.h>
42#include <asm/pdc_chassis.h>
43#include <asm/unwind.h>
44#include <asm/tlbflush.h>
45#include <asm/cacheflush.h>
46#include <linux/kgdb.h>
47#include <linux/kprobes.h>
48
49#include "../math-emu/math-emu.h" /* for handle_fpe() */
50
51static void parisc_show_stack(struct task_struct *task,
52 struct pt_regs *regs);
53
54static int printbinary(char *buf, unsigned long x, int nbits)
55{
56 unsigned long mask = 1UL << (nbits - 1);
57 while (mask != 0) {
58 *buf++ = (mask & x ? '1' : '0');
59 mask >>= 1;
60 }
61 *buf = '\0';
62
63 return nbits;
64}
65
66#ifdef CONFIG_64BIT
67#define RFMT "%016lx"
68#else
69#define RFMT "%08lx"
70#endif
71#define FFMT "%016llx" /* fpregs are 64-bit always */
72
73#define PRINTREGS(lvl,r,f,fmt,x) \
74 printk("%s%s%02d-%02d " fmt " " fmt " " fmt " " fmt "\n", \
75 lvl, f, (x), (x+3), (r)[(x)+0], (r)[(x)+1], \
76 (r)[(x)+2], (r)[(x)+3])
77
78static void print_gr(char *level, struct pt_regs *regs)
79{
80 int i;
81 char buf[64];
82
83 printk("%s\n", level);
84 printk("%s YZrvWESTHLNXBCVMcbcbcbcbOGFRQPDI\n", level);
85 printbinary(buf, regs->gr[0], 32);
86 printk("%sPSW: %s %s\n", level, buf, print_tainted());
87
88 for (i = 0; i < 32; i += 4)
89 PRINTREGS(level, regs->gr, "r", RFMT, i);
90}
91
92static void print_fr(char *level, struct pt_regs *regs)
93{
94 int i;
95 char buf[64];
96 struct { u32 sw[2]; } s;
97
98 /* FR are 64bit everywhere. Need to use asm to get the content
99 * of fpsr/fper1, and we assume that we won't have a FP Identify
100 * in our way, otherwise we're screwed.
101 * The fldd is used to restore the T-bit if there was one, as the
102 * store clears it anyway.
103 * PA2.0 book says "thou shall not use fstw on FPSR/FPERs" - T-Bone */
104 asm volatile ("fstd %%fr0,0(%1) \n\t"
105 "fldd 0(%1),%%fr0 \n\t"
106 : "=m" (s) : "r" (&s) : "r0");
107
108 printk("%s\n", level);
109 printk("%s VZOUICununcqcqcqcqcqcrmunTDVZOUI\n", level);
110 printbinary(buf, s.sw[0], 32);
111 printk("%sFPSR: %s\n", level, buf);
112 printk("%sFPER1: %08x\n", level, s.sw[1]);
113
114 /* here we'll print fr0 again, tho it'll be meaningless */
115 for (i = 0; i < 32; i += 4)
116 PRINTREGS(level, regs->fr, "fr", FFMT, i);
117}
118
119void show_regs(struct pt_regs *regs)
120{
121 int i, user;
122 char *level;
123 unsigned long cr30, cr31;
124
125 user = user_mode(regs);
126 level = user ? KERN_DEBUG : KERN_CRIT;
127
128 show_regs_print_info(level);
129
130 print_gr(level, regs);
131
132 for (i = 0; i < 8; i += 4)
133 PRINTREGS(level, regs->sr, "sr", RFMT, i);
134
135 if (user)
136 print_fr(level, regs);
137
138 cr30 = mfctl(30);
139 cr31 = mfctl(31);
140 printk("%s\n", level);
141 printk("%sIASQ: " RFMT " " RFMT " IAOQ: " RFMT " " RFMT "\n",
142 level, regs->iasq[0], regs->iasq[1], regs->iaoq[0], regs->iaoq[1]);
143 printk("%s IIR: %08lx ISR: " RFMT " IOR: " RFMT "\n",
144 level, regs->iir, regs->isr, regs->ior);
145 printk("%s CPU: %8d CR30: " RFMT " CR31: " RFMT "\n",
146 level, current_thread_info()->cpu, cr30, cr31);
147 printk("%s ORIG_R28: " RFMT "\n", level, regs->orig_r28);
148
149 if (user) {
150 printk("%s IAOQ[0]: " RFMT "\n", level, regs->iaoq[0]);
151 printk("%s IAOQ[1]: " RFMT "\n", level, regs->iaoq[1]);
152 printk("%s RP(r2): " RFMT "\n", level, regs->gr[2]);
153 } else {
154 printk("%s IAOQ[0]: %pS\n", level, (void *) regs->iaoq[0]);
155 printk("%s IAOQ[1]: %pS\n", level, (void *) regs->iaoq[1]);
156 printk("%s RP(r2): %pS\n", level, (void *) regs->gr[2]);
157
158 parisc_show_stack(current, regs);
159 }
160}
161
162static DEFINE_RATELIMIT_STATE(_hppa_rs,
163 DEFAULT_RATELIMIT_INTERVAL, DEFAULT_RATELIMIT_BURST);
164
165#define parisc_printk_ratelimited(critical, regs, fmt, ...) { \
166 if ((critical || show_unhandled_signals) && __ratelimit(&_hppa_rs)) { \
167 printk(fmt, ##__VA_ARGS__); \
168 show_regs(regs); \
169 } \
170}
171
172
173static void do_show_stack(struct unwind_frame_info *info)
174{
175 int i = 1;
176
177 printk(KERN_CRIT "Backtrace:\n");
178 while (i <= MAX_UNWIND_ENTRIES) {
179 if (unwind_once(info) < 0 || info->ip == 0)
180 break;
181
182 if (__kernel_text_address(info->ip)) {
183 printk(KERN_CRIT " [<" RFMT ">] %pS\n",
184 info->ip, (void *) info->ip);
185 i++;
186 }
187 }
188 printk(KERN_CRIT "\n");
189}
190
191static void parisc_show_stack(struct task_struct *task,
192 struct pt_regs *regs)
193{
194 struct unwind_frame_info info;
195
196 unwind_frame_init_task(&info, task, regs);
197
198 do_show_stack(&info);
199}
200
201void show_stack(struct task_struct *t, unsigned long *sp)
202{
203 parisc_show_stack(t, NULL);
204}
205
206int is_valid_bugaddr(unsigned long iaoq)
207{
208 return 1;
209}
210
211void die_if_kernel(char *str, struct pt_regs *regs, long err)
212{
213 if (user_mode(regs)) {
214 if (err == 0)
215 return; /* STFU */
216
217 parisc_printk_ratelimited(1, regs,
218 KERN_CRIT "%s (pid %d): %s (code %ld) at " RFMT "\n",
219 current->comm, task_pid_nr(current), str, err, regs->iaoq[0]);
220
221 return;
222 }
223
224 bust_spinlocks(1);
225
226 oops_enter();
227
228 /* Amuse the user in a SPARC fashion */
229 if (err) printk(KERN_CRIT
230 " _______________________________ \n"
231 " < Your System ate a SPARC! Gah! >\n"
232 " ------------------------------- \n"
233 " \\ ^__^\n"
234 " (__)\\ )\\/\\\n"
235 " U ||----w |\n"
236 " || ||\n");
237
238 /* unlock the pdc lock if necessary */
239 pdc_emergency_unlock();
240
241 /* maybe the kernel hasn't booted very far yet and hasn't been able
242 * to initialize the serial or STI console. In that case we should
243 * re-enable the pdc console, so that the user will be able to
244 * identify the problem. */
245 if (!console_drivers)
246 pdc_console_restart();
247
248 if (err)
249 printk(KERN_CRIT "%s (pid %d): %s (code %ld)\n",
250 current->comm, task_pid_nr(current), str, err);
251
252 /* Wot's wrong wif bein' racy? */
253 if (current->thread.flags & PARISC_KERNEL_DEATH) {
254 printk(KERN_CRIT "%s() recursion detected.\n", __func__);
255 local_irq_enable();
256 while (1);
257 }
258 current->thread.flags |= PARISC_KERNEL_DEATH;
259
260 show_regs(regs);
261 dump_stack();
262 add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
263
264 if (in_interrupt())
265 panic("Fatal exception in interrupt");
266
267 if (panic_on_oops)
268 panic("Fatal exception");
269
270 oops_exit();
271 do_exit(SIGSEGV);
272}
273
274/* gdb uses break 4,8 */
275#define GDB_BREAK_INSN 0x10004
276static void handle_gdb_break(struct pt_regs *regs, int wot)
277{
278 force_sig_fault(SIGTRAP, wot,
279 (void __user *) (regs->iaoq[0] & ~3));
280}
281
282static void handle_break(struct pt_regs *regs)
283{
284 unsigned iir = regs->iir;
285
286 if (unlikely(iir == PARISC_BUG_BREAK_INSN && !user_mode(regs))) {
287 /* check if a BUG() or WARN() trapped here. */
288 enum bug_trap_type tt;
289 tt = report_bug(regs->iaoq[0] & ~3, regs);
290 if (tt == BUG_TRAP_TYPE_WARN) {
291 regs->iaoq[0] += 4;
292 regs->iaoq[1] += 4;
293 return; /* return to next instruction when WARN_ON(). */
294 }
295 die_if_kernel("Unknown kernel breakpoint", regs,
296 (tt == BUG_TRAP_TYPE_NONE) ? 9 : 0);
297 }
298
299#ifdef CONFIG_KPROBES
300 if (unlikely(iir == PARISC_KPROBES_BREAK_INSN)) {
301 parisc_kprobe_break_handler(regs);
302 return;
303 }
304
305#endif
306
307#ifdef CONFIG_KGDB
308 if (unlikely(iir == PARISC_KGDB_COMPILED_BREAK_INSN ||
309 iir == PARISC_KGDB_BREAK_INSN)) {
310 kgdb_handle_exception(9, SIGTRAP, 0, regs);
311 return;
312 }
313#endif
314
315 if (unlikely(iir != GDB_BREAK_INSN))
316 parisc_printk_ratelimited(0, regs,
317 KERN_DEBUG "break %d,%d: pid=%d command='%s'\n",
318 iir & 31, (iir>>13) & ((1<<13)-1),
319 task_pid_nr(current), current->comm);
320
321 /* send standard GDB signal */
322 handle_gdb_break(regs, TRAP_BRKPT);
323}
324
325static void default_trap(int code, struct pt_regs *regs)
326{
327 printk(KERN_ERR "Trap %d on CPU %d\n", code, smp_processor_id());
328 show_regs(regs);
329}
330
331void (*cpu_lpmc) (int code, struct pt_regs *regs) __read_mostly = default_trap;
332
333
334void transfer_pim_to_trap_frame(struct pt_regs *regs)
335{
336 register int i;
337 extern unsigned int hpmc_pim_data[];
338 struct pdc_hpmc_pim_11 *pim_narrow;
339 struct pdc_hpmc_pim_20 *pim_wide;
340
341 if (boot_cpu_data.cpu_type >= pcxu) {
342
343 pim_wide = (struct pdc_hpmc_pim_20 *)hpmc_pim_data;
344
345 /*
346 * Note: The following code will probably generate a
347 * bunch of truncation error warnings from the compiler.
348 * Could be handled with an ifdef, but perhaps there
349 * is a better way.
350 */
351
352 regs->gr[0] = pim_wide->cr[22];
353
354 for (i = 1; i < 32; i++)
355 regs->gr[i] = pim_wide->gr[i];
356
357 for (i = 0; i < 32; i++)
358 regs->fr[i] = pim_wide->fr[i];
359
360 for (i = 0; i < 8; i++)
361 regs->sr[i] = pim_wide->sr[i];
362
363 regs->iasq[0] = pim_wide->cr[17];
364 regs->iasq[1] = pim_wide->iasq_back;
365 regs->iaoq[0] = pim_wide->cr[18];
366 regs->iaoq[1] = pim_wide->iaoq_back;
367
368 regs->sar = pim_wide->cr[11];
369 regs->iir = pim_wide->cr[19];
370 regs->isr = pim_wide->cr[20];
371 regs->ior = pim_wide->cr[21];
372 }
373 else {
374 pim_narrow = (struct pdc_hpmc_pim_11 *)hpmc_pim_data;
375
376 regs->gr[0] = pim_narrow->cr[22];
377
378 for (i = 1; i < 32; i++)
379 regs->gr[i] = pim_narrow->gr[i];
380
381 for (i = 0; i < 32; i++)
382 regs->fr[i] = pim_narrow->fr[i];
383
384 for (i = 0; i < 8; i++)
385 regs->sr[i] = pim_narrow->sr[i];
386
387 regs->iasq[0] = pim_narrow->cr[17];
388 regs->iasq[1] = pim_narrow->iasq_back;
389 regs->iaoq[0] = pim_narrow->cr[18];
390 regs->iaoq[1] = pim_narrow->iaoq_back;
391
392 regs->sar = pim_narrow->cr[11];
393 regs->iir = pim_narrow->cr[19];
394 regs->isr = pim_narrow->cr[20];
395 regs->ior = pim_narrow->cr[21];
396 }
397
398 /*
399 * The following fields only have meaning if we came through
400 * another path. So just zero them here.
401 */
402
403 regs->ksp = 0;
404 regs->kpc = 0;
405 regs->orig_r28 = 0;
406}
407
408
409/*
410 * This routine is called as a last resort when everything else
411 * has gone clearly wrong. We get called for faults in kernel space,
412 * and HPMC's.
413 */
414void parisc_terminate(char *msg, struct pt_regs *regs, int code, unsigned long offset)
415{
416 static DEFINE_SPINLOCK(terminate_lock);
417
418 (void)notify_die(DIE_OOPS, msg, regs, 0, code, SIGTRAP);
419 bust_spinlocks(1);
420
421 set_eiem(0);
422 local_irq_disable();
423 spin_lock(&terminate_lock);
424
425 /* unlock the pdc lock if necessary */
426 pdc_emergency_unlock();
427
428 /* restart pdc console if necessary */
429 if (!console_drivers)
430 pdc_console_restart();
431
432 /* Not all paths will gutter the processor... */
433 switch(code){
434
435 case 1:
436 transfer_pim_to_trap_frame(regs);
437 break;
438
439 default:
440 /* Fall through */
441 break;
442
443 }
444
445 {
446 /* show_stack(NULL, (unsigned long *)regs->gr[30]); */
447 struct unwind_frame_info info;
448 unwind_frame_init(&info, current, regs);
449 do_show_stack(&info);
450 }
451
452 printk("\n");
453 pr_crit("%s: Code=%d (%s) at addr " RFMT "\n",
454 msg, code, trap_name(code), offset);
455 show_regs(regs);
456
457 spin_unlock(&terminate_lock);
458
459 /* put soft power button back under hardware control;
460 * if the user had pressed it once at any time, the
461 * system will shut down immediately right here. */
462 pdc_soft_power_button(0);
463
464 /* Call kernel panic() so reboot timeouts work properly
465 * FIXME: This function should be on the list of
466 * panic notifiers, and we should call panic
467 * directly from the location that we wish.
468 * e.g. We should not call panic from
469 * parisc_terminate, but rather the oter way around.
470 * This hack works, prints the panic message twice,
471 * and it enables reboot timers!
472 */
473 panic(msg);
474}
475
476void notrace handle_interruption(int code, struct pt_regs *regs)
477{
478 unsigned long fault_address = 0;
479 unsigned long fault_space = 0;
480 int si_code;
481
482 if (code == 1)
483 pdc_console_restart(); /* switch back to pdc if HPMC */
484 else
485 local_irq_enable();
486
487 /* Security check:
488 * If the priority level is still user, and the
489 * faulting space is not equal to the active space
490 * then the user is attempting something in a space
491 * that does not belong to them. Kill the process.
492 *
493 * This is normally the situation when the user
494 * attempts to jump into the kernel space at the
495 * wrong offset, be it at the gateway page or a
496 * random location.
497 *
498 * We cannot normally signal the process because it
499 * could *be* on the gateway page, and processes
500 * executing on the gateway page can't have signals
501 * delivered.
502 *
503 * We merely readjust the address into the users
504 * space, at a destination address of zero, and
505 * allow processing to continue.
506 */
507 if (((unsigned long)regs->iaoq[0] & 3) &&
508 ((unsigned long)regs->iasq[0] != (unsigned long)regs->sr[7])) {
509 /* Kill the user process later */
510 regs->iaoq[0] = 0 | 3;
511 regs->iaoq[1] = regs->iaoq[0] + 4;
512 regs->iasq[0] = regs->iasq[1] = regs->sr[7];
513 regs->gr[0] &= ~PSW_B;
514 return;
515 }
516
517#if 0
518 printk(KERN_CRIT "Interruption # %d\n", code);
519#endif
520
521 switch(code) {
522
523 case 1:
524 /* High-priority machine check (HPMC) */
525
526 /* set up a new led state on systems shipped with a LED State panel */
527 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_HPMC);
528
529 parisc_terminate("High Priority Machine Check (HPMC)",
530 regs, code, 0);
531 /* NOT REACHED */
532
533 case 2:
534 /* Power failure interrupt */
535 printk(KERN_CRIT "Power failure interrupt !\n");
536 return;
537
538 case 3:
539 /* Recovery counter trap */
540 regs->gr[0] &= ~PSW_R;
541
542#ifdef CONFIG_KPROBES
543 if (parisc_kprobe_ss_handler(regs))
544 return;
545#endif
546
547#ifdef CONFIG_KGDB
548 if (kgdb_single_step) {
549 kgdb_handle_exception(0, SIGTRAP, 0, regs);
550 return;
551 }
552#endif
553
554 if (user_space(regs))
555 handle_gdb_break(regs, TRAP_TRACE);
556 /* else this must be the start of a syscall - just let it run */
557 return;
558
559 case 5:
560 /* Low-priority machine check */
561 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_LPMC);
562
563 flush_cache_all();
564 flush_tlb_all();
565 cpu_lpmc(5, regs);
566 return;
567
568 case PARISC_ITLB_TRAP:
569 /* Instruction TLB miss fault/Instruction page fault */
570 fault_address = regs->iaoq[0];
571 fault_space = regs->iasq[0];
572 break;
573
574 case 8:
575 /* Illegal instruction trap */
576 die_if_kernel("Illegal instruction", regs, code);
577 si_code = ILL_ILLOPC;
578 goto give_sigill;
579
580 case 9:
581 /* Break instruction trap */
582 handle_break(regs);
583 return;
584
585 case 10:
586 /* Privileged operation trap */
587 die_if_kernel("Privileged operation", regs, code);
588 si_code = ILL_PRVOPC;
589 goto give_sigill;
590
591 case 11:
592 /* Privileged register trap */
593 if ((regs->iir & 0xffdfffe0) == 0x034008a0) {
594
595 /* This is a MFCTL cr26/cr27 to gr instruction.
596 * PCXS traps on this, so we need to emulate it.
597 */
598
599 if (regs->iir & 0x00200000)
600 regs->gr[regs->iir & 0x1f] = mfctl(27);
601 else
602 regs->gr[regs->iir & 0x1f] = mfctl(26);
603
604 regs->iaoq[0] = regs->iaoq[1];
605 regs->iaoq[1] += 4;
606 regs->iasq[0] = regs->iasq[1];
607 return;
608 }
609
610 die_if_kernel("Privileged register usage", regs, code);
611 si_code = ILL_PRVREG;
612 give_sigill:
613 force_sig_fault(SIGILL, si_code,
614 (void __user *) regs->iaoq[0]);
615 return;
616
617 case 12:
618 /* Overflow Trap, let the userland signal handler do the cleanup */
619 force_sig_fault(SIGFPE, FPE_INTOVF,
620 (void __user *) regs->iaoq[0]);
621 return;
622
623 case 13:
624 /* Conditional Trap
625 The condition succeeds in an instruction which traps
626 on condition */
627 if(user_mode(regs)){
628 /* Let userspace app figure it out from the insn pointed
629 * to by si_addr.
630 */
631 force_sig_fault(SIGFPE, FPE_CONDTRAP,
632 (void __user *) regs->iaoq[0]);
633 return;
634 }
635 /* The kernel doesn't want to handle condition codes */
636 break;
637
638 case 14:
639 /* Assist Exception Trap, i.e. floating point exception. */
640 die_if_kernel("Floating point exception", regs, 0); /* quiet */
641 __inc_irq_stat(irq_fpassist_count);
642 handle_fpe(regs);
643 return;
644
645 case 15:
646 /* Data TLB miss fault/Data page fault */
647 /* Fall through */
648 case 16:
649 /* Non-access instruction TLB miss fault */
650 /* The instruction TLB entry needed for the target address of the FIC
651 is absent, and hardware can't find it, so we get to cleanup */
652 /* Fall through */
653 case 17:
654 /* Non-access data TLB miss fault/Non-access data page fault */
655 /* FIXME:
656 Still need to add slow path emulation code here!
657 If the insn used a non-shadow register, then the tlb
658 handlers could not have their side-effect (e.g. probe
659 writing to a target register) emulated since rfir would
660 erase the changes to said register. Instead we have to
661 setup everything, call this function we are in, and emulate
662 by hand. Technically we need to emulate:
663 fdc,fdce,pdc,"fic,4f",prober,probeir,probew, probeiw
664 */
665 fault_address = regs->ior;
666 fault_space = regs->isr;
667 break;
668
669 case 18:
670 /* PCXS only -- later cpu's split this into types 26,27 & 28 */
671 /* Check for unaligned access */
672 if (check_unaligned(regs)) {
673 handle_unaligned(regs);
674 return;
675 }
676 /* Fall Through */
677 case 26:
678 /* PCXL: Data memory access rights trap */
679 fault_address = regs->ior;
680 fault_space = regs->isr;
681 break;
682
683 case 19:
684 /* Data memory break trap */
685 regs->gr[0] |= PSW_X; /* So we can single-step over the trap */
686 /* fall thru */
687 case 21:
688 /* Page reference trap */
689 handle_gdb_break(regs, TRAP_HWBKPT);
690 return;
691
692 case 25:
693 /* Taken branch trap */
694 regs->gr[0] &= ~PSW_T;
695 if (user_space(regs))
696 handle_gdb_break(regs, TRAP_BRANCH);
697 /* else this must be the start of a syscall - just let it
698 * run.
699 */
700 return;
701
702 case 7:
703 /* Instruction access rights */
704 /* PCXL: Instruction memory protection trap */
705
706 /*
707 * This could be caused by either: 1) a process attempting
708 * to execute within a vma that does not have execute
709 * permission, or 2) an access rights violation caused by a
710 * flush only translation set up by ptep_get_and_clear().
711 * So we check the vma permissions to differentiate the two.
712 * If the vma indicates we have execute permission, then
713 * the cause is the latter one. In this case, we need to
714 * call do_page_fault() to fix the problem.
715 */
716
717 if (user_mode(regs)) {
718 struct vm_area_struct *vma;
719
720 down_read(¤t->mm->mmap_sem);
721 vma = find_vma(current->mm,regs->iaoq[0]);
722 if (vma && (regs->iaoq[0] >= vma->vm_start)
723 && (vma->vm_flags & VM_EXEC)) {
724
725 fault_address = regs->iaoq[0];
726 fault_space = regs->iasq[0];
727
728 up_read(¤t->mm->mmap_sem);
729 break; /* call do_page_fault() */
730 }
731 up_read(¤t->mm->mmap_sem);
732 }
733 /* Fall Through */
734 case 27:
735 /* Data memory protection ID trap */
736 if (code == 27 && !user_mode(regs) &&
737 fixup_exception(regs))
738 return;
739
740 die_if_kernel("Protection id trap", regs, code);
741 force_sig_fault(SIGSEGV, SEGV_MAPERR,
742 (code == 7)?
743 ((void __user *) regs->iaoq[0]) :
744 ((void __user *) regs->ior));
745 return;
746
747 case 28:
748 /* Unaligned data reference trap */
749 handle_unaligned(regs);
750 return;
751
752 default:
753 if (user_mode(regs)) {
754 parisc_printk_ratelimited(0, regs, KERN_DEBUG
755 "handle_interruption() pid=%d command='%s'\n",
756 task_pid_nr(current), current->comm);
757 /* SIGBUS, for lack of a better one. */
758 force_sig_fault(SIGBUS, BUS_OBJERR,
759 (void __user *)regs->ior);
760 return;
761 }
762 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC);
763
764 parisc_terminate("Unexpected interruption", regs, code, 0);
765 /* NOT REACHED */
766 }
767
768 if (user_mode(regs)) {
769 if ((fault_space >> SPACEID_SHIFT) != (regs->sr[7] >> SPACEID_SHIFT)) {
770 parisc_printk_ratelimited(0, regs, KERN_DEBUG
771 "User fault %d on space 0x%08lx, pid=%d command='%s'\n",
772 code, fault_space,
773 task_pid_nr(current), current->comm);
774 force_sig_fault(SIGSEGV, SEGV_MAPERR,
775 (void __user *)regs->ior);
776 return;
777 }
778 }
779 else {
780
781 /*
782 * The kernel should never fault on its own address space,
783 * unless pagefault_disable() was called before.
784 */
785
786 if (fault_space == 0 && !faulthandler_disabled())
787 {
788 /* Clean up and return if in exception table. */
789 if (fixup_exception(regs))
790 return;
791 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC);
792 parisc_terminate("Kernel Fault", regs, code, fault_address);
793 }
794 }
795
796 do_page_fault(regs, code, fault_address);
797}
798
799
800void __init initialize_ivt(const void *iva)
801{
802 extern u32 os_hpmc_size;
803 extern const u32 os_hpmc[];
804
805 int i;
806 u32 check = 0;
807 u32 *ivap;
808 u32 *hpmcp;
809 u32 length, instr;
810
811 if (strcmp((const char *)iva, "cows can fly"))
812 panic("IVT invalid");
813
814 ivap = (u32 *)iva;
815
816 for (i = 0; i < 8; i++)
817 *ivap++ = 0;
818
819 /*
820 * Use PDC_INSTR firmware function to get instruction that invokes
821 * PDCE_CHECK in HPMC handler. See programming note at page 1-31 of
822 * the PA 1.1 Firmware Architecture document.
823 */
824 if (pdc_instr(&instr) == PDC_OK)
825 ivap[0] = instr;
826
827 /*
828 * Rules for the checksum of the HPMC handler:
829 * 1. The IVA does not point to PDC/PDH space (ie: the OS has installed
830 * its own IVA).
831 * 2. The word at IVA + 32 is nonzero.
832 * 3. If Length (IVA + 60) is not zero, then Length (IVA + 60) and
833 * Address (IVA + 56) are word-aligned.
834 * 4. The checksum of the 8 words starting at IVA + 32 plus the sum of
835 * the Length/4 words starting at Address is zero.
836 */
837
838 /* Setup IVA and compute checksum for HPMC handler */
839 ivap[6] = (u32)__pa(os_hpmc);
840 length = os_hpmc_size;
841 ivap[7] = length;
842
843 hpmcp = (u32 *)os_hpmc;
844
845 for (i=0; i<length/4; i++)
846 check += *hpmcp++;
847
848 for (i=0; i<8; i++)
849 check += ivap[i];
850
851 ivap[5] = -check;
852}
853
854
855/* early_trap_init() is called before we set up kernel mappings and
856 * write-protect the kernel */
857void __init early_trap_init(void)
858{
859 extern const void fault_vector_20;
860
861#ifndef CONFIG_64BIT
862 extern const void fault_vector_11;
863 initialize_ivt(&fault_vector_11);
864#endif
865
866 initialize_ivt(&fault_vector_20);
867}
868
869void __init trap_init(void)
870{
871}
1/*
2 * linux/arch/parisc/traps.c
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 1999, 2000 Philipp Rumpf <prumpf@tux.org>
6 */
7
8/*
9 * 'Traps.c' handles hardware traps and faults after we have saved some
10 * state in 'asm.s'.
11 */
12
13#include <linux/sched.h>
14#include <linux/kernel.h>
15#include <linux/string.h>
16#include <linux/errno.h>
17#include <linux/ptrace.h>
18#include <linux/timer.h>
19#include <linux/delay.h>
20#include <linux/mm.h>
21#include <linux/module.h>
22#include <linux/smp.h>
23#include <linux/spinlock.h>
24#include <linux/init.h>
25#include <linux/interrupt.h>
26#include <linux/console.h>
27#include <linux/bug.h>
28#include <linux/ratelimit.h>
29
30#include <asm/assembly.h>
31#include <asm/uaccess.h>
32#include <asm/io.h>
33#include <asm/irq.h>
34#include <asm/traps.h>
35#include <asm/unaligned.h>
36#include <linux/atomic.h>
37#include <asm/smp.h>
38#include <asm/pdc.h>
39#include <asm/pdc_chassis.h>
40#include <asm/unwind.h>
41#include <asm/tlbflush.h>
42#include <asm/cacheflush.h>
43
44#include "../math-emu/math-emu.h" /* for handle_fpe() */
45
46#if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK)
47DEFINE_SPINLOCK(pa_dbit_lock);
48#endif
49
50static void parisc_show_stack(struct task_struct *task, unsigned long *sp,
51 struct pt_regs *regs);
52
53static int printbinary(char *buf, unsigned long x, int nbits)
54{
55 unsigned long mask = 1UL << (nbits - 1);
56 while (mask != 0) {
57 *buf++ = (mask & x ? '1' : '0');
58 mask >>= 1;
59 }
60 *buf = '\0';
61
62 return nbits;
63}
64
65#ifdef CONFIG_64BIT
66#define RFMT "%016lx"
67#else
68#define RFMT "%08lx"
69#endif
70#define FFMT "%016llx" /* fpregs are 64-bit always */
71
72#define PRINTREGS(lvl,r,f,fmt,x) \
73 printk("%s%s%02d-%02d " fmt " " fmt " " fmt " " fmt "\n", \
74 lvl, f, (x), (x+3), (r)[(x)+0], (r)[(x)+1], \
75 (r)[(x)+2], (r)[(x)+3])
76
77static void print_gr(char *level, struct pt_regs *regs)
78{
79 int i;
80 char buf[64];
81
82 printk("%s\n", level);
83 printk("%s YZrvWESTHLNXBCVMcbcbcbcbOGFRQPDI\n", level);
84 printbinary(buf, regs->gr[0], 32);
85 printk("%sPSW: %s %s\n", level, buf, print_tainted());
86
87 for (i = 0; i < 32; i += 4)
88 PRINTREGS(level, regs->gr, "r", RFMT, i);
89}
90
91static void print_fr(char *level, struct pt_regs *regs)
92{
93 int i;
94 char buf[64];
95 struct { u32 sw[2]; } s;
96
97 /* FR are 64bit everywhere. Need to use asm to get the content
98 * of fpsr/fper1, and we assume that we won't have a FP Identify
99 * in our way, otherwise we're screwed.
100 * The fldd is used to restore the T-bit if there was one, as the
101 * store clears it anyway.
102 * PA2.0 book says "thou shall not use fstw on FPSR/FPERs" - T-Bone */
103 asm volatile ("fstd %%fr0,0(%1) \n\t"
104 "fldd 0(%1),%%fr0 \n\t"
105 : "=m" (s) : "r" (&s) : "r0");
106
107 printk("%s\n", level);
108 printk("%s VZOUICununcqcqcqcqcqcrmunTDVZOUI\n", level);
109 printbinary(buf, s.sw[0], 32);
110 printk("%sFPSR: %s\n", level, buf);
111 printk("%sFPER1: %08x\n", level, s.sw[1]);
112
113 /* here we'll print fr0 again, tho it'll be meaningless */
114 for (i = 0; i < 32; i += 4)
115 PRINTREGS(level, regs->fr, "fr", FFMT, i);
116}
117
118void show_regs(struct pt_regs *regs)
119{
120 int i, user;
121 char *level;
122 unsigned long cr30, cr31;
123
124 user = user_mode(regs);
125 level = user ? KERN_DEBUG : KERN_CRIT;
126
127 show_regs_print_info(level);
128
129 print_gr(level, regs);
130
131 for (i = 0; i < 8; i += 4)
132 PRINTREGS(level, regs->sr, "sr", RFMT, i);
133
134 if (user)
135 print_fr(level, regs);
136
137 cr30 = mfctl(30);
138 cr31 = mfctl(31);
139 printk("%s\n", level);
140 printk("%sIASQ: " RFMT " " RFMT " IAOQ: " RFMT " " RFMT "\n",
141 level, regs->iasq[0], regs->iasq[1], regs->iaoq[0], regs->iaoq[1]);
142 printk("%s IIR: %08lx ISR: " RFMT " IOR: " RFMT "\n",
143 level, regs->iir, regs->isr, regs->ior);
144 printk("%s CPU: %8d CR30: " RFMT " CR31: " RFMT "\n",
145 level, current_thread_info()->cpu, cr30, cr31);
146 printk("%s ORIG_R28: " RFMT "\n", level, regs->orig_r28);
147
148 if (user) {
149 printk("%s IAOQ[0]: " RFMT "\n", level, regs->iaoq[0]);
150 printk("%s IAOQ[1]: " RFMT "\n", level, regs->iaoq[1]);
151 printk("%s RP(r2): " RFMT "\n", level, regs->gr[2]);
152 } else {
153 printk("%s IAOQ[0]: %pS\n", level, (void *) regs->iaoq[0]);
154 printk("%s IAOQ[1]: %pS\n", level, (void *) regs->iaoq[1]);
155 printk("%s RP(r2): %pS\n", level, (void *) regs->gr[2]);
156
157 parisc_show_stack(current, NULL, regs);
158 }
159}
160
161static DEFINE_RATELIMIT_STATE(_hppa_rs,
162 DEFAULT_RATELIMIT_INTERVAL, DEFAULT_RATELIMIT_BURST);
163
164#define parisc_printk_ratelimited(critical, regs, fmt, ...) { \
165 if ((critical || show_unhandled_signals) && __ratelimit(&_hppa_rs)) { \
166 printk(fmt, ##__VA_ARGS__); \
167 show_regs(regs); \
168 } \
169}
170
171
172static void do_show_stack(struct unwind_frame_info *info)
173{
174 int i = 1;
175
176 printk(KERN_CRIT "Backtrace:\n");
177 while (i <= 16) {
178 if (unwind_once(info) < 0 || info->ip == 0)
179 break;
180
181 if (__kernel_text_address(info->ip)) {
182 printk(KERN_CRIT " [<" RFMT ">] %pS\n",
183 info->ip, (void *) info->ip);
184 i++;
185 }
186 }
187 printk(KERN_CRIT "\n");
188}
189
190static void parisc_show_stack(struct task_struct *task, unsigned long *sp,
191 struct pt_regs *regs)
192{
193 struct unwind_frame_info info;
194 struct task_struct *t;
195
196 t = task ? task : current;
197 if (regs) {
198 unwind_frame_init(&info, t, regs);
199 goto show_stack;
200 }
201
202 if (t == current) {
203 unsigned long sp;
204
205HERE:
206 asm volatile ("copy %%r30, %0" : "=r"(sp));
207 {
208 struct pt_regs r;
209
210 memset(&r, 0, sizeof(struct pt_regs));
211 r.iaoq[0] = (unsigned long)&&HERE;
212 r.gr[2] = (unsigned long)__builtin_return_address(0);
213 r.gr[30] = sp;
214
215 unwind_frame_init(&info, current, &r);
216 }
217 } else {
218 unwind_frame_init_from_blocked_task(&info, t);
219 }
220
221show_stack:
222 do_show_stack(&info);
223}
224
225void show_stack(struct task_struct *t, unsigned long *sp)
226{
227 return parisc_show_stack(t, sp, NULL);
228}
229
230int is_valid_bugaddr(unsigned long iaoq)
231{
232 return 1;
233}
234
235void die_if_kernel(char *str, struct pt_regs *regs, long err)
236{
237 if (user_mode(regs)) {
238 if (err == 0)
239 return; /* STFU */
240
241 parisc_printk_ratelimited(1, regs,
242 KERN_CRIT "%s (pid %d): %s (code %ld) at " RFMT "\n",
243 current->comm, task_pid_nr(current), str, err, regs->iaoq[0]);
244
245 return;
246 }
247
248 oops_in_progress = 1;
249
250 oops_enter();
251
252 /* Amuse the user in a SPARC fashion */
253 if (err) printk(KERN_CRIT
254 " _______________________________ \n"
255 " < Your System ate a SPARC! Gah! >\n"
256 " ------------------------------- \n"
257 " \\ ^__^\n"
258 " (__)\\ )\\/\\\n"
259 " U ||----w |\n"
260 " || ||\n");
261
262 /* unlock the pdc lock if necessary */
263 pdc_emergency_unlock();
264
265 /* maybe the kernel hasn't booted very far yet and hasn't been able
266 * to initialize the serial or STI console. In that case we should
267 * re-enable the pdc console, so that the user will be able to
268 * identify the problem. */
269 if (!console_drivers)
270 pdc_console_restart();
271
272 if (err)
273 printk(KERN_CRIT "%s (pid %d): %s (code %ld)\n",
274 current->comm, task_pid_nr(current), str, err);
275
276 /* Wot's wrong wif bein' racy? */
277 if (current->thread.flags & PARISC_KERNEL_DEATH) {
278 printk(KERN_CRIT "%s() recursion detected.\n", __func__);
279 local_irq_enable();
280 while (1);
281 }
282 current->thread.flags |= PARISC_KERNEL_DEATH;
283
284 show_regs(regs);
285 dump_stack();
286 add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
287
288 if (in_interrupt())
289 panic("Fatal exception in interrupt");
290
291 if (panic_on_oops) {
292 printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
293 ssleep(5);
294 panic("Fatal exception");
295 }
296
297 oops_exit();
298 do_exit(SIGSEGV);
299}
300
301/* gdb uses break 4,8 */
302#define GDB_BREAK_INSN 0x10004
303static void handle_gdb_break(struct pt_regs *regs, int wot)
304{
305 struct siginfo si;
306
307 si.si_signo = SIGTRAP;
308 si.si_errno = 0;
309 si.si_code = wot;
310 si.si_addr = (void __user *) (regs->iaoq[0] & ~3);
311 force_sig_info(SIGTRAP, &si, current);
312}
313
314static void handle_break(struct pt_regs *regs)
315{
316 unsigned iir = regs->iir;
317
318 if (unlikely(iir == PARISC_BUG_BREAK_INSN && !user_mode(regs))) {
319 /* check if a BUG() or WARN() trapped here. */
320 enum bug_trap_type tt;
321 tt = report_bug(regs->iaoq[0] & ~3, regs);
322 if (tt == BUG_TRAP_TYPE_WARN) {
323 regs->iaoq[0] += 4;
324 regs->iaoq[1] += 4;
325 return; /* return to next instruction when WARN_ON(). */
326 }
327 die_if_kernel("Unknown kernel breakpoint", regs,
328 (tt == BUG_TRAP_TYPE_NONE) ? 9 : 0);
329 }
330
331 if (unlikely(iir != GDB_BREAK_INSN))
332 parisc_printk_ratelimited(0, regs,
333 KERN_DEBUG "break %d,%d: pid=%d command='%s'\n",
334 iir & 31, (iir>>13) & ((1<<13)-1),
335 task_pid_nr(current), current->comm);
336
337 /* send standard GDB signal */
338 handle_gdb_break(regs, TRAP_BRKPT);
339}
340
341static void default_trap(int code, struct pt_regs *regs)
342{
343 printk(KERN_ERR "Trap %d on CPU %d\n", code, smp_processor_id());
344 show_regs(regs);
345}
346
347void (*cpu_lpmc) (int code, struct pt_regs *regs) __read_mostly = default_trap;
348
349
350void transfer_pim_to_trap_frame(struct pt_regs *regs)
351{
352 register int i;
353 extern unsigned int hpmc_pim_data[];
354 struct pdc_hpmc_pim_11 *pim_narrow;
355 struct pdc_hpmc_pim_20 *pim_wide;
356
357 if (boot_cpu_data.cpu_type >= pcxu) {
358
359 pim_wide = (struct pdc_hpmc_pim_20 *)hpmc_pim_data;
360
361 /*
362 * Note: The following code will probably generate a
363 * bunch of truncation error warnings from the compiler.
364 * Could be handled with an ifdef, but perhaps there
365 * is a better way.
366 */
367
368 regs->gr[0] = pim_wide->cr[22];
369
370 for (i = 1; i < 32; i++)
371 regs->gr[i] = pim_wide->gr[i];
372
373 for (i = 0; i < 32; i++)
374 regs->fr[i] = pim_wide->fr[i];
375
376 for (i = 0; i < 8; i++)
377 regs->sr[i] = pim_wide->sr[i];
378
379 regs->iasq[0] = pim_wide->cr[17];
380 regs->iasq[1] = pim_wide->iasq_back;
381 regs->iaoq[0] = pim_wide->cr[18];
382 regs->iaoq[1] = pim_wide->iaoq_back;
383
384 regs->sar = pim_wide->cr[11];
385 regs->iir = pim_wide->cr[19];
386 regs->isr = pim_wide->cr[20];
387 regs->ior = pim_wide->cr[21];
388 }
389 else {
390 pim_narrow = (struct pdc_hpmc_pim_11 *)hpmc_pim_data;
391
392 regs->gr[0] = pim_narrow->cr[22];
393
394 for (i = 1; i < 32; i++)
395 regs->gr[i] = pim_narrow->gr[i];
396
397 for (i = 0; i < 32; i++)
398 regs->fr[i] = pim_narrow->fr[i];
399
400 for (i = 0; i < 8; i++)
401 regs->sr[i] = pim_narrow->sr[i];
402
403 regs->iasq[0] = pim_narrow->cr[17];
404 regs->iasq[1] = pim_narrow->iasq_back;
405 regs->iaoq[0] = pim_narrow->cr[18];
406 regs->iaoq[1] = pim_narrow->iaoq_back;
407
408 regs->sar = pim_narrow->cr[11];
409 regs->iir = pim_narrow->cr[19];
410 regs->isr = pim_narrow->cr[20];
411 regs->ior = pim_narrow->cr[21];
412 }
413
414 /*
415 * The following fields only have meaning if we came through
416 * another path. So just zero them here.
417 */
418
419 regs->ksp = 0;
420 regs->kpc = 0;
421 regs->orig_r28 = 0;
422}
423
424
425/*
426 * This routine is called as a last resort when everything else
427 * has gone clearly wrong. We get called for faults in kernel space,
428 * and HPMC's.
429 */
430void parisc_terminate(char *msg, struct pt_regs *regs, int code, unsigned long offset)
431{
432 static DEFINE_SPINLOCK(terminate_lock);
433
434 oops_in_progress = 1;
435
436 set_eiem(0);
437 local_irq_disable();
438 spin_lock(&terminate_lock);
439
440 /* unlock the pdc lock if necessary */
441 pdc_emergency_unlock();
442
443 /* restart pdc console if necessary */
444 if (!console_drivers)
445 pdc_console_restart();
446
447 /* Not all paths will gutter the processor... */
448 switch(code){
449
450 case 1:
451 transfer_pim_to_trap_frame(regs);
452 break;
453
454 default:
455 /* Fall through */
456 break;
457
458 }
459
460 {
461 /* show_stack(NULL, (unsigned long *)regs->gr[30]); */
462 struct unwind_frame_info info;
463 unwind_frame_init(&info, current, regs);
464 do_show_stack(&info);
465 }
466
467 printk("\n");
468 printk(KERN_CRIT "%s: Code=%d regs=%p (Addr=" RFMT ")\n",
469 msg, code, regs, offset);
470 show_regs(regs);
471
472 spin_unlock(&terminate_lock);
473
474 /* put soft power button back under hardware control;
475 * if the user had pressed it once at any time, the
476 * system will shut down immediately right here. */
477 pdc_soft_power_button(0);
478
479 /* Call kernel panic() so reboot timeouts work properly
480 * FIXME: This function should be on the list of
481 * panic notifiers, and we should call panic
482 * directly from the location that we wish.
483 * e.g. We should not call panic from
484 * parisc_terminate, but rather the oter way around.
485 * This hack works, prints the panic message twice,
486 * and it enables reboot timers!
487 */
488 panic(msg);
489}
490
491void notrace handle_interruption(int code, struct pt_regs *regs)
492{
493 unsigned long fault_address = 0;
494 unsigned long fault_space = 0;
495 struct siginfo si;
496
497 if (code == 1)
498 pdc_console_restart(); /* switch back to pdc if HPMC */
499 else
500 local_irq_enable();
501
502 /* Security check:
503 * If the priority level is still user, and the
504 * faulting space is not equal to the active space
505 * then the user is attempting something in a space
506 * that does not belong to them. Kill the process.
507 *
508 * This is normally the situation when the user
509 * attempts to jump into the kernel space at the
510 * wrong offset, be it at the gateway page or a
511 * random location.
512 *
513 * We cannot normally signal the process because it
514 * could *be* on the gateway page, and processes
515 * executing on the gateway page can't have signals
516 * delivered.
517 *
518 * We merely readjust the address into the users
519 * space, at a destination address of zero, and
520 * allow processing to continue.
521 */
522 if (((unsigned long)regs->iaoq[0] & 3) &&
523 ((unsigned long)regs->iasq[0] != (unsigned long)regs->sr[7])) {
524 /* Kill the user process later */
525 regs->iaoq[0] = 0 | 3;
526 regs->iaoq[1] = regs->iaoq[0] + 4;
527 regs->iasq[0] = regs->iasq[1] = regs->sr[7];
528 regs->gr[0] &= ~PSW_B;
529 return;
530 }
531
532#if 0
533 printk(KERN_CRIT "Interruption # %d\n", code);
534#endif
535
536 switch(code) {
537
538 case 1:
539 /* High-priority machine check (HPMC) */
540
541 /* set up a new led state on systems shipped with a LED State panel */
542 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_HPMC);
543
544 parisc_terminate("High Priority Machine Check (HPMC)",
545 regs, code, 0);
546 /* NOT REACHED */
547
548 case 2:
549 /* Power failure interrupt */
550 printk(KERN_CRIT "Power failure interrupt !\n");
551 return;
552
553 case 3:
554 /* Recovery counter trap */
555 regs->gr[0] &= ~PSW_R;
556 if (user_space(regs))
557 handle_gdb_break(regs, TRAP_TRACE);
558 /* else this must be the start of a syscall - just let it run */
559 return;
560
561 case 5:
562 /* Low-priority machine check */
563 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_LPMC);
564
565 flush_cache_all();
566 flush_tlb_all();
567 cpu_lpmc(5, regs);
568 return;
569
570 case 6:
571 /* Instruction TLB miss fault/Instruction page fault */
572 fault_address = regs->iaoq[0];
573 fault_space = regs->iasq[0];
574 break;
575
576 case 8:
577 /* Illegal instruction trap */
578 die_if_kernel("Illegal instruction", regs, code);
579 si.si_code = ILL_ILLOPC;
580 goto give_sigill;
581
582 case 9:
583 /* Break instruction trap */
584 handle_break(regs);
585 return;
586
587 case 10:
588 /* Privileged operation trap */
589 die_if_kernel("Privileged operation", regs, code);
590 si.si_code = ILL_PRVOPC;
591 goto give_sigill;
592
593 case 11:
594 /* Privileged register trap */
595 if ((regs->iir & 0xffdfffe0) == 0x034008a0) {
596
597 /* This is a MFCTL cr26/cr27 to gr instruction.
598 * PCXS traps on this, so we need to emulate it.
599 */
600
601 if (regs->iir & 0x00200000)
602 regs->gr[regs->iir & 0x1f] = mfctl(27);
603 else
604 regs->gr[regs->iir & 0x1f] = mfctl(26);
605
606 regs->iaoq[0] = regs->iaoq[1];
607 regs->iaoq[1] += 4;
608 regs->iasq[0] = regs->iasq[1];
609 return;
610 }
611
612 die_if_kernel("Privileged register usage", regs, code);
613 si.si_code = ILL_PRVREG;
614 give_sigill:
615 si.si_signo = SIGILL;
616 si.si_errno = 0;
617 si.si_addr = (void __user *) regs->iaoq[0];
618 force_sig_info(SIGILL, &si, current);
619 return;
620
621 case 12:
622 /* Overflow Trap, let the userland signal handler do the cleanup */
623 si.si_signo = SIGFPE;
624 si.si_code = FPE_INTOVF;
625 si.si_addr = (void __user *) regs->iaoq[0];
626 force_sig_info(SIGFPE, &si, current);
627 return;
628
629 case 13:
630 /* Conditional Trap
631 The condition succeeds in an instruction which traps
632 on condition */
633 if(user_mode(regs)){
634 si.si_signo = SIGFPE;
635 /* Set to zero, and let the userspace app figure it out from
636 the insn pointed to by si_addr */
637 si.si_code = 0;
638 si.si_addr = (void __user *) regs->iaoq[0];
639 force_sig_info(SIGFPE, &si, current);
640 return;
641 }
642 /* The kernel doesn't want to handle condition codes */
643 break;
644
645 case 14:
646 /* Assist Exception Trap, i.e. floating point exception. */
647 die_if_kernel("Floating point exception", regs, 0); /* quiet */
648 __inc_irq_stat(irq_fpassist_count);
649 handle_fpe(regs);
650 return;
651
652 case 15:
653 /* Data TLB miss fault/Data page fault */
654 /* Fall through */
655 case 16:
656 /* Non-access instruction TLB miss fault */
657 /* The instruction TLB entry needed for the target address of the FIC
658 is absent, and hardware can't find it, so we get to cleanup */
659 /* Fall through */
660 case 17:
661 /* Non-access data TLB miss fault/Non-access data page fault */
662 /* FIXME:
663 Still need to add slow path emulation code here!
664 If the insn used a non-shadow register, then the tlb
665 handlers could not have their side-effect (e.g. probe
666 writing to a target register) emulated since rfir would
667 erase the changes to said register. Instead we have to
668 setup everything, call this function we are in, and emulate
669 by hand. Technically we need to emulate:
670 fdc,fdce,pdc,"fic,4f",prober,probeir,probew, probeiw
671 */
672 fault_address = regs->ior;
673 fault_space = regs->isr;
674 break;
675
676 case 18:
677 /* PCXS only -- later cpu's split this into types 26,27 & 28 */
678 /* Check for unaligned access */
679 if (check_unaligned(regs)) {
680 handle_unaligned(regs);
681 return;
682 }
683 /* Fall Through */
684 case 26:
685 /* PCXL: Data memory access rights trap */
686 fault_address = regs->ior;
687 fault_space = regs->isr;
688 break;
689
690 case 19:
691 /* Data memory break trap */
692 regs->gr[0] |= PSW_X; /* So we can single-step over the trap */
693 /* fall thru */
694 case 21:
695 /* Page reference trap */
696 handle_gdb_break(regs, TRAP_HWBKPT);
697 return;
698
699 case 25:
700 /* Taken branch trap */
701 regs->gr[0] &= ~PSW_T;
702 if (user_space(regs))
703 handle_gdb_break(regs, TRAP_BRANCH);
704 /* else this must be the start of a syscall - just let it
705 * run.
706 */
707 return;
708
709 case 7:
710 /* Instruction access rights */
711 /* PCXL: Instruction memory protection trap */
712
713 /*
714 * This could be caused by either: 1) a process attempting
715 * to execute within a vma that does not have execute
716 * permission, or 2) an access rights violation caused by a
717 * flush only translation set up by ptep_get_and_clear().
718 * So we check the vma permissions to differentiate the two.
719 * If the vma indicates we have execute permission, then
720 * the cause is the latter one. In this case, we need to
721 * call do_page_fault() to fix the problem.
722 */
723
724 if (user_mode(regs)) {
725 struct vm_area_struct *vma;
726
727 down_read(¤t->mm->mmap_sem);
728 vma = find_vma(current->mm,regs->iaoq[0]);
729 if (vma && (regs->iaoq[0] >= vma->vm_start)
730 && (vma->vm_flags & VM_EXEC)) {
731
732 fault_address = regs->iaoq[0];
733 fault_space = regs->iasq[0];
734
735 up_read(¤t->mm->mmap_sem);
736 break; /* call do_page_fault() */
737 }
738 up_read(¤t->mm->mmap_sem);
739 }
740 /* Fall Through */
741 case 27:
742 /* Data memory protection ID trap */
743 if (code == 27 && !user_mode(regs) &&
744 fixup_exception(regs))
745 return;
746
747 die_if_kernel("Protection id trap", regs, code);
748 si.si_code = SEGV_MAPERR;
749 si.si_signo = SIGSEGV;
750 si.si_errno = 0;
751 if (code == 7)
752 si.si_addr = (void __user *) regs->iaoq[0];
753 else
754 si.si_addr = (void __user *) regs->ior;
755 force_sig_info(SIGSEGV, &si, current);
756 return;
757
758 case 28:
759 /* Unaligned data reference trap */
760 handle_unaligned(regs);
761 return;
762
763 default:
764 if (user_mode(regs)) {
765 parisc_printk_ratelimited(0, regs, KERN_DEBUG
766 "handle_interruption() pid=%d command='%s'\n",
767 task_pid_nr(current), current->comm);
768 /* SIGBUS, for lack of a better one. */
769 si.si_signo = SIGBUS;
770 si.si_code = BUS_OBJERR;
771 si.si_errno = 0;
772 si.si_addr = (void __user *) regs->ior;
773 force_sig_info(SIGBUS, &si, current);
774 return;
775 }
776 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC);
777
778 parisc_terminate("Unexpected interruption", regs, code, 0);
779 /* NOT REACHED */
780 }
781
782 if (user_mode(regs)) {
783 if ((fault_space >> SPACEID_SHIFT) != (regs->sr[7] >> SPACEID_SHIFT)) {
784 parisc_printk_ratelimited(0, regs, KERN_DEBUG
785 "User fault %d on space 0x%08lx, pid=%d command='%s'\n",
786 code, fault_space,
787 task_pid_nr(current), current->comm);
788 si.si_signo = SIGSEGV;
789 si.si_errno = 0;
790 si.si_code = SEGV_MAPERR;
791 si.si_addr = (void __user *) regs->ior;
792 force_sig_info(SIGSEGV, &si, current);
793 return;
794 }
795 }
796 else {
797
798 /*
799 * The kernel should never fault on its own address space,
800 * unless pagefault_disable() was called before.
801 */
802
803 if (fault_space == 0 && !in_atomic())
804 {
805 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC);
806 parisc_terminate("Kernel Fault", regs, code, fault_address);
807 }
808 }
809
810 do_page_fault(regs, code, fault_address);
811}
812
813
814int __init check_ivt(void *iva)
815{
816 extern u32 os_hpmc_size;
817 extern const u32 os_hpmc[];
818
819 int i;
820 u32 check = 0;
821 u32 *ivap;
822 u32 *hpmcp;
823 u32 length;
824
825 if (strcmp((char *)iva, "cows can fly"))
826 return -1;
827
828 ivap = (u32 *)iva;
829
830 for (i = 0; i < 8; i++)
831 *ivap++ = 0;
832
833 /* Compute Checksum for HPMC handler */
834 length = os_hpmc_size;
835 ivap[7] = length;
836
837 hpmcp = (u32 *)os_hpmc;
838
839 for (i=0; i<length/4; i++)
840 check += *hpmcp++;
841
842 for (i=0; i<8; i++)
843 check += ivap[i];
844
845 ivap[5] = -check;
846
847 return 0;
848}
849
850#ifndef CONFIG_64BIT
851extern const void fault_vector_11;
852#endif
853extern const void fault_vector_20;
854
855void __init trap_init(void)
856{
857 void *iva;
858
859 if (boot_cpu_data.cpu_type >= pcxu)
860 iva = (void *) &fault_vector_20;
861 else
862#ifdef CONFIG_64BIT
863 panic("Can't boot 64-bit OS on PA1.1 processor!");
864#else
865 iva = (void *) &fault_vector_11;
866#endif
867
868 if (check_ivt(iva))
869 panic("IVT invalid");
870}