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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
4 *
5 * Copyright (C) 2011 Atmel,
6 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
7 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
8 */
9
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/clock/at91.h>
14
15/ {
16 #address-cells = <1>;
17 #size-cells = <1>;
18 model = "Atmel AT91SAM9260 family SoC";
19 compatible = "atmel,at91sam9260";
20 interrupt-parent = <&aic>;
21
22 aliases {
23 serial0 = &dbgu;
24 serial1 = &usart0;
25 serial2 = &usart1;
26 serial3 = &usart2;
27 serial4 = &usart3;
28 serial5 = &uart0;
29 serial6 = &uart1;
30 gpio0 = &pioA;
31 gpio1 = &pioB;
32 gpio2 = &pioC;
33 tcb0 = &tcb0;
34 tcb1 = &tcb1;
35 i2c0 = &i2c0;
36 ssc0 = &ssc0;
37 };
38 cpus {
39 #address-cells = <0>;
40 #size-cells = <0>;
41
42 cpu {
43 compatible = "arm,arm926ej-s";
44 device_type = "cpu";
45 };
46 };
47
48 memory {
49 device_type = "memory";
50 reg = <0x20000000 0x04000000>;
51 };
52
53 clocks {
54 slow_xtal: slow_xtal {
55 compatible = "fixed-clock";
56 #clock-cells = <0>;
57 clock-frequency = <0>;
58 };
59
60 main_xtal: main_xtal {
61 compatible = "fixed-clock";
62 #clock-cells = <0>;
63 clock-frequency = <0>;
64 };
65
66 adc_op_clk: adc_op_clk{
67 compatible = "fixed-clock";
68 #clock-cells = <0>;
69 clock-frequency = <5000000>;
70 };
71 };
72
73 sram0: sram@2ff000 {
74 compatible = "mmio-sram";
75 reg = <0x002ff000 0x2000>;
76 };
77
78 ahb {
79 compatible = "simple-bus";
80 #address-cells = <1>;
81 #size-cells = <1>;
82 ranges;
83
84 apb {
85 compatible = "simple-bus";
86 #address-cells = <1>;
87 #size-cells = <1>;
88 ranges;
89
90 aic: interrupt-controller@fffff000 {
91 #interrupt-cells = <3>;
92 compatible = "atmel,at91rm9200-aic";
93 interrupt-controller;
94 reg = <0xfffff000 0x200>;
95 atmel,external-irqs = <29 30 31>;
96 };
97
98 ramc0: ramc@ffffea00 {
99 compatible = "atmel,at91sam9260-sdramc";
100 reg = <0xffffea00 0x200>;
101 };
102
103 smc: smc@ffffec00 {
104 compatible = "atmel,at91sam9260-smc", "syscon";
105 reg = <0xffffec00 0x200>;
106 };
107
108 matrix: matrix@ffffee00 {
109 compatible = "atmel,at91sam9260-matrix", "syscon";
110 reg = <0xffffee00 0x200>;
111 };
112
113 pmc: pmc@fffffc00 {
114 compatible = "atmel,at91sam9260-pmc", "syscon";
115 reg = <0xfffffc00 0x100>;
116 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
117 #clock-cells = <2>;
118 clocks = <&slow_xtal>, <&main_xtal>;
119 clock-names = "slow_xtal", "main_xtal";
120 };
121
122 rstc@fffffd00 {
123 compatible = "atmel,at91sam9260-rstc";
124 reg = <0xfffffd00 0x10>;
125 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
126 };
127
128 shdwc@fffffd10 {
129 compatible = "atmel,at91sam9260-shdwc";
130 reg = <0xfffffd10 0x10>;
131 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
132 };
133
134 pit: timer@fffffd30 {
135 compatible = "atmel,at91sam9260-pit";
136 reg = <0xfffffd30 0xf>;
137 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
138 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
139 };
140
141 tcb0: timer@fffa0000 {
142 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
143 #address-cells = <1>;
144 #size-cells = <0>;
145 reg = <0xfffa0000 0x100>;
146 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
147 18 IRQ_TYPE_LEVEL_HIGH 0
148 19 IRQ_TYPE_LEVEL_HIGH 0>;
149 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&pmc PMC_TYPE_CORE PMC_SLOW>;
150 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
151 };
152
153 tcb1: timer@fffdc000 {
154 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
155 #address-cells = <1>;
156 #size-cells = <0>;
157 reg = <0xfffdc000 0x100>;
158 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
159 27 IRQ_TYPE_LEVEL_HIGH 0
160 28 IRQ_TYPE_LEVEL_HIGH 0>;
161 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_PERIPHERAL 28>, <&pmc PMC_TYPE_CORE PMC_SLOW>;
162 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
163 };
164
165 pinctrl@fffff400 {
166 #address-cells = <1>;
167 #size-cells = <1>;
168 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
169 ranges = <0xfffff400 0xfffff400 0x600>;
170
171 atmel,mux-mask = <
172 /* A B */
173 0xffffffff 0xffc00c3b /* pioA */
174 0xffffffff 0x7fff3ccf /* pioB */
175 0xffffffff 0x007fffff /* pioC */
176 >;
177
178 /* shared pinctrl settings */
179 dbgu {
180 pinctrl_dbgu: dbgu-0 {
181 atmel,pins =
182 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
183 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
184 };
185 };
186
187 usart0 {
188 pinctrl_usart0: usart0-0 {
189 atmel,pins =
190 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE
191 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
192 };
193
194 pinctrl_usart0_rts: usart0_rts-0 {
195 atmel,pins =
196 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
197 };
198
199 pinctrl_usart0_cts: usart0_cts-0 {
200 atmel,pins =
201 <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */
202 };
203
204 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
205 atmel,pins =
206 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */
207 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */
208 };
209
210 pinctrl_usart0_dcd: usart0_dcd-0 {
211 atmel,pins =
212 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
213 };
214
215 pinctrl_usart0_ri: usart0_ri-0 {
216 atmel,pins =
217 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
218 };
219 };
220
221 usart1 {
222 pinctrl_usart1: usart1-0 {
223 atmel,pins =
224 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE
225 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
226 };
227
228 pinctrl_usart1_rts: usart1_rts-0 {
229 atmel,pins =
230 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */
231 };
232
233 pinctrl_usart1_cts: usart1_cts-0 {
234 atmel,pins =
235 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */
236 };
237 };
238
239 usart2 {
240 pinctrl_usart2: usart2-0 {
241 atmel,pins =
242 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE
243 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
244 };
245
246 pinctrl_usart2_rts: usart2_rts-0 {
247 atmel,pins =
248 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
249 };
250
251 pinctrl_usart2_cts: usart2_cts-0 {
252 atmel,pins =
253 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
254 };
255 };
256
257 usart3 {
258 pinctrl_usart3: usart3-0 {
259 atmel,pins =
260 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE
261 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
262 };
263
264 pinctrl_usart3_rts: usart3_rts-0 {
265 atmel,pins =
266 <AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
267 };
268
269 pinctrl_usart3_cts: usart3_cts-0 {
270 atmel,pins =
271 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
272 };
273 };
274
275 uart0 {
276 pinctrl_uart0: uart0-0 {
277 atmel,pins =
278 <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE
279 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
280 };
281 };
282
283 uart1 {
284 pinctrl_uart1: uart1-0 {
285 atmel,pins =
286 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE
287 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
288 };
289 };
290
291 nand {
292 pinctrl_nand_rb: nand-rb-0 {
293 atmel,pins =
294 <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
295 };
296
297 pinctrl_nand_cs: nand-cs-0 {
298 atmel,pins =
299 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
300 };
301 };
302
303 macb {
304 pinctrl_macb_rmii: macb_rmii-0 {
305 atmel,pins =
306 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
307 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
308 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
309 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
310 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
311 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
312 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
313 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */
314 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */
315 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
316 };
317
318 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
319 atmel,pins =
320 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
321 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */
322 AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
323 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
324 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
325 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
326 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
327 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
328 };
329
330 pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
331 atmel,pins =
332 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */
333 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */
334 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
335 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
336 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
337 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
338 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
339 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
340 };
341 };
342
343 mmc0 {
344 pinctrl_mmc0_clk: mmc0_clk-0 {
345 atmel,pins =
346 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
347 };
348
349 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
350 atmel,pins =
351 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
352 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */
353 };
354
355 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
356 atmel,pins =
357 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
358 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
359 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
360 };
361
362 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
363 atmel,pins =
364 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
365 AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */
366 };
367
368 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
369 atmel,pins =
370 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
371 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
372 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */
373 };
374 };
375
376 ssc0 {
377 pinctrl_ssc0_tx: ssc0_tx-0 {
378 atmel,pins =
379 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
380 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */
381 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
382 };
383
384 pinctrl_ssc0_rx: ssc0_rx-0 {
385 atmel,pins =
386 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
387 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */
388 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
389 };
390 };
391
392 spi0 {
393 pinctrl_spi0: spi0-0 {
394 atmel,pins =
395 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
396 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
397 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
398 };
399 };
400
401 spi1 {
402 pinctrl_spi1: spi1-0 {
403 atmel,pins =
404 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */
405 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */
406 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */
407 };
408 };
409
410 i2c_gpio0 {
411 pinctrl_i2c_gpio0: i2c_gpio0-0 {
412 atmel,pins =
413 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
414 AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
415 };
416 };
417
418 tcb0 {
419 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
420 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
421 };
422
423 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
424 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
425 };
426
427 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
428 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
429 };
430
431 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
432 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
433 };
434
435 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
436 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
437 };
438
439 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
440 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
441 };
442
443 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
444 atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
445 };
446
447 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
448 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
449 };
450
451 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
452 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
453 };
454 };
455
456 tcb1 {
457 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
458 atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
459 };
460
461 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
462 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
463 };
464
465 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
466 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
467 };
468
469 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
470 atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
471 };
472
473 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
474 atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
475 };
476
477 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
478 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
479 };
480
481 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
482 atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
483 };
484
485 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
486 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
487 };
488
489 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
490 atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
491 };
492 };
493
494 pioA: gpio@fffff400 {
495 compatible = "atmel,at91rm9200-gpio";
496 reg = <0xfffff400 0x200>;
497 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
498 #gpio-cells = <2>;
499 gpio-controller;
500 interrupt-controller;
501 #interrupt-cells = <2>;
502 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
503 };
504
505 pioB: gpio@fffff600 {
506 compatible = "atmel,at91rm9200-gpio";
507 reg = <0xfffff600 0x200>;
508 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
509 #gpio-cells = <2>;
510 gpio-controller;
511 interrupt-controller;
512 #interrupt-cells = <2>;
513 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
514 };
515
516 pioC: gpio@fffff800 {
517 compatible = "atmel,at91rm9200-gpio";
518 reg = <0xfffff800 0x200>;
519 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
520 #gpio-cells = <2>;
521 gpio-controller;
522 interrupt-controller;
523 #interrupt-cells = <2>;
524 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
525 };
526 };
527
528 dbgu: serial@fffff200 {
529 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
530 reg = <0xfffff200 0x200>;
531 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
532 pinctrl-names = "default";
533 pinctrl-0 = <&pinctrl_dbgu>;
534 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
535 clock-names = "usart";
536 status = "disabled";
537 };
538
539 usart0: serial@fffb0000 {
540 compatible = "atmel,at91sam9260-usart";
541 reg = <0xfffb0000 0x200>;
542 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
543 atmel,use-dma-rx;
544 atmel,use-dma-tx;
545 pinctrl-names = "default";
546 pinctrl-0 = <&pinctrl_usart0>;
547 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
548 clock-names = "usart";
549 status = "disabled";
550 };
551
552 usart1: serial@fffb4000 {
553 compatible = "atmel,at91sam9260-usart";
554 reg = <0xfffb4000 0x200>;
555 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
556 atmel,use-dma-rx;
557 atmel,use-dma-tx;
558 pinctrl-names = "default";
559 pinctrl-0 = <&pinctrl_usart1>;
560 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
561 clock-names = "usart";
562 status = "disabled";
563 };
564
565 usart2: serial@fffb8000 {
566 compatible = "atmel,at91sam9260-usart";
567 reg = <0xfffb8000 0x200>;
568 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
569 atmel,use-dma-rx;
570 atmel,use-dma-tx;
571 pinctrl-names = "default";
572 pinctrl-0 = <&pinctrl_usart2>;
573 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
574 clock-names = "usart";
575 status = "disabled";
576 };
577
578 usart3: serial@fffd0000 {
579 compatible = "atmel,at91sam9260-usart";
580 reg = <0xfffd0000 0x200>;
581 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
582 atmel,use-dma-rx;
583 atmel,use-dma-tx;
584 pinctrl-names = "default";
585 pinctrl-0 = <&pinctrl_usart3>;
586 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
587 clock-names = "usart";
588 status = "disabled";
589 };
590
591 uart0: serial@fffd4000 {
592 compatible = "atmel,at91sam9260-usart";
593 reg = <0xfffd4000 0x200>;
594 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
595 atmel,use-dma-rx;
596 atmel,use-dma-tx;
597 pinctrl-names = "default";
598 pinctrl-0 = <&pinctrl_uart0>;
599 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
600 clock-names = "usart";
601 status = "disabled";
602 };
603
604 uart1: serial@fffd8000 {
605 compatible = "atmel,at91sam9260-usart";
606 reg = <0xfffd8000 0x200>;
607 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
608 atmel,use-dma-rx;
609 atmel,use-dma-tx;
610 pinctrl-names = "default";
611 pinctrl-0 = <&pinctrl_uart1>;
612 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
613 clock-names = "usart";
614 status = "disabled";
615 };
616
617 macb0: ethernet@fffc4000 {
618 compatible = "cdns,at91sam9260-macb", "cdns,macb";
619 reg = <0xfffc4000 0x100>;
620 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
621 pinctrl-names = "default";
622 pinctrl-0 = <&pinctrl_macb_rmii>;
623 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 21>;
624 clock-names = "hclk", "pclk";
625 status = "disabled";
626 };
627
628 usb1: gadget@fffa4000 {
629 compatible = "atmel,at91sam9260-udc";
630 reg = <0xfffa4000 0x4000>;
631 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
632 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>, <&pmc PMC_TYPE_SYSTEM 7>;
633 clock-names = "pclk", "hclk";
634 status = "disabled";
635 };
636
637 i2c0: i2c@fffac000 {
638 compatible = "atmel,at91sam9260-i2c";
639 reg = <0xfffac000 0x100>;
640 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
641 #address-cells = <1>;
642 #size-cells = <0>;
643 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
644 status = "disabled";
645 };
646
647 mmc0: mmc@fffa8000 {
648 compatible = "atmel,hsmci";
649 reg = <0xfffa8000 0x600>;
650 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
651 #address-cells = <1>;
652 #size-cells = <0>;
653 pinctrl-names = "default";
654 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
655 clock-names = "mci_clk";
656 status = "disabled";
657 };
658
659 ssc0: ssc@fffbc000 {
660 compatible = "atmel,at91rm9200-ssc";
661 reg = <0xfffbc000 0x4000>;
662 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
663 pinctrl-names = "default";
664 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
665 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
666 clock-names = "pclk";
667 status = "disabled";
668 };
669
670 spi0: spi@fffc8000 {
671 #address-cells = <1>;
672 #size-cells = <0>;
673 compatible = "atmel,at91rm9200-spi";
674 reg = <0xfffc8000 0x200>;
675 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
676 pinctrl-names = "default";
677 pinctrl-0 = <&pinctrl_spi0>;
678 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
679 clock-names = "spi_clk";
680 status = "disabled";
681 };
682
683 spi1: spi@fffcc000 {
684 #address-cells = <1>;
685 #size-cells = <0>;
686 compatible = "atmel,at91rm9200-spi";
687 reg = <0xfffcc000 0x200>;
688 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
689 pinctrl-names = "default";
690 pinctrl-0 = <&pinctrl_spi1>;
691 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
692 clock-names = "spi_clk";
693 status = "disabled";
694 };
695
696 adc0: adc@fffe0000 {
697 #address-cells = <1>;
698 #size-cells = <0>;
699 compatible = "atmel,at91sam9260-adc";
700 reg = <0xfffe0000 0x100>;
701 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
702 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>, <&adc_op_clk>;
703 clock-names = "adc_clk", "adc_op_clk";
704 atmel,adc-use-external-triggers;
705 atmel,adc-channels-used = <0xf>;
706 atmel,adc-vref = <3300>;
707 atmel,adc-startup-time = <15>;
708 atmel,adc-res = <8 10>;
709 atmel,adc-res-names = "lowres", "highres";
710 atmel,adc-use-res = "highres";
711
712 trigger0 {
713 trigger-name = "timer-counter-0";
714 trigger-value = <0x1>;
715 };
716 trigger1 {
717 trigger-name = "timer-counter-1";
718 trigger-value = <0x3>;
719 };
720
721 trigger2 {
722 trigger-name = "timer-counter-2";
723 trigger-value = <0x5>;
724 };
725
726 trigger3 {
727 trigger-name = "external";
728 trigger-value = <0xd>;
729 trigger-external;
730 };
731 };
732
733 rtc@fffffd20 {
734 compatible = "atmel,at91sam9260-rtt";
735 reg = <0xfffffd20 0x10>;
736 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
737 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
738 status = "disabled";
739 };
740
741 watchdog@fffffd40 {
742 compatible = "atmel,at91sam9260-wdt";
743 reg = <0xfffffd40 0x10>;
744 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
745 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
746 atmel,watchdog-type = "hardware";
747 atmel,reset-type = "all";
748 atmel,dbg-halt;
749 status = "disabled";
750 };
751
752 gpbr: syscon@fffffd50 {
753 compatible = "atmel,at91sam9260-gpbr", "syscon";
754 reg = <0xfffffd50 0x10>;
755 status = "disabled";
756 };
757 };
758
759 usb0: ohci@500000 {
760 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
761 reg = <0x00500000 0x100000>;
762 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
763 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_SYSTEM 6>;
764 clock-names = "ohci_clk", "hclk", "uhpck";
765 status = "disabled";
766 };
767
768 ebi: ebi@10000000 {
769 compatible = "atmel,at91sam9260-ebi";
770 #address-cells = <2>;
771 #size-cells = <1>;
772 atmel,smc = <&smc>;
773 atmel,matrix = <&matrix>;
774 reg = <0x10000000 0x80000000>;
775 ranges = <0x0 0x0 0x10000000 0x10000000
776 0x1 0x0 0x20000000 0x10000000
777 0x2 0x0 0x30000000 0x10000000
778 0x3 0x0 0x40000000 0x10000000
779 0x4 0x0 0x50000000 0x10000000
780 0x5 0x0 0x60000000 0x10000000
781 0x6 0x0 0x70000000 0x10000000
782 0x7 0x0 0x80000000 0x10000000>;
783 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
784 status = "disabled";
785
786 nand_controller: nand-controller {
787 compatible = "atmel,at91sam9260-nand-controller";
788 #address-cells = <2>;
789 #size-cells = <1>;
790 ranges;
791 status = "disabled";
792 };
793 };
794 };
795
796 i2c-gpio-0 {
797 compatible = "i2c-gpio";
798 gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
799 &pioA 24 GPIO_ACTIVE_HIGH /* scl */
800 >;
801 i2c-gpio,sda-open-drain;
802 i2c-gpio,scl-open-drain;
803 i2c-gpio,delay-us = <2>; /* ~100 kHz */
804 #address-cells = <1>;
805 #size-cells = <0>;
806 pinctrl-names = "default";
807 pinctrl-0 = <&pinctrl_i2c_gpio0>;
808 status = "disabled";
809 };
810};
1/*
2 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
3 *
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 *
8 * Licensed under GPLv2 or later.
9 */
10
11#include "skeleton.dtsi"
12#include <dt-bindings/pinctrl/at91.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14#include <dt-bindings/gpio/gpio.h>
15
16/ {
17 model = "Atmel AT91SAM9260 family SoC";
18 compatible = "atmel,at91sam9260";
19 interrupt-parent = <&aic>;
20
21 aliases {
22 serial0 = &dbgu;
23 serial1 = &usart0;
24 serial2 = &usart1;
25 serial3 = &usart2;
26 serial4 = &usart3;
27 serial5 = &uart0;
28 serial6 = &uart1;
29 gpio0 = &pioA;
30 gpio1 = &pioB;
31 gpio2 = &pioC;
32 tcb0 = &tcb0;
33 tcb1 = &tcb1;
34 i2c0 = &i2c0;
35 ssc0 = &ssc0;
36 };
37 cpus {
38 #address-cells = <0>;
39 #size-cells = <0>;
40
41 cpu {
42 compatible = "arm,arm926ej-s";
43 device_type = "cpu";
44 };
45 };
46
47 memory {
48 reg = <0x20000000 0x04000000>;
49 };
50
51 ahb {
52 compatible = "simple-bus";
53 #address-cells = <1>;
54 #size-cells = <1>;
55 ranges;
56
57 apb {
58 compatible = "simple-bus";
59 #address-cells = <1>;
60 #size-cells = <1>;
61 ranges;
62
63 aic: interrupt-controller@fffff000 {
64 #interrupt-cells = <3>;
65 compatible = "atmel,at91rm9200-aic";
66 interrupt-controller;
67 reg = <0xfffff000 0x200>;
68 atmel,external-irqs = <29 30 31>;
69 };
70
71 ramc0: ramc@ffffea00 {
72 compatible = "atmel,at91sam9260-sdramc";
73 reg = <0xffffea00 0x200>;
74 };
75
76 pmc: pmc@fffffc00 {
77 compatible = "atmel,at91rm9200-pmc";
78 reg = <0xfffffc00 0x100>;
79 };
80
81 rstc@fffffd00 {
82 compatible = "atmel,at91sam9260-rstc";
83 reg = <0xfffffd00 0x10>;
84 };
85
86 shdwc@fffffd10 {
87 compatible = "atmel,at91sam9260-shdwc";
88 reg = <0xfffffd10 0x10>;
89 };
90
91 pit: timer@fffffd30 {
92 compatible = "atmel,at91sam9260-pit";
93 reg = <0xfffffd30 0xf>;
94 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
95 };
96
97 tcb0: timer@fffa0000 {
98 compatible = "atmel,at91rm9200-tcb";
99 reg = <0xfffa0000 0x100>;
100 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
101 18 IRQ_TYPE_LEVEL_HIGH 0
102 19 IRQ_TYPE_LEVEL_HIGH 0>;
103 };
104
105 tcb1: timer@fffdc000 {
106 compatible = "atmel,at91rm9200-tcb";
107 reg = <0xfffdc000 0x100>;
108 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
109 27 IRQ_TYPE_LEVEL_HIGH 0
110 28 IRQ_TYPE_LEVEL_HIGH 0>;
111 };
112
113 pinctrl@fffff400 {
114 #address-cells = <1>;
115 #size-cells = <1>;
116 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
117 ranges = <0xfffff400 0xfffff400 0x600>;
118
119 atmel,mux-mask = <
120 /* A B */
121 0xffffffff 0xffc00c3b /* pioA */
122 0xffffffff 0x7fff3ccf /* pioB */
123 0xffffffff 0x007fffff /* pioC */
124 >;
125
126 /* shared pinctrl settings */
127 dbgu {
128 pinctrl_dbgu: dbgu-0 {
129 atmel,pins =
130 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */
131 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB15 periph with pullup */
132 };
133 };
134
135 usart0 {
136 pinctrl_usart0: usart0-0 {
137 atmel,pins =
138 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
139 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
140 };
141
142 pinctrl_usart0_rts: usart0_rts-0 {
143 atmel,pins =
144 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
145 };
146
147 pinctrl_usart0_cts: usart0_cts-0 {
148 atmel,pins =
149 <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */
150 };
151
152 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
153 atmel,pins =
154 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */
155 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */
156 };
157
158 pinctrl_usart0_dcd: usart0_dcd-0 {
159 atmel,pins =
160 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
161 };
162
163 pinctrl_usart0_ri: usart0_ri-0 {
164 atmel,pins =
165 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
166 };
167 };
168
169 usart1 {
170 pinctrl_usart1: usart1-0 {
171 atmel,pins =
172 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
173 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
174 };
175
176 pinctrl_usart1_rts: usart1_rts-0 {
177 atmel,pins =
178 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */
179 };
180
181 pinctrl_usart1_cts: usart1_cts-0 {
182 atmel,pins =
183 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */
184 };
185 };
186
187 usart2 {
188 pinctrl_usart2: usart2-0 {
189 atmel,pins =
190 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB8 periph A with pullup */
191 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB9 periph A */
192 };
193
194 pinctrl_usart2_rts: usart2_rts-0 {
195 atmel,pins =
196 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
197 };
198
199 pinctrl_usart2_cts: usart2_cts-0 {
200 atmel,pins =
201 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
202 };
203 };
204
205 usart3 {
206 pinctrl_usart3: usart3-0 {
207 atmel,pins =
208 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB10 periph A with pullup */
209 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
210 };
211
212 pinctrl_usart3_rts: usart3_rts-0 {
213 atmel,pins =
214 <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC8 periph B */
215 };
216
217 pinctrl_usart3_cts: usart3_cts-0 {
218 atmel,pins =
219 <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC10 periph B */
220 };
221 };
222
223 uart0 {
224 pinctrl_uart0: uart0-0 {
225 atmel,pins =
226 <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA31 periph B with pullup */
227 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
228 };
229 };
230
231 uart1 {
232 pinctrl_uart1: uart1-0 {
233 atmel,pins =
234 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB12 periph A with pullup */
235 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
236 };
237 };
238
239 nand {
240 pinctrl_nand: nand-0 {
241 atmel,pins =
242 <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC13 gpio RDY pin pull_up */
243 AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
244 };
245 };
246
247 macb {
248 pinctrl_macb_rmii: macb_rmii-0 {
249 atmel,pins =
250 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
251 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
252 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
253 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
254 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
255 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
256 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
257 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */
258 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */
259 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
260 };
261
262 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
263 atmel,pins =
264 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
265 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */
266 AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
267 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
268 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
269 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
270 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
271 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
272 };
273
274 pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
275 atmel,pins =
276 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */
277 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */
278 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
279 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
280 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
281 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
282 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
283 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
284 };
285 };
286
287 mmc0 {
288 pinctrl_mmc0_clk: mmc0_clk-0 {
289 atmel,pins =
290 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
291 };
292
293 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
294 atmel,pins =
295 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
296 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */
297 };
298
299 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
300 atmel,pins =
301 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
302 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
303 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
304 };
305
306 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
307 atmel,pins =
308 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
309 AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */
310 };
311
312 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
313 atmel,pins =
314 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
315 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
316 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */
317 };
318 };
319
320 ssc0 {
321 pinctrl_ssc0_tx: ssc0_tx-0 {
322 atmel,pins =
323 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
324 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */
325 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
326 };
327
328 pinctrl_ssc0_rx: ssc0_rx-0 {
329 atmel,pins =
330 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
331 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */
332 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
333 };
334 };
335
336 spi0 {
337 pinctrl_spi0: spi0-0 {
338 atmel,pins =
339 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
340 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
341 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
342 };
343 };
344
345 spi1 {
346 pinctrl_spi1: spi1-0 {
347 atmel,pins =
348 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */
349 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */
350 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */
351 };
352 };
353
354 i2c_gpio0 {
355 pinctrl_i2c_gpio0: i2c_gpio0-0 {
356 atmel,pins =
357 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
358 AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
359 };
360 };
361
362 tcb0 {
363 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
364 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
365 };
366
367 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
368 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
369 };
370
371 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
372 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
373 };
374
375 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
376 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
377 };
378
379 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
380 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
381 };
382
383 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
384 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
385 };
386
387 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
388 atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
389 };
390
391 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
392 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
393 };
394
395 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
396 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
397 };
398 };
399
400 tcb1 {
401 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
402 atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
403 };
404
405 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
406 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
407 };
408
409 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
410 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
411 };
412
413 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
414 atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
415 };
416
417 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
418 atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
419 };
420
421 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
422 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
423 };
424
425 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
426 atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
427 };
428
429 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
430 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
431 };
432
433 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
434 atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
435 };
436 };
437
438 pioA: gpio@fffff400 {
439 compatible = "atmel,at91rm9200-gpio";
440 reg = <0xfffff400 0x200>;
441 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
442 #gpio-cells = <2>;
443 gpio-controller;
444 interrupt-controller;
445 #interrupt-cells = <2>;
446 };
447
448 pioB: gpio@fffff600 {
449 compatible = "atmel,at91rm9200-gpio";
450 reg = <0xfffff600 0x200>;
451 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
452 #gpio-cells = <2>;
453 gpio-controller;
454 interrupt-controller;
455 #interrupt-cells = <2>;
456 };
457
458 pioC: gpio@fffff800 {
459 compatible = "atmel,at91rm9200-gpio";
460 reg = <0xfffff800 0x200>;
461 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
462 #gpio-cells = <2>;
463 gpio-controller;
464 interrupt-controller;
465 #interrupt-cells = <2>;
466 };
467 };
468
469 dbgu: serial@fffff200 {
470 compatible = "atmel,at91sam9260-usart";
471 reg = <0xfffff200 0x200>;
472 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
473 pinctrl-names = "default";
474 pinctrl-0 = <&pinctrl_dbgu>;
475 status = "disabled";
476 };
477
478 usart0: serial@fffb0000 {
479 compatible = "atmel,at91sam9260-usart";
480 reg = <0xfffb0000 0x200>;
481 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
482 atmel,use-dma-rx;
483 atmel,use-dma-tx;
484 pinctrl-names = "default";
485 pinctrl-0 = <&pinctrl_usart0>;
486 status = "disabled";
487 };
488
489 usart1: serial@fffb4000 {
490 compatible = "atmel,at91sam9260-usart";
491 reg = <0xfffb4000 0x200>;
492 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
493 atmel,use-dma-rx;
494 atmel,use-dma-tx;
495 pinctrl-names = "default";
496 pinctrl-0 = <&pinctrl_usart1>;
497 status = "disabled";
498 };
499
500 usart2: serial@fffb8000 {
501 compatible = "atmel,at91sam9260-usart";
502 reg = <0xfffb8000 0x200>;
503 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
504 atmel,use-dma-rx;
505 atmel,use-dma-tx;
506 pinctrl-names = "default";
507 pinctrl-0 = <&pinctrl_usart2>;
508 status = "disabled";
509 };
510
511 usart3: serial@fffd0000 {
512 compatible = "atmel,at91sam9260-usart";
513 reg = <0xfffd0000 0x200>;
514 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
515 atmel,use-dma-rx;
516 atmel,use-dma-tx;
517 pinctrl-names = "default";
518 pinctrl-0 = <&pinctrl_usart3>;
519 status = "disabled";
520 };
521
522 uart0: serial@fffd4000 {
523 compatible = "atmel,at91sam9260-usart";
524 reg = <0xfffd4000 0x200>;
525 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
526 atmel,use-dma-rx;
527 atmel,use-dma-tx;
528 pinctrl-names = "default";
529 pinctrl-0 = <&pinctrl_uart0>;
530 status = "disabled";
531 };
532
533 uart1: serial@fffd8000 {
534 compatible = "atmel,at91sam9260-usart";
535 reg = <0xfffd8000 0x200>;
536 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
537 atmel,use-dma-rx;
538 atmel,use-dma-tx;
539 pinctrl-names = "default";
540 pinctrl-0 = <&pinctrl_uart1>;
541 status = "disabled";
542 };
543
544 macb0: ethernet@fffc4000 {
545 compatible = "cdns,at32ap7000-macb", "cdns,macb";
546 reg = <0xfffc4000 0x100>;
547 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
548 pinctrl-names = "default";
549 pinctrl-0 = <&pinctrl_macb_rmii>;
550 status = "disabled";
551 };
552
553 usb1: gadget@fffa4000 {
554 compatible = "atmel,at91rm9200-udc";
555 reg = <0xfffa4000 0x4000>;
556 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
557 status = "disabled";
558 };
559
560 i2c0: i2c@fffac000 {
561 compatible = "atmel,at91sam9260-i2c";
562 reg = <0xfffac000 0x100>;
563 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
564 #address-cells = <1>;
565 #size-cells = <0>;
566 status = "disabled";
567 };
568
569 mmc0: mmc@fffa8000 {
570 compatible = "atmel,hsmci";
571 reg = <0xfffa8000 0x600>;
572 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
573 #address-cells = <1>;
574 #size-cells = <0>;
575 pinctrl-names = "default";
576 status = "disabled";
577 };
578
579 ssc0: ssc@fffbc000 {
580 compatible = "atmel,at91rm9200-ssc";
581 reg = <0xfffbc000 0x4000>;
582 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
583 pinctrl-names = "default";
584 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
585 status = "disabled";
586 };
587
588 spi0: spi@fffc8000 {
589 #address-cells = <1>;
590 #size-cells = <0>;
591 compatible = "atmel,at91rm9200-spi";
592 reg = <0xfffc8000 0x200>;
593 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
594 pinctrl-names = "default";
595 pinctrl-0 = <&pinctrl_spi0>;
596 status = "disabled";
597 };
598
599 spi1: spi@fffcc000 {
600 #address-cells = <1>;
601 #size-cells = <0>;
602 compatible = "atmel,at91rm9200-spi";
603 reg = <0xfffcc000 0x200>;
604 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
605 pinctrl-names = "default";
606 pinctrl-0 = <&pinctrl_spi1>;
607 status = "disabled";
608 };
609
610 adc0: adc@fffe0000 {
611 #address-cells = <1>;
612 #size-cells = <0>;
613 compatible = "atmel,at91sam9260-adc";
614 reg = <0xfffe0000 0x100>;
615 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
616 atmel,adc-use-external-triggers;
617 atmel,adc-channels-used = <0xf>;
618 atmel,adc-vref = <3300>;
619 atmel,adc-startup-time = <15>;
620 atmel,adc-res = <8 10>;
621 atmel,adc-res-names = "lowres", "highres";
622 atmel,adc-use-res = "highres";
623
624 trigger@0 {
625 reg = <0>;
626 trigger-name = "timer-counter-0";
627 trigger-value = <0x1>;
628 };
629 trigger@1 {
630 reg = <1>;
631 trigger-name = "timer-counter-1";
632 trigger-value = <0x3>;
633 };
634
635 trigger@2 {
636 reg = <2>;
637 trigger-name = "timer-counter-2";
638 trigger-value = <0x5>;
639 };
640
641 trigger@3 {
642 reg = <3>;
643 trigger-name = "external";
644 trigger-value = <0xd>;
645 trigger-external;
646 };
647 };
648
649 watchdog@fffffd40 {
650 compatible = "atmel,at91sam9260-wdt";
651 reg = <0xfffffd40 0x10>;
652 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
653 atmel,watchdog-type = "hardware";
654 atmel,reset-type = "all";
655 atmel,dbg-halt;
656 atmel,idle-halt;
657 status = "disabled";
658 };
659 };
660
661 nand0: nand@40000000 {
662 compatible = "atmel,at91rm9200-nand";
663 #address-cells = <1>;
664 #size-cells = <1>;
665 reg = <0x40000000 0x10000000
666 0xffffe800 0x200
667 >;
668 atmel,nand-addr-offset = <21>;
669 atmel,nand-cmd-offset = <22>;
670 pinctrl-names = "default";
671 pinctrl-0 = <&pinctrl_nand>;
672 gpios = <&pioC 13 GPIO_ACTIVE_HIGH
673 &pioC 14 GPIO_ACTIVE_HIGH
674 0
675 >;
676 status = "disabled";
677 };
678
679 usb0: ohci@00500000 {
680 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
681 reg = <0x00500000 0x100000>;
682 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
683 status = "disabled";
684 };
685 };
686
687 i2c@0 {
688 compatible = "i2c-gpio";
689 gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
690 &pioA 24 GPIO_ACTIVE_HIGH /* scl */
691 >;
692 i2c-gpio,sda-open-drain;
693 i2c-gpio,scl-open-drain;
694 i2c-gpio,delay-us = <2>; /* ~100 kHz */
695 #address-cells = <1>;
696 #size-cells = <0>;
697 pinctrl-names = "default";
698 pinctrl-0 = <&pinctrl_i2c_gpio0>;
699 status = "disabled";
700 };
701};