1/* SPDX-License-Identifier: GPL-2.0 */
 2#ifndef _ALPHA_AGP_BACKEND_H
 3#define _ALPHA_AGP_BACKEND_H 1
 4
 5typedef	union _alpha_agp_mode {
 6	struct {
 7		u32 rate : 3;
 8		u32 reserved0 : 1;
 9		u32 fw : 1;
10		u32 fourgb : 1;
11		u32 reserved1 : 2;
12		u32 enable : 1;
13		u32 sba : 1;
14		u32 reserved2 : 14;
15		u32 rq : 8;
16	} bits;
17	u32 lw;
18} alpha_agp_mode;
19
20typedef struct _alpha_agp_info {
21	struct pci_controller *hose;
22	struct {
23		dma_addr_t bus_base;
24		unsigned long size;
25		void *sysdata;
26	} aperture;
27	alpha_agp_mode capability;
28	alpha_agp_mode mode;
29	void *private;
30	struct alpha_agp_ops *ops;
31} alpha_agp_info;
32
33struct alpha_agp_ops {
34	int (*setup)(alpha_agp_info *);
35	void (*cleanup)(alpha_agp_info *);
36	int (*configure)(alpha_agp_info *);
37	int (*bind)(alpha_agp_info *, off_t, struct agp_memory *);
38	int (*unbind)(alpha_agp_info *, off_t, struct agp_memory *);
39	unsigned long (*translate)(alpha_agp_info *, dma_addr_t);
40};
41
42
43#endif /* _ALPHA_AGP_BACKEND_H */

 
 1#ifndef _ALPHA_AGP_BACKEND_H
 2#define _ALPHA_AGP_BACKEND_H 1
 3
 4typedef	union _alpha_agp_mode {
 5	struct {
 6		u32 rate : 3;
 7		u32 reserved0 : 1;
 8		u32 fw : 1;
 9		u32 fourgb : 1;
10		u32 reserved1 : 2;
11		u32 enable : 1;
12		u32 sba : 1;
13		u32 reserved2 : 14;
14		u32 rq : 8;
15	} bits;
16	u32 lw;
17} alpha_agp_mode;
18
19typedef struct _alpha_agp_info {
20	struct pci_controller *hose;
21	struct {
22		dma_addr_t bus_base;
23		unsigned long size;
24		void *sysdata;
25	} aperture;
26	alpha_agp_mode capability;
27	alpha_agp_mode mode;
28	void *private;
29	struct alpha_agp_ops *ops;
30} alpha_agp_info;
31
32struct alpha_agp_ops {
33	int (*setup)(alpha_agp_info *);
34	void (*cleanup)(alpha_agp_info *);
35	int (*configure)(alpha_agp_info *);
36	int (*bind)(alpha_agp_info *, off_t, struct agp_memory *);
37	int (*unbind)(alpha_agp_info *, off_t, struct agp_memory *);
38	unsigned long (*translate)(alpha_agp_info *, dma_addr_t);
39};
40
41
42#endif /* _ALPHA_AGP_BACKEND_H */