1/* SPDX-License-Identifier: GPL-2.0 */
  2/* Copyright(c) 2013 - 2018 Intel Corporation. */
  3
  4#ifndef _I40E_DCB_H_
  5#define _I40E_DCB_H_
  6
  7#include "i40e_type.h"
  8
  9#define I40E_DCBX_STATUS_NOT_STARTED	0
 10#define I40E_DCBX_STATUS_IN_PROGRESS	1
 11#define I40E_DCBX_STATUS_DONE		2
 12#define I40E_DCBX_STATUS_MULTIPLE_PEERS	3
 13#define I40E_DCBX_STATUS_DISABLED	7
 14
 15#define I40E_TLV_TYPE_END		0
 16#define I40E_TLV_TYPE_ORG		127
 17
 18#define I40E_IEEE_8021QAZ_OUI		0x0080C2
 19#define I40E_IEEE_SUBTYPE_ETS_CFG	9
 20#define I40E_IEEE_SUBTYPE_ETS_REC	10
 21#define I40E_IEEE_SUBTYPE_PFC_CFG	11
 22#define I40E_IEEE_SUBTYPE_APP_PRI	12
 23
 24#define I40E_CEE_DCBX_OUI		0x001b21
 25#define I40E_CEE_DCBX_TYPE		2
 26
 27#define I40E_CEE_SUBTYPE_CTRL		1
 28#define I40E_CEE_SUBTYPE_PG_CFG		2
 29#define I40E_CEE_SUBTYPE_PFC_CFG	3
 30#define I40E_CEE_SUBTYPE_APP_PRI	4
 31
 32#define I40E_CEE_MAX_FEAT_TYPE		3
 33#define I40E_LLDP_CURRENT_STATUS_XL710_OFFSET	0x2B
 34#define I40E_LLDP_CURRENT_STATUS_X722_OFFSET	0x31
 35/* Defines for LLDP TLV header */
 36#define I40E_LLDP_TLV_LEN_SHIFT		0
 37#define I40E_LLDP_TLV_LEN_MASK		(0x01FF << I40E_LLDP_TLV_LEN_SHIFT)
 38#define I40E_LLDP_TLV_TYPE_SHIFT	9
 39#define I40E_LLDP_TLV_TYPE_MASK		(0x7F << I40E_LLDP_TLV_TYPE_SHIFT)
 40#define I40E_LLDP_TLV_SUBTYPE_SHIFT	0
 41#define I40E_LLDP_TLV_SUBTYPE_MASK	(0xFF << I40E_LLDP_TLV_SUBTYPE_SHIFT)
 42#define I40E_LLDP_TLV_OUI_SHIFT		8
 43#define I40E_LLDP_TLV_OUI_MASK		(0xFFFFFF << I40E_LLDP_TLV_OUI_SHIFT)
 44
 45/* Defines for IEEE ETS TLV */
 46#define I40E_IEEE_ETS_MAXTC_SHIFT	0
 47#define I40E_IEEE_ETS_MAXTC_MASK	(0x7 << I40E_IEEE_ETS_MAXTC_SHIFT)
 48#define I40E_IEEE_ETS_CBS_SHIFT		6
 49#define I40E_IEEE_ETS_CBS_MASK		BIT(I40E_IEEE_ETS_CBS_SHIFT)
 50#define I40E_IEEE_ETS_WILLING_SHIFT	7
 51#define I40E_IEEE_ETS_WILLING_MASK	BIT(I40E_IEEE_ETS_WILLING_SHIFT)
 52#define I40E_IEEE_ETS_PRIO_0_SHIFT	0
 53#define I40E_IEEE_ETS_PRIO_0_MASK	(0x7 << I40E_IEEE_ETS_PRIO_0_SHIFT)
 54#define I40E_IEEE_ETS_PRIO_1_SHIFT	4
 55#define I40E_IEEE_ETS_PRIO_1_MASK	(0x7 << I40E_IEEE_ETS_PRIO_1_SHIFT)
 56#define I40E_CEE_PGID_PRIO_0_SHIFT	0
 57#define I40E_CEE_PGID_PRIO_0_MASK	(0xF << I40E_CEE_PGID_PRIO_0_SHIFT)
 58#define I40E_CEE_PGID_PRIO_1_SHIFT	4
 59#define I40E_CEE_PGID_PRIO_1_MASK	(0xF << I40E_CEE_PGID_PRIO_1_SHIFT)
 60#define I40E_CEE_PGID_STRICT		15
 61
 62/* Defines for IEEE TSA types */
 63#define I40E_IEEE_TSA_STRICT		0
 64#define I40E_IEEE_TSA_ETS		2
 65
 66/* Defines for IEEE PFC TLV */
 67#define I40E_IEEE_PFC_CAP_SHIFT		0
 68#define I40E_IEEE_PFC_CAP_MASK		(0xF << I40E_IEEE_PFC_CAP_SHIFT)
 69#define I40E_IEEE_PFC_MBC_SHIFT		6
 70#define I40E_IEEE_PFC_MBC_MASK		BIT(I40E_IEEE_PFC_MBC_SHIFT)
 71#define I40E_IEEE_PFC_WILLING_SHIFT	7
 72#define I40E_IEEE_PFC_WILLING_MASK	BIT(I40E_IEEE_PFC_WILLING_SHIFT)
 73
 74/* Defines for IEEE APP TLV */
 75#define I40E_IEEE_APP_SEL_SHIFT		0
 76#define I40E_IEEE_APP_SEL_MASK		(0x7 << I40E_IEEE_APP_SEL_SHIFT)
 77#define I40E_IEEE_APP_PRIO_SHIFT	5
 78#define I40E_IEEE_APP_PRIO_MASK		(0x7 << I40E_IEEE_APP_PRIO_SHIFT)
 79
 80
 81#pragma pack(1)
 82
 83/* IEEE 802.1AB LLDP Organization specific TLV */
 84struct i40e_lldp_org_tlv {
 85	__be16 typelength;
 86	__be32 ouisubtype;
 87	u8 tlvinfo[1];
 88};
 89
 90struct i40e_cee_tlv_hdr {
 91	__be16 typelen;
 92	u8 operver;
 93	u8 maxver;
 94};
 95
 96struct i40e_cee_ctrl_tlv {
 97	struct i40e_cee_tlv_hdr hdr;
 98	__be32 seqno;
 99	__be32 ackno;
100};
101
102struct i40e_cee_feat_tlv {
103	struct i40e_cee_tlv_hdr hdr;
104	u8 en_will_err; /* Bits: |En|Will|Err|Reserved(5)| */
105#define I40E_CEE_FEAT_TLV_ENABLE_MASK	0x80
106#define I40E_CEE_FEAT_TLV_WILLING_MASK	0x40
107#define I40E_CEE_FEAT_TLV_ERR_MASK	0x20
108	u8 subtype;
109	u8 tlvinfo[1];
110};
111
112struct i40e_cee_app_prio {
113	__be16 protocol;
114	u8 upper_oui_sel; /* Bits: |Upper OUI(6)|Selector(2)| */
115#define I40E_CEE_APP_SELECTOR_MASK	0x03
116	__be16 lower_oui;
117	u8 prio_map;
118};
119#pragma pack()
120
121i40e_status i40e_get_dcbx_status(struct i40e_hw *hw,
122					   u16 *status);
123i40e_status i40e_lldp_to_dcb_config(u8 *lldpmib,
124					      struct i40e_dcbx_config *dcbcfg);
125i40e_status i40e_aq_get_dcb_config(struct i40e_hw *hw, u8 mib_type,
126					     u8 bridgetype,
127					     struct i40e_dcbx_config *dcbcfg);
128i40e_status i40e_get_dcb_config(struct i40e_hw *hw);
129i40e_status i40e_init_dcb(struct i40e_hw *hw, bool enable_mib_change);
130#endif /* _I40E_DCB_H_ */