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1// SPDX-License-Identifier: GPL-2.0 OR MIT
2/******************************************************************************
3 *
4 * COPYRIGHT (C) 2014-2015 VMware, Inc., Palo Alto, CA., USA
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 ******************************************************************************/
27
28#include <drm/drm_atomic.h>
29#include <drm/drm_atomic_helper.h>
30#include <drm/drm_damage_helper.h>
31#include <drm/drm_fourcc.h>
32#include <drm/drm_plane_helper.h>
33#include <drm/drm_vblank.h>
34
35#include "vmwgfx_kms.h"
36#include "device_include/svga3d_surfacedefs.h"
37
38#define vmw_crtc_to_stdu(x) \
39 container_of(x, struct vmw_screen_target_display_unit, base.crtc)
40#define vmw_encoder_to_stdu(x) \
41 container_of(x, struct vmw_screen_target_display_unit, base.encoder)
42#define vmw_connector_to_stdu(x) \
43 container_of(x, struct vmw_screen_target_display_unit, base.connector)
44
45
46
47enum stdu_content_type {
48 SAME_AS_DISPLAY = 0,
49 SEPARATE_SURFACE,
50 SEPARATE_BO
51};
52
53/**
54 * struct vmw_stdu_dirty - closure structure for the update functions
55 *
56 * @base: The base type we derive from. Used by vmw_kms_helper_dirty().
57 * @transfer: Transfer direction for DMA command.
58 * @left: Left side of bounding box.
59 * @right: Right side of bounding box.
60 * @top: Top side of bounding box.
61 * @bottom: Bottom side of bounding box.
62 * @fb_left: Left side of the framebuffer/content bounding box
63 * @fb_top: Top of the framebuffer/content bounding box
64 * @buf: buffer object when DMA-ing between buffer and screen targets.
65 * @sid: Surface ID when copying between surface and screen targets.
66 */
67struct vmw_stdu_dirty {
68 struct vmw_kms_dirty base;
69 SVGA3dTransferType transfer;
70 s32 left, right, top, bottom;
71 s32 fb_left, fb_top;
72 u32 pitch;
73 union {
74 struct vmw_buffer_object *buf;
75 u32 sid;
76 };
77};
78
79/*
80 * SVGA commands that are used by this code. Please see the device headers
81 * for explanation.
82 */
83struct vmw_stdu_update {
84 SVGA3dCmdHeader header;
85 SVGA3dCmdUpdateGBScreenTarget body;
86};
87
88struct vmw_stdu_dma {
89 SVGA3dCmdHeader header;
90 SVGA3dCmdSurfaceDMA body;
91};
92
93struct vmw_stdu_surface_copy {
94 SVGA3dCmdHeader header;
95 SVGA3dCmdSurfaceCopy body;
96};
97
98struct vmw_stdu_update_gb_image {
99 SVGA3dCmdHeader header;
100 SVGA3dCmdUpdateGBImage body;
101};
102
103/**
104 * struct vmw_screen_target_display_unit
105 *
106 * @base: VMW specific DU structure
107 * @display_srf: surface to be displayed. The dimension of this will always
108 * match the display mode. If the display mode matches
109 * content_vfbs dimensions, then this is a pointer into the
110 * corresponding field in content_vfbs. If not, then this
111 * is a separate buffer to which content_vfbs will blit to.
112 * @content_type: content_fb type
113 * @defined: true if the current display unit has been initialized
114 */
115struct vmw_screen_target_display_unit {
116 struct vmw_display_unit base;
117 struct vmw_surface *display_srf;
118 enum stdu_content_type content_fb_type;
119 s32 display_width, display_height;
120
121 bool defined;
122
123 /* For CPU Blit */
124 unsigned int cpp;
125};
126
127
128
129static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu);
130
131
132
133/******************************************************************************
134 * Screen Target Display Unit CRTC Functions
135 *****************************************************************************/
136
137
138/**
139 * vmw_stdu_crtc_destroy - cleans up the STDU
140 *
141 * @crtc: used to get a reference to the containing STDU
142 */
143static void vmw_stdu_crtc_destroy(struct drm_crtc *crtc)
144{
145 vmw_stdu_destroy(vmw_crtc_to_stdu(crtc));
146}
147
148/**
149 * vmw_stdu_define_st - Defines a Screen Target
150 *
151 * @dev_priv: VMW DRM device
152 * @stdu: display unit to create a Screen Target for
153 * @mode: The mode to set.
154 * @crtc_x: X coordinate of screen target relative to framebuffer origin.
155 * @crtc_y: Y coordinate of screen target relative to framebuffer origin.
156 *
157 * Creates a STDU that we can used later. This function is called whenever the
158 * framebuffer size changes.
159 *
160 * RETURNs:
161 * 0 on success, error code on failure
162 */
163static int vmw_stdu_define_st(struct vmw_private *dev_priv,
164 struct vmw_screen_target_display_unit *stdu,
165 struct drm_display_mode *mode,
166 int crtc_x, int crtc_y)
167{
168 struct {
169 SVGA3dCmdHeader header;
170 SVGA3dCmdDefineGBScreenTarget body;
171 } *cmd;
172
173 cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
174 if (unlikely(cmd == NULL))
175 return -ENOMEM;
176
177 cmd->header.id = SVGA_3D_CMD_DEFINE_GB_SCREENTARGET;
178 cmd->header.size = sizeof(cmd->body);
179
180 cmd->body.stid = stdu->base.unit;
181 cmd->body.width = mode->hdisplay;
182 cmd->body.height = mode->vdisplay;
183 cmd->body.flags = (0 == cmd->body.stid) ? SVGA_STFLAG_PRIMARY : 0;
184 cmd->body.dpi = 0;
185 cmd->body.xRoot = crtc_x;
186 cmd->body.yRoot = crtc_y;
187
188 stdu->base.set_gui_x = cmd->body.xRoot;
189 stdu->base.set_gui_y = cmd->body.yRoot;
190
191 vmw_fifo_commit(dev_priv, sizeof(*cmd));
192
193 stdu->defined = true;
194 stdu->display_width = mode->hdisplay;
195 stdu->display_height = mode->vdisplay;
196
197 return 0;
198}
199
200
201
202/**
203 * vmw_stdu_bind_st - Binds a surface to a Screen Target
204 *
205 * @dev_priv: VMW DRM device
206 * @stdu: display unit affected
207 * @res: Buffer to bind to the screen target. Set to NULL to blank screen.
208 *
209 * Binding a surface to a Screen Target the same as flipping
210 */
211static int vmw_stdu_bind_st(struct vmw_private *dev_priv,
212 struct vmw_screen_target_display_unit *stdu,
213 const struct vmw_resource *res)
214{
215 SVGA3dSurfaceImageId image;
216
217 struct {
218 SVGA3dCmdHeader header;
219 SVGA3dCmdBindGBScreenTarget body;
220 } *cmd;
221
222
223 if (!stdu->defined) {
224 DRM_ERROR("No screen target defined\n");
225 return -EINVAL;
226 }
227
228 /* Set up image using information in vfb */
229 memset(&image, 0, sizeof(image));
230 image.sid = res ? res->id : SVGA3D_INVALID_ID;
231
232 cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
233 if (unlikely(cmd == NULL))
234 return -ENOMEM;
235
236 cmd->header.id = SVGA_3D_CMD_BIND_GB_SCREENTARGET;
237 cmd->header.size = sizeof(cmd->body);
238
239 cmd->body.stid = stdu->base.unit;
240 cmd->body.image = image;
241
242 vmw_fifo_commit(dev_priv, sizeof(*cmd));
243
244 return 0;
245}
246
247/**
248 * vmw_stdu_populate_update - populate an UPDATE_GB_SCREENTARGET command with a
249 * bounding box.
250 *
251 * @cmd: Pointer to command stream.
252 * @unit: Screen target unit.
253 * @left: Left side of bounding box.
254 * @right: Right side of bounding box.
255 * @top: Top side of bounding box.
256 * @bottom: Bottom side of bounding box.
257 */
258static void vmw_stdu_populate_update(void *cmd, int unit,
259 s32 left, s32 right, s32 top, s32 bottom)
260{
261 struct vmw_stdu_update *update = cmd;
262
263 update->header.id = SVGA_3D_CMD_UPDATE_GB_SCREENTARGET;
264 update->header.size = sizeof(update->body);
265
266 update->body.stid = unit;
267 update->body.rect.x = left;
268 update->body.rect.y = top;
269 update->body.rect.w = right - left;
270 update->body.rect.h = bottom - top;
271}
272
273/**
274 * vmw_stdu_update_st - Full update of a Screen Target
275 *
276 * @dev_priv: VMW DRM device
277 * @stdu: display unit affected
278 *
279 * This function needs to be called whenever the content of a screen
280 * target has changed completely. Typically as a result of a backing
281 * surface change.
282 *
283 * RETURNS:
284 * 0 on success, error code on failure
285 */
286static int vmw_stdu_update_st(struct vmw_private *dev_priv,
287 struct vmw_screen_target_display_unit *stdu)
288{
289 struct vmw_stdu_update *cmd;
290
291 if (!stdu->defined) {
292 DRM_ERROR("No screen target defined");
293 return -EINVAL;
294 }
295
296 cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
297 if (unlikely(cmd == NULL))
298 return -ENOMEM;
299
300 vmw_stdu_populate_update(cmd, stdu->base.unit,
301 0, stdu->display_width,
302 0, stdu->display_height);
303
304 vmw_fifo_commit(dev_priv, sizeof(*cmd));
305
306 return 0;
307}
308
309
310
311/**
312 * vmw_stdu_destroy_st - Destroy a Screen Target
313 *
314 * @dev_priv: VMW DRM device
315 * @stdu: display unit to destroy
316 */
317static int vmw_stdu_destroy_st(struct vmw_private *dev_priv,
318 struct vmw_screen_target_display_unit *stdu)
319{
320 int ret;
321
322 struct {
323 SVGA3dCmdHeader header;
324 SVGA3dCmdDestroyGBScreenTarget body;
325 } *cmd;
326
327
328 /* Nothing to do if not successfully defined */
329 if (unlikely(!stdu->defined))
330 return 0;
331
332 cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
333 if (unlikely(cmd == NULL))
334 return -ENOMEM;
335
336 cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SCREENTARGET;
337 cmd->header.size = sizeof(cmd->body);
338
339 cmd->body.stid = stdu->base.unit;
340
341 vmw_fifo_commit(dev_priv, sizeof(*cmd));
342
343 /* Force sync */
344 ret = vmw_fallback_wait(dev_priv, false, true, 0, false, 3*HZ);
345 if (unlikely(ret != 0))
346 DRM_ERROR("Failed to sync with HW");
347
348 stdu->defined = false;
349 stdu->display_width = 0;
350 stdu->display_height = 0;
351
352 return ret;
353}
354
355
356/**
357 * vmw_stdu_crtc_mode_set_nofb - Updates screen target size
358 *
359 * @crtc: CRTC associated with the screen target
360 *
361 * This function defines/destroys a screen target
362 *
363 */
364static void vmw_stdu_crtc_mode_set_nofb(struct drm_crtc *crtc)
365{
366 struct vmw_private *dev_priv;
367 struct vmw_screen_target_display_unit *stdu;
368 struct drm_connector_state *conn_state;
369 struct vmw_connector_state *vmw_conn_state;
370 int x, y, ret;
371
372 stdu = vmw_crtc_to_stdu(crtc);
373 dev_priv = vmw_priv(crtc->dev);
374 conn_state = stdu->base.connector.state;
375 vmw_conn_state = vmw_connector_state_to_vcs(conn_state);
376
377 if (stdu->defined) {
378 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
379 if (ret)
380 DRM_ERROR("Failed to blank CRTC\n");
381
382 (void) vmw_stdu_update_st(dev_priv, stdu);
383
384 ret = vmw_stdu_destroy_st(dev_priv, stdu);
385 if (ret)
386 DRM_ERROR("Failed to destroy Screen Target\n");
387
388 stdu->content_fb_type = SAME_AS_DISPLAY;
389 }
390
391 if (!crtc->state->enable)
392 return;
393
394 x = vmw_conn_state->gui_x;
395 y = vmw_conn_state->gui_y;
396
397 vmw_svga_enable(dev_priv);
398 ret = vmw_stdu_define_st(dev_priv, stdu, &crtc->mode, x, y);
399
400 if (ret)
401 DRM_ERROR("Failed to define Screen Target of size %dx%d\n",
402 crtc->x, crtc->y);
403}
404
405
406static void vmw_stdu_crtc_helper_prepare(struct drm_crtc *crtc)
407{
408}
409
410static void vmw_stdu_crtc_atomic_enable(struct drm_crtc *crtc,
411 struct drm_crtc_state *old_state)
412{
413}
414
415static void vmw_stdu_crtc_atomic_disable(struct drm_crtc *crtc,
416 struct drm_crtc_state *old_state)
417{
418 struct vmw_private *dev_priv;
419 struct vmw_screen_target_display_unit *stdu;
420 int ret;
421
422
423 if (!crtc) {
424 DRM_ERROR("CRTC is NULL\n");
425 return;
426 }
427
428 stdu = vmw_crtc_to_stdu(crtc);
429 dev_priv = vmw_priv(crtc->dev);
430
431 if (stdu->defined) {
432 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
433 if (ret)
434 DRM_ERROR("Failed to blank CRTC\n");
435
436 (void) vmw_stdu_update_st(dev_priv, stdu);
437
438 ret = vmw_stdu_destroy_st(dev_priv, stdu);
439 if (ret)
440 DRM_ERROR("Failed to destroy Screen Target\n");
441
442 stdu->content_fb_type = SAME_AS_DISPLAY;
443 }
444}
445
446/**
447 * vmw_stdu_bo_clip - Callback to encode a suface DMA command cliprect
448 *
449 * @dirty: The closure structure.
450 *
451 * Encodes a surface DMA command cliprect and updates the bounding box
452 * for the DMA.
453 */
454static void vmw_stdu_bo_clip(struct vmw_kms_dirty *dirty)
455{
456 struct vmw_stdu_dirty *ddirty =
457 container_of(dirty, struct vmw_stdu_dirty, base);
458 struct vmw_stdu_dma *cmd = dirty->cmd;
459 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
460
461 blit += dirty->num_hits;
462 blit->srcx = dirty->fb_x;
463 blit->srcy = dirty->fb_y;
464 blit->x = dirty->unit_x1;
465 blit->y = dirty->unit_y1;
466 blit->d = 1;
467 blit->w = dirty->unit_x2 - dirty->unit_x1;
468 blit->h = dirty->unit_y2 - dirty->unit_y1;
469 dirty->num_hits++;
470
471 if (ddirty->transfer != SVGA3D_WRITE_HOST_VRAM)
472 return;
473
474 /* Destination bounding box */
475 ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
476 ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
477 ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
478 ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
479}
480
481/**
482 * vmw_stdu_bo_fifo_commit - Callback to fill in and submit a DMA command.
483 *
484 * @dirty: The closure structure.
485 *
486 * Fills in the missing fields in a DMA command, and optionally encodes
487 * a screen target update command, depending on transfer direction.
488 */
489static void vmw_stdu_bo_fifo_commit(struct vmw_kms_dirty *dirty)
490{
491 struct vmw_stdu_dirty *ddirty =
492 container_of(dirty, struct vmw_stdu_dirty, base);
493 struct vmw_screen_target_display_unit *stdu =
494 container_of(dirty->unit, typeof(*stdu), base);
495 struct vmw_stdu_dma *cmd = dirty->cmd;
496 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
497 SVGA3dCmdSurfaceDMASuffix *suffix =
498 (SVGA3dCmdSurfaceDMASuffix *) &blit[dirty->num_hits];
499 size_t blit_size = sizeof(*blit) * dirty->num_hits + sizeof(*suffix);
500
501 if (!dirty->num_hits) {
502 vmw_fifo_commit(dirty->dev_priv, 0);
503 return;
504 }
505
506 cmd->header.id = SVGA_3D_CMD_SURFACE_DMA;
507 cmd->header.size = sizeof(cmd->body) + blit_size;
508 vmw_bo_get_guest_ptr(&ddirty->buf->base, &cmd->body.guest.ptr);
509 cmd->body.guest.pitch = ddirty->pitch;
510 cmd->body.host.sid = stdu->display_srf->res.id;
511 cmd->body.host.face = 0;
512 cmd->body.host.mipmap = 0;
513 cmd->body.transfer = ddirty->transfer;
514 suffix->suffixSize = sizeof(*suffix);
515 suffix->maximumOffset = ddirty->buf->base.num_pages * PAGE_SIZE;
516
517 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) {
518 blit_size += sizeof(struct vmw_stdu_update);
519
520 vmw_stdu_populate_update(&suffix[1], stdu->base.unit,
521 ddirty->left, ddirty->right,
522 ddirty->top, ddirty->bottom);
523 }
524
525 vmw_fifo_commit(dirty->dev_priv, sizeof(*cmd) + blit_size);
526
527 stdu->display_srf->res.res_dirty = true;
528 ddirty->left = ddirty->top = S32_MAX;
529 ddirty->right = ddirty->bottom = S32_MIN;
530}
531
532
533/**
534 * vmw_stdu_bo_cpu_clip - Callback to encode a CPU blit
535 *
536 * @dirty: The closure structure.
537 *
538 * This function calculates the bounding box for all the incoming clips.
539 */
540static void vmw_stdu_bo_cpu_clip(struct vmw_kms_dirty *dirty)
541{
542 struct vmw_stdu_dirty *ddirty =
543 container_of(dirty, struct vmw_stdu_dirty, base);
544
545 dirty->num_hits = 1;
546
547 /* Calculate destination bounding box */
548 ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
549 ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
550 ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
551 ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
552
553 /*
554 * Calculate content bounding box. We only need the top-left
555 * coordinate because width and height will be the same as the
556 * destination bounding box above
557 */
558 ddirty->fb_left = min_t(s32, ddirty->fb_left, dirty->fb_x);
559 ddirty->fb_top = min_t(s32, ddirty->fb_top, dirty->fb_y);
560}
561
562
563/**
564 * vmw_stdu_bo_cpu_commit - Callback to do a CPU blit from buffer object
565 *
566 * @dirty: The closure structure.
567 *
568 * For the special case when we cannot create a proxy surface in a
569 * 2D VM, we have to do a CPU blit ourselves.
570 */
571static void vmw_stdu_bo_cpu_commit(struct vmw_kms_dirty *dirty)
572{
573 struct vmw_stdu_dirty *ddirty =
574 container_of(dirty, struct vmw_stdu_dirty, base);
575 struct vmw_screen_target_display_unit *stdu =
576 container_of(dirty->unit, typeof(*stdu), base);
577 s32 width, height;
578 s32 src_pitch, dst_pitch;
579 struct ttm_buffer_object *src_bo, *dst_bo;
580 u32 src_offset, dst_offset;
581 struct vmw_diff_cpy diff = VMW_CPU_BLIT_DIFF_INITIALIZER(stdu->cpp);
582
583 if (!dirty->num_hits)
584 return;
585
586 width = ddirty->right - ddirty->left;
587 height = ddirty->bottom - ddirty->top;
588
589 if (width == 0 || height == 0)
590 return;
591
592 /* Assume we are blitting from Guest (bo) to Host (display_srf) */
593 dst_pitch = stdu->display_srf->base_size.width * stdu->cpp;
594 dst_bo = &stdu->display_srf->res.backup->base;
595 dst_offset = ddirty->top * dst_pitch + ddirty->left * stdu->cpp;
596
597 src_pitch = ddirty->pitch;
598 src_bo = &ddirty->buf->base;
599 src_offset = ddirty->fb_top * src_pitch + ddirty->fb_left * stdu->cpp;
600
601 /* Swap src and dst if the assumption was wrong. */
602 if (ddirty->transfer != SVGA3D_WRITE_HOST_VRAM) {
603 swap(dst_pitch, src_pitch);
604 swap(dst_bo, src_bo);
605 swap(src_offset, dst_offset);
606 }
607
608 (void) vmw_bo_cpu_blit(dst_bo, dst_offset, dst_pitch,
609 src_bo, src_offset, src_pitch,
610 width * stdu->cpp, height, &diff);
611
612 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM &&
613 drm_rect_visible(&diff.rect)) {
614 struct vmw_private *dev_priv;
615 struct vmw_stdu_update *cmd;
616 struct drm_clip_rect region;
617 int ret;
618
619 /* We are updating the actual surface, not a proxy */
620 region.x1 = diff.rect.x1;
621 region.x2 = diff.rect.x2;
622 region.y1 = diff.rect.y1;
623 region.y2 = diff.rect.y2;
624 ret = vmw_kms_update_proxy(&stdu->display_srf->res, ®ion,
625 1, 1);
626 if (ret)
627 goto out_cleanup;
628
629
630 dev_priv = vmw_priv(stdu->base.crtc.dev);
631 cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
632 if (!cmd)
633 goto out_cleanup;
634
635 vmw_stdu_populate_update(cmd, stdu->base.unit,
636 region.x1, region.x2,
637 region.y1, region.y2);
638
639 vmw_fifo_commit(dev_priv, sizeof(*cmd));
640 }
641
642out_cleanup:
643 ddirty->left = ddirty->top = ddirty->fb_left = ddirty->fb_top = S32_MAX;
644 ddirty->right = ddirty->bottom = S32_MIN;
645}
646
647/**
648 * vmw_kms_stdu_dma - Perform a DMA transfer between a buffer-object backed
649 * framebuffer and the screen target system.
650 *
651 * @dev_priv: Pointer to the device private structure.
652 * @file_priv: Pointer to a struct drm-file identifying the caller. May be
653 * set to NULL, but then @user_fence_rep must also be set to NULL.
654 * @vfb: Pointer to the buffer-object backed framebuffer.
655 * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
656 * @vclips: Alternate array of clip rects. Either @clips or @vclips must
657 * be NULL.
658 * @num_clips: Number of clip rects in @clips or @vclips.
659 * @increment: Increment to use when looping over @clips or @vclips.
660 * @to_surface: Whether to DMA to the screen target system as opposed to
661 * from the screen target system.
662 * @interruptible: Whether to perform waits interruptible if possible.
663 * @crtc: If crtc is passed, perform stdu dma on that crtc only.
664 *
665 * If DMA-ing till the screen target system, the function will also notify
666 * the screen target system that a bounding box of the cliprects has been
667 * updated.
668 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
669 * interrupted.
670 */
671int vmw_kms_stdu_dma(struct vmw_private *dev_priv,
672 struct drm_file *file_priv,
673 struct vmw_framebuffer *vfb,
674 struct drm_vmw_fence_rep __user *user_fence_rep,
675 struct drm_clip_rect *clips,
676 struct drm_vmw_rect *vclips,
677 uint32_t num_clips,
678 int increment,
679 bool to_surface,
680 bool interruptible,
681 struct drm_crtc *crtc)
682{
683 struct vmw_buffer_object *buf =
684 container_of(vfb, struct vmw_framebuffer_bo, base)->buffer;
685 struct vmw_stdu_dirty ddirty;
686 int ret;
687 bool cpu_blit = !(dev_priv->capabilities & SVGA_CAP_3D);
688 DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
689
690 /*
691 * VMs without 3D support don't have the surface DMA command and
692 * we'll be using a CPU blit, and the framebuffer should be moved out
693 * of VRAM.
694 */
695 ret = vmw_validation_add_bo(&val_ctx, buf, false, cpu_blit);
696 if (ret)
697 return ret;
698
699 ret = vmw_validation_prepare(&val_ctx, NULL, interruptible);
700 if (ret)
701 goto out_unref;
702
703 ddirty.transfer = (to_surface) ? SVGA3D_WRITE_HOST_VRAM :
704 SVGA3D_READ_HOST_VRAM;
705 ddirty.left = ddirty.top = S32_MAX;
706 ddirty.right = ddirty.bottom = S32_MIN;
707 ddirty.fb_left = ddirty.fb_top = S32_MAX;
708 ddirty.pitch = vfb->base.pitches[0];
709 ddirty.buf = buf;
710 ddirty.base.fifo_commit = vmw_stdu_bo_fifo_commit;
711 ddirty.base.clip = vmw_stdu_bo_clip;
712 ddirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_dma) +
713 num_clips * sizeof(SVGA3dCopyBox) +
714 sizeof(SVGA3dCmdSurfaceDMASuffix);
715 if (to_surface)
716 ddirty.base.fifo_reserve_size += sizeof(struct vmw_stdu_update);
717
718
719 if (cpu_blit) {
720 ddirty.base.fifo_commit = vmw_stdu_bo_cpu_commit;
721 ddirty.base.clip = vmw_stdu_bo_cpu_clip;
722 ddirty.base.fifo_reserve_size = 0;
723 }
724
725 ddirty.base.crtc = crtc;
726
727 ret = vmw_kms_helper_dirty(dev_priv, vfb, clips, vclips,
728 0, 0, num_clips, increment, &ddirty.base);
729
730 vmw_kms_helper_validation_finish(dev_priv, file_priv, &val_ctx, NULL,
731 user_fence_rep);
732 return ret;
733
734out_unref:
735 vmw_validation_unref_lists(&val_ctx);
736 return ret;
737}
738
739/**
740 * vmw_stdu_surface_clip - Callback to encode a surface copy command cliprect
741 *
742 * @dirty: The closure structure.
743 *
744 * Encodes a surface copy command cliprect and updates the bounding box
745 * for the copy.
746 */
747static void vmw_kms_stdu_surface_clip(struct vmw_kms_dirty *dirty)
748{
749 struct vmw_stdu_dirty *sdirty =
750 container_of(dirty, struct vmw_stdu_dirty, base);
751 struct vmw_stdu_surface_copy *cmd = dirty->cmd;
752 struct vmw_screen_target_display_unit *stdu =
753 container_of(dirty->unit, typeof(*stdu), base);
754
755 if (sdirty->sid != stdu->display_srf->res.id) {
756 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
757
758 blit += dirty->num_hits;
759 blit->srcx = dirty->fb_x;
760 blit->srcy = dirty->fb_y;
761 blit->x = dirty->unit_x1;
762 blit->y = dirty->unit_y1;
763 blit->d = 1;
764 blit->w = dirty->unit_x2 - dirty->unit_x1;
765 blit->h = dirty->unit_y2 - dirty->unit_y1;
766 }
767
768 dirty->num_hits++;
769
770 /* Destination bounding box */
771 sdirty->left = min_t(s32, sdirty->left, dirty->unit_x1);
772 sdirty->top = min_t(s32, sdirty->top, dirty->unit_y1);
773 sdirty->right = max_t(s32, sdirty->right, dirty->unit_x2);
774 sdirty->bottom = max_t(s32, sdirty->bottom, dirty->unit_y2);
775}
776
777/**
778 * vmw_stdu_surface_fifo_commit - Callback to fill in and submit a surface
779 * copy command.
780 *
781 * @dirty: The closure structure.
782 *
783 * Fills in the missing fields in a surface copy command, and encodes a screen
784 * target update command.
785 */
786static void vmw_kms_stdu_surface_fifo_commit(struct vmw_kms_dirty *dirty)
787{
788 struct vmw_stdu_dirty *sdirty =
789 container_of(dirty, struct vmw_stdu_dirty, base);
790 struct vmw_screen_target_display_unit *stdu =
791 container_of(dirty->unit, typeof(*stdu), base);
792 struct vmw_stdu_surface_copy *cmd = dirty->cmd;
793 struct vmw_stdu_update *update;
794 size_t blit_size = sizeof(SVGA3dCopyBox) * dirty->num_hits;
795 size_t commit_size;
796
797 if (!dirty->num_hits) {
798 vmw_fifo_commit(dirty->dev_priv, 0);
799 return;
800 }
801
802 if (sdirty->sid != stdu->display_srf->res.id) {
803 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
804
805 cmd->header.id = SVGA_3D_CMD_SURFACE_COPY;
806 cmd->header.size = sizeof(cmd->body) + blit_size;
807 cmd->body.src.sid = sdirty->sid;
808 cmd->body.dest.sid = stdu->display_srf->res.id;
809 update = (struct vmw_stdu_update *) &blit[dirty->num_hits];
810 commit_size = sizeof(*cmd) + blit_size + sizeof(*update);
811 stdu->display_srf->res.res_dirty = true;
812 } else {
813 update = dirty->cmd;
814 commit_size = sizeof(*update);
815 }
816
817 vmw_stdu_populate_update(update, stdu->base.unit, sdirty->left,
818 sdirty->right, sdirty->top, sdirty->bottom);
819
820 vmw_fifo_commit(dirty->dev_priv, commit_size);
821
822 sdirty->left = sdirty->top = S32_MAX;
823 sdirty->right = sdirty->bottom = S32_MIN;
824}
825
826/**
827 * vmw_kms_stdu_surface_dirty - Dirty part of a surface backed framebuffer
828 *
829 * @dev_priv: Pointer to the device private structure.
830 * @framebuffer: Pointer to the surface-buffer backed framebuffer.
831 * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
832 * @vclips: Alternate array of clip rects. Either @clips or @vclips must
833 * be NULL.
834 * @srf: Pointer to surface to blit from. If NULL, the surface attached
835 * to @framebuffer will be used.
836 * @dest_x: X coordinate offset to align @srf with framebuffer coordinates.
837 * @dest_y: Y coordinate offset to align @srf with framebuffer coordinates.
838 * @num_clips: Number of clip rects in @clips.
839 * @inc: Increment to use when looping over @clips.
840 * @out_fence: If non-NULL, will return a ref-counted pointer to a
841 * struct vmw_fence_obj. The returned fence pointer may be NULL in which
842 * case the device has already synchronized.
843 * @crtc: If crtc is passed, perform surface dirty on that crtc only.
844 *
845 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
846 * interrupted.
847 */
848int vmw_kms_stdu_surface_dirty(struct vmw_private *dev_priv,
849 struct vmw_framebuffer *framebuffer,
850 struct drm_clip_rect *clips,
851 struct drm_vmw_rect *vclips,
852 struct vmw_resource *srf,
853 s32 dest_x,
854 s32 dest_y,
855 unsigned num_clips, int inc,
856 struct vmw_fence_obj **out_fence,
857 struct drm_crtc *crtc)
858{
859 struct vmw_framebuffer_surface *vfbs =
860 container_of(framebuffer, typeof(*vfbs), base);
861 struct vmw_stdu_dirty sdirty;
862 DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
863 int ret;
864
865 if (!srf)
866 srf = &vfbs->surface->res;
867
868 ret = vmw_validation_add_resource(&val_ctx, srf, 0, VMW_RES_DIRTY_NONE,
869 NULL, NULL);
870 if (ret)
871 return ret;
872
873 ret = vmw_validation_prepare(&val_ctx, &dev_priv->cmdbuf_mutex, true);
874 if (ret)
875 goto out_unref;
876
877 if (vfbs->is_bo_proxy) {
878 ret = vmw_kms_update_proxy(srf, clips, num_clips, inc);
879 if (ret)
880 goto out_finish;
881 }
882
883 sdirty.base.fifo_commit = vmw_kms_stdu_surface_fifo_commit;
884 sdirty.base.clip = vmw_kms_stdu_surface_clip;
885 sdirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_surface_copy) +
886 sizeof(SVGA3dCopyBox) * num_clips +
887 sizeof(struct vmw_stdu_update);
888 sdirty.base.crtc = crtc;
889 sdirty.sid = srf->id;
890 sdirty.left = sdirty.top = S32_MAX;
891 sdirty.right = sdirty.bottom = S32_MIN;
892
893 ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips,
894 dest_x, dest_y, num_clips, inc,
895 &sdirty.base);
896out_finish:
897 vmw_kms_helper_validation_finish(dev_priv, NULL, &val_ctx, out_fence,
898 NULL);
899
900 return ret;
901
902out_unref:
903 vmw_validation_unref_lists(&val_ctx);
904 return ret;
905}
906
907
908/*
909 * Screen Target CRTC dispatch table
910 */
911static const struct drm_crtc_funcs vmw_stdu_crtc_funcs = {
912 .gamma_set = vmw_du_crtc_gamma_set,
913 .destroy = vmw_stdu_crtc_destroy,
914 .reset = vmw_du_crtc_reset,
915 .atomic_duplicate_state = vmw_du_crtc_duplicate_state,
916 .atomic_destroy_state = vmw_du_crtc_destroy_state,
917 .set_config = drm_atomic_helper_set_config,
918 .page_flip = drm_atomic_helper_page_flip,
919};
920
921
922
923/******************************************************************************
924 * Screen Target Display Unit Encoder Functions
925 *****************************************************************************/
926
927/**
928 * vmw_stdu_encoder_destroy - cleans up the STDU
929 *
930 * @encoder: used the get the containing STDU
931 *
932 * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
933 * this can be a no-op. Nevertheless, it doesn't hurt of have this in case
934 * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
935 * get called.
936 */
937static void vmw_stdu_encoder_destroy(struct drm_encoder *encoder)
938{
939 vmw_stdu_destroy(vmw_encoder_to_stdu(encoder));
940}
941
942static const struct drm_encoder_funcs vmw_stdu_encoder_funcs = {
943 .destroy = vmw_stdu_encoder_destroy,
944};
945
946
947
948/******************************************************************************
949 * Screen Target Display Unit Connector Functions
950 *****************************************************************************/
951
952/**
953 * vmw_stdu_connector_destroy - cleans up the STDU
954 *
955 * @connector: used to get the containing STDU
956 *
957 * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
958 * this can be a no-op. Nevertheless, it doesn't hurt of have this in case
959 * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
960 * get called.
961 */
962static void vmw_stdu_connector_destroy(struct drm_connector *connector)
963{
964 vmw_stdu_destroy(vmw_connector_to_stdu(connector));
965}
966
967
968
969static const struct drm_connector_funcs vmw_stdu_connector_funcs = {
970 .dpms = vmw_du_connector_dpms,
971 .detect = vmw_du_connector_detect,
972 .fill_modes = vmw_du_connector_fill_modes,
973 .destroy = vmw_stdu_connector_destroy,
974 .reset = vmw_du_connector_reset,
975 .atomic_duplicate_state = vmw_du_connector_duplicate_state,
976 .atomic_destroy_state = vmw_du_connector_destroy_state,
977};
978
979
980static const struct
981drm_connector_helper_funcs vmw_stdu_connector_helper_funcs = {
982};
983
984
985
986/******************************************************************************
987 * Screen Target Display Plane Functions
988 *****************************************************************************/
989
990
991
992/**
993 * vmw_stdu_primary_plane_cleanup_fb - Unpins the display surface
994 *
995 * @plane: display plane
996 * @old_state: Contains the FB to clean up
997 *
998 * Unpins the display surface
999 *
1000 * Returns 0 on success
1001 */
1002static void
1003vmw_stdu_primary_plane_cleanup_fb(struct drm_plane *plane,
1004 struct drm_plane_state *old_state)
1005{
1006 struct vmw_plane_state *vps = vmw_plane_state_to_vps(old_state);
1007
1008 if (vps->surf)
1009 WARN_ON(!vps->pinned);
1010
1011 vmw_du_plane_cleanup_fb(plane, old_state);
1012
1013 vps->content_fb_type = SAME_AS_DISPLAY;
1014 vps->cpp = 0;
1015}
1016
1017
1018
1019/**
1020 * vmw_stdu_primary_plane_prepare_fb - Readies the display surface
1021 *
1022 * @plane: display plane
1023 * @new_state: info on the new plane state, including the FB
1024 *
1025 * This function allocates a new display surface if the content is
1026 * backed by a buffer object. The display surface is pinned here, and it'll
1027 * be unpinned in .cleanup_fb()
1028 *
1029 * Returns 0 on success
1030 */
1031static int
1032vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane,
1033 struct drm_plane_state *new_state)
1034{
1035 struct vmw_private *dev_priv = vmw_priv(plane->dev);
1036 struct drm_framebuffer *new_fb = new_state->fb;
1037 struct vmw_framebuffer *vfb;
1038 struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state);
1039 enum stdu_content_type new_content_type;
1040 struct vmw_framebuffer_surface *new_vfbs;
1041 struct drm_crtc *crtc = new_state->crtc;
1042 uint32_t hdisplay = new_state->crtc_w, vdisplay = new_state->crtc_h;
1043 int ret;
1044
1045 /* No FB to prepare */
1046 if (!new_fb) {
1047 if (vps->surf) {
1048 WARN_ON(vps->pinned != 0);
1049 vmw_surface_unreference(&vps->surf);
1050 }
1051
1052 return 0;
1053 }
1054
1055 vfb = vmw_framebuffer_to_vfb(new_fb);
1056 new_vfbs = (vfb->bo) ? NULL : vmw_framebuffer_to_vfbs(new_fb);
1057
1058 if (new_vfbs && new_vfbs->surface->base_size.width == hdisplay &&
1059 new_vfbs->surface->base_size.height == vdisplay)
1060 new_content_type = SAME_AS_DISPLAY;
1061 else if (vfb->bo)
1062 new_content_type = SEPARATE_BO;
1063 else
1064 new_content_type = SEPARATE_SURFACE;
1065
1066 if (new_content_type != SAME_AS_DISPLAY) {
1067 struct vmw_surface content_srf;
1068 struct drm_vmw_size display_base_size = {0};
1069
1070 display_base_size.width = hdisplay;
1071 display_base_size.height = vdisplay;
1072 display_base_size.depth = 1;
1073
1074 /*
1075 * If content buffer is a buffer object, then we have to
1076 * construct surface info
1077 */
1078 if (new_content_type == SEPARATE_BO) {
1079
1080 switch (new_fb->format->cpp[0]*8) {
1081 case 32:
1082 content_srf.format = SVGA3D_X8R8G8B8;
1083 break;
1084
1085 case 16:
1086 content_srf.format = SVGA3D_R5G6B5;
1087 break;
1088
1089 case 8:
1090 content_srf.format = SVGA3D_P8;
1091 break;
1092
1093 default:
1094 DRM_ERROR("Invalid format\n");
1095 return -EINVAL;
1096 }
1097
1098 content_srf.flags = 0;
1099 content_srf.mip_levels[0] = 1;
1100 content_srf.multisample_count = 0;
1101 content_srf.multisample_pattern =
1102 SVGA3D_MS_PATTERN_NONE;
1103 content_srf.quality_level = SVGA3D_MS_QUALITY_NONE;
1104 } else {
1105 content_srf = *new_vfbs->surface;
1106 }
1107
1108 if (vps->surf) {
1109 struct drm_vmw_size cur_base_size = vps->surf->base_size;
1110
1111 if (cur_base_size.width != display_base_size.width ||
1112 cur_base_size.height != display_base_size.height ||
1113 vps->surf->format != content_srf.format) {
1114 WARN_ON(vps->pinned != 0);
1115 vmw_surface_unreference(&vps->surf);
1116 }
1117
1118 }
1119
1120 if (!vps->surf) {
1121 ret = vmw_surface_gb_priv_define
1122 (crtc->dev,
1123 /* Kernel visible only */
1124 0,
1125 content_srf.flags,
1126 content_srf.format,
1127 true, /* a scanout buffer */
1128 content_srf.mip_levels[0],
1129 content_srf.multisample_count,
1130 0,
1131 display_base_size,
1132 content_srf.multisample_pattern,
1133 content_srf.quality_level,
1134 &vps->surf);
1135 if (ret != 0) {
1136 DRM_ERROR("Couldn't allocate STDU surface.\n");
1137 return ret;
1138 }
1139 }
1140 } else {
1141 /*
1142 * prepare_fb and clean_fb should only take care of pinning
1143 * and unpinning. References are tracked by state objects.
1144 * The only time we add a reference in prepare_fb is if the
1145 * state object doesn't have a reference to begin with
1146 */
1147 if (vps->surf) {
1148 WARN_ON(vps->pinned != 0);
1149 vmw_surface_unreference(&vps->surf);
1150 }
1151
1152 vps->surf = vmw_surface_reference(new_vfbs->surface);
1153 }
1154
1155 if (vps->surf) {
1156
1157 /* Pin new surface before flipping */
1158 ret = vmw_resource_pin(&vps->surf->res, false);
1159 if (ret)
1160 goto out_srf_unref;
1161
1162 vps->pinned++;
1163 }
1164
1165 vps->content_fb_type = new_content_type;
1166
1167 /*
1168 * This should only happen if the buffer object is too large to create a
1169 * proxy surface for.
1170 * If we are a 2D VM with a buffer object then we have to use CPU blit
1171 * so cache these mappings
1172 */
1173 if (vps->content_fb_type == SEPARATE_BO &&
1174 !(dev_priv->capabilities & SVGA_CAP_3D))
1175 vps->cpp = new_fb->pitches[0] / new_fb->width;
1176
1177 return 0;
1178
1179out_srf_unref:
1180 vmw_surface_unreference(&vps->surf);
1181 return ret;
1182}
1183
1184static uint32_t vmw_stdu_bo_fifo_size(struct vmw_du_update_plane *update,
1185 uint32_t num_hits)
1186{
1187 return sizeof(struct vmw_stdu_dma) + sizeof(SVGA3dCopyBox) * num_hits +
1188 sizeof(SVGA3dCmdSurfaceDMASuffix) +
1189 sizeof(struct vmw_stdu_update);
1190}
1191
1192static uint32_t vmw_stdu_bo_fifo_size_cpu(struct vmw_du_update_plane *update,
1193 uint32_t num_hits)
1194{
1195 return sizeof(struct vmw_stdu_update_gb_image) +
1196 sizeof(struct vmw_stdu_update);
1197}
1198
1199static uint32_t vmw_stdu_bo_populate_dma(struct vmw_du_update_plane *update,
1200 void *cmd, uint32_t num_hits)
1201{
1202 struct vmw_screen_target_display_unit *stdu;
1203 struct vmw_framebuffer_bo *vfbbo;
1204 struct vmw_stdu_dma *cmd_dma = cmd;
1205
1206 stdu = container_of(update->du, typeof(*stdu), base);
1207 vfbbo = container_of(update->vfb, typeof(*vfbbo), base);
1208
1209 cmd_dma->header.id = SVGA_3D_CMD_SURFACE_DMA;
1210 cmd_dma->header.size = sizeof(cmd_dma->body) +
1211 sizeof(struct SVGA3dCopyBox) * num_hits +
1212 sizeof(SVGA3dCmdSurfaceDMASuffix);
1213 vmw_bo_get_guest_ptr(&vfbbo->buffer->base, &cmd_dma->body.guest.ptr);
1214 cmd_dma->body.guest.pitch = update->vfb->base.pitches[0];
1215 cmd_dma->body.host.sid = stdu->display_srf->res.id;
1216 cmd_dma->body.host.face = 0;
1217 cmd_dma->body.host.mipmap = 0;
1218 cmd_dma->body.transfer = SVGA3D_WRITE_HOST_VRAM;
1219
1220 return sizeof(*cmd_dma);
1221}
1222
1223static uint32_t vmw_stdu_bo_populate_clip(struct vmw_du_update_plane *update,
1224 void *cmd, struct drm_rect *clip,
1225 uint32_t fb_x, uint32_t fb_y)
1226{
1227 struct SVGA3dCopyBox *box = cmd;
1228
1229 box->srcx = fb_x;
1230 box->srcy = fb_y;
1231 box->srcz = 0;
1232 box->x = clip->x1;
1233 box->y = clip->y1;
1234 box->z = 0;
1235 box->w = drm_rect_width(clip);
1236 box->h = drm_rect_height(clip);
1237 box->d = 1;
1238
1239 return sizeof(*box);
1240}
1241
1242static uint32_t vmw_stdu_bo_populate_update(struct vmw_du_update_plane *update,
1243 void *cmd, struct drm_rect *bb)
1244{
1245 struct vmw_screen_target_display_unit *stdu;
1246 struct vmw_framebuffer_bo *vfbbo;
1247 SVGA3dCmdSurfaceDMASuffix *suffix = cmd;
1248
1249 stdu = container_of(update->du, typeof(*stdu), base);
1250 vfbbo = container_of(update->vfb, typeof(*vfbbo), base);
1251
1252 suffix->suffixSize = sizeof(*suffix);
1253 suffix->maximumOffset = vfbbo->buffer->base.num_pages * PAGE_SIZE;
1254
1255 vmw_stdu_populate_update(&suffix[1], stdu->base.unit, bb->x1, bb->x2,
1256 bb->y1, bb->y2);
1257
1258 return sizeof(*suffix) + sizeof(struct vmw_stdu_update);
1259}
1260
1261static uint32_t vmw_stdu_bo_pre_clip_cpu(struct vmw_du_update_plane *update,
1262 void *cmd, uint32_t num_hits)
1263{
1264 struct vmw_du_update_plane_buffer *bo_update =
1265 container_of(update, typeof(*bo_update), base);
1266
1267 bo_update->fb_left = INT_MAX;
1268 bo_update->fb_top = INT_MAX;
1269
1270 return 0;
1271}
1272
1273static uint32_t vmw_stdu_bo_clip_cpu(struct vmw_du_update_plane *update,
1274 void *cmd, struct drm_rect *clip,
1275 uint32_t fb_x, uint32_t fb_y)
1276{
1277 struct vmw_du_update_plane_buffer *bo_update =
1278 container_of(update, typeof(*bo_update), base);
1279
1280 bo_update->fb_left = min_t(int, bo_update->fb_left, fb_x);
1281 bo_update->fb_top = min_t(int, bo_update->fb_top, fb_y);
1282
1283 return 0;
1284}
1285
1286static uint32_t
1287vmw_stdu_bo_populate_update_cpu(struct vmw_du_update_plane *update, void *cmd,
1288 struct drm_rect *bb)
1289{
1290 struct vmw_du_update_plane_buffer *bo_update;
1291 struct vmw_screen_target_display_unit *stdu;
1292 struct vmw_framebuffer_bo *vfbbo;
1293 struct vmw_diff_cpy diff = VMW_CPU_BLIT_DIFF_INITIALIZER(0);
1294 struct vmw_stdu_update_gb_image *cmd_img = cmd;
1295 struct vmw_stdu_update *cmd_update;
1296 struct ttm_buffer_object *src_bo, *dst_bo;
1297 u32 src_offset, dst_offset;
1298 s32 src_pitch, dst_pitch;
1299 s32 width, height;
1300
1301 bo_update = container_of(update, typeof(*bo_update), base);
1302 stdu = container_of(update->du, typeof(*stdu), base);
1303 vfbbo = container_of(update->vfb, typeof(*vfbbo), base);
1304
1305 width = bb->x2 - bb->x1;
1306 height = bb->y2 - bb->y1;
1307
1308 diff.cpp = stdu->cpp;
1309
1310 dst_bo = &stdu->display_srf->res.backup->base;
1311 dst_pitch = stdu->display_srf->base_size.width * stdu->cpp;
1312 dst_offset = bb->y1 * dst_pitch + bb->x1 * stdu->cpp;
1313
1314 src_bo = &vfbbo->buffer->base;
1315 src_pitch = update->vfb->base.pitches[0];
1316 src_offset = bo_update->fb_top * src_pitch + bo_update->fb_left *
1317 stdu->cpp;
1318
1319 (void) vmw_bo_cpu_blit(dst_bo, dst_offset, dst_pitch, src_bo,
1320 src_offset, src_pitch, width * stdu->cpp, height,
1321 &diff);
1322
1323 if (drm_rect_visible(&diff.rect)) {
1324 SVGA3dBox *box = &cmd_img->body.box;
1325
1326 cmd_img->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
1327 cmd_img->header.size = sizeof(cmd_img->body);
1328 cmd_img->body.image.sid = stdu->display_srf->res.id;
1329 cmd_img->body.image.face = 0;
1330 cmd_img->body.image.mipmap = 0;
1331
1332 box->x = diff.rect.x1;
1333 box->y = diff.rect.y1;
1334 box->z = 0;
1335 box->w = drm_rect_width(&diff.rect);
1336 box->h = drm_rect_height(&diff.rect);
1337 box->d = 1;
1338
1339 cmd_update = (struct vmw_stdu_update *)&cmd_img[1];
1340 vmw_stdu_populate_update(cmd_update, stdu->base.unit,
1341 diff.rect.x1, diff.rect.x2,
1342 diff.rect.y1, diff.rect.y2);
1343
1344 return sizeof(*cmd_img) + sizeof(*cmd_update);
1345 }
1346
1347 return 0;
1348}
1349
1350/**
1351 * vmw_stdu_plane_update_bo - Update display unit for bo backed fb.
1352 * @dev_priv: device private.
1353 * @plane: plane state.
1354 * @old_state: old plane state.
1355 * @vfb: framebuffer which is blitted to display unit.
1356 * @out_fence: If non-NULL, will return a ref-counted pointer to vmw_fence_obj.
1357 * The returned fence pointer may be NULL in which case the device
1358 * has already synchronized.
1359 *
1360 * Return: 0 on success or a negative error code on failure.
1361 */
1362static int vmw_stdu_plane_update_bo(struct vmw_private *dev_priv,
1363 struct drm_plane *plane,
1364 struct drm_plane_state *old_state,
1365 struct vmw_framebuffer *vfb,
1366 struct vmw_fence_obj **out_fence)
1367{
1368 struct vmw_du_update_plane_buffer bo_update;
1369
1370 memset(&bo_update, 0, sizeof(struct vmw_du_update_plane_buffer));
1371 bo_update.base.plane = plane;
1372 bo_update.base.old_state = old_state;
1373 bo_update.base.dev_priv = dev_priv;
1374 bo_update.base.du = vmw_crtc_to_du(plane->state->crtc);
1375 bo_update.base.vfb = vfb;
1376 bo_update.base.out_fence = out_fence;
1377 bo_update.base.mutex = NULL;
1378 bo_update.base.cpu_blit = !(dev_priv->capabilities & SVGA_CAP_3D);
1379 bo_update.base.intr = false;
1380
1381 /*
1382 * VM without 3D support don't have surface DMA command and framebuffer
1383 * should be moved out of VRAM.
1384 */
1385 if (bo_update.base.cpu_blit) {
1386 bo_update.base.calc_fifo_size = vmw_stdu_bo_fifo_size_cpu;
1387 bo_update.base.pre_clip = vmw_stdu_bo_pre_clip_cpu;
1388 bo_update.base.clip = vmw_stdu_bo_clip_cpu;
1389 bo_update.base.post_clip = vmw_stdu_bo_populate_update_cpu;
1390 } else {
1391 bo_update.base.calc_fifo_size = vmw_stdu_bo_fifo_size;
1392 bo_update.base.pre_clip = vmw_stdu_bo_populate_dma;
1393 bo_update.base.clip = vmw_stdu_bo_populate_clip;
1394 bo_update.base.post_clip = vmw_stdu_bo_populate_update;
1395 }
1396
1397 return vmw_du_helper_plane_update(&bo_update.base);
1398}
1399
1400static uint32_t
1401vmw_stdu_surface_fifo_size_same_display(struct vmw_du_update_plane *update,
1402 uint32_t num_hits)
1403{
1404 struct vmw_framebuffer_surface *vfbs;
1405 uint32_t size = 0;
1406
1407 vfbs = container_of(update->vfb, typeof(*vfbs), base);
1408
1409 if (vfbs->is_bo_proxy)
1410 size += sizeof(struct vmw_stdu_update_gb_image) * num_hits;
1411
1412 size += sizeof(struct vmw_stdu_update);
1413
1414 return size;
1415}
1416
1417static uint32_t vmw_stdu_surface_fifo_size(struct vmw_du_update_plane *update,
1418 uint32_t num_hits)
1419{
1420 struct vmw_framebuffer_surface *vfbs;
1421 uint32_t size = 0;
1422
1423 vfbs = container_of(update->vfb, typeof(*vfbs), base);
1424
1425 if (vfbs->is_bo_proxy)
1426 size += sizeof(struct vmw_stdu_update_gb_image) * num_hits;
1427
1428 size += sizeof(struct vmw_stdu_surface_copy) + sizeof(SVGA3dCopyBox) *
1429 num_hits + sizeof(struct vmw_stdu_update);
1430
1431 return size;
1432}
1433
1434static uint32_t
1435vmw_stdu_surface_update_proxy(struct vmw_du_update_plane *update, void *cmd)
1436{
1437 struct vmw_framebuffer_surface *vfbs;
1438 struct drm_plane_state *state = update->plane->state;
1439 struct drm_plane_state *old_state = update->old_state;
1440 struct vmw_stdu_update_gb_image *cmd_update = cmd;
1441 struct drm_atomic_helper_damage_iter iter;
1442 struct drm_rect clip;
1443 uint32_t copy_size = 0;
1444
1445 vfbs = container_of(update->vfb, typeof(*vfbs), base);
1446
1447 /*
1448 * proxy surface is special where a buffer object type fb is wrapped
1449 * in a surface and need an update gb image command to sync with device.
1450 */
1451 drm_atomic_helper_damage_iter_init(&iter, old_state, state);
1452 drm_atomic_for_each_plane_damage(&iter, &clip) {
1453 SVGA3dBox *box = &cmd_update->body.box;
1454
1455 cmd_update->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
1456 cmd_update->header.size = sizeof(cmd_update->body);
1457 cmd_update->body.image.sid = vfbs->surface->res.id;
1458 cmd_update->body.image.face = 0;
1459 cmd_update->body.image.mipmap = 0;
1460
1461 box->x = clip.x1;
1462 box->y = clip.y1;
1463 box->z = 0;
1464 box->w = drm_rect_width(&clip);
1465 box->h = drm_rect_height(&clip);
1466 box->d = 1;
1467
1468 copy_size += sizeof(*cmd_update);
1469 cmd_update++;
1470 }
1471
1472 return copy_size;
1473}
1474
1475static uint32_t
1476vmw_stdu_surface_populate_copy(struct vmw_du_update_plane *update, void *cmd,
1477 uint32_t num_hits)
1478{
1479 struct vmw_screen_target_display_unit *stdu;
1480 struct vmw_framebuffer_surface *vfbs;
1481 struct vmw_stdu_surface_copy *cmd_copy = cmd;
1482
1483 stdu = container_of(update->du, typeof(*stdu), base);
1484 vfbs = container_of(update->vfb, typeof(*vfbs), base);
1485
1486 cmd_copy->header.id = SVGA_3D_CMD_SURFACE_COPY;
1487 cmd_copy->header.size = sizeof(cmd_copy->body) + sizeof(SVGA3dCopyBox) *
1488 num_hits;
1489 cmd_copy->body.src.sid = vfbs->surface->res.id;
1490 cmd_copy->body.dest.sid = stdu->display_srf->res.id;
1491
1492 return sizeof(*cmd_copy);
1493}
1494
1495static uint32_t
1496vmw_stdu_surface_populate_clip(struct vmw_du_update_plane *update, void *cmd,
1497 struct drm_rect *clip, uint32_t fb_x,
1498 uint32_t fb_y)
1499{
1500 struct SVGA3dCopyBox *box = cmd;
1501
1502 box->srcx = fb_x;
1503 box->srcy = fb_y;
1504 box->srcz = 0;
1505 box->x = clip->x1;
1506 box->y = clip->y1;
1507 box->z = 0;
1508 box->w = drm_rect_width(clip);
1509 box->h = drm_rect_height(clip);
1510 box->d = 1;
1511
1512 return sizeof(*box);
1513}
1514
1515static uint32_t
1516vmw_stdu_surface_populate_update(struct vmw_du_update_plane *update, void *cmd,
1517 struct drm_rect *bb)
1518{
1519 vmw_stdu_populate_update(cmd, update->du->unit, bb->x1, bb->x2, bb->y1,
1520 bb->y2);
1521
1522 return sizeof(struct vmw_stdu_update);
1523}
1524
1525/**
1526 * vmw_stdu_plane_update_surface - Update display unit for surface backed fb
1527 * @dev_priv: Device private
1528 * @plane: Plane state
1529 * @old_state: Old plane state
1530 * @vfb: Framebuffer which is blitted to display unit
1531 * @out_fence: If non-NULL, will return a ref-counted pointer to vmw_fence_obj.
1532 * The returned fence pointer may be NULL in which case the device
1533 * has already synchronized.
1534 *
1535 * Return: 0 on success or a negative error code on failure.
1536 */
1537static int vmw_stdu_plane_update_surface(struct vmw_private *dev_priv,
1538 struct drm_plane *plane,
1539 struct drm_plane_state *old_state,
1540 struct vmw_framebuffer *vfb,
1541 struct vmw_fence_obj **out_fence)
1542{
1543 struct vmw_du_update_plane srf_update;
1544 struct vmw_screen_target_display_unit *stdu;
1545 struct vmw_framebuffer_surface *vfbs;
1546
1547 stdu = vmw_crtc_to_stdu(plane->state->crtc);
1548 vfbs = container_of(vfb, typeof(*vfbs), base);
1549
1550 memset(&srf_update, 0, sizeof(struct vmw_du_update_plane));
1551 srf_update.plane = plane;
1552 srf_update.old_state = old_state;
1553 srf_update.dev_priv = dev_priv;
1554 srf_update.du = vmw_crtc_to_du(plane->state->crtc);
1555 srf_update.vfb = vfb;
1556 srf_update.out_fence = out_fence;
1557 srf_update.mutex = &dev_priv->cmdbuf_mutex;
1558 srf_update.cpu_blit = false;
1559 srf_update.intr = true;
1560
1561 if (vfbs->is_bo_proxy)
1562 srf_update.post_prepare = vmw_stdu_surface_update_proxy;
1563
1564 if (vfbs->surface->res.id != stdu->display_srf->res.id) {
1565 srf_update.calc_fifo_size = vmw_stdu_surface_fifo_size;
1566 srf_update.pre_clip = vmw_stdu_surface_populate_copy;
1567 srf_update.clip = vmw_stdu_surface_populate_clip;
1568 } else {
1569 srf_update.calc_fifo_size =
1570 vmw_stdu_surface_fifo_size_same_display;
1571 }
1572
1573 srf_update.post_clip = vmw_stdu_surface_populate_update;
1574
1575 return vmw_du_helper_plane_update(&srf_update);
1576}
1577
1578/**
1579 * vmw_stdu_primary_plane_atomic_update - formally switches STDU to new plane
1580 * @plane: display plane
1581 * @old_state: Only used to get crtc info
1582 *
1583 * Formally update stdu->display_srf to the new plane, and bind the new
1584 * plane STDU. This function is called during the commit phase when
1585 * all the preparation have been done and all the configurations have
1586 * been checked.
1587 */
1588static void
1589vmw_stdu_primary_plane_atomic_update(struct drm_plane *plane,
1590 struct drm_plane_state *old_state)
1591{
1592 struct vmw_plane_state *vps = vmw_plane_state_to_vps(plane->state);
1593 struct drm_crtc *crtc = plane->state->crtc;
1594 struct vmw_screen_target_display_unit *stdu;
1595 struct drm_pending_vblank_event *event;
1596 struct vmw_fence_obj *fence = NULL;
1597 struct vmw_private *dev_priv;
1598 int ret;
1599
1600 /* If case of device error, maintain consistent atomic state */
1601 if (crtc && plane->state->fb) {
1602 struct vmw_framebuffer *vfb =
1603 vmw_framebuffer_to_vfb(plane->state->fb);
1604 stdu = vmw_crtc_to_stdu(crtc);
1605 dev_priv = vmw_priv(crtc->dev);
1606
1607 stdu->display_srf = vps->surf;
1608 stdu->content_fb_type = vps->content_fb_type;
1609 stdu->cpp = vps->cpp;
1610
1611 ret = vmw_stdu_bind_st(dev_priv, stdu, &stdu->display_srf->res);
1612 if (ret)
1613 DRM_ERROR("Failed to bind surface to STDU.\n");
1614
1615 if (vfb->bo)
1616 ret = vmw_stdu_plane_update_bo(dev_priv, plane,
1617 old_state, vfb, &fence);
1618 else
1619 ret = vmw_stdu_plane_update_surface(dev_priv, plane,
1620 old_state, vfb,
1621 &fence);
1622 if (ret)
1623 DRM_ERROR("Failed to update STDU.\n");
1624 } else {
1625 crtc = old_state->crtc;
1626 stdu = vmw_crtc_to_stdu(crtc);
1627 dev_priv = vmw_priv(crtc->dev);
1628
1629 /* Blank STDU when fb and crtc are NULL */
1630 if (!stdu->defined)
1631 return;
1632
1633 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
1634 if (ret)
1635 DRM_ERROR("Failed to blank STDU\n");
1636
1637 ret = vmw_stdu_update_st(dev_priv, stdu);
1638 if (ret)
1639 DRM_ERROR("Failed to update STDU.\n");
1640
1641 return;
1642 }
1643
1644 /* In case of error, vblank event is send in vmw_du_crtc_atomic_flush */
1645 event = crtc->state->event;
1646 if (event && fence) {
1647 struct drm_file *file_priv = event->base.file_priv;
1648
1649 ret = vmw_event_fence_action_queue(file_priv,
1650 fence,
1651 &event->base,
1652 &event->event.vbl.tv_sec,
1653 &event->event.vbl.tv_usec,
1654 true);
1655 if (ret)
1656 DRM_ERROR("Failed to queue event on fence.\n");
1657 else
1658 crtc->state->event = NULL;
1659 }
1660
1661 if (fence)
1662 vmw_fence_obj_unreference(&fence);
1663}
1664
1665
1666static const struct drm_plane_funcs vmw_stdu_plane_funcs = {
1667 .update_plane = drm_atomic_helper_update_plane,
1668 .disable_plane = drm_atomic_helper_disable_plane,
1669 .destroy = vmw_du_primary_plane_destroy,
1670 .reset = vmw_du_plane_reset,
1671 .atomic_duplicate_state = vmw_du_plane_duplicate_state,
1672 .atomic_destroy_state = vmw_du_plane_destroy_state,
1673};
1674
1675static const struct drm_plane_funcs vmw_stdu_cursor_funcs = {
1676 .update_plane = drm_atomic_helper_update_plane,
1677 .disable_plane = drm_atomic_helper_disable_plane,
1678 .destroy = vmw_du_cursor_plane_destroy,
1679 .reset = vmw_du_plane_reset,
1680 .atomic_duplicate_state = vmw_du_plane_duplicate_state,
1681 .atomic_destroy_state = vmw_du_plane_destroy_state,
1682};
1683
1684
1685/*
1686 * Atomic Helpers
1687 */
1688static const struct
1689drm_plane_helper_funcs vmw_stdu_cursor_plane_helper_funcs = {
1690 .atomic_check = vmw_du_cursor_plane_atomic_check,
1691 .atomic_update = vmw_du_cursor_plane_atomic_update,
1692 .prepare_fb = vmw_du_cursor_plane_prepare_fb,
1693 .cleanup_fb = vmw_du_plane_cleanup_fb,
1694};
1695
1696static const struct
1697drm_plane_helper_funcs vmw_stdu_primary_plane_helper_funcs = {
1698 .atomic_check = vmw_du_primary_plane_atomic_check,
1699 .atomic_update = vmw_stdu_primary_plane_atomic_update,
1700 .prepare_fb = vmw_stdu_primary_plane_prepare_fb,
1701 .cleanup_fb = vmw_stdu_primary_plane_cleanup_fb,
1702};
1703
1704static const struct drm_crtc_helper_funcs vmw_stdu_crtc_helper_funcs = {
1705 .prepare = vmw_stdu_crtc_helper_prepare,
1706 .mode_set_nofb = vmw_stdu_crtc_mode_set_nofb,
1707 .atomic_check = vmw_du_crtc_atomic_check,
1708 .atomic_begin = vmw_du_crtc_atomic_begin,
1709 .atomic_flush = vmw_du_crtc_atomic_flush,
1710 .atomic_enable = vmw_stdu_crtc_atomic_enable,
1711 .atomic_disable = vmw_stdu_crtc_atomic_disable,
1712};
1713
1714
1715/**
1716 * vmw_stdu_init - Sets up a Screen Target Display Unit
1717 *
1718 * @dev_priv: VMW DRM device
1719 * @unit: unit number range from 0 to VMWGFX_NUM_DISPLAY_UNITS
1720 *
1721 * This function is called once per CRTC, and allocates one Screen Target
1722 * display unit to represent that CRTC. Since the SVGA device does not separate
1723 * out encoder and connector, they are represented as part of the STDU as well.
1724 */
1725static int vmw_stdu_init(struct vmw_private *dev_priv, unsigned unit)
1726{
1727 struct vmw_screen_target_display_unit *stdu;
1728 struct drm_device *dev = dev_priv->dev;
1729 struct drm_connector *connector;
1730 struct drm_encoder *encoder;
1731 struct drm_plane *primary, *cursor;
1732 struct drm_crtc *crtc;
1733 int ret;
1734
1735
1736 stdu = kzalloc(sizeof(*stdu), GFP_KERNEL);
1737 if (!stdu)
1738 return -ENOMEM;
1739
1740 stdu->base.unit = unit;
1741 crtc = &stdu->base.crtc;
1742 encoder = &stdu->base.encoder;
1743 connector = &stdu->base.connector;
1744 primary = &stdu->base.primary;
1745 cursor = &stdu->base.cursor;
1746
1747 stdu->base.pref_active = (unit == 0);
1748 stdu->base.pref_width = dev_priv->initial_width;
1749 stdu->base.pref_height = dev_priv->initial_height;
1750 stdu->base.is_implicit = false;
1751
1752 /* Initialize primary plane */
1753 vmw_du_plane_reset(primary);
1754
1755 ret = drm_universal_plane_init(dev, primary,
1756 0, &vmw_stdu_plane_funcs,
1757 vmw_primary_plane_formats,
1758 ARRAY_SIZE(vmw_primary_plane_formats),
1759 NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
1760 if (ret) {
1761 DRM_ERROR("Failed to initialize primary plane");
1762 goto err_free;
1763 }
1764
1765 drm_plane_helper_add(primary, &vmw_stdu_primary_plane_helper_funcs);
1766 drm_plane_enable_fb_damage_clips(primary);
1767
1768 /* Initialize cursor plane */
1769 vmw_du_plane_reset(cursor);
1770
1771 ret = drm_universal_plane_init(dev, cursor,
1772 0, &vmw_stdu_cursor_funcs,
1773 vmw_cursor_plane_formats,
1774 ARRAY_SIZE(vmw_cursor_plane_formats),
1775 NULL, DRM_PLANE_TYPE_CURSOR, NULL);
1776 if (ret) {
1777 DRM_ERROR("Failed to initialize cursor plane");
1778 drm_plane_cleanup(&stdu->base.primary);
1779 goto err_free;
1780 }
1781
1782 drm_plane_helper_add(cursor, &vmw_stdu_cursor_plane_helper_funcs);
1783
1784 vmw_du_connector_reset(connector);
1785
1786 ret = drm_connector_init(dev, connector, &vmw_stdu_connector_funcs,
1787 DRM_MODE_CONNECTOR_VIRTUAL);
1788 if (ret) {
1789 DRM_ERROR("Failed to initialize connector\n");
1790 goto err_free;
1791 }
1792
1793 drm_connector_helper_add(connector, &vmw_stdu_connector_helper_funcs);
1794 connector->status = vmw_du_connector_detect(connector, false);
1795
1796 ret = drm_encoder_init(dev, encoder, &vmw_stdu_encoder_funcs,
1797 DRM_MODE_ENCODER_VIRTUAL, NULL);
1798 if (ret) {
1799 DRM_ERROR("Failed to initialize encoder\n");
1800 goto err_free_connector;
1801 }
1802
1803 (void) drm_connector_attach_encoder(connector, encoder);
1804 encoder->possible_crtcs = (1 << unit);
1805 encoder->possible_clones = 0;
1806
1807 ret = drm_connector_register(connector);
1808 if (ret) {
1809 DRM_ERROR("Failed to register connector\n");
1810 goto err_free_encoder;
1811 }
1812
1813 vmw_du_crtc_reset(crtc);
1814 ret = drm_crtc_init_with_planes(dev, crtc, &stdu->base.primary,
1815 &stdu->base.cursor,
1816 &vmw_stdu_crtc_funcs, NULL);
1817 if (ret) {
1818 DRM_ERROR("Failed to initialize CRTC\n");
1819 goto err_free_unregister;
1820 }
1821
1822 drm_crtc_helper_add(crtc, &vmw_stdu_crtc_helper_funcs);
1823
1824 drm_mode_crtc_set_gamma_size(crtc, 256);
1825
1826 drm_object_attach_property(&connector->base,
1827 dev_priv->hotplug_mode_update_property, 1);
1828 drm_object_attach_property(&connector->base,
1829 dev->mode_config.suggested_x_property, 0);
1830 drm_object_attach_property(&connector->base,
1831 dev->mode_config.suggested_y_property, 0);
1832 return 0;
1833
1834err_free_unregister:
1835 drm_connector_unregister(connector);
1836err_free_encoder:
1837 drm_encoder_cleanup(encoder);
1838err_free_connector:
1839 drm_connector_cleanup(connector);
1840err_free:
1841 kfree(stdu);
1842 return ret;
1843}
1844
1845
1846
1847/**
1848 * vmw_stdu_destroy - Cleans up a vmw_screen_target_display_unit
1849 *
1850 * @stdu: Screen Target Display Unit to be destroyed
1851 *
1852 * Clean up after vmw_stdu_init
1853 */
1854static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu)
1855{
1856 vmw_du_cleanup(&stdu->base);
1857 kfree(stdu);
1858}
1859
1860
1861
1862/******************************************************************************
1863 * Screen Target Display KMS Functions
1864 *
1865 * These functions are called by the common KMS code in vmwgfx_kms.c
1866 *****************************************************************************/
1867
1868/**
1869 * vmw_kms_stdu_init_display - Initializes a Screen Target based display
1870 *
1871 * @dev_priv: VMW DRM device
1872 *
1873 * This function initialize a Screen Target based display device. It checks
1874 * the capability bits to make sure the underlying hardware can support
1875 * screen targets, and then creates the maximum number of CRTCs, a.k.a Display
1876 * Units, as supported by the display hardware.
1877 *
1878 * RETURNS:
1879 * 0 on success, error code otherwise
1880 */
1881int vmw_kms_stdu_init_display(struct vmw_private *dev_priv)
1882{
1883 struct drm_device *dev = dev_priv->dev;
1884 int i, ret;
1885
1886
1887 /* Do nothing if Screen Target support is turned off */
1888 if (!VMWGFX_ENABLE_SCREEN_TARGET_OTABLE)
1889 return -ENOSYS;
1890
1891 if (!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS))
1892 return -ENOSYS;
1893
1894 ret = drm_vblank_init(dev, VMWGFX_NUM_DISPLAY_UNITS);
1895 if (unlikely(ret != 0))
1896 return ret;
1897
1898 dev_priv->active_display_unit = vmw_du_screen_target;
1899
1900 for (i = 0; i < VMWGFX_NUM_DISPLAY_UNITS; ++i) {
1901 ret = vmw_stdu_init(dev_priv, i);
1902
1903 if (unlikely(ret != 0)) {
1904 DRM_ERROR("Failed to initialize STDU %d", i);
1905 return ret;
1906 }
1907 }
1908
1909 DRM_INFO("Screen Target Display device initialized\n");
1910
1911 return 0;
1912}