1/***********************license start***************
  2 * Author: Cavium Networks
  3 *
  4 * Contact: support@caviumnetworks.com
  5 * This file is part of the OCTEON SDK
  6 *
  7 * Copyright (c) 2003-2010 Cavium Networks
  8 *
  9 * This file is free software; you can redistribute it and/or modify
 10 * it under the terms of the GNU General Public License, Version 2, as
 11 * published by the Free Software Foundation.
 12 *
 13 * This file is distributed in the hope that it will be useful, but
 14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
 15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
 16 * NONINFRINGEMENT.  See the GNU General Public License for more
 17 * details.
 18 *
 19 * You should have received a copy of the GNU General Public License
 20 * along with this file; if not, write to the Free Software
 21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
 22 * or visit http://www.gnu.org/licenses/.
 23 *
 24 * This file may also be available under a different license from Cavium.
 25 * Contact Cavium Networks for more information
 26 ***********************license end**************************************/
 27
 28#ifndef __CVMX_SMIX_DEFS_H__
 29#define __CVMX_SMIX_DEFS_H__
 30
 31#define CVMX_SMIX_CLK(offset) (CVMX_ADD_IO_SEG(0x0001180000001818ull) + ((offset) & 1) * 256)
 32#define CVMX_SMIX_CMD(offset) (CVMX_ADD_IO_SEG(0x0001180000001800ull) + ((offset) & 1) * 256)
 33#define CVMX_SMIX_EN(offset) (CVMX_ADD_IO_SEG(0x0001180000001820ull) + ((offset) & 1) * 256)
 34#define CVMX_SMIX_RD_DAT(offset) (CVMX_ADD_IO_SEG(0x0001180000001810ull) + ((offset) & 1) * 256)
 35#define CVMX_SMIX_WR_DAT(offset) (CVMX_ADD_IO_SEG(0x0001180000001808ull) + ((offset) & 1) * 256)
 36
 37union cvmx_smix_clk {
 38	uint64_t u64;
 39	struct cvmx_smix_clk_s {
 40		uint64_t reserved_25_63:39;
 41		uint64_t mode:1;
 42		uint64_t reserved_21_23:3;
 43		uint64_t sample_hi:5;
 44		uint64_t sample_mode:1;
 45		uint64_t reserved_14_14:1;
 46		uint64_t clk_idle:1;
 47		uint64_t preamble:1;
 48		uint64_t sample:4;
 49		uint64_t phase:8;
 50	} s;
 51	struct cvmx_smix_clk_cn30xx {
 52		uint64_t reserved_21_63:43;
 53		uint64_t sample_hi:5;
 54		uint64_t sample_mode:1;
 55		uint64_t reserved_14_14:1;
 56		uint64_t clk_idle:1;
 57		uint64_t preamble:1;
 58		uint64_t sample:4;
 59		uint64_t phase:8;
 60	} cn30xx;
 61	struct cvmx_smix_clk_cn30xx cn31xx;
 62	struct cvmx_smix_clk_cn30xx cn38xx;
 63	struct cvmx_smix_clk_cn30xx cn38xxp2;
 64	struct cvmx_smix_clk_s cn50xx;
 65	struct cvmx_smix_clk_s cn52xx;
 66	struct cvmx_smix_clk_s cn52xxp1;
 67	struct cvmx_smix_clk_s cn56xx;
 68	struct cvmx_smix_clk_s cn56xxp1;
 69	struct cvmx_smix_clk_cn30xx cn58xx;
 70	struct cvmx_smix_clk_cn30xx cn58xxp1;
 71	struct cvmx_smix_clk_s cn63xx;
 72	struct cvmx_smix_clk_s cn63xxp1;
 73};
 74
 75union cvmx_smix_cmd {
 76	uint64_t u64;
 77	struct cvmx_smix_cmd_s {
 78		uint64_t reserved_18_63:46;
 79		uint64_t phy_op:2;
 80		uint64_t reserved_13_15:3;
 81		uint64_t phy_adr:5;
 82		uint64_t reserved_5_7:3;
 83		uint64_t reg_adr:5;
 84	} s;
 85	struct cvmx_smix_cmd_cn30xx {
 86		uint64_t reserved_17_63:47;
 87		uint64_t phy_op:1;
 88		uint64_t reserved_13_15:3;
 89		uint64_t phy_adr:5;
 90		uint64_t reserved_5_7:3;
 91		uint64_t reg_adr:5;
 92	} cn30xx;
 93	struct cvmx_smix_cmd_cn30xx cn31xx;
 94	struct cvmx_smix_cmd_cn30xx cn38xx;
 95	struct cvmx_smix_cmd_cn30xx cn38xxp2;
 96	struct cvmx_smix_cmd_s cn50xx;
 97	struct cvmx_smix_cmd_s cn52xx;
 98	struct cvmx_smix_cmd_s cn52xxp1;
 99	struct cvmx_smix_cmd_s cn56xx;
100	struct cvmx_smix_cmd_s cn56xxp1;
101	struct cvmx_smix_cmd_cn30xx cn58xx;
102	struct cvmx_smix_cmd_cn30xx cn58xxp1;
103	struct cvmx_smix_cmd_s cn63xx;
104	struct cvmx_smix_cmd_s cn63xxp1;
105};
106
107union cvmx_smix_en {
108	uint64_t u64;
109	struct cvmx_smix_en_s {
110		uint64_t reserved_1_63:63;
111		uint64_t en:1;
112	} s;
113	struct cvmx_smix_en_s cn30xx;
114	struct cvmx_smix_en_s cn31xx;
115	struct cvmx_smix_en_s cn38xx;
116	struct cvmx_smix_en_s cn38xxp2;
117	struct cvmx_smix_en_s cn50xx;
118	struct cvmx_smix_en_s cn52xx;
119	struct cvmx_smix_en_s cn52xxp1;
120	struct cvmx_smix_en_s cn56xx;
121	struct cvmx_smix_en_s cn56xxp1;
122	struct cvmx_smix_en_s cn58xx;
123	struct cvmx_smix_en_s cn58xxp1;
124	struct cvmx_smix_en_s cn63xx;
125	struct cvmx_smix_en_s cn63xxp1;
126};
127
128union cvmx_smix_rd_dat {
129	uint64_t u64;
130	struct cvmx_smix_rd_dat_s {
131		uint64_t reserved_18_63:46;
132		uint64_t pending:1;
133		uint64_t val:1;
134		uint64_t dat:16;
135	} s;
136	struct cvmx_smix_rd_dat_s cn30xx;
137	struct cvmx_smix_rd_dat_s cn31xx;
138	struct cvmx_smix_rd_dat_s cn38xx;
139	struct cvmx_smix_rd_dat_s cn38xxp2;
140	struct cvmx_smix_rd_dat_s cn50xx;
141	struct cvmx_smix_rd_dat_s cn52xx;
142	struct cvmx_smix_rd_dat_s cn52xxp1;
143	struct cvmx_smix_rd_dat_s cn56xx;
144	struct cvmx_smix_rd_dat_s cn56xxp1;
145	struct cvmx_smix_rd_dat_s cn58xx;
146	struct cvmx_smix_rd_dat_s cn58xxp1;
147	struct cvmx_smix_rd_dat_s cn63xx;
148	struct cvmx_smix_rd_dat_s cn63xxp1;
149};
150
151union cvmx_smix_wr_dat {
152	uint64_t u64;
153	struct cvmx_smix_wr_dat_s {
154		uint64_t reserved_18_63:46;
155		uint64_t pending:1;
156		uint64_t val:1;
157		uint64_t dat:16;
158	} s;
159	struct cvmx_smix_wr_dat_s cn30xx;
160	struct cvmx_smix_wr_dat_s cn31xx;
161	struct cvmx_smix_wr_dat_s cn38xx;
162	struct cvmx_smix_wr_dat_s cn38xxp2;
163	struct cvmx_smix_wr_dat_s cn50xx;
164	struct cvmx_smix_wr_dat_s cn52xx;
165	struct cvmx_smix_wr_dat_s cn52xxp1;
166	struct cvmx_smix_wr_dat_s cn56xx;
167	struct cvmx_smix_wr_dat_s cn56xxp1;
168	struct cvmx_smix_wr_dat_s cn58xx;
169	struct cvmx_smix_wr_dat_s cn58xxp1;
170	struct cvmx_smix_wr_dat_s cn63xx;
171	struct cvmx_smix_wr_dat_s cn63xxp1;
172};
173
174#endif