1// SPDX-License-Identifier: GPL-2.0
  2
  3#include <dt-bindings/clock/jz4770-cgu.h>
  4
  5/ {
  6	#address-cells = <1>;
  7	#size-cells = <1>;
  8	compatible = "ingenic,jz4770";
  9
 10	cpuintc: interrupt-controller {
 11		#address-cells = <0>;
 12		#interrupt-cells = <1>;
 13		interrupt-controller;
 14		compatible = "mti,cpu-interrupt-controller";
 15	};
 16
 17	intc: interrupt-controller@10001000 {
 18		compatible = "ingenic,jz4770-intc";
 19		reg = <0x10001000 0x40>;
 20
 21		interrupt-controller;
 22		#interrupt-cells = <1>;
 23
 24		interrupt-parent = <&cpuintc>;
 25		interrupts = <2>;
 26	};
 27
 28	ext: ext {
 29		compatible = "fixed-clock";
 30		#clock-cells = <0>;
 31	};
 32
 33	osc32k: osc32k {
 34		compatible = "fixed-clock";
 35		#clock-cells = <0>;
 36		clock-frequency = <32768>;
 37	};
 38
 39	cgu: jz4770-cgu@10000000 {
 40		compatible = "ingenic,jz4770-cgu";
 41		reg = <0x10000000 0x100>;
 42
 43		clocks = <&ext>, <&osc32k>;
 44		clock-names = "ext", "osc32k";
 45
 46		#clock-cells = <1>;
 47	};
 48
 49	tcu: timer@10002000 {
 50		compatible = "ingenic,jz4770-tcu", "simple-mfd";
 51		reg = <0x10002000 0x1000>;
 52		#address-cells = <1>;
 53		#size-cells = <1>;
 54		ranges = <0x0 0x10002000 0x1000>;
 55
 56		#clock-cells = <1>;
 57
 58		clocks = <&cgu JZ4770_CLK_RTC
 59			  &cgu JZ4770_CLK_EXT
 60			  &cgu JZ4770_CLK_PCLK>;
 61		clock-names = "rtc", "ext", "pclk";
 62
 63		interrupt-controller;
 64		#interrupt-cells = <1>;
 65
 66		interrupt-parent = <&intc>;
 67		interrupts = <27 26 25>;
 68	};
 69
 70	pinctrl: pin-controller@10010000 {
 71		compatible = "ingenic,jz4770-pinctrl";
 72		reg = <0x10010000 0x600>;
 73
 74		#address-cells = <1>;
 75		#size-cells = <0>;
 76
 77		gpa: gpio@0 {
 78			compatible = "ingenic,jz4770-gpio";
 79			reg = <0>;
 80
 81			gpio-controller;
 82			gpio-ranges = <&pinctrl 0 0 32>;
 83			#gpio-cells = <2>;
 84
 85			interrupt-controller;
 86			#interrupt-cells = <2>;
 87
 88			interrupt-parent = <&intc>;
 89			interrupts = <17>;
 90		};
 91
 92		gpb: gpio@1 {
 93			compatible = "ingenic,jz4770-gpio";
 94			reg = <1>;
 95
 96			gpio-controller;
 97			gpio-ranges = <&pinctrl 0 32 32>;
 98			#gpio-cells = <2>;
 99
100			interrupt-controller;
101			#interrupt-cells = <2>;
102
103			interrupt-parent = <&intc>;
104			interrupts = <16>;
105		};
106
107		gpc: gpio@2 {
108			compatible = "ingenic,jz4770-gpio";
109			reg = <2>;
110
111			gpio-controller;
112			gpio-ranges = <&pinctrl 0 64 32>;
113			#gpio-cells = <2>;
114
115			interrupt-controller;
116			#interrupt-cells = <2>;
117
118			interrupt-parent = <&intc>;
119			interrupts = <15>;
120		};
121
122		gpd: gpio@3 {
123			compatible = "ingenic,jz4770-gpio";
124			reg = <3>;
125
126			gpio-controller;
127			gpio-ranges = <&pinctrl 0 96 32>;
128			#gpio-cells = <2>;
129
130			interrupt-controller;
131			#interrupt-cells = <2>;
132
133			interrupt-parent = <&intc>;
134			interrupts = <14>;
135		};
136
137		gpe: gpio@4 {
138			compatible = "ingenic,jz4770-gpio";
139			reg = <4>;
140
141			gpio-controller;
142			gpio-ranges = <&pinctrl 0 128 32>;
143			#gpio-cells = <2>;
144
145			interrupt-controller;
146			#interrupt-cells = <2>;
147
148			interrupt-parent = <&intc>;
149			interrupts = <13>;
150		};
151
152		gpf: gpio@5 {
153			compatible = "ingenic,jz4770-gpio";
154			reg = <5>;
155
156			gpio-controller;
157			gpio-ranges = <&pinctrl 0 160 32>;
158			#gpio-cells = <2>;
159
160			interrupt-controller;
161			#interrupt-cells = <2>;
162
163			interrupt-parent = <&intc>;
164			interrupts = <12>;
165		};
166	};
167
168	uart0: serial@10030000 {
169		compatible = "ingenic,jz4770-uart";
170		reg = <0x10030000 0x100>;
171
172		clocks = <&ext>, <&cgu JZ4770_CLK_UART0>;
173		clock-names = "baud", "module";
174
175		interrupt-parent = <&intc>;
176		interrupts = <5>;
177
178		status = "disabled";
179	};
180
181	uart1: serial@10031000 {
182		compatible = "ingenic,jz4770-uart";
183		reg = <0x10031000 0x100>;
184
185		clocks = <&ext>, <&cgu JZ4770_CLK_UART1>;
186		clock-names = "baud", "module";
187
188		interrupt-parent = <&intc>;
189		interrupts = <4>;
190
191		status = "disabled";
192	};
193
194	uart2: serial@10032000 {
195		compatible = "ingenic,jz4770-uart";
196		reg = <0x10032000 0x100>;
197
198		clocks = <&ext>, <&cgu JZ4770_CLK_UART2>;
199		clock-names = "baud", "module";
200
201		interrupt-parent = <&intc>;
202		interrupts = <3>;
203
204		status = "disabled";
205	};
206
207	uart3: serial@10033000 {
208		compatible = "ingenic,jz4770-uart";
209		reg = <0x10033000 0x100>;
210
211		clocks = <&ext>, <&cgu JZ4770_CLK_UART3>;
212		clock-names = "baud", "module";
213
214		interrupt-parent = <&intc>;
215		interrupts = <2>;
216
217		status = "disabled";
218	};
219
220	dmac0: dma-controller@13420000 {
221		compatible = "ingenic,jz4770-dma";
222		reg = <0x13420000 0xC0
223		       0x13420300 0x20>;
224
225		#dma-cells = <1>;
226
227		clocks = <&cgu JZ4770_CLK_DMA>;
228		interrupt-parent = <&intc>;
229		interrupts = <24>;
230
231		/* Disable dmac0 until we have something that uses it */
232		status = "disabled";
233	};
234
235	dmac1: dma-controller@13420100 {
236		compatible = "ingenic,jz4770-dma";
237		reg = <0x13420100 0xC0
238		       0x13420400 0x20>;
239
240		#dma-cells = <1>;
241
242		clocks = <&cgu JZ4770_CLK_DMA>;
243		interrupt-parent = <&intc>;
244		interrupts = <23>;
245
246		/* Disable dmac1 until we have something that uses it */
247		status = "disabled";
248	};
249
250	uhc: uhc@13430000 {
251		compatible = "generic-ohci";
252		reg = <0x13430000 0x1000>;
253
254		clocks = <&cgu JZ4770_CLK_UHC>, <&cgu JZ4770_CLK_UHC_PHY>;
255		assigned-clocks = <&cgu JZ4770_CLK_UHC>;
256		assigned-clock-rates = <48000000>;
257
258		interrupt-parent = <&intc>;
259		interrupts = <20>;
260
261		status = "disabled";
262	};
263};