1/* SPDX-License-Identifier: GPL-2.0-only */
  2/* Atlantic Network Driver
  3 * Copyright (C) 2020 Marvell International Ltd.
  4 */
  5
  6#ifndef HW_ATL2_LLH_H
  7#define HW_ATL2_LLH_H
  8
  9#include <linux/types.h>
 10
 11struct aq_hw_s;
 12
 13/* Set TX Interrupt Moderation Control Register */
 14void hw_atl2_reg_tx_intr_moder_ctrl_set(struct aq_hw_s *aq_hw,
 15					u32 tx_intr_moderation_ctl,
 16					u32 queue);
 17
 18/* Set Redirection Table 2 Select */
 19void hw_atl2_rpf_redirection_table2_select_set(struct aq_hw_s *aq_hw,
 20					       u32 select);
 21
 22/** Set RSS HASH type */
 23void hw_atl2_rpf_rss_hash_type_set(struct aq_hw_s *aq_hw, u32 rss_hash_type);
 24
 25/* set new RPF enable */
 26void hw_atl2_rpf_new_enable_set(struct aq_hw_s *aq_hw, u32 enable);
 27
 28/* set l2 unicast filter tag */
 29void hw_atl2_rpfl2_uc_flr_tag_set(struct aq_hw_s *aq_hw, u32 tag, u32 filter);
 30
 31/* set l2 broadcast filter tag */
 32void hw_atl2_rpfl2_bc_flr_tag_set(struct aq_hw_s *aq_hw, u32 tag);
 33
 34/* set new rss redirection table */
 35void hw_atl2_new_rpf_rss_redir_set(struct aq_hw_s *aq_hw, u32 tc, u32 index,
 36				   u32 queue);
 37
 38/* Set VLAN filter tag */
 39void hw_atl2_rpf_vlan_flr_tag_set(struct aq_hw_s *aq_hw, u32 tag, u32 filter);
 40
 41/* set tx random TC-queue mapping enable bit */
 42void hw_atl2_tpb_tx_tc_q_rand_map_en_set(struct aq_hw_s *aq_hw,
 43					 const u32 tc_q_rand_map_en);
 44
 45/* set tx buffer clock gate enable */
 46void hw_atl2_tpb_tx_buf_clk_gate_en_set(struct aq_hw_s *aq_hw, u32 clk_gate_en);
 47
 48void hw_atl2_tps_tx_pkt_shed_data_arb_mode_set(struct aq_hw_s *aq_hw,
 49					       const u32 data_arb_mode);
 50
 51/* set tx packet scheduler tc data max credit */
 52void hw_atl2_tps_tx_pkt_shed_tc_data_max_credit_set(struct aq_hw_s *aq_hw,
 53						    const u32 tc,
 54						    const u32 max_credit);
 55
 56/* set tx packet scheduler tc data weight */
 57void hw_atl2_tps_tx_pkt_shed_tc_data_weight_set(struct aq_hw_s *aq_hw,
 58						const u32 tc,
 59						const u32 weight);
 60
 61u32 hw_atl2_get_hw_version(struct aq_hw_s *aq_hw);
 62
 63void hw_atl2_init_launchtime(struct aq_hw_s *aq_hw);
 64
 65/* set action resolver record */
 66void hw_atl2_rpf_act_rslvr_record_set(struct aq_hw_s *aq_hw, u8 location,
 67				      u32 tag, u32 mask, u32 action);
 68
 69/* set enable action resolver section */
 70void hw_atl2_rpf_act_rslvr_section_en_set(struct aq_hw_s *aq_hw, u32 sections);
 71
 72/* get data from firmware shared input buffer */
 73void hw_atl2_mif_shared_buf_get(struct aq_hw_s *aq_hw, int offset, u32 *data,
 74				int len);
 75
 76/* set data into firmware shared input buffer */
 77void hw_atl2_mif_shared_buf_write(struct aq_hw_s *aq_hw, int offset, u32 *data,
 78				  int len);
 79
 80/* get data from firmware shared output buffer */
 81void hw_atl2_mif_shared_buf_read(struct aq_hw_s *aq_hw, int offset, u32 *data,
 82				 int len);
 83
 84/* set host finished write shared buffer indication */
 85void hw_atl2_mif_host_finished_write_set(struct aq_hw_s *aq_hw, u32 finish);
 86
 87/* get mcp finished read shared buffer indication */
 88u32 hw_atl2_mif_mcp_finished_read_get(struct aq_hw_s *aq_hw);
 89
 90/* get mcp boot register */
 91u32 hw_atl2_mif_mcp_boot_reg_get(struct aq_hw_s *aq_hw);
 92
 93/* set mcp boot register */
 94void hw_atl2_mif_mcp_boot_reg_set(struct aq_hw_s *aq_hw, u32 val);
 95
 96/* get host interrupt request */
 97u32 hw_atl2_mif_host_req_int_get(struct aq_hw_s *aq_hw);
 98
 99/* clear host interrupt request */
100void hw_atl2_mif_host_req_int_clr(struct aq_hw_s *aq_hw, u32 val);
101
102#endif /* HW_ATL2_LLH_H */