1* Network
  2
  3Currently defined compatibles:
  4- fsl,cpm1-scc-enet
  5- fsl,cpm2-scc-enet
  6- fsl,cpm1-fec-enet
  7- fsl,cpm2-fcc-enet (third resource is GFEMR)
  8- fsl,qe-enet
  9
 10Example:
 11
 12	ethernet@11300 {
 13		compatible = "fsl,mpc8272-fcc-enet",
 14			     "fsl,cpm2-fcc-enet";
 15		reg = <11300 20 8400 100 11390 1>;
 16		local-mac-address = [ 00 00 00 00 00 00 ];
 17		interrupts = <20 8>;
 18		interrupt-parent = <&PIC>;
 19		phy-handle = <&PHY0>;
 20		fsl,cpm-command = <12000300>;
 21	};
 22
 23* MDIO
 24
 25Currently defined compatibles:
 26fsl,pq1-fec-mdio (reg is same as first resource of FEC device)
 27fsl,cpm2-mdio-bitbang (reg is port C registers)
 28
 29Properties for fsl,cpm2-mdio-bitbang:
 30fsl,mdio-pin : pin of port C controlling mdio data
 31fsl,mdc-pin : pin of port C controlling mdio clock
 32
 33Example:
 34	mdio@10d40 {
 35		compatible = "fsl,mpc8272ads-mdio-bitbang",
 36			     "fsl,mpc8272-mdio-bitbang",
 37			     "fsl,cpm2-mdio-bitbang";
 38		reg = <10d40 14>;
 39		#address-cells = <1>;
 40		#size-cells = <0>;
 41		fsl,mdio-pin = <12>;
 42		fsl,mdc-pin = <13>;
 43	};
 44
 45* HDLC
 46
 47Currently defined compatibles:
 48- fsl,ucc-hdlc
 49
 50Properties for fsl,ucc-hdlc:
 51- rx-clock-name
 52- tx-clock-name
 53	Usage: required
 54	Value type: <string>
 55	Definition : Must be "brg1"-"brg16" for internal clock source,
 56		     Must be "clk1"-"clk24" for external clock source.
 57
 58- fsl,tdm-interface
 59	Usage: optional
 60	Value type: <empty>
 61	Definition : Specify that hdlc is based on tdm-interface
 62
 63The property below is dependent on fsl,tdm-interface:
 64- fsl,rx-sync-clock
 65	Usage: required
 66	Value type: <string>
 67	Definition : Must be "none", "rsync_pin", "brg9-11" and "brg13-15".
 68
 69- fsl,tx-sync-clock
 70	Usage: required
 71	Value type: <string>
 72	Definition : Must be "none", "tsync_pin", "brg9-11" and "brg13-15".
 73
 74- fsl,tdm-framer-type
 75	Usage: required for tdm interface
 76	Value type: <string>
 77	Definition : "e1" or "t1".Now e1 and t1 are used, other framer types
 78		     are not supported.
 79
 80- fsl,tdm-id
 81	Usage: required for tdm interface
 82	Value type: <u32>
 83	Definition : number of TDM ID
 84
 85- fsl,tx-timeslot-mask
 86- fsl,rx-timeslot-mask
 87	Usage: required for tdm interface
 88	Value type: <u32>
 89	Definition : time slot mask for TDM operation. Indicates which time
 90		     slots used for transmitting and receiving.
 91
 92- fsl,siram-entry-id
 93	Usage: required for tdm interface
 94	Value type: <u32>
 95	Definition : Must be 0,2,4...64. the number of TDM entry.
 96
 97- fsl,tdm-internal-loopback
 98	usage: optional for tdm interface
 99	value type: <empty>
100	Definition : Internal loopback connecting on TDM layer.
101- fsl,hmask
102	usage: optional
103	Value type: <u16>
104	Definition: HDLC address recognition. Set to zero to disable
105		    address filtering of packets:
106		    fsl,hmask = /bits/ 16 <0x0000>;
107
108Example for tdm interface:
109
110	ucc@2000 {
111		compatible = "fsl,ucc-hdlc";
112		rx-clock-name = "clk8";
113		tx-clock-name = "clk9";
114		fsl,rx-sync-clock = "rsync_pin";
115		fsl,tx-sync-clock = "tsync_pin";
116		fsl,tx-timeslot-mask = <0xfffffffe>;
117		fsl,rx-timeslot-mask = <0xfffffffe>;
118		fsl,tdm-framer-type = "e1";
119		fsl,tdm-id = <0>;
120		fsl,siram-entry-id = <0>;
121		fsl,tdm-interface;
122	};
123
124Example for hdlc without tdm interface:
125
126	ucc@2000 {
127		compatible = "fsl,ucc-hdlc";
128		rx-clock-name = "brg1";
129		tx-clock-name = "brg1";
130	};