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1/* SPDX-License-Identifier: ISC */
2/* Copyright (C) 2020 MediaTek Inc. */
3
4#ifndef __MT7921_MCU_H
5#define __MT7921_MCU_H
6
7#include "../mt76_connac_mcu.h"
8
9struct mt7921_mcu_txd {
10 __le32 txd[8];
11
12 __le16 len;
13 __le16 pq_id;
14
15 u8 cid;
16 u8 pkt_type;
17 u8 set_query; /* FW don't care */
18 u8 seq;
19
20 u8 uc_d2b0_rev;
21 u8 ext_cid;
22 u8 s2d_index;
23 u8 ext_cid_ack;
24
25 u32 reserved[5];
26} __packed __aligned(4);
27
28/**
29 * struct mt7921_uni_txd - mcu command descriptor for firmware v3
30 * @txd: hardware descriptor
31 * @len: total length not including txd
32 * @cid: command identifier
33 * @pkt_type: must be 0xa0 (cmd packet by long format)
34 * @frag_n: fragment number
35 * @seq: sequence number
36 * @checksum: 0 mean there is no checksum
37 * @s2d_index: index for command source and destination
38 * Definition | value | note
39 * CMD_S2D_IDX_H2N | 0x00 | command from HOST to WM
40 * CMD_S2D_IDX_C2N | 0x01 | command from WA to WM
41 * CMD_S2D_IDX_H2C | 0x02 | command from HOST to WA
42 * CMD_S2D_IDX_H2N_AND_H2C | 0x03 | command from HOST to WA and WM
43 *
44 * @option: command option
45 * BIT[0]: UNI_CMD_OPT_BIT_ACK
46 * set to 1 to request a fw reply
47 * if UNI_CMD_OPT_BIT_0_ACK is set and UNI_CMD_OPT_BIT_2_SET_QUERY
48 * is set, mcu firmware will send response event EID = 0x01
49 * (UNI_EVENT_ID_CMD_RESULT) to the host.
50 * BIT[1]: UNI_CMD_OPT_BIT_UNI_CMD
51 * 0: original command
52 * 1: unified command
53 * BIT[2]: UNI_CMD_OPT_BIT_SET_QUERY
54 * 0: QUERY command
55 * 1: SET command
56 */
57struct mt7921_uni_txd {
58 __le32 txd[8];
59
60 /* DW1 */
61 __le16 len;
62 __le16 cid;
63
64 /* DW2 */
65 u8 reserved;
66 u8 pkt_type;
67 u8 frag_n;
68 u8 seq;
69
70 /* DW3 */
71 __le16 checksum;
72 u8 s2d_index;
73 u8 option;
74
75 /* DW4 */
76 u8 reserved2[4];
77} __packed __aligned(4);
78
79/* event table */
80enum {
81 MCU_EVENT_REG_ACCESS = 0x05,
82 MCU_EVENT_LP_INFO = 0x07,
83 MCU_EVENT_SCAN_DONE = 0x0d,
84 MCU_EVENT_TX_DONE = 0x0f,
85 MCU_EVENT_BSS_ABSENCE = 0x11,
86 MCU_EVENT_BSS_BEACON_LOSS = 0x13,
87 MCU_EVENT_CH_PRIVILEGE = 0x18,
88 MCU_EVENT_SCHED_SCAN_DONE = 0x23,
89 MCU_EVENT_DBG_MSG = 0x27,
90 MCU_EVENT_TXPWR = 0xd0,
91 MCU_EVENT_COREDUMP = 0xf0,
92};
93
94/* ext event table */
95enum {
96 MCU_EXT_EVENT_RATE_REPORT = 0x87,
97};
98
99struct mt7921_mcu_rxd {
100 __le32 rxd[6];
101
102 __le16 len;
103 __le16 pkt_type_id;
104
105 u8 eid;
106 u8 seq;
107 __le16 __rsv;
108
109 u8 ext_eid;
110 u8 __rsv1[2];
111 u8 s2d_index;
112};
113
114struct mt7921_mcu_eeprom_info {
115 __le32 addr;
116 __le32 valid;
117 u8 data[16];
118} __packed;
119
120#define MT_RA_RATE_NSS GENMASK(8, 6)
121#define MT_RA_RATE_MCS GENMASK(3, 0)
122#define MT_RA_RATE_TX_MODE GENMASK(12, 9)
123#define MT_RA_RATE_DCM_EN BIT(4)
124#define MT_RA_RATE_BW GENMASK(14, 13)
125
126#define MCU_PQ_ID(p, q) (((p) << 15) | ((q) << 10))
127#define MCU_PKT_ID 0xa0
128
129enum {
130 MCU_Q_QUERY,
131 MCU_Q_SET,
132 MCU_Q_RESERVED,
133 MCU_Q_NA
134};
135
136enum {
137 MCU_S2D_H2N,
138 MCU_S2D_C2N,
139 MCU_S2D_H2C,
140 MCU_S2D_H2CN
141};
142
143struct mt7921_mcu_uni_event {
144 u8 cid;
145 u8 pad[3];
146 __le32 status; /* 0: success, others: fail */
147} __packed;
148
149enum {
150 PATCH_NOT_DL_SEM_FAIL,
151 PATCH_IS_DL,
152 PATCH_NOT_DL_SEM_SUCCESS,
153 PATCH_REL_SEM_SUCCESS
154};
155
156enum {
157 FW_STATE_INITIAL,
158 FW_STATE_FW_DOWNLOAD,
159 FW_STATE_NORMAL_OPERATION,
160 FW_STATE_NORMAL_TRX,
161 FW_STATE_WACPU_RDY = 7
162};
163
164enum {
165 EE_MODE_EFUSE,
166 EE_MODE_BUFFER,
167};
168
169enum {
170 EE_FORMAT_BIN,
171 EE_FORMAT_WHOLE,
172 EE_FORMAT_MULTIPLE,
173};
174
175enum {
176 MCU_PHY_STATE_TX_RATE,
177 MCU_PHY_STATE_RX_RATE,
178 MCU_PHY_STATE_RSSI,
179 MCU_PHY_STATE_CONTENTION_RX_RATE,
180 MCU_PHY_STATE_OFDMLQ_CNINFO,
181};
182
183struct sec_key {
184 u8 cipher_id;
185 u8 cipher_len;
186 u8 key_id;
187 u8 key_len;
188 u8 key[32];
189} __packed;
190
191struct sta_rec_sec {
192 __le16 tag;
193 __le16 len;
194 u8 add;
195 u8 n_cipher;
196 u8 rsv[2];
197
198 struct sec_key key[2];
199} __packed;
200
201enum mcu_cipher_type {
202 MCU_CIPHER_NONE = 0,
203 MCU_CIPHER_WEP40,
204 MCU_CIPHER_WEP104,
205 MCU_CIPHER_WEP128,
206 MCU_CIPHER_TKIP,
207 MCU_CIPHER_AES_CCMP,
208 MCU_CIPHER_CCMP_256,
209 MCU_CIPHER_GCMP,
210 MCU_CIPHER_GCMP_256,
211 MCU_CIPHER_WAPI,
212 MCU_CIPHER_BIP_CMAC_128,
213};
214
215enum {
216 CH_SWITCH_NORMAL = 0,
217 CH_SWITCH_SCAN = 3,
218 CH_SWITCH_MCC = 4,
219 CH_SWITCH_DFS = 5,
220 CH_SWITCH_BACKGROUND_SCAN_START = 6,
221 CH_SWITCH_BACKGROUND_SCAN_RUNNING = 7,
222 CH_SWITCH_BACKGROUND_SCAN_STOP = 8,
223 CH_SWITCH_SCAN_BYPASS_DPD = 9
224};
225
226enum {
227 THERMAL_SENSOR_TEMP_QUERY,
228 THERMAL_SENSOR_MANUAL_CTRL,
229 THERMAL_SENSOR_INFO_QUERY,
230 THERMAL_SENSOR_TASK_CTRL,
231};
232
233enum {
234 MT_EBF = BIT(0), /* explicit beamforming */
235 MT_IBF = BIT(1) /* implicit beamforming */
236};
237
238#define STA_CAP_WMM BIT(0)
239#define STA_CAP_SGI_20 BIT(4)
240#define STA_CAP_SGI_40 BIT(5)
241#define STA_CAP_TX_STBC BIT(6)
242#define STA_CAP_RX_STBC BIT(7)
243#define STA_CAP_VHT_SGI_80 BIT(16)
244#define STA_CAP_VHT_SGI_160 BIT(17)
245#define STA_CAP_VHT_TX_STBC BIT(18)
246#define STA_CAP_VHT_RX_STBC BIT(19)
247#define STA_CAP_VHT_LDPC BIT(23)
248#define STA_CAP_LDPC BIT(24)
249#define STA_CAP_HT BIT(26)
250#define STA_CAP_VHT BIT(27)
251#define STA_CAP_HE BIT(28)
252
253struct mt7921_mcu_reg_event {
254 __le32 reg;
255 __le32 val;
256} __packed;
257
258struct mt7921_mcu_ant_id_config {
259 u8 ant_id[4];
260} __packed;
261
262struct mt7921_mcu_peer_cap {
263 struct mt7921_mcu_ant_id_config ant_id_config;
264
265 u8 power_offset;
266 u8 bw_selector;
267 u8 change_bw_rate_n;
268 u8 bw;
269 u8 spe_idx;
270
271 u8 g2;
272 u8 g4;
273 u8 g8;
274 u8 g16;
275
276 u8 mmss;
277 u8 ampdu_factor;
278 u8 rsv[1];
279} __packed;
280
281struct mt7921_txpwr_req {
282 u8 ver;
283 u8 action;
284 __le16 len;
285 u8 dbdc_idx;
286 u8 rsv[3];
287} __packed;
288
289struct mt7921_txpwr_event {
290 u8 ver;
291 u8 action;
292 __le16 len;
293 struct mt7921_txpwr txpwr;
294} __packed;
295
296struct mt7921_mcu_tx_done_event {
297 u8 pid;
298 u8 status;
299 u16 seq;
300
301 u8 wlan_idx;
302 u8 tx_cnt;
303 u16 tx_rate;
304
305 u8 flag;
306 u8 tid;
307 u8 rsp_rate;
308 u8 mcs;
309
310 u8 bw;
311 u8 tx_pwr;
312 u8 reason;
313 u8 rsv0[1];
314
315 u32 delay;
316 u32 timestamp;
317 u32 applied_flag;
318
319 u8 txs[28];
320
321 u8 rsv1[32];
322} __packed;
323#endif
1/* SPDX-License-Identifier: ISC */
2/* Copyright (C) 2020 MediaTek Inc. */
3
4#ifndef __MT7921_MCU_H
5#define __MT7921_MCU_H
6
7#include "../mt76_connac_mcu.h"
8
9struct mt7921_mcu_tx_done_event {
10 u8 pid;
11 u8 status;
12 __le16 seq;
13
14 u8 wlan_idx;
15 u8 tx_cnt;
16 __le16 tx_rate;
17
18 u8 flag;
19 u8 tid;
20 u8 rsp_rate;
21 u8 mcs;
22
23 u8 bw;
24 u8 tx_pwr;
25 u8 reason;
26 u8 rsv0[1];
27
28 __le32 delay;
29 __le32 timestamp;
30 __le32 applied_flag;
31 u8 txs[28];
32
33 u8 rsv1[32];
34} __packed;
35
36/* ext event table */
37enum {
38 MCU_EXT_EVENT_RATE_REPORT = 0x87,
39};
40
41struct mt7921_mcu_eeprom_info {
42 __le32 addr;
43 __le32 valid;
44 u8 data[MT7921_EEPROM_BLOCK_SIZE];
45} __packed;
46
47#define MT_RA_RATE_NSS GENMASK(8, 6)
48#define MT_RA_RATE_MCS GENMASK(3, 0)
49#define MT_RA_RATE_TX_MODE GENMASK(12, 9)
50#define MT_RA_RATE_DCM_EN BIT(4)
51#define MT_RA_RATE_BW GENMASK(14, 13)
52
53enum {
54 MT_EBF = BIT(0), /* explicit beamforming */
55 MT_IBF = BIT(1) /* implicit beamforming */
56};
57
58struct mt7921_mcu_ant_id_config {
59 u8 ant_id[4];
60} __packed;
61
62struct mt7921_txpwr_req {
63 u8 ver;
64 u8 action;
65 __le16 len;
66 u8 dbdc_idx;
67 u8 rsv[3];
68} __packed;
69
70struct mt7921_txpwr_event {
71 u8 ver;
72 u8 action;
73 __le16 len;
74 struct mt7921_txpwr txpwr;
75} __packed;
76
77enum {
78 TM_SWITCH_MODE,
79 TM_SET_AT_CMD,
80 TM_QUERY_AT_CMD,
81};
82
83enum {
84 MT7921_TM_NORMAL,
85 MT7921_TM_TESTMODE,
86 MT7921_TM_ICAP,
87 MT7921_TM_ICAP_OVERLAP,
88 MT7921_TM_WIFISPECTRUM,
89};
90
91struct mt7921_rftest_cmd {
92 u8 action;
93 u8 rsv[3];
94 __le32 param0;
95 __le32 param1;
96} __packed;
97
98struct mt7921_rftest_evt {
99 __le32 param0;
100 __le32 param1;
101} __packed;
102
103struct mt7921_clc_info_tlv {
104 __le16 tag;
105 __le16 len;
106
107 u8 chan_conf; /* BIT(0) : Enable UNII-4
108 * BIT(1) : Enable UNII-5
109 * BIT(2) : Enable UNII-6
110 * BIT(3) : Enable UNII-7
111 * BIT(4) : Enable UNII-8
112 */
113 u8 rsv[63];
114} __packed;
115#endif