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1/*
2 * Copyright © 2006 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28#include <drm/drm_dp_helper.h>
29
30#include "display/intel_display.h"
31#include "display/intel_display_types.h"
32#include "display/intel_gmbus.h"
33
34#include "i915_drv.h"
35
36#define _INTEL_BIOS_PRIVATE
37#include "intel_vbt_defs.h"
38
39/**
40 * DOC: Video BIOS Table (VBT)
41 *
42 * The Video BIOS Table, or VBT, provides platform and board specific
43 * configuration information to the driver that is not discoverable or available
44 * through other means. The configuration is mostly related to display
45 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
46 * the PCI ROM.
47 *
48 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
49 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
50 * contain the actual configuration information. The VBT Header, and thus the
51 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
52 * BDB Header. The data blocks are concatenated after the BDB Header. The data
53 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
54 * data. (Block 53, the MIPI Sequence Block is an exception.)
55 *
56 * The driver parses the VBT during load. The relevant information is stored in
57 * driver private data for ease of use, and the actual VBT is not read after
58 * that.
59 */
60
61/* Wrapper for VBT child device config */
62struct intel_bios_encoder_data {
63 struct drm_i915_private *i915;
64
65 struct child_device_config child;
66 struct dsc_compression_parameters_entry *dsc;
67 struct list_head node;
68};
69
70#define SLAVE_ADDR1 0x70
71#define SLAVE_ADDR2 0x72
72
73/* Get BDB block size given a pointer to Block ID. */
74static u32 _get_blocksize(const u8 *block_base)
75{
76 /* The MIPI Sequence Block v3+ has a separate size field. */
77 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
78 return *((const u32 *)(block_base + 4));
79 else
80 return *((const u16 *)(block_base + 1));
81}
82
83/* Get BDB block size give a pointer to data after Block ID and Block Size. */
84static u32 get_blocksize(const void *block_data)
85{
86 return _get_blocksize(block_data - 3);
87}
88
89static const void *
90find_section(const void *_bdb, enum bdb_block_id section_id)
91{
92 const struct bdb_header *bdb = _bdb;
93 const u8 *base = _bdb;
94 int index = 0;
95 u32 total, current_size;
96 enum bdb_block_id current_id;
97
98 /* skip to first section */
99 index += bdb->header_size;
100 total = bdb->bdb_size;
101
102 /* walk the sections looking for section_id */
103 while (index + 3 < total) {
104 current_id = *(base + index);
105 current_size = _get_blocksize(base + index);
106 index += 3;
107
108 if (index + current_size > total)
109 return NULL;
110
111 if (current_id == section_id)
112 return base + index;
113
114 index += current_size;
115 }
116
117 return NULL;
118}
119
120static void
121fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
122 const struct lvds_dvo_timing *dvo_timing)
123{
124 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
125 dvo_timing->hactive_lo;
126 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
127 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
128 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
129 ((dvo_timing->hsync_pulse_width_hi << 8) |
130 dvo_timing->hsync_pulse_width_lo);
131 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
132 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
133
134 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
135 dvo_timing->vactive_lo;
136 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
137 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
138 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
139 ((dvo_timing->vsync_pulse_width_hi << 4) |
140 dvo_timing->vsync_pulse_width_lo);
141 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
142 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
143 panel_fixed_mode->clock = dvo_timing->clock * 10;
144 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
145
146 if (dvo_timing->hsync_positive)
147 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
148 else
149 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
150
151 if (dvo_timing->vsync_positive)
152 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
153 else
154 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
155
156 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
157 dvo_timing->himage_lo;
158 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
159 dvo_timing->vimage_lo;
160
161 /* Some VBTs have bogus h/vtotal values */
162 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
163 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
164 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
165 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
166
167 drm_mode_set_name(panel_fixed_mode);
168}
169
170static const struct lvds_dvo_timing *
171get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
172 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
173 int index)
174{
175 /*
176 * the size of fp_timing varies on the different platform.
177 * So calculate the DVO timing relative offset in LVDS data
178 * entry to get the DVO timing entry
179 */
180
181 int lfp_data_size =
182 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
183 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
184 int dvo_timing_offset =
185 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
186 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
187 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
188
189 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
190}
191
192/* get lvds_fp_timing entry
193 * this function may return NULL if the corresponding entry is invalid
194 */
195static const struct lvds_fp_timing *
196get_lvds_fp_timing(const struct bdb_header *bdb,
197 const struct bdb_lvds_lfp_data *data,
198 const struct bdb_lvds_lfp_data_ptrs *ptrs,
199 int index)
200{
201 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
202 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
203 size_t ofs;
204
205 if (index >= ARRAY_SIZE(ptrs->ptr))
206 return NULL;
207 ofs = ptrs->ptr[index].fp_timing_offset;
208 if (ofs < data_ofs ||
209 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
210 return NULL;
211 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
212}
213
214/* Parse general panel options */
215static void
216parse_panel_options(struct drm_i915_private *i915,
217 const struct bdb_header *bdb)
218{
219 const struct bdb_lvds_options *lvds_options;
220 int panel_type;
221 int drrs_mode;
222 int ret;
223
224 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
225 if (!lvds_options)
226 return;
227
228 i915->vbt.lvds_dither = lvds_options->pixel_dither;
229
230 ret = intel_opregion_get_panel_type(i915);
231 if (ret >= 0) {
232 drm_WARN_ON(&i915->drm, ret > 0xf);
233 panel_type = ret;
234 drm_dbg_kms(&i915->drm, "Panel type: %d (OpRegion)\n",
235 panel_type);
236 } else {
237 if (lvds_options->panel_type > 0xf) {
238 drm_dbg_kms(&i915->drm,
239 "Invalid VBT panel type 0x%x\n",
240 lvds_options->panel_type);
241 return;
242 }
243 panel_type = lvds_options->panel_type;
244 drm_dbg_kms(&i915->drm, "Panel type: %d (VBT)\n",
245 panel_type);
246 }
247
248 i915->vbt.panel_type = panel_type;
249
250 drrs_mode = (lvds_options->dps_panel_type_bits
251 >> (panel_type * 2)) & MODE_MASK;
252 /*
253 * VBT has static DRRS = 0 and seamless DRRS = 2.
254 * The below piece of code is required to adjust vbt.drrs_type
255 * to match the enum drrs_support_type.
256 */
257 switch (drrs_mode) {
258 case 0:
259 i915->vbt.drrs_type = STATIC_DRRS_SUPPORT;
260 drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n");
261 break;
262 case 2:
263 i915->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
264 drm_dbg_kms(&i915->drm,
265 "DRRS supported mode is seamless\n");
266 break;
267 default:
268 i915->vbt.drrs_type = DRRS_NOT_SUPPORTED;
269 drm_dbg_kms(&i915->drm,
270 "DRRS not supported (VBT input)\n");
271 break;
272 }
273}
274
275/* Try to find integrated panel timing data */
276static void
277parse_lfp_panel_dtd(struct drm_i915_private *i915,
278 const struct bdb_header *bdb)
279{
280 const struct bdb_lvds_lfp_data *lvds_lfp_data;
281 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
282 const struct lvds_dvo_timing *panel_dvo_timing;
283 const struct lvds_fp_timing *fp_timing;
284 struct drm_display_mode *panel_fixed_mode;
285 int panel_type = i915->vbt.panel_type;
286
287 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
288 if (!lvds_lfp_data)
289 return;
290
291 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
292 if (!lvds_lfp_data_ptrs)
293 return;
294
295 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
296 lvds_lfp_data_ptrs,
297 panel_type);
298
299 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
300 if (!panel_fixed_mode)
301 return;
302
303 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
304
305 i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
306
307 drm_dbg_kms(&i915->drm,
308 "Found panel mode in BIOS VBT legacy lfp table:\n");
309 drm_mode_debug_printmodeline(panel_fixed_mode);
310
311 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
312 lvds_lfp_data_ptrs,
313 panel_type);
314 if (fp_timing) {
315 /* check the resolution, just to be sure */
316 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
317 fp_timing->y_res == panel_fixed_mode->vdisplay) {
318 i915->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
319 drm_dbg_kms(&i915->drm,
320 "VBT initial LVDS value %x\n",
321 i915->vbt.bios_lvds_val);
322 }
323 }
324}
325
326static void
327parse_generic_dtd(struct drm_i915_private *i915,
328 const struct bdb_header *bdb)
329{
330 const struct bdb_generic_dtd *generic_dtd;
331 const struct generic_dtd_entry *dtd;
332 struct drm_display_mode *panel_fixed_mode;
333 int num_dtd;
334
335 generic_dtd = find_section(bdb, BDB_GENERIC_DTD);
336 if (!generic_dtd)
337 return;
338
339 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
340 drm_err(&i915->drm, "GDTD size %u is too small.\n",
341 generic_dtd->gdtd_size);
342 return;
343 } else if (generic_dtd->gdtd_size !=
344 sizeof(struct generic_dtd_entry)) {
345 drm_err(&i915->drm, "Unexpected GDTD size %u\n",
346 generic_dtd->gdtd_size);
347 /* DTD has unknown fields, but keep going */
348 }
349
350 num_dtd = (get_blocksize(generic_dtd) -
351 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
352 if (i915->vbt.panel_type >= num_dtd) {
353 drm_err(&i915->drm,
354 "Panel type %d not found in table of %d DTD's\n",
355 i915->vbt.panel_type, num_dtd);
356 return;
357 }
358
359 dtd = &generic_dtd->dtd[i915->vbt.panel_type];
360
361 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
362 if (!panel_fixed_mode)
363 return;
364
365 panel_fixed_mode->hdisplay = dtd->hactive;
366 panel_fixed_mode->hsync_start =
367 panel_fixed_mode->hdisplay + dtd->hfront_porch;
368 panel_fixed_mode->hsync_end =
369 panel_fixed_mode->hsync_start + dtd->hsync;
370 panel_fixed_mode->htotal =
371 panel_fixed_mode->hdisplay + dtd->hblank;
372
373 panel_fixed_mode->vdisplay = dtd->vactive;
374 panel_fixed_mode->vsync_start =
375 panel_fixed_mode->vdisplay + dtd->vfront_porch;
376 panel_fixed_mode->vsync_end =
377 panel_fixed_mode->vsync_start + dtd->vsync;
378 panel_fixed_mode->vtotal =
379 panel_fixed_mode->vdisplay + dtd->vblank;
380
381 panel_fixed_mode->clock = dtd->pixel_clock;
382 panel_fixed_mode->width_mm = dtd->width_mm;
383 panel_fixed_mode->height_mm = dtd->height_mm;
384
385 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
386 drm_mode_set_name(panel_fixed_mode);
387
388 if (dtd->hsync_positive_polarity)
389 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
390 else
391 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
392
393 if (dtd->vsync_positive_polarity)
394 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
395 else
396 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
397
398 drm_dbg_kms(&i915->drm,
399 "Found panel mode in BIOS VBT generic dtd table:\n");
400 drm_mode_debug_printmodeline(panel_fixed_mode);
401
402 i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
403}
404
405static void
406parse_panel_dtd(struct drm_i915_private *i915,
407 const struct bdb_header *bdb)
408{
409 /*
410 * Older VBTs provided provided DTD information for internal displays
411 * through the "LFP panel DTD" block (42). As of VBT revision 229,
412 * that block is now deprecated and DTD information should be provided
413 * via a newer "generic DTD" block (58). Just to be safe, we'll
414 * try the new generic DTD block first on VBT >= 229, but still fall
415 * back to trying the old LFP block if that fails.
416 */
417 if (bdb->version >= 229)
418 parse_generic_dtd(i915, bdb);
419 if (!i915->vbt.lfp_lvds_vbt_mode)
420 parse_lfp_panel_dtd(i915, bdb);
421}
422
423static void
424parse_lfp_backlight(struct drm_i915_private *i915,
425 const struct bdb_header *bdb)
426{
427 const struct bdb_lfp_backlight_data *backlight_data;
428 const struct lfp_backlight_data_entry *entry;
429 int panel_type = i915->vbt.panel_type;
430 u16 level;
431
432 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
433 if (!backlight_data)
434 return;
435
436 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
437 drm_dbg_kms(&i915->drm,
438 "Unsupported backlight data entry size %u\n",
439 backlight_data->entry_size);
440 return;
441 }
442
443 entry = &backlight_data->data[panel_type];
444
445 i915->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
446 if (!i915->vbt.backlight.present) {
447 drm_dbg_kms(&i915->drm,
448 "PWM backlight not present in VBT (type %u)\n",
449 entry->type);
450 return;
451 }
452
453 i915->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
454 if (bdb->version >= 191) {
455 size_t exp_size;
456
457 if (bdb->version >= 236)
458 exp_size = sizeof(struct bdb_lfp_backlight_data);
459 else if (bdb->version >= 234)
460 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234;
461 else
462 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191;
463
464 if (get_blocksize(backlight_data) >= exp_size) {
465 const struct lfp_backlight_control_method *method;
466
467 method = &backlight_data->backlight_control[panel_type];
468 i915->vbt.backlight.type = method->type;
469 i915->vbt.backlight.controller = method->controller;
470 }
471 }
472
473 i915->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
474 i915->vbt.backlight.active_low_pwm = entry->active_low_pwm;
475
476 if (bdb->version >= 234) {
477 u16 min_level;
478 bool scale;
479
480 level = backlight_data->brightness_level[panel_type].level;
481 min_level = backlight_data->brightness_min_level[panel_type].level;
482
483 if (bdb->version >= 236)
484 scale = backlight_data->brightness_precision_bits[panel_type] == 16;
485 else
486 scale = level > 255;
487
488 if (scale)
489 min_level = min_level / 255;
490
491 if (min_level > 255) {
492 drm_warn(&i915->drm, "Brightness min level > 255\n");
493 level = 255;
494 }
495 i915->vbt.backlight.min_brightness = min_level;
496 } else {
497 level = backlight_data->level[panel_type];
498 i915->vbt.backlight.min_brightness = entry->min_brightness;
499 }
500
501 drm_dbg_kms(&i915->drm,
502 "VBT backlight PWM modulation frequency %u Hz, "
503 "active %s, min brightness %u, level %u, controller %u\n",
504 i915->vbt.backlight.pwm_freq_hz,
505 i915->vbt.backlight.active_low_pwm ? "low" : "high",
506 i915->vbt.backlight.min_brightness,
507 level,
508 i915->vbt.backlight.controller);
509}
510
511/* Try to find sdvo panel data */
512static void
513parse_sdvo_panel_data(struct drm_i915_private *i915,
514 const struct bdb_header *bdb)
515{
516 const struct bdb_sdvo_panel_dtds *dtds;
517 struct drm_display_mode *panel_fixed_mode;
518 int index;
519
520 index = i915->params.vbt_sdvo_panel_type;
521 if (index == -2) {
522 drm_dbg_kms(&i915->drm,
523 "Ignore SDVO panel mode from BIOS VBT tables.\n");
524 return;
525 }
526
527 if (index == -1) {
528 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
529
530 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
531 if (!sdvo_lvds_options)
532 return;
533
534 index = sdvo_lvds_options->panel_type;
535 }
536
537 dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS);
538 if (!dtds)
539 return;
540
541 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
542 if (!panel_fixed_mode)
543 return;
544
545 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]);
546
547 i915->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
548
549 drm_dbg_kms(&i915->drm,
550 "Found SDVO panel mode in BIOS VBT tables:\n");
551 drm_mode_debug_printmodeline(panel_fixed_mode);
552}
553
554static int intel_bios_ssc_frequency(struct drm_i915_private *i915,
555 bool alternate)
556{
557 switch (DISPLAY_VER(i915)) {
558 case 2:
559 return alternate ? 66667 : 48000;
560 case 3:
561 case 4:
562 return alternate ? 100000 : 96000;
563 default:
564 return alternate ? 100000 : 120000;
565 }
566}
567
568static void
569parse_general_features(struct drm_i915_private *i915,
570 const struct bdb_header *bdb)
571{
572 const struct bdb_general_features *general;
573
574 general = find_section(bdb, BDB_GENERAL_FEATURES);
575 if (!general)
576 return;
577
578 i915->vbt.int_tv_support = general->int_tv_support;
579 /* int_crt_support can't be trusted on earlier platforms */
580 if (bdb->version >= 155 &&
581 (HAS_DDI(i915) || IS_VALLEYVIEW(i915)))
582 i915->vbt.int_crt_support = general->int_crt_support;
583 i915->vbt.lvds_use_ssc = general->enable_ssc;
584 i915->vbt.lvds_ssc_freq =
585 intel_bios_ssc_frequency(i915, general->ssc_freq);
586 i915->vbt.display_clock_mode = general->display_clock_mode;
587 i915->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
588 if (bdb->version >= 181) {
589 i915->vbt.orientation = general->rotate_180 ?
590 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
591 DRM_MODE_PANEL_ORIENTATION_NORMAL;
592 } else {
593 i915->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
594 }
595 drm_dbg_kms(&i915->drm,
596 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
597 i915->vbt.int_tv_support,
598 i915->vbt.int_crt_support,
599 i915->vbt.lvds_use_ssc,
600 i915->vbt.lvds_ssc_freq,
601 i915->vbt.display_clock_mode,
602 i915->vbt.fdi_rx_polarity_inverted);
603}
604
605static const struct child_device_config *
606child_device_ptr(const struct bdb_general_definitions *defs, int i)
607{
608 return (const void *) &defs->devices[i * defs->child_dev_size];
609}
610
611static void
612parse_sdvo_device_mapping(struct drm_i915_private *i915)
613{
614 struct sdvo_device_mapping *mapping;
615 const struct intel_bios_encoder_data *devdata;
616 const struct child_device_config *child;
617 int count = 0;
618
619 /*
620 * Only parse SDVO mappings on gens that could have SDVO. This isn't
621 * accurate and doesn't have to be, as long as it's not too strict.
622 */
623 if (!IS_DISPLAY_VER(i915, 3, 7)) {
624 drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n");
625 return;
626 }
627
628 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
629 child = &devdata->child;
630
631 if (child->slave_addr != SLAVE_ADDR1 &&
632 child->slave_addr != SLAVE_ADDR2) {
633 /*
634 * If the slave address is neither 0x70 nor 0x72,
635 * it is not a SDVO device. Skip it.
636 */
637 continue;
638 }
639 if (child->dvo_port != DEVICE_PORT_DVOB &&
640 child->dvo_port != DEVICE_PORT_DVOC) {
641 /* skip the incorrect SDVO port */
642 drm_dbg_kms(&i915->drm,
643 "Incorrect SDVO port. Skip it\n");
644 continue;
645 }
646 drm_dbg_kms(&i915->drm,
647 "the SDVO device with slave addr %2x is found on"
648 " %s port\n",
649 child->slave_addr,
650 (child->dvo_port == DEVICE_PORT_DVOB) ?
651 "SDVOB" : "SDVOC");
652 mapping = &i915->vbt.sdvo_mappings[child->dvo_port - 1];
653 if (!mapping->initialized) {
654 mapping->dvo_port = child->dvo_port;
655 mapping->slave_addr = child->slave_addr;
656 mapping->dvo_wiring = child->dvo_wiring;
657 mapping->ddc_pin = child->ddc_pin;
658 mapping->i2c_pin = child->i2c_pin;
659 mapping->initialized = 1;
660 drm_dbg_kms(&i915->drm,
661 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
662 mapping->dvo_port, mapping->slave_addr,
663 mapping->dvo_wiring, mapping->ddc_pin,
664 mapping->i2c_pin);
665 } else {
666 drm_dbg_kms(&i915->drm,
667 "Maybe one SDVO port is shared by "
668 "two SDVO device.\n");
669 }
670 if (child->slave2_addr) {
671 /* Maybe this is a SDVO device with multiple inputs */
672 /* And the mapping info is not added */
673 drm_dbg_kms(&i915->drm,
674 "there exists the slave2_addr. Maybe this"
675 " is a SDVO device with multiple inputs.\n");
676 }
677 count++;
678 }
679
680 if (!count) {
681 /* No SDVO device info is found */
682 drm_dbg_kms(&i915->drm,
683 "No SDVO device info is found in VBT\n");
684 }
685}
686
687static void
688parse_driver_features(struct drm_i915_private *i915,
689 const struct bdb_header *bdb)
690{
691 const struct bdb_driver_features *driver;
692
693 driver = find_section(bdb, BDB_DRIVER_FEATURES);
694 if (!driver)
695 return;
696
697 if (DISPLAY_VER(i915) >= 5) {
698 /*
699 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
700 * to mean "eDP". The VBT spec doesn't agree with that
701 * interpretation, but real world VBTs seem to.
702 */
703 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
704 i915->vbt.int_lvds_support = 0;
705 } else {
706 /*
707 * FIXME it's not clear which BDB version has the LVDS config
708 * bits defined. Revision history in the VBT spec says:
709 * "0.92 | Add two definitions for VBT value of LVDS Active
710 * Config (00b and 11b values defined) | 06/13/2005"
711 * but does not the specify the BDB version.
712 *
713 * So far version 134 (on i945gm) is the oldest VBT observed
714 * in the wild with the bits correctly populated. Version
715 * 108 (on i85x) does not have the bits correctly populated.
716 */
717 if (bdb->version >= 134 &&
718 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
719 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
720 i915->vbt.int_lvds_support = 0;
721 }
722
723 if (bdb->version < 228) {
724 drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n",
725 driver->drrs_enabled);
726 /*
727 * If DRRS is not supported, drrs_type has to be set to 0.
728 * This is because, VBT is configured in such a way that
729 * static DRRS is 0 and DRRS not supported is represented by
730 * driver->drrs_enabled=false
731 */
732 if (!driver->drrs_enabled)
733 i915->vbt.drrs_type = DRRS_NOT_SUPPORTED;
734
735 i915->vbt.psr.enable = driver->psr_enabled;
736 }
737}
738
739static void
740parse_power_conservation_features(struct drm_i915_private *i915,
741 const struct bdb_header *bdb)
742{
743 const struct bdb_lfp_power *power;
744 u8 panel_type = i915->vbt.panel_type;
745
746 if (bdb->version < 228)
747 return;
748
749 power = find_section(bdb, BDB_LFP_POWER);
750 if (!power)
751 return;
752
753 i915->vbt.psr.enable = power->psr & BIT(panel_type);
754
755 /*
756 * If DRRS is not supported, drrs_type has to be set to 0.
757 * This is because, VBT is configured in such a way that
758 * static DRRS is 0 and DRRS not supported is represented by
759 * power->drrs & BIT(panel_type)=false
760 */
761 if (!(power->drrs & BIT(panel_type)))
762 i915->vbt.drrs_type = DRRS_NOT_SUPPORTED;
763
764 if (bdb->version >= 232)
765 i915->vbt.edp.hobl = power->hobl & BIT(panel_type);
766}
767
768static void
769parse_edp(struct drm_i915_private *i915, const struct bdb_header *bdb)
770{
771 const struct bdb_edp *edp;
772 const struct edp_power_seq *edp_pps;
773 const struct edp_fast_link_params *edp_link_params;
774 int panel_type = i915->vbt.panel_type;
775
776 edp = find_section(bdb, BDB_EDP);
777 if (!edp)
778 return;
779
780 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
781 case EDP_18BPP:
782 i915->vbt.edp.bpp = 18;
783 break;
784 case EDP_24BPP:
785 i915->vbt.edp.bpp = 24;
786 break;
787 case EDP_30BPP:
788 i915->vbt.edp.bpp = 30;
789 break;
790 }
791
792 /* Get the eDP sequencing and link info */
793 edp_pps = &edp->power_seqs[panel_type];
794 edp_link_params = &edp->fast_link_params[panel_type];
795
796 i915->vbt.edp.pps = *edp_pps;
797
798 switch (edp_link_params->rate) {
799 case EDP_RATE_1_62:
800 i915->vbt.edp.rate = DP_LINK_BW_1_62;
801 break;
802 case EDP_RATE_2_7:
803 i915->vbt.edp.rate = DP_LINK_BW_2_7;
804 break;
805 default:
806 drm_dbg_kms(&i915->drm,
807 "VBT has unknown eDP link rate value %u\n",
808 edp_link_params->rate);
809 break;
810 }
811
812 switch (edp_link_params->lanes) {
813 case EDP_LANE_1:
814 i915->vbt.edp.lanes = 1;
815 break;
816 case EDP_LANE_2:
817 i915->vbt.edp.lanes = 2;
818 break;
819 case EDP_LANE_4:
820 i915->vbt.edp.lanes = 4;
821 break;
822 default:
823 drm_dbg_kms(&i915->drm,
824 "VBT has unknown eDP lane count value %u\n",
825 edp_link_params->lanes);
826 break;
827 }
828
829 switch (edp_link_params->preemphasis) {
830 case EDP_PREEMPHASIS_NONE:
831 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
832 break;
833 case EDP_PREEMPHASIS_3_5dB:
834 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
835 break;
836 case EDP_PREEMPHASIS_6dB:
837 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
838 break;
839 case EDP_PREEMPHASIS_9_5dB:
840 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
841 break;
842 default:
843 drm_dbg_kms(&i915->drm,
844 "VBT has unknown eDP pre-emphasis value %u\n",
845 edp_link_params->preemphasis);
846 break;
847 }
848
849 switch (edp_link_params->vswing) {
850 case EDP_VSWING_0_4V:
851 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
852 break;
853 case EDP_VSWING_0_6V:
854 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
855 break;
856 case EDP_VSWING_0_8V:
857 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
858 break;
859 case EDP_VSWING_1_2V:
860 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
861 break;
862 default:
863 drm_dbg_kms(&i915->drm,
864 "VBT has unknown eDP voltage swing value %u\n",
865 edp_link_params->vswing);
866 break;
867 }
868
869 if (bdb->version >= 173) {
870 u8 vswing;
871
872 /* Don't read from VBT if module parameter has valid value*/
873 if (i915->params.edp_vswing) {
874 i915->vbt.edp.low_vswing =
875 i915->params.edp_vswing == 1;
876 } else {
877 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
878 i915->vbt.edp.low_vswing = vswing == 0;
879 }
880 }
881}
882
883static void
884parse_psr(struct drm_i915_private *i915, const struct bdb_header *bdb)
885{
886 const struct bdb_psr *psr;
887 const struct psr_table *psr_table;
888 int panel_type = i915->vbt.panel_type;
889
890 psr = find_section(bdb, BDB_PSR);
891 if (!psr) {
892 drm_dbg_kms(&i915->drm, "No PSR BDB found.\n");
893 return;
894 }
895
896 psr_table = &psr->psr_table[panel_type];
897
898 i915->vbt.psr.full_link = psr_table->full_link;
899 i915->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
900
901 /* Allowed VBT values goes from 0 to 15 */
902 i915->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
903 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
904
905 switch (psr_table->lines_to_wait) {
906 case 0:
907 i915->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
908 break;
909 case 1:
910 i915->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
911 break;
912 case 2:
913 i915->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
914 break;
915 case 3:
916 i915->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
917 break;
918 default:
919 drm_dbg_kms(&i915->drm,
920 "VBT has unknown PSR lines to wait %u\n",
921 psr_table->lines_to_wait);
922 break;
923 }
924
925 /*
926 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
927 * Old decimal value is wake up time in multiples of 100 us.
928 */
929 if (bdb->version >= 205 &&
930 (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) {
931 switch (psr_table->tp1_wakeup_time) {
932 case 0:
933 i915->vbt.psr.tp1_wakeup_time_us = 500;
934 break;
935 case 1:
936 i915->vbt.psr.tp1_wakeup_time_us = 100;
937 break;
938 case 3:
939 i915->vbt.psr.tp1_wakeup_time_us = 0;
940 break;
941 default:
942 drm_dbg_kms(&i915->drm,
943 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
944 psr_table->tp1_wakeup_time);
945 fallthrough;
946 case 2:
947 i915->vbt.psr.tp1_wakeup_time_us = 2500;
948 break;
949 }
950
951 switch (psr_table->tp2_tp3_wakeup_time) {
952 case 0:
953 i915->vbt.psr.tp2_tp3_wakeup_time_us = 500;
954 break;
955 case 1:
956 i915->vbt.psr.tp2_tp3_wakeup_time_us = 100;
957 break;
958 case 3:
959 i915->vbt.psr.tp2_tp3_wakeup_time_us = 0;
960 break;
961 default:
962 drm_dbg_kms(&i915->drm,
963 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
964 psr_table->tp2_tp3_wakeup_time);
965 fallthrough;
966 case 2:
967 i915->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
968 break;
969 }
970 } else {
971 i915->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
972 i915->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
973 }
974
975 if (bdb->version >= 226) {
976 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
977
978 wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
979 switch (wakeup_time) {
980 case 0:
981 wakeup_time = 500;
982 break;
983 case 1:
984 wakeup_time = 100;
985 break;
986 case 3:
987 wakeup_time = 50;
988 break;
989 default:
990 case 2:
991 wakeup_time = 2500;
992 break;
993 }
994 i915->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
995 } else {
996 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */
997 i915->vbt.psr.psr2_tp2_tp3_wakeup_time_us = i915->vbt.psr.tp2_tp3_wakeup_time_us;
998 }
999}
1000
1001static void parse_dsi_backlight_ports(struct drm_i915_private *i915,
1002 u16 version, enum port port)
1003{
1004 if (!i915->vbt.dsi.config->dual_link || version < 197) {
1005 i915->vbt.dsi.bl_ports = BIT(port);
1006 if (i915->vbt.dsi.config->cabc_supported)
1007 i915->vbt.dsi.cabc_ports = BIT(port);
1008
1009 return;
1010 }
1011
1012 switch (i915->vbt.dsi.config->dl_dcs_backlight_ports) {
1013 case DL_DCS_PORT_A:
1014 i915->vbt.dsi.bl_ports = BIT(PORT_A);
1015 break;
1016 case DL_DCS_PORT_C:
1017 i915->vbt.dsi.bl_ports = BIT(PORT_C);
1018 break;
1019 default:
1020 case DL_DCS_PORT_A_AND_C:
1021 i915->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C);
1022 break;
1023 }
1024
1025 if (!i915->vbt.dsi.config->cabc_supported)
1026 return;
1027
1028 switch (i915->vbt.dsi.config->dl_dcs_cabc_ports) {
1029 case DL_DCS_PORT_A:
1030 i915->vbt.dsi.cabc_ports = BIT(PORT_A);
1031 break;
1032 case DL_DCS_PORT_C:
1033 i915->vbt.dsi.cabc_ports = BIT(PORT_C);
1034 break;
1035 default:
1036 case DL_DCS_PORT_A_AND_C:
1037 i915->vbt.dsi.cabc_ports =
1038 BIT(PORT_A) | BIT(PORT_C);
1039 break;
1040 }
1041}
1042
1043static void
1044parse_mipi_config(struct drm_i915_private *i915,
1045 const struct bdb_header *bdb)
1046{
1047 const struct bdb_mipi_config *start;
1048 const struct mipi_config *config;
1049 const struct mipi_pps_data *pps;
1050 int panel_type = i915->vbt.panel_type;
1051 enum port port;
1052
1053 /* parse MIPI blocks only if LFP type is MIPI */
1054 if (!intel_bios_is_dsi_present(i915, &port))
1055 return;
1056
1057 /* Initialize this to undefined indicating no generic MIPI support */
1058 i915->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1059
1060 /* Block #40 is already parsed and panel_fixed_mode is
1061 * stored in i915->lfp_lvds_vbt_mode
1062 * resuse this when needed
1063 */
1064
1065 /* Parse #52 for panel index used from panel_type already
1066 * parsed
1067 */
1068 start = find_section(bdb, BDB_MIPI_CONFIG);
1069 if (!start) {
1070 drm_dbg_kms(&i915->drm, "No MIPI config BDB found");
1071 return;
1072 }
1073
1074 drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n",
1075 panel_type);
1076
1077 /*
1078 * get hold of the correct configuration block and pps data as per
1079 * the panel_type as index
1080 */
1081 config = &start->config[panel_type];
1082 pps = &start->pps[panel_type];
1083
1084 /* store as of now full data. Trim when we realise all is not needed */
1085 i915->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1086 if (!i915->vbt.dsi.config)
1087 return;
1088
1089 i915->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1090 if (!i915->vbt.dsi.pps) {
1091 kfree(i915->vbt.dsi.config);
1092 return;
1093 }
1094
1095 parse_dsi_backlight_ports(i915, bdb->version, port);
1096
1097 /* FIXME is the 90 vs. 270 correct? */
1098 switch (config->rotation) {
1099 case ENABLE_ROTATION_0:
1100 /*
1101 * Most (all?) VBTs claim 0 degrees despite having
1102 * an upside down panel, thus we do not trust this.
1103 */
1104 i915->vbt.dsi.orientation =
1105 DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1106 break;
1107 case ENABLE_ROTATION_90:
1108 i915->vbt.dsi.orientation =
1109 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1110 break;
1111 case ENABLE_ROTATION_180:
1112 i915->vbt.dsi.orientation =
1113 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1114 break;
1115 case ENABLE_ROTATION_270:
1116 i915->vbt.dsi.orientation =
1117 DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1118 break;
1119 }
1120
1121 /* We have mandatory mipi config blocks. Initialize as generic panel */
1122 i915->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1123}
1124
1125/* Find the sequence block and size for the given panel. */
1126static const u8 *
1127find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
1128 u16 panel_id, u32 *seq_size)
1129{
1130 u32 total = get_blocksize(sequence);
1131 const u8 *data = &sequence->data[0];
1132 u8 current_id;
1133 u32 current_size;
1134 int header_size = sequence->version >= 3 ? 5 : 3;
1135 int index = 0;
1136 int i;
1137
1138 /* skip new block size */
1139 if (sequence->version >= 3)
1140 data += 4;
1141
1142 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1143 if (index + header_size > total) {
1144 DRM_ERROR("Invalid sequence block (header)\n");
1145 return NULL;
1146 }
1147
1148 current_id = *(data + index);
1149 if (sequence->version >= 3)
1150 current_size = *((const u32 *)(data + index + 1));
1151 else
1152 current_size = *((const u16 *)(data + index + 1));
1153
1154 index += header_size;
1155
1156 if (index + current_size > total) {
1157 DRM_ERROR("Invalid sequence block\n");
1158 return NULL;
1159 }
1160
1161 if (current_id == panel_id) {
1162 *seq_size = current_size;
1163 return data + index;
1164 }
1165
1166 index += current_size;
1167 }
1168
1169 DRM_ERROR("Sequence block detected but no valid configuration\n");
1170
1171 return NULL;
1172}
1173
1174static int goto_next_sequence(const u8 *data, int index, int total)
1175{
1176 u16 len;
1177
1178 /* Skip Sequence Byte. */
1179 for (index = index + 1; index < total; index += len) {
1180 u8 operation_byte = *(data + index);
1181 index++;
1182
1183 switch (operation_byte) {
1184 case MIPI_SEQ_ELEM_END:
1185 return index;
1186 case MIPI_SEQ_ELEM_SEND_PKT:
1187 if (index + 4 > total)
1188 return 0;
1189
1190 len = *((const u16 *)(data + index + 2)) + 4;
1191 break;
1192 case MIPI_SEQ_ELEM_DELAY:
1193 len = 4;
1194 break;
1195 case MIPI_SEQ_ELEM_GPIO:
1196 len = 2;
1197 break;
1198 case MIPI_SEQ_ELEM_I2C:
1199 if (index + 7 > total)
1200 return 0;
1201 len = *(data + index + 6) + 7;
1202 break;
1203 default:
1204 DRM_ERROR("Unknown operation byte\n");
1205 return 0;
1206 }
1207 }
1208
1209 return 0;
1210}
1211
1212static int goto_next_sequence_v3(const u8 *data, int index, int total)
1213{
1214 int seq_end;
1215 u16 len;
1216 u32 size_of_sequence;
1217
1218 /*
1219 * Could skip sequence based on Size of Sequence alone, but also do some
1220 * checking on the structure.
1221 */
1222 if (total < 5) {
1223 DRM_ERROR("Too small sequence size\n");
1224 return 0;
1225 }
1226
1227 /* Skip Sequence Byte. */
1228 index++;
1229
1230 /*
1231 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1232 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1233 * byte.
1234 */
1235 size_of_sequence = *((const u32 *)(data + index));
1236 index += 4;
1237
1238 seq_end = index + size_of_sequence;
1239 if (seq_end > total) {
1240 DRM_ERROR("Invalid sequence size\n");
1241 return 0;
1242 }
1243
1244 for (; index < total; index += len) {
1245 u8 operation_byte = *(data + index);
1246 index++;
1247
1248 if (operation_byte == MIPI_SEQ_ELEM_END) {
1249 if (index != seq_end) {
1250 DRM_ERROR("Invalid element structure\n");
1251 return 0;
1252 }
1253 return index;
1254 }
1255
1256 len = *(data + index);
1257 index++;
1258
1259 /*
1260 * FIXME: Would be nice to check elements like for v1/v2 in
1261 * goto_next_sequence() above.
1262 */
1263 switch (operation_byte) {
1264 case MIPI_SEQ_ELEM_SEND_PKT:
1265 case MIPI_SEQ_ELEM_DELAY:
1266 case MIPI_SEQ_ELEM_GPIO:
1267 case MIPI_SEQ_ELEM_I2C:
1268 case MIPI_SEQ_ELEM_SPI:
1269 case MIPI_SEQ_ELEM_PMIC:
1270 break;
1271 default:
1272 DRM_ERROR("Unknown operation byte %u\n",
1273 operation_byte);
1274 break;
1275 }
1276 }
1277
1278 return 0;
1279}
1280
1281/*
1282 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1283 * skip all delay + gpio operands and stop at the first DSI packet op.
1284 */
1285static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915)
1286{
1287 const u8 *data = i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1288 int index, len;
1289
1290 if (drm_WARN_ON(&i915->drm,
1291 !data || i915->vbt.dsi.seq_version != 1))
1292 return 0;
1293
1294 /* index = 1 to skip sequence byte */
1295 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1296 switch (data[index]) {
1297 case MIPI_SEQ_ELEM_SEND_PKT:
1298 return index == 1 ? 0 : index;
1299 case MIPI_SEQ_ELEM_DELAY:
1300 len = 5; /* 1 byte for operand + uint32 */
1301 break;
1302 case MIPI_SEQ_ELEM_GPIO:
1303 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1304 break;
1305 default:
1306 return 0;
1307 }
1308 }
1309
1310 return 0;
1311}
1312
1313/*
1314 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1315 * The deassert must be done before calling intel_dsi_device_ready, so for
1316 * these devices we split the init OTP sequence into a deassert sequence and
1317 * the actual init OTP part.
1318 */
1319static void fixup_mipi_sequences(struct drm_i915_private *i915)
1320{
1321 u8 *init_otp;
1322 int len;
1323
1324 /* Limit this to VLV for now. */
1325 if (!IS_VALLEYVIEW(i915))
1326 return;
1327
1328 /* Limit this to v1 vid-mode sequences */
1329 if (i915->vbt.dsi.config->is_cmd_mode ||
1330 i915->vbt.dsi.seq_version != 1)
1331 return;
1332
1333 /* Only do this if there are otp and assert seqs and no deassert seq */
1334 if (!i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1335 !i915->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1336 i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1337 return;
1338
1339 /* The deassert-sequence ends at the first DSI packet */
1340 len = get_init_otp_deassert_fragment_len(i915);
1341 if (!len)
1342 return;
1343
1344 drm_dbg_kms(&i915->drm,
1345 "Using init OTP fragment to deassert reset\n");
1346
1347 /* Copy the fragment, update seq byte and terminate it */
1348 init_otp = (u8 *)i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1349 i915->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1350 if (!i915->vbt.dsi.deassert_seq)
1351 return;
1352 i915->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1353 i915->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1354 /* Use the copy for deassert */
1355 i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1356 i915->vbt.dsi.deassert_seq;
1357 /* Replace the last byte of the fragment with init OTP seq byte */
1358 init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1359 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1360 i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1361}
1362
1363static void
1364parse_mipi_sequence(struct drm_i915_private *i915,
1365 const struct bdb_header *bdb)
1366{
1367 int panel_type = i915->vbt.panel_type;
1368 const struct bdb_mipi_sequence *sequence;
1369 const u8 *seq_data;
1370 u32 seq_size;
1371 u8 *data;
1372 int index = 0;
1373
1374 /* Only our generic panel driver uses the sequence block. */
1375 if (i915->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
1376 return;
1377
1378 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
1379 if (!sequence) {
1380 drm_dbg_kms(&i915->drm,
1381 "No MIPI Sequence found, parsing complete\n");
1382 return;
1383 }
1384
1385 /* Fail gracefully for forward incompatible sequence block. */
1386 if (sequence->version >= 4) {
1387 drm_err(&i915->drm,
1388 "Unable to parse MIPI Sequence Block v%u\n",
1389 sequence->version);
1390 return;
1391 }
1392
1393 drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n",
1394 sequence->version);
1395
1396 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
1397 if (!seq_data)
1398 return;
1399
1400 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
1401 if (!data)
1402 return;
1403
1404 /* Parse the sequences, store pointers to each sequence. */
1405 for (;;) {
1406 u8 seq_id = *(data + index);
1407 if (seq_id == MIPI_SEQ_END)
1408 break;
1409
1410 if (seq_id >= MIPI_SEQ_MAX) {
1411 drm_err(&i915->drm, "Unknown sequence %u\n",
1412 seq_id);
1413 goto err;
1414 }
1415
1416 /* Log about presence of sequences we won't run. */
1417 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
1418 drm_dbg_kms(&i915->drm,
1419 "Unsupported sequence %u\n", seq_id);
1420
1421 i915->vbt.dsi.sequence[seq_id] = data + index;
1422
1423 if (sequence->version >= 3)
1424 index = goto_next_sequence_v3(data, index, seq_size);
1425 else
1426 index = goto_next_sequence(data, index, seq_size);
1427 if (!index) {
1428 drm_err(&i915->drm, "Invalid sequence %u\n",
1429 seq_id);
1430 goto err;
1431 }
1432 }
1433
1434 i915->vbt.dsi.data = data;
1435 i915->vbt.dsi.size = seq_size;
1436 i915->vbt.dsi.seq_version = sequence->version;
1437
1438 fixup_mipi_sequences(i915);
1439
1440 drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n");
1441 return;
1442
1443err:
1444 kfree(data);
1445 memset(i915->vbt.dsi.sequence, 0, sizeof(i915->vbt.dsi.sequence));
1446}
1447
1448static void
1449parse_compression_parameters(struct drm_i915_private *i915,
1450 const struct bdb_header *bdb)
1451{
1452 const struct bdb_compression_parameters *params;
1453 struct intel_bios_encoder_data *devdata;
1454 const struct child_device_config *child;
1455 u16 block_size;
1456 int index;
1457
1458 if (bdb->version < 198)
1459 return;
1460
1461 params = find_section(bdb, BDB_COMPRESSION_PARAMETERS);
1462 if (params) {
1463 /* Sanity checks */
1464 if (params->entry_size != sizeof(params->data[0])) {
1465 drm_dbg_kms(&i915->drm,
1466 "VBT: unsupported compression param entry size\n");
1467 return;
1468 }
1469
1470 block_size = get_blocksize(params);
1471 if (block_size < sizeof(*params)) {
1472 drm_dbg_kms(&i915->drm,
1473 "VBT: expected 16 compression param entries\n");
1474 return;
1475 }
1476 }
1477
1478 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
1479 child = &devdata->child;
1480
1481 if (!child->compression_enable)
1482 continue;
1483
1484 if (!params) {
1485 drm_dbg_kms(&i915->drm,
1486 "VBT: compression params not available\n");
1487 continue;
1488 }
1489
1490 if (child->compression_method_cps) {
1491 drm_dbg_kms(&i915->drm,
1492 "VBT: CPS compression not supported\n");
1493 continue;
1494 }
1495
1496 index = child->compression_structure_index;
1497
1498 devdata->dsc = kmemdup(¶ms->data[index],
1499 sizeof(*devdata->dsc), GFP_KERNEL);
1500 }
1501}
1502
1503static u8 translate_iboost(u8 val)
1504{
1505 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1506
1507 if (val >= ARRAY_SIZE(mapping)) {
1508 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1509 return 0;
1510 }
1511 return mapping[val];
1512}
1513
1514static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
1515{
1516 const struct ddi_vbt_port_info *info;
1517 enum port port;
1518
1519 if (!ddc_pin)
1520 return PORT_NONE;
1521
1522 for_each_port(port) {
1523 info = &i915->vbt.ddi_port_info[port];
1524
1525 if (info->devdata && ddc_pin == info->alternate_ddc_pin)
1526 return port;
1527 }
1528
1529 return PORT_NONE;
1530}
1531
1532static void sanitize_ddc_pin(struct drm_i915_private *i915,
1533 enum port port)
1534{
1535 struct ddi_vbt_port_info *info = &i915->vbt.ddi_port_info[port];
1536 struct child_device_config *child;
1537 enum port p;
1538
1539 p = get_port_by_ddc_pin(i915, info->alternate_ddc_pin);
1540 if (p == PORT_NONE)
1541 return;
1542
1543 drm_dbg_kms(&i915->drm,
1544 "port %c trying to use the same DDC pin (0x%x) as port %c, "
1545 "disabling port %c DVI/HDMI support\n",
1546 port_name(port), info->alternate_ddc_pin,
1547 port_name(p), port_name(p));
1548
1549 /*
1550 * If we have multiple ports supposedly sharing the pin, then dvi/hdmi
1551 * couldn't exist on the shared port. Otherwise they share the same ddc
1552 * pin and system couldn't communicate with them separately.
1553 *
1554 * Give inverse child device order the priority, last one wins. Yes,
1555 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
1556 * port A and port E with the same AUX ch and we must pick port E :(
1557 */
1558 info = &i915->vbt.ddi_port_info[p];
1559 child = &info->devdata->child;
1560
1561 child->device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
1562 child->device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
1563
1564 info->alternate_ddc_pin = 0;
1565}
1566
1567static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
1568{
1569 const struct ddi_vbt_port_info *info;
1570 enum port port;
1571
1572 if (!aux_ch)
1573 return PORT_NONE;
1574
1575 for_each_port(port) {
1576 info = &i915->vbt.ddi_port_info[port];
1577
1578 if (info->devdata && aux_ch == info->alternate_aux_channel)
1579 return port;
1580 }
1581
1582 return PORT_NONE;
1583}
1584
1585static void sanitize_aux_ch(struct drm_i915_private *i915,
1586 enum port port)
1587{
1588 struct ddi_vbt_port_info *info = &i915->vbt.ddi_port_info[port];
1589 struct child_device_config *child;
1590 enum port p;
1591
1592 p = get_port_by_aux_ch(i915, info->alternate_aux_channel);
1593 if (p == PORT_NONE)
1594 return;
1595
1596 drm_dbg_kms(&i915->drm,
1597 "port %c trying to use the same AUX CH (0x%x) as port %c, "
1598 "disabling port %c DP support\n",
1599 port_name(port), info->alternate_aux_channel,
1600 port_name(p), port_name(p));
1601
1602 /*
1603 * If we have multiple ports supposedly sharing the aux channel, then DP
1604 * couldn't exist on the shared port. Otherwise they share the same aux
1605 * channel and system couldn't communicate with them separately.
1606 *
1607 * Give inverse child device order the priority, last one wins. Yes,
1608 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
1609 * port A and port E with the same AUX ch and we must pick port E :(
1610 */
1611 info = &i915->vbt.ddi_port_info[p];
1612 child = &info->devdata->child;
1613
1614 child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1615 info->alternate_aux_channel = 0;
1616}
1617
1618static const u8 cnp_ddc_pin_map[] = {
1619 [0] = 0, /* N/A */
1620 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
1621 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
1622 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
1623 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
1624};
1625
1626static const u8 icp_ddc_pin_map[] = {
1627 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1628 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1629 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
1630 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
1631 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
1632 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
1633 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
1634 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
1635 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
1636};
1637
1638static const u8 rkl_pch_tgp_ddc_pin_map[] = {
1639 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1640 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1641 [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP,
1642 [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP,
1643};
1644
1645static const u8 adls_ddc_pin_map[] = {
1646 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1647 [ADLS_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
1648 [ADLS_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
1649 [ADLS_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
1650 [ADLS_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
1651};
1652
1653static const u8 gen9bc_tgp_ddc_pin_map[] = {
1654 [DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1655 [DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP,
1656 [DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP,
1657};
1658
1659static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
1660{
1661 const u8 *ddc_pin_map;
1662 int n_entries;
1663
1664 if (IS_ALDERLAKE_S(i915)) {
1665 ddc_pin_map = adls_ddc_pin_map;
1666 n_entries = ARRAY_SIZE(adls_ddc_pin_map);
1667 } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
1668 return vbt_pin;
1669 } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
1670 ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
1671 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
1672 } else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) {
1673 ddc_pin_map = gen9bc_tgp_ddc_pin_map;
1674 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
1675 } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
1676 ddc_pin_map = icp_ddc_pin_map;
1677 n_entries = ARRAY_SIZE(icp_ddc_pin_map);
1678 } else if (HAS_PCH_CNP(i915)) {
1679 ddc_pin_map = cnp_ddc_pin_map;
1680 n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
1681 } else {
1682 /* Assuming direct map */
1683 return vbt_pin;
1684 }
1685
1686 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
1687 return ddc_pin_map[vbt_pin];
1688
1689 drm_dbg_kms(&i915->drm,
1690 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
1691 vbt_pin);
1692 return 0;
1693}
1694
1695static enum port __dvo_port_to_port(int n_ports, int n_dvo,
1696 const int port_mapping[][3], u8 dvo_port)
1697{
1698 enum port port;
1699 int i;
1700
1701 for (port = PORT_A; port < n_ports; port++) {
1702 for (i = 0; i < n_dvo; i++) {
1703 if (port_mapping[port][i] == -1)
1704 break;
1705
1706 if (dvo_port == port_mapping[port][i])
1707 return port;
1708 }
1709 }
1710
1711 return PORT_NONE;
1712}
1713
1714static enum port dvo_port_to_port(struct drm_i915_private *i915,
1715 u8 dvo_port)
1716{
1717 /*
1718 * Each DDI port can have more than one value on the "DVO Port" field,
1719 * so look for all the possible values for each port.
1720 */
1721 static const int port_mapping[][3] = {
1722 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1723 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1724 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1725 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1726 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
1727 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
1728 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
1729 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
1730 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
1731 };
1732 /*
1733 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
1734 * map to DDI A,B,TC1,TC2 respectively.
1735 */
1736 static const int rkl_port_mapping[][3] = {
1737 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1738 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1739 [PORT_C] = { -1 },
1740 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1741 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1742 };
1743 /*
1744 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E,
1745 * PORT_F and PORT_G, we need to map that to correct VBT sections.
1746 */
1747 static const int adls_port_mapping[][3] = {
1748 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1749 [PORT_B] = { -1 },
1750 [PORT_C] = { -1 },
1751 [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1752 [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1753 [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1754 [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
1755 };
1756 static const int xelpd_port_mapping[][3] = {
1757 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1758 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1759 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1760 [PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1761 [PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
1762 [PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
1763 [PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
1764 [PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
1765 [PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
1766 };
1767
1768 if (DISPLAY_VER(i915) == 13)
1769 return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping),
1770 ARRAY_SIZE(xelpd_port_mapping[0]),
1771 xelpd_port_mapping,
1772 dvo_port);
1773 else if (IS_ALDERLAKE_S(i915))
1774 return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping),
1775 ARRAY_SIZE(adls_port_mapping[0]),
1776 adls_port_mapping,
1777 dvo_port);
1778 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
1779 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
1780 ARRAY_SIZE(rkl_port_mapping[0]),
1781 rkl_port_mapping,
1782 dvo_port);
1783 else
1784 return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
1785 ARRAY_SIZE(port_mapping[0]),
1786 port_mapping,
1787 dvo_port);
1788}
1789
1790static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate)
1791{
1792 switch (vbt_max_link_rate) {
1793 default:
1794 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF:
1795 return 0;
1796 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20:
1797 return 2000000;
1798 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5:
1799 return 1350000;
1800 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10:
1801 return 1000000;
1802 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3:
1803 return 810000;
1804 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2:
1805 return 540000;
1806 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR:
1807 return 270000;
1808 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR:
1809 return 162000;
1810 }
1811}
1812
1813static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
1814{
1815 switch (vbt_max_link_rate) {
1816 default:
1817 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3:
1818 return 810000;
1819 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2:
1820 return 540000;
1821 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR:
1822 return 270000;
1823 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR:
1824 return 162000;
1825 }
1826}
1827
1828static void sanitize_device_type(struct intel_bios_encoder_data *devdata,
1829 enum port port)
1830{
1831 struct drm_i915_private *i915 = devdata->i915;
1832 bool is_hdmi;
1833
1834 if (port != PORT_A || DISPLAY_VER(i915) >= 12)
1835 return;
1836
1837 if (!(devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING))
1838 return;
1839
1840 is_hdmi = !(devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT);
1841
1842 drm_dbg_kms(&i915->drm, "VBT claims port A supports DVI%s, ignoring\n",
1843 is_hdmi ? "/HDMI" : "");
1844
1845 devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
1846 devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
1847}
1848
1849static bool
1850intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata)
1851{
1852 return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1853}
1854
1855bool
1856intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata)
1857{
1858 return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1859}
1860
1861bool
1862intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata)
1863{
1864 return intel_bios_encoder_supports_dvi(devdata) &&
1865 (devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1866}
1867
1868bool
1869intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata)
1870{
1871 return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1872}
1873
1874static bool
1875intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata)
1876{
1877 return intel_bios_encoder_supports_dp(devdata) &&
1878 devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR;
1879}
1880
1881static bool is_port_valid(struct drm_i915_private *i915, enum port port)
1882{
1883 /*
1884 * On some ICL/CNL SKUs port F is not present, but broken VBTs mark
1885 * the port as present. Only try to initialize port F for the
1886 * SKUs that may actually have it.
1887 */
1888 if (port == PORT_F && (IS_ICELAKE(i915) || IS_CANNONLAKE(i915)))
1889 return IS_ICL_WITH_PORT_F(i915) || IS_CNL_WITH_PORT_F(i915);
1890
1891 return true;
1892}
1893
1894static void parse_ddi_port(struct drm_i915_private *i915,
1895 struct intel_bios_encoder_data *devdata)
1896{
1897 const struct child_device_config *child = &devdata->child;
1898 struct ddi_vbt_port_info *info;
1899 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt, supports_typec_usb, supports_tbt;
1900 int dp_boost_level, hdmi_boost_level;
1901 enum port port;
1902
1903 port = dvo_port_to_port(i915, child->dvo_port);
1904 if (port == PORT_NONE)
1905 return;
1906
1907 if (!is_port_valid(i915, port)) {
1908 drm_dbg_kms(&i915->drm,
1909 "VBT reports port %c as supported, but that can't be true: skipping\n",
1910 port_name(port));
1911 return;
1912 }
1913
1914 info = &i915->vbt.ddi_port_info[port];
1915
1916 if (info->devdata) {
1917 drm_dbg_kms(&i915->drm,
1918 "More than one child device for port %c in VBT, using the first.\n",
1919 port_name(port));
1920 return;
1921 }
1922
1923 sanitize_device_type(devdata, port);
1924
1925 is_dvi = intel_bios_encoder_supports_dvi(devdata);
1926 is_dp = intel_bios_encoder_supports_dp(devdata);
1927 is_crt = intel_bios_encoder_supports_crt(devdata);
1928 is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
1929 is_edp = intel_bios_encoder_supports_edp(devdata);
1930
1931 supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata);
1932 supports_tbt = intel_bios_encoder_supports_tbt(devdata);
1933
1934 drm_dbg_kms(&i915->drm,
1935 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
1936 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp,
1937 HAS_LSPCON(i915) && child->lspcon,
1938 supports_typec_usb, supports_tbt,
1939 devdata->dsc != NULL);
1940
1941 if (is_dvi) {
1942 u8 ddc_pin;
1943
1944 ddc_pin = map_ddc_pin(i915, child->ddc_pin);
1945 if (intel_gmbus_is_valid_pin(i915, ddc_pin)) {
1946 info->alternate_ddc_pin = ddc_pin;
1947 sanitize_ddc_pin(i915, port);
1948 } else {
1949 drm_dbg_kms(&i915->drm,
1950 "Port %c has invalid DDC pin %d, "
1951 "sticking to defaults\n",
1952 port_name(port), ddc_pin);
1953 }
1954 }
1955
1956 if (is_dp) {
1957 info->alternate_aux_channel = child->aux_channel;
1958
1959 sanitize_aux_ch(i915, port);
1960 }
1961
1962 if (i915->vbt.version >= 158) {
1963 /* The VBT HDMI level shift values match the table we have. */
1964 u8 hdmi_level_shift = child->hdmi_level_shifter_value;
1965 drm_dbg_kms(&i915->drm,
1966 "Port %c VBT HDMI level shift: %d\n",
1967 port_name(port),
1968 hdmi_level_shift);
1969 info->hdmi_level_shift = hdmi_level_shift;
1970 info->hdmi_level_shift_set = true;
1971 }
1972
1973 if (i915->vbt.version >= 204) {
1974 int max_tmds_clock;
1975
1976 switch (child->hdmi_max_data_rate) {
1977 default:
1978 MISSING_CASE(child->hdmi_max_data_rate);
1979 fallthrough;
1980 case HDMI_MAX_DATA_RATE_PLATFORM:
1981 max_tmds_clock = 0;
1982 break;
1983 case HDMI_MAX_DATA_RATE_297:
1984 max_tmds_clock = 297000;
1985 break;
1986 case HDMI_MAX_DATA_RATE_165:
1987 max_tmds_clock = 165000;
1988 break;
1989 }
1990
1991 if (max_tmds_clock)
1992 drm_dbg_kms(&i915->drm,
1993 "Port %c VBT HDMI max TMDS clock: %d kHz\n",
1994 port_name(port), max_tmds_clock);
1995 info->max_tmds_clock = max_tmds_clock;
1996 }
1997
1998 /* I_boost config for SKL and above */
1999 dp_boost_level = intel_bios_encoder_dp_boost_level(devdata);
2000 if (dp_boost_level)
2001 drm_dbg_kms(&i915->drm,
2002 "Port %c VBT (e)DP boost level: %d\n",
2003 port_name(port), dp_boost_level);
2004
2005 hdmi_boost_level = intel_bios_encoder_hdmi_boost_level(devdata);
2006 if (hdmi_boost_level)
2007 drm_dbg_kms(&i915->drm,
2008 "Port %c VBT HDMI boost level: %d\n",
2009 port_name(port), hdmi_boost_level);
2010
2011 /* DP max link rate for CNL+ */
2012 if (i915->vbt.version >= 216) {
2013 if (i915->vbt.version >= 230)
2014 info->dp_max_link_rate = parse_bdb_230_dp_max_link_rate(child->dp_max_link_rate);
2015 else
2016 info->dp_max_link_rate = parse_bdb_216_dp_max_link_rate(child->dp_max_link_rate);
2017
2018 drm_dbg_kms(&i915->drm,
2019 "Port %c VBT DP max link rate: %d\n",
2020 port_name(port), info->dp_max_link_rate);
2021 }
2022
2023 info->devdata = devdata;
2024}
2025
2026static void parse_ddi_ports(struct drm_i915_private *i915)
2027{
2028 struct intel_bios_encoder_data *devdata;
2029
2030 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
2031 return;
2032
2033 if (i915->vbt.version < 155)
2034 return;
2035
2036 list_for_each_entry(devdata, &i915->vbt.display_devices, node)
2037 parse_ddi_port(i915, devdata);
2038}
2039
2040static void
2041parse_general_definitions(struct drm_i915_private *i915,
2042 const struct bdb_header *bdb)
2043{
2044 const struct bdb_general_definitions *defs;
2045 struct intel_bios_encoder_data *devdata;
2046 const struct child_device_config *child;
2047 int i, child_device_num;
2048 u8 expected_size;
2049 u16 block_size;
2050 int bus_pin;
2051
2052 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
2053 if (!defs) {
2054 drm_dbg_kms(&i915->drm,
2055 "No general definition block is found, no devices defined.\n");
2056 return;
2057 }
2058
2059 block_size = get_blocksize(defs);
2060 if (block_size < sizeof(*defs)) {
2061 drm_dbg_kms(&i915->drm,
2062 "General definitions block too small (%u)\n",
2063 block_size);
2064 return;
2065 }
2066
2067 bus_pin = defs->crt_ddc_gmbus_pin;
2068 drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
2069 if (intel_gmbus_is_valid_pin(i915, bus_pin))
2070 i915->vbt.crt_ddc_pin = bus_pin;
2071
2072 if (bdb->version < 106) {
2073 expected_size = 22;
2074 } else if (bdb->version < 111) {
2075 expected_size = 27;
2076 } else if (bdb->version < 195) {
2077 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
2078 } else if (bdb->version == 195) {
2079 expected_size = 37;
2080 } else if (bdb->version <= 215) {
2081 expected_size = 38;
2082 } else if (bdb->version <= 237) {
2083 expected_size = 39;
2084 } else {
2085 expected_size = sizeof(*child);
2086 BUILD_BUG_ON(sizeof(*child) < 39);
2087 drm_dbg(&i915->drm,
2088 "Expected child device config size for VBT version %u not known; assuming %u\n",
2089 bdb->version, expected_size);
2090 }
2091
2092 /* Flag an error for unexpected size, but continue anyway. */
2093 if (defs->child_dev_size != expected_size)
2094 drm_err(&i915->drm,
2095 "Unexpected child device config size %u (expected %u for VBT version %u)\n",
2096 defs->child_dev_size, expected_size, bdb->version);
2097
2098 /* The legacy sized child device config is the minimum we need. */
2099 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
2100 drm_dbg_kms(&i915->drm,
2101 "Child device config size %u is too small.\n",
2102 defs->child_dev_size);
2103 return;
2104 }
2105
2106 /* get the number of child device */
2107 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
2108
2109 for (i = 0; i < child_device_num; i++) {
2110 child = child_device_ptr(defs, i);
2111 if (!child->device_type)
2112 continue;
2113
2114 drm_dbg_kms(&i915->drm,
2115 "Found VBT child device with type 0x%x\n",
2116 child->device_type);
2117
2118 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2119 if (!devdata)
2120 break;
2121
2122 devdata->i915 = i915;
2123
2124 /*
2125 * Copy as much as we know (sizeof) and is available
2126 * (child_dev_size) of the child device config. Accessing the
2127 * data must depend on VBT version.
2128 */
2129 memcpy(&devdata->child, child,
2130 min_t(size_t, defs->child_dev_size, sizeof(*child)));
2131
2132 list_add_tail(&devdata->node, &i915->vbt.display_devices);
2133 }
2134
2135 if (list_empty(&i915->vbt.display_devices))
2136 drm_dbg_kms(&i915->drm,
2137 "no child dev is parsed from VBT\n");
2138}
2139
2140/* Common defaults which may be overridden by VBT. */
2141static void
2142init_vbt_defaults(struct drm_i915_private *i915)
2143{
2144 i915->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
2145
2146 /* Default to having backlight */
2147 i915->vbt.backlight.present = true;
2148
2149 /* LFP panel data */
2150 i915->vbt.lvds_dither = 1;
2151
2152 /* SDVO panel data */
2153 i915->vbt.sdvo_lvds_vbt_mode = NULL;
2154
2155 /* general features */
2156 i915->vbt.int_tv_support = 1;
2157 i915->vbt.int_crt_support = 1;
2158
2159 /* driver features */
2160 i915->vbt.int_lvds_support = 1;
2161
2162 /* Default to using SSC */
2163 i915->vbt.lvds_use_ssc = 1;
2164 /*
2165 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
2166 * clock for LVDS.
2167 */
2168 i915->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915,
2169 !HAS_PCH_SPLIT(i915));
2170 drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n",
2171 i915->vbt.lvds_ssc_freq);
2172}
2173
2174/* Defaults to initialize only if there is no VBT. */
2175static void
2176init_vbt_missing_defaults(struct drm_i915_private *i915)
2177{
2178 enum port port;
2179 int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) |
2180 BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F);
2181
2182 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
2183 return;
2184
2185 for_each_port_masked(port, ports) {
2186 struct intel_bios_encoder_data *devdata;
2187 struct child_device_config *child;
2188 enum phy phy = intel_port_to_phy(i915, port);
2189
2190 /*
2191 * VBT has the TypeC mode (native,TBT/USB) and we don't want
2192 * to detect it.
2193 */
2194 if (intel_phy_is_tc(i915, phy))
2195 continue;
2196
2197 /* Create fake child device config */
2198 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2199 if (!devdata)
2200 break;
2201
2202 devdata->i915 = i915;
2203 child = &devdata->child;
2204
2205 if (port == PORT_F)
2206 child->dvo_port = DVO_PORT_HDMIF;
2207 else if (port == PORT_E)
2208 child->dvo_port = DVO_PORT_HDMIE;
2209 else
2210 child->dvo_port = DVO_PORT_HDMIA + port;
2211
2212 if (port != PORT_A && port != PORT_E)
2213 child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING;
2214
2215 if (port != PORT_E)
2216 child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2217
2218 if (port == PORT_A)
2219 child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR;
2220
2221 list_add_tail(&devdata->node, &i915->vbt.display_devices);
2222
2223 drm_dbg_kms(&i915->drm,
2224 "Generating default VBT child device with type 0x04%x on port %c\n",
2225 child->device_type, port_name(port));
2226 }
2227
2228 /* Bypass some minimum baseline VBT version checks */
2229 i915->vbt.version = 155;
2230}
2231
2232static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2233{
2234 const void *_vbt = vbt;
2235
2236 return _vbt + vbt->bdb_offset;
2237}
2238
2239/**
2240 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2241 * @buf: pointer to a buffer to validate
2242 * @size: size of the buffer
2243 *
2244 * Returns true on valid VBT.
2245 */
2246bool intel_bios_is_valid_vbt(const void *buf, size_t size)
2247{
2248 const struct vbt_header *vbt = buf;
2249 const struct bdb_header *bdb;
2250
2251 if (!vbt)
2252 return false;
2253
2254 if (sizeof(struct vbt_header) > size) {
2255 DRM_DEBUG_DRIVER("VBT header incomplete\n");
2256 return false;
2257 }
2258
2259 if (memcmp(vbt->signature, "$VBT", 4)) {
2260 DRM_DEBUG_DRIVER("VBT invalid signature\n");
2261 return false;
2262 }
2263
2264 if (vbt->vbt_size > size) {
2265 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n");
2266 return false;
2267 }
2268
2269 size = vbt->vbt_size;
2270
2271 if (range_overflows_t(size_t,
2272 vbt->bdb_offset,
2273 sizeof(struct bdb_header),
2274 size)) {
2275 DRM_DEBUG_DRIVER("BDB header incomplete\n");
2276 return false;
2277 }
2278
2279 bdb = get_bdb_header(vbt);
2280 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
2281 DRM_DEBUG_DRIVER("BDB incomplete\n");
2282 return false;
2283 }
2284
2285 return vbt;
2286}
2287
2288static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)
2289{
2290 struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
2291 void __iomem *p = NULL, *oprom;
2292 struct vbt_header *vbt;
2293 u16 vbt_size;
2294 size_t i, size;
2295
2296 oprom = pci_map_rom(pdev, &size);
2297 if (!oprom)
2298 return NULL;
2299
2300 /* Scour memory looking for the VBT signature. */
2301 for (i = 0; i + 4 < size; i += 4) {
2302 if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
2303 continue;
2304
2305 p = oprom + i;
2306 size -= i;
2307 break;
2308 }
2309
2310 if (!p)
2311 goto err_unmap_oprom;
2312
2313 if (sizeof(struct vbt_header) > size) {
2314 drm_dbg(&i915->drm, "VBT header incomplete\n");
2315 goto err_unmap_oprom;
2316 }
2317
2318 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
2319 if (vbt_size > size) {
2320 drm_dbg(&i915->drm,
2321 "VBT incomplete (vbt_size overflows)\n");
2322 goto err_unmap_oprom;
2323 }
2324
2325 /* The rest will be validated by intel_bios_is_valid_vbt() */
2326 vbt = kmalloc(vbt_size, GFP_KERNEL);
2327 if (!vbt)
2328 goto err_unmap_oprom;
2329
2330 memcpy_fromio(vbt, p, vbt_size);
2331
2332 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
2333 goto err_free_vbt;
2334
2335 pci_unmap_rom(pdev, oprom);
2336
2337 return vbt;
2338
2339err_free_vbt:
2340 kfree(vbt);
2341err_unmap_oprom:
2342 pci_unmap_rom(pdev, oprom);
2343
2344 return NULL;
2345}
2346
2347/**
2348 * intel_bios_init - find VBT and initialize settings from the BIOS
2349 * @i915: i915 device instance
2350 *
2351 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
2352 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
2353 * initialize some defaults if the VBT is not present at all.
2354 */
2355void intel_bios_init(struct drm_i915_private *i915)
2356{
2357 const struct vbt_header *vbt = i915->opregion.vbt;
2358 struct vbt_header *oprom_vbt = NULL;
2359 const struct bdb_header *bdb;
2360
2361 INIT_LIST_HEAD(&i915->vbt.display_devices);
2362
2363 if (!HAS_DISPLAY(i915)) {
2364 drm_dbg_kms(&i915->drm,
2365 "Skipping VBT init due to disabled display.\n");
2366 return;
2367 }
2368
2369 init_vbt_defaults(i915);
2370
2371 /* If the OpRegion does not have VBT, look in PCI ROM. */
2372 if (!vbt) {
2373 oprom_vbt = oprom_get_vbt(i915);
2374 if (!oprom_vbt)
2375 goto out;
2376
2377 vbt = oprom_vbt;
2378
2379 drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n");
2380 }
2381
2382 bdb = get_bdb_header(vbt);
2383 i915->vbt.version = bdb->version;
2384
2385 drm_dbg_kms(&i915->drm,
2386 "VBT signature \"%.*s\", BDB version %d\n",
2387 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
2388
2389 /* Grab useful general definitions */
2390 parse_general_features(i915, bdb);
2391 parse_general_definitions(i915, bdb);
2392 parse_panel_options(i915, bdb);
2393 parse_panel_dtd(i915, bdb);
2394 parse_lfp_backlight(i915, bdb);
2395 parse_sdvo_panel_data(i915, bdb);
2396 parse_driver_features(i915, bdb);
2397 parse_power_conservation_features(i915, bdb);
2398 parse_edp(i915, bdb);
2399 parse_psr(i915, bdb);
2400 parse_mipi_config(i915, bdb);
2401 parse_mipi_sequence(i915, bdb);
2402
2403 /* Depends on child device list */
2404 parse_compression_parameters(i915, bdb);
2405
2406out:
2407 if (!vbt) {
2408 drm_info(&i915->drm,
2409 "Failed to find VBIOS tables (VBT)\n");
2410 init_vbt_missing_defaults(i915);
2411 }
2412
2413 /* Further processing on pre-parsed or generated child device data */
2414 parse_sdvo_device_mapping(i915);
2415 parse_ddi_ports(i915);
2416
2417 kfree(oprom_vbt);
2418}
2419
2420/**
2421 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
2422 * @i915: i915 device instance
2423 */
2424void intel_bios_driver_remove(struct drm_i915_private *i915)
2425{
2426 struct intel_bios_encoder_data *devdata, *n;
2427
2428 list_for_each_entry_safe(devdata, n, &i915->vbt.display_devices, node) {
2429 list_del(&devdata->node);
2430 kfree(devdata->dsc);
2431 kfree(devdata);
2432 }
2433
2434 kfree(i915->vbt.sdvo_lvds_vbt_mode);
2435 i915->vbt.sdvo_lvds_vbt_mode = NULL;
2436 kfree(i915->vbt.lfp_lvds_vbt_mode);
2437 i915->vbt.lfp_lvds_vbt_mode = NULL;
2438 kfree(i915->vbt.dsi.data);
2439 i915->vbt.dsi.data = NULL;
2440 kfree(i915->vbt.dsi.pps);
2441 i915->vbt.dsi.pps = NULL;
2442 kfree(i915->vbt.dsi.config);
2443 i915->vbt.dsi.config = NULL;
2444 kfree(i915->vbt.dsi.deassert_seq);
2445 i915->vbt.dsi.deassert_seq = NULL;
2446}
2447
2448/**
2449 * intel_bios_is_tv_present - is integrated TV present in VBT
2450 * @i915: i915 device instance
2451 *
2452 * Return true if TV is present. If no child devices were parsed from VBT,
2453 * assume TV is present.
2454 */
2455bool intel_bios_is_tv_present(struct drm_i915_private *i915)
2456{
2457 const struct intel_bios_encoder_data *devdata;
2458 const struct child_device_config *child;
2459
2460 if (!i915->vbt.int_tv_support)
2461 return false;
2462
2463 if (list_empty(&i915->vbt.display_devices))
2464 return true;
2465
2466 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2467 child = &devdata->child;
2468
2469 /*
2470 * If the device type is not TV, continue.
2471 */
2472 switch (child->device_type) {
2473 case DEVICE_TYPE_INT_TV:
2474 case DEVICE_TYPE_TV:
2475 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
2476 break;
2477 default:
2478 continue;
2479 }
2480 /* Only when the addin_offset is non-zero, it is regarded
2481 * as present.
2482 */
2483 if (child->addin_offset)
2484 return true;
2485 }
2486
2487 return false;
2488}
2489
2490/**
2491 * intel_bios_is_lvds_present - is LVDS present in VBT
2492 * @i915: i915 device instance
2493 * @i2c_pin: i2c pin for LVDS if present
2494 *
2495 * Return true if LVDS is present. If no child devices were parsed from VBT,
2496 * assume LVDS is present.
2497 */
2498bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin)
2499{
2500 const struct intel_bios_encoder_data *devdata;
2501 const struct child_device_config *child;
2502
2503 if (list_empty(&i915->vbt.display_devices))
2504 return true;
2505
2506 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2507 child = &devdata->child;
2508
2509 /* If the device type is not LFP, continue.
2510 * We have to check both the new identifiers as well as the
2511 * old for compatibility with some BIOSes.
2512 */
2513 if (child->device_type != DEVICE_TYPE_INT_LFP &&
2514 child->device_type != DEVICE_TYPE_LFP)
2515 continue;
2516
2517 if (intel_gmbus_is_valid_pin(i915, child->i2c_pin))
2518 *i2c_pin = child->i2c_pin;
2519
2520 /* However, we cannot trust the BIOS writers to populate
2521 * the VBT correctly. Since LVDS requires additional
2522 * information from AIM blocks, a non-zero addin offset is
2523 * a good indicator that the LVDS is actually present.
2524 */
2525 if (child->addin_offset)
2526 return true;
2527
2528 /* But even then some BIOS writers perform some black magic
2529 * and instantiate the device without reference to any
2530 * additional data. Trust that if the VBT was written into
2531 * the OpRegion then they have validated the LVDS's existence.
2532 */
2533 if (i915->opregion.vbt)
2534 return true;
2535 }
2536
2537 return false;
2538}
2539
2540/**
2541 * intel_bios_is_port_present - is the specified digital port present
2542 * @i915: i915 device instance
2543 * @port: port to check
2544 *
2545 * Return true if the device in %port is present.
2546 */
2547bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port)
2548{
2549 const struct intel_bios_encoder_data *devdata;
2550 const struct child_device_config *child;
2551 static const struct {
2552 u16 dp, hdmi;
2553 } port_mapping[] = {
2554 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2555 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2556 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2557 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2558 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2559 };
2560
2561 if (HAS_DDI(i915)) {
2562 const struct ddi_vbt_port_info *port_info =
2563 &i915->vbt.ddi_port_info[port];
2564
2565 return port_info->devdata;
2566 }
2567
2568 /* FIXME maybe deal with port A as well? */
2569 if (drm_WARN_ON(&i915->drm,
2570 port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
2571 return false;
2572
2573 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2574 child = &devdata->child;
2575
2576 if ((child->dvo_port == port_mapping[port].dp ||
2577 child->dvo_port == port_mapping[port].hdmi) &&
2578 (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING |
2579 DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
2580 return true;
2581 }
2582
2583 return false;
2584}
2585
2586/**
2587 * intel_bios_is_port_edp - is the device in given port eDP
2588 * @i915: i915 device instance
2589 * @port: port to check
2590 *
2591 * Return true if the device in %port is eDP.
2592 */
2593bool intel_bios_is_port_edp(struct drm_i915_private *i915, enum port port)
2594{
2595 const struct intel_bios_encoder_data *devdata;
2596 const struct child_device_config *child;
2597 static const short port_mapping[] = {
2598 [PORT_B] = DVO_PORT_DPB,
2599 [PORT_C] = DVO_PORT_DPC,
2600 [PORT_D] = DVO_PORT_DPD,
2601 [PORT_E] = DVO_PORT_DPE,
2602 [PORT_F] = DVO_PORT_DPF,
2603 };
2604
2605 if (HAS_DDI(i915)) {
2606 const struct intel_bios_encoder_data *devdata;
2607
2608 devdata = intel_bios_encoder_data_lookup(i915, port);
2609
2610 return devdata && intel_bios_encoder_supports_edp(devdata);
2611 }
2612
2613 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2614 child = &devdata->child;
2615
2616 if (child->dvo_port == port_mapping[port] &&
2617 (child->device_type & DEVICE_TYPE_eDP_BITS) ==
2618 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
2619 return true;
2620 }
2621
2622 return false;
2623}
2624
2625static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
2626 enum port port)
2627{
2628 static const struct {
2629 u16 dp, hdmi;
2630 } port_mapping[] = {
2631 /*
2632 * Buggy VBTs may declare DP ports as having
2633 * HDMI type dvo_port :( So let's check both.
2634 */
2635 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2636 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2637 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2638 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2639 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2640 };
2641
2642 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
2643 return false;
2644
2645 if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
2646 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
2647 return false;
2648
2649 if (child->dvo_port == port_mapping[port].dp)
2650 return true;
2651
2652 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
2653 if (child->dvo_port == port_mapping[port].hdmi &&
2654 child->aux_channel != 0)
2655 return true;
2656
2657 return false;
2658}
2659
2660bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *i915,
2661 enum port port)
2662{
2663 const struct intel_bios_encoder_data *devdata;
2664
2665 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2666 if (child_dev_is_dp_dual_mode(&devdata->child, port))
2667 return true;
2668 }
2669
2670 return false;
2671}
2672
2673/**
2674 * intel_bios_is_dsi_present - is DSI present in VBT
2675 * @i915: i915 device instance
2676 * @port: port for DSI if present
2677 *
2678 * Return true if DSI is present, and return the port in %port.
2679 */
2680bool intel_bios_is_dsi_present(struct drm_i915_private *i915,
2681 enum port *port)
2682{
2683 const struct intel_bios_encoder_data *devdata;
2684 const struct child_device_config *child;
2685 u8 dvo_port;
2686
2687 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2688 child = &devdata->child;
2689
2690 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2691 continue;
2692
2693 dvo_port = child->dvo_port;
2694
2695 if (dvo_port == DVO_PORT_MIPIA ||
2696 (dvo_port == DVO_PORT_MIPIB && DISPLAY_VER(i915) >= 11) ||
2697 (dvo_port == DVO_PORT_MIPIC && DISPLAY_VER(i915) < 11)) {
2698 if (port)
2699 *port = dvo_port - DVO_PORT_MIPIA;
2700 return true;
2701 } else if (dvo_port == DVO_PORT_MIPIB ||
2702 dvo_port == DVO_PORT_MIPIC ||
2703 dvo_port == DVO_PORT_MIPID) {
2704 drm_dbg_kms(&i915->drm,
2705 "VBT has unsupported DSI port %c\n",
2706 port_name(dvo_port - DVO_PORT_MIPIA));
2707 }
2708 }
2709
2710 return false;
2711}
2712
2713static void fill_dsc(struct intel_crtc_state *crtc_state,
2714 struct dsc_compression_parameters_entry *dsc,
2715 int dsc_max_bpc)
2716{
2717 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
2718 int bpc = 8;
2719
2720 vdsc_cfg->dsc_version_major = dsc->version_major;
2721 vdsc_cfg->dsc_version_minor = dsc->version_minor;
2722
2723 if (dsc->support_12bpc && dsc_max_bpc >= 12)
2724 bpc = 12;
2725 else if (dsc->support_10bpc && dsc_max_bpc >= 10)
2726 bpc = 10;
2727 else if (dsc->support_8bpc && dsc_max_bpc >= 8)
2728 bpc = 8;
2729 else
2730 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n",
2731 dsc_max_bpc);
2732
2733 crtc_state->pipe_bpp = bpc * 3;
2734
2735 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp,
2736 VBT_DSC_MAX_BPP(dsc->max_bpp));
2737
2738 /*
2739 * FIXME: This is ugly, and slice count should take DSC engine
2740 * throughput etc. into account.
2741 *
2742 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
2743 */
2744 if (dsc->slices_per_line & BIT(2)) {
2745 crtc_state->dsc.slice_count = 4;
2746 } else if (dsc->slices_per_line & BIT(1)) {
2747 crtc_state->dsc.slice_count = 2;
2748 } else {
2749 /* FIXME */
2750 if (!(dsc->slices_per_line & BIT(0)))
2751 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n");
2752
2753 crtc_state->dsc.slice_count = 1;
2754 }
2755
2756 if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
2757 crtc_state->dsc.slice_count != 0)
2758 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n",
2759 crtc_state->hw.adjusted_mode.crtc_hdisplay,
2760 crtc_state->dsc.slice_count);
2761
2762 /*
2763 * The VBT rc_buffer_block_size and rc_buffer_size definitions
2764 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63.
2765 */
2766 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size,
2767 dsc->rc_buffer_size);
2768
2769 /* FIXME: DSI spec says bpc + 1 for this one */
2770 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
2771
2772 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
2773
2774 vdsc_cfg->slice_height = dsc->slice_height;
2775}
2776
2777/* FIXME: initially DSI specific */
2778bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
2779 struct intel_crtc_state *crtc_state,
2780 int dsc_max_bpc)
2781{
2782 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2783 const struct intel_bios_encoder_data *devdata;
2784 const struct child_device_config *child;
2785
2786 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2787 child = &devdata->child;
2788
2789 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2790 continue;
2791
2792 if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) {
2793 if (!devdata->dsc)
2794 return false;
2795
2796 if (crtc_state)
2797 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
2798
2799 return true;
2800 }
2801 }
2802
2803 return false;
2804}
2805
2806/**
2807 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
2808 * @i915: i915 device instance
2809 * @port: port to check
2810 *
2811 * Return true if HPD should be inverted for %port.
2812 */
2813bool
2814intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
2815 enum port port)
2816{
2817 const struct intel_bios_encoder_data *devdata =
2818 i915->vbt.ddi_port_info[port].devdata;
2819
2820 if (drm_WARN_ON_ONCE(&i915->drm,
2821 !IS_GEMINILAKE(i915) && !IS_BROXTON(i915)))
2822 return false;
2823
2824 return devdata && devdata->child.hpd_invert;
2825}
2826
2827/**
2828 * intel_bios_is_lspcon_present - if LSPCON is attached on %port
2829 * @i915: i915 device instance
2830 * @port: port to check
2831 *
2832 * Return true if LSPCON is present on this port
2833 */
2834bool
2835intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
2836 enum port port)
2837{
2838 const struct intel_bios_encoder_data *devdata =
2839 i915->vbt.ddi_port_info[port].devdata;
2840
2841 return HAS_LSPCON(i915) && devdata && devdata->child.lspcon;
2842}
2843
2844/**
2845 * intel_bios_is_lane_reversal_needed - if lane reversal needed on port
2846 * @i915: i915 device instance
2847 * @port: port to check
2848 *
2849 * Return true if port requires lane reversal
2850 */
2851bool
2852intel_bios_is_lane_reversal_needed(const struct drm_i915_private *i915,
2853 enum port port)
2854{
2855 const struct intel_bios_encoder_data *devdata =
2856 i915->vbt.ddi_port_info[port].devdata;
2857
2858 return devdata && devdata->child.lane_reversal;
2859}
2860
2861enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
2862 enum port port)
2863{
2864 const struct ddi_vbt_port_info *info =
2865 &i915->vbt.ddi_port_info[port];
2866 enum aux_ch aux_ch;
2867
2868 if (!info->alternate_aux_channel) {
2869 aux_ch = (enum aux_ch)port;
2870
2871 drm_dbg_kms(&i915->drm,
2872 "using AUX %c for port %c (platform default)\n",
2873 aux_ch_name(aux_ch), port_name(port));
2874 return aux_ch;
2875 }
2876
2877 /*
2878 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
2879 * map to DDI A,B,TC1,TC2 respectively.
2880 *
2881 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
2882 * map to DDI A,TC1,TC2,TC3,TC4 respectively.
2883 */
2884 switch (info->alternate_aux_channel) {
2885 case DP_AUX_A:
2886 aux_ch = AUX_CH_A;
2887 break;
2888 case DP_AUX_B:
2889 if (IS_ALDERLAKE_S(i915))
2890 aux_ch = AUX_CH_USBC1;
2891 else
2892 aux_ch = AUX_CH_B;
2893 break;
2894 case DP_AUX_C:
2895 if (IS_ALDERLAKE_S(i915))
2896 aux_ch = AUX_CH_USBC2;
2897 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
2898 aux_ch = AUX_CH_USBC1;
2899 else
2900 aux_ch = AUX_CH_C;
2901 break;
2902 case DP_AUX_D:
2903 if (DISPLAY_VER(i915) == 13)
2904 aux_ch = AUX_CH_D_XELPD;
2905 else if (IS_ALDERLAKE_S(i915))
2906 aux_ch = AUX_CH_USBC3;
2907 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
2908 aux_ch = AUX_CH_USBC2;
2909 else
2910 aux_ch = AUX_CH_D;
2911 break;
2912 case DP_AUX_E:
2913 if (DISPLAY_VER(i915) == 13)
2914 aux_ch = AUX_CH_E_XELPD;
2915 else if (IS_ALDERLAKE_S(i915))
2916 aux_ch = AUX_CH_USBC4;
2917 else
2918 aux_ch = AUX_CH_E;
2919 break;
2920 case DP_AUX_F:
2921 if (DISPLAY_VER(i915) == 13)
2922 aux_ch = AUX_CH_USBC1;
2923 else
2924 aux_ch = AUX_CH_F;
2925 break;
2926 case DP_AUX_G:
2927 if (DISPLAY_VER(i915) == 13)
2928 aux_ch = AUX_CH_USBC2;
2929 else
2930 aux_ch = AUX_CH_G;
2931 break;
2932 case DP_AUX_H:
2933 if (DISPLAY_VER(i915) == 13)
2934 aux_ch = AUX_CH_USBC3;
2935 else
2936 aux_ch = AUX_CH_H;
2937 break;
2938 case DP_AUX_I:
2939 if (DISPLAY_VER(i915) == 13)
2940 aux_ch = AUX_CH_USBC4;
2941 else
2942 aux_ch = AUX_CH_I;
2943 break;
2944 default:
2945 MISSING_CASE(info->alternate_aux_channel);
2946 aux_ch = AUX_CH_A;
2947 break;
2948 }
2949
2950 drm_dbg_kms(&i915->drm, "using AUX %c for port %c (VBT)\n",
2951 aux_ch_name(aux_ch), port_name(port));
2952
2953 return aux_ch;
2954}
2955
2956int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
2957{
2958 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2959
2960 return i915->vbt.ddi_port_info[encoder->port].max_tmds_clock;
2961}
2962
2963int intel_bios_hdmi_level_shift(struct intel_encoder *encoder)
2964{
2965 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2966 const struct ddi_vbt_port_info *info =
2967 &i915->vbt.ddi_port_info[encoder->port];
2968
2969 return info->hdmi_level_shift_set ? info->hdmi_level_shift : -1;
2970}
2971
2972int intel_bios_encoder_dp_boost_level(const struct intel_bios_encoder_data *devdata)
2973{
2974 if (!devdata || devdata->i915->vbt.version < 196 || !devdata->child.iboost)
2975 return 0;
2976
2977 return translate_iboost(devdata->child.dp_iboost_level);
2978}
2979
2980int intel_bios_encoder_hdmi_boost_level(const struct intel_bios_encoder_data *devdata)
2981{
2982 if (!devdata || devdata->i915->vbt.version < 196 || !devdata->child.iboost)
2983 return 0;
2984
2985 return translate_iboost(devdata->child.hdmi_iboost_level);
2986}
2987
2988int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
2989{
2990 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2991
2992 return i915->vbt.ddi_port_info[encoder->port].dp_max_link_rate;
2993}
2994
2995int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
2996{
2997 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2998
2999 return i915->vbt.ddi_port_info[encoder->port].alternate_ddc_pin;
3000}
3001
3002bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata)
3003{
3004 return devdata->i915->vbt.version >= 195 && devdata->child.dp_usb_type_c;
3005}
3006
3007bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata)
3008{
3009 return devdata->i915->vbt.version >= 209 && devdata->child.tbt;
3010}
3011
3012const struct intel_bios_encoder_data *
3013intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port)
3014{
3015 return i915->vbt.ddi_port_info[port].devdata;
3016}
1/*
2 * Copyright © 2006 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28#include <drm/display/drm_dp_helper.h>
29#include <drm/display/drm_dsc_helper.h>
30#include <drm/drm_edid.h>
31
32#include "i915_drv.h"
33#include "i915_reg.h"
34#include "intel_display.h"
35#include "intel_display_types.h"
36#include "intel_gmbus.h"
37
38#define _INTEL_BIOS_PRIVATE
39#include "intel_vbt_defs.h"
40
41/**
42 * DOC: Video BIOS Table (VBT)
43 *
44 * The Video BIOS Table, or VBT, provides platform and board specific
45 * configuration information to the driver that is not discoverable or available
46 * through other means. The configuration is mostly related to display
47 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
48 * the PCI ROM.
49 *
50 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
51 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
52 * contain the actual configuration information. The VBT Header, and thus the
53 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
54 * BDB Header. The data blocks are concatenated after the BDB Header. The data
55 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
56 * data. (Block 53, the MIPI Sequence Block is an exception.)
57 *
58 * The driver parses the VBT during load. The relevant information is stored in
59 * driver private data for ease of use, and the actual VBT is not read after
60 * that.
61 */
62
63/* Wrapper for VBT child device config */
64struct intel_bios_encoder_data {
65 struct drm_i915_private *i915;
66
67 struct child_device_config child;
68 struct dsc_compression_parameters_entry *dsc;
69 struct list_head node;
70};
71
72#define SLAVE_ADDR1 0x70
73#define SLAVE_ADDR2 0x72
74
75/* Get BDB block size given a pointer to Block ID. */
76static u32 _get_blocksize(const u8 *block_base)
77{
78 /* The MIPI Sequence Block v3+ has a separate size field. */
79 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
80 return *((const u32 *)(block_base + 4));
81 else
82 return *((const u16 *)(block_base + 1));
83}
84
85/* Get BDB block size give a pointer to data after Block ID and Block Size. */
86static u32 get_blocksize(const void *block_data)
87{
88 return _get_blocksize(block_data - 3);
89}
90
91static const void *
92find_raw_section(const void *_bdb, enum bdb_block_id section_id)
93{
94 const struct bdb_header *bdb = _bdb;
95 const u8 *base = _bdb;
96 int index = 0;
97 u32 total, current_size;
98 enum bdb_block_id current_id;
99
100 /* skip to first section */
101 index += bdb->header_size;
102 total = bdb->bdb_size;
103
104 /* walk the sections looking for section_id */
105 while (index + 3 < total) {
106 current_id = *(base + index);
107 current_size = _get_blocksize(base + index);
108 index += 3;
109
110 if (index + current_size > total)
111 return NULL;
112
113 if (current_id == section_id)
114 return base + index;
115
116 index += current_size;
117 }
118
119 return NULL;
120}
121
122/*
123 * Offset from the start of BDB to the start of the
124 * block data (just past the block header).
125 */
126static u32 raw_block_offset(const void *bdb, enum bdb_block_id section_id)
127{
128 const void *block;
129
130 block = find_raw_section(bdb, section_id);
131 if (!block)
132 return 0;
133
134 return block - bdb;
135}
136
137struct bdb_block_entry {
138 struct list_head node;
139 enum bdb_block_id section_id;
140 u8 data[];
141};
142
143static const void *
144bdb_find_section(struct drm_i915_private *i915,
145 enum bdb_block_id section_id)
146{
147 struct bdb_block_entry *entry;
148
149 list_for_each_entry(entry, &i915->display.vbt.bdb_blocks, node) {
150 if (entry->section_id == section_id)
151 return entry->data + 3;
152 }
153
154 return NULL;
155}
156
157static const struct {
158 enum bdb_block_id section_id;
159 size_t min_size;
160} bdb_blocks[] = {
161 { .section_id = BDB_GENERAL_FEATURES,
162 .min_size = sizeof(struct bdb_general_features), },
163 { .section_id = BDB_GENERAL_DEFINITIONS,
164 .min_size = sizeof(struct bdb_general_definitions), },
165 { .section_id = BDB_PSR,
166 .min_size = sizeof(struct bdb_psr), },
167 { .section_id = BDB_DRIVER_FEATURES,
168 .min_size = sizeof(struct bdb_driver_features), },
169 { .section_id = BDB_SDVO_LVDS_OPTIONS,
170 .min_size = sizeof(struct bdb_sdvo_lvds_options), },
171 { .section_id = BDB_SDVO_PANEL_DTDS,
172 .min_size = sizeof(struct bdb_sdvo_panel_dtds), },
173 { .section_id = BDB_EDP,
174 .min_size = sizeof(struct bdb_edp), },
175 { .section_id = BDB_LVDS_OPTIONS,
176 .min_size = sizeof(struct bdb_lvds_options), },
177 /*
178 * BDB_LVDS_LFP_DATA depends on BDB_LVDS_LFP_DATA_PTRS,
179 * so keep the two ordered.
180 */
181 { .section_id = BDB_LVDS_LFP_DATA_PTRS,
182 .min_size = sizeof(struct bdb_lvds_lfp_data_ptrs), },
183 { .section_id = BDB_LVDS_LFP_DATA,
184 .min_size = 0, /* special case */ },
185 { .section_id = BDB_LVDS_BACKLIGHT,
186 .min_size = sizeof(struct bdb_lfp_backlight_data), },
187 { .section_id = BDB_LFP_POWER,
188 .min_size = sizeof(struct bdb_lfp_power), },
189 { .section_id = BDB_MIPI_CONFIG,
190 .min_size = sizeof(struct bdb_mipi_config), },
191 { .section_id = BDB_MIPI_SEQUENCE,
192 .min_size = sizeof(struct bdb_mipi_sequence) },
193 { .section_id = BDB_COMPRESSION_PARAMETERS,
194 .min_size = sizeof(struct bdb_compression_parameters), },
195 { .section_id = BDB_GENERIC_DTD,
196 .min_size = sizeof(struct bdb_generic_dtd), },
197};
198
199static size_t lfp_data_min_size(struct drm_i915_private *i915)
200{
201 const struct bdb_lvds_lfp_data_ptrs *ptrs;
202 size_t size;
203
204 ptrs = bdb_find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
205 if (!ptrs)
206 return 0;
207
208 size = sizeof(struct bdb_lvds_lfp_data);
209 if (ptrs->panel_name.table_size)
210 size = max(size, ptrs->panel_name.offset +
211 sizeof(struct bdb_lvds_lfp_data_tail));
212
213 return size;
214}
215
216static bool validate_lfp_data_ptrs(const void *bdb,
217 const struct bdb_lvds_lfp_data_ptrs *ptrs)
218{
219 int fp_timing_size, dvo_timing_size, panel_pnp_id_size, panel_name_size;
220 int data_block_size, lfp_data_size;
221 const void *data_block;
222 int i;
223
224 data_block = find_raw_section(bdb, BDB_LVDS_LFP_DATA);
225 if (!data_block)
226 return false;
227
228 data_block_size = get_blocksize(data_block);
229 if (data_block_size == 0)
230 return false;
231
232 /* always 3 indicating the presence of fp_timing+dvo_timing+panel_pnp_id */
233 if (ptrs->lvds_entries != 3)
234 return false;
235
236 fp_timing_size = ptrs->ptr[0].fp_timing.table_size;
237 dvo_timing_size = ptrs->ptr[0].dvo_timing.table_size;
238 panel_pnp_id_size = ptrs->ptr[0].panel_pnp_id.table_size;
239 panel_name_size = ptrs->panel_name.table_size;
240
241 /* fp_timing has variable size */
242 if (fp_timing_size < 32 ||
243 dvo_timing_size != sizeof(struct lvds_dvo_timing) ||
244 panel_pnp_id_size != sizeof(struct lvds_pnp_id))
245 return false;
246
247 /* panel_name is not present in old VBTs */
248 if (panel_name_size != 0 &&
249 panel_name_size != sizeof(struct lvds_lfp_panel_name))
250 return false;
251
252 lfp_data_size = ptrs->ptr[1].fp_timing.offset - ptrs->ptr[0].fp_timing.offset;
253 if (16 * lfp_data_size > data_block_size)
254 return false;
255
256 /* make sure the table entries have uniform size */
257 for (i = 1; i < 16; i++) {
258 if (ptrs->ptr[i].fp_timing.table_size != fp_timing_size ||
259 ptrs->ptr[i].dvo_timing.table_size != dvo_timing_size ||
260 ptrs->ptr[i].panel_pnp_id.table_size != panel_pnp_id_size)
261 return false;
262
263 if (ptrs->ptr[i].fp_timing.offset - ptrs->ptr[i-1].fp_timing.offset != lfp_data_size ||
264 ptrs->ptr[i].dvo_timing.offset - ptrs->ptr[i-1].dvo_timing.offset != lfp_data_size ||
265 ptrs->ptr[i].panel_pnp_id.offset - ptrs->ptr[i-1].panel_pnp_id.offset != lfp_data_size)
266 return false;
267 }
268
269 /*
270 * Except for vlv/chv machines all real VBTs seem to have 6
271 * unaccounted bytes in the fp_timing table. And it doesn't
272 * appear to be a really intentional hole as the fp_timing
273 * 0xffff terminator is always within those 6 missing bytes.
274 */
275 if (fp_timing_size + 6 + dvo_timing_size + panel_pnp_id_size == lfp_data_size)
276 fp_timing_size += 6;
277
278 if (fp_timing_size + dvo_timing_size + panel_pnp_id_size != lfp_data_size)
279 return false;
280
281 if (ptrs->ptr[0].fp_timing.offset + fp_timing_size != ptrs->ptr[0].dvo_timing.offset ||
282 ptrs->ptr[0].dvo_timing.offset + dvo_timing_size != ptrs->ptr[0].panel_pnp_id.offset ||
283 ptrs->ptr[0].panel_pnp_id.offset + panel_pnp_id_size != lfp_data_size)
284 return false;
285
286 /* make sure the tables fit inside the data block */
287 for (i = 0; i < 16; i++) {
288 if (ptrs->ptr[i].fp_timing.offset + fp_timing_size > data_block_size ||
289 ptrs->ptr[i].dvo_timing.offset + dvo_timing_size > data_block_size ||
290 ptrs->ptr[i].panel_pnp_id.offset + panel_pnp_id_size > data_block_size)
291 return false;
292 }
293
294 if (ptrs->panel_name.offset + 16 * panel_name_size > data_block_size)
295 return false;
296
297 /* make sure fp_timing terminators are present at expected locations */
298 for (i = 0; i < 16; i++) {
299 const u16 *t = data_block + ptrs->ptr[i].fp_timing.offset +
300 fp_timing_size - 2;
301
302 if (*t != 0xffff)
303 return false;
304 }
305
306 return true;
307}
308
309/* make the data table offsets relative to the data block */
310static bool fixup_lfp_data_ptrs(const void *bdb, void *ptrs_block)
311{
312 struct bdb_lvds_lfp_data_ptrs *ptrs = ptrs_block;
313 u32 offset;
314 int i;
315
316 offset = raw_block_offset(bdb, BDB_LVDS_LFP_DATA);
317
318 for (i = 0; i < 16; i++) {
319 if (ptrs->ptr[i].fp_timing.offset < offset ||
320 ptrs->ptr[i].dvo_timing.offset < offset ||
321 ptrs->ptr[i].panel_pnp_id.offset < offset)
322 return false;
323
324 ptrs->ptr[i].fp_timing.offset -= offset;
325 ptrs->ptr[i].dvo_timing.offset -= offset;
326 ptrs->ptr[i].panel_pnp_id.offset -= offset;
327 }
328
329 if (ptrs->panel_name.table_size) {
330 if (ptrs->panel_name.offset < offset)
331 return false;
332
333 ptrs->panel_name.offset -= offset;
334 }
335
336 return validate_lfp_data_ptrs(bdb, ptrs);
337}
338
339static int make_lfp_data_ptr(struct lvds_lfp_data_ptr_table *table,
340 int table_size, int total_size)
341{
342 if (total_size < table_size)
343 return total_size;
344
345 table->table_size = table_size;
346 table->offset = total_size - table_size;
347
348 return total_size - table_size;
349}
350
351static void next_lfp_data_ptr(struct lvds_lfp_data_ptr_table *next,
352 const struct lvds_lfp_data_ptr_table *prev,
353 int size)
354{
355 next->table_size = prev->table_size;
356 next->offset = prev->offset + size;
357}
358
359static void *generate_lfp_data_ptrs(struct drm_i915_private *i915,
360 const void *bdb)
361{
362 int i, size, table_size, block_size, offset, fp_timing_size;
363 struct bdb_lvds_lfp_data_ptrs *ptrs;
364 const void *block;
365 void *ptrs_block;
366
367 /*
368 * The hardcoded fp_timing_size is only valid for
369 * modernish VBTs. All older VBTs definitely should
370 * include block 41 and thus we don't need to
371 * generate one.
372 */
373 if (i915->display.vbt.version < 155)
374 return NULL;
375
376 fp_timing_size = 38;
377
378 block = find_raw_section(bdb, BDB_LVDS_LFP_DATA);
379 if (!block)
380 return NULL;
381
382 drm_dbg_kms(&i915->drm, "Generating LFP data table pointers\n");
383
384 block_size = get_blocksize(block);
385
386 size = fp_timing_size + sizeof(struct lvds_dvo_timing) +
387 sizeof(struct lvds_pnp_id);
388 if (size * 16 > block_size)
389 return NULL;
390
391 ptrs_block = kzalloc(sizeof(*ptrs) + 3, GFP_KERNEL);
392 if (!ptrs_block)
393 return NULL;
394
395 *(u8 *)(ptrs_block + 0) = BDB_LVDS_LFP_DATA_PTRS;
396 *(u16 *)(ptrs_block + 1) = sizeof(*ptrs);
397 ptrs = ptrs_block + 3;
398
399 table_size = sizeof(struct lvds_pnp_id);
400 size = make_lfp_data_ptr(&ptrs->ptr[0].panel_pnp_id, table_size, size);
401
402 table_size = sizeof(struct lvds_dvo_timing);
403 size = make_lfp_data_ptr(&ptrs->ptr[0].dvo_timing, table_size, size);
404
405 table_size = fp_timing_size;
406 size = make_lfp_data_ptr(&ptrs->ptr[0].fp_timing, table_size, size);
407
408 if (ptrs->ptr[0].fp_timing.table_size)
409 ptrs->lvds_entries++;
410 if (ptrs->ptr[0].dvo_timing.table_size)
411 ptrs->lvds_entries++;
412 if (ptrs->ptr[0].panel_pnp_id.table_size)
413 ptrs->lvds_entries++;
414
415 if (size != 0 || ptrs->lvds_entries != 3) {
416 kfree(ptrs_block);
417 return NULL;
418 }
419
420 size = fp_timing_size + sizeof(struct lvds_dvo_timing) +
421 sizeof(struct lvds_pnp_id);
422 for (i = 1; i < 16; i++) {
423 next_lfp_data_ptr(&ptrs->ptr[i].fp_timing, &ptrs->ptr[i-1].fp_timing, size);
424 next_lfp_data_ptr(&ptrs->ptr[i].dvo_timing, &ptrs->ptr[i-1].dvo_timing, size);
425 next_lfp_data_ptr(&ptrs->ptr[i].panel_pnp_id, &ptrs->ptr[i-1].panel_pnp_id, size);
426 }
427
428 table_size = sizeof(struct lvds_lfp_panel_name);
429
430 if (16 * (size + table_size) <= block_size) {
431 ptrs->panel_name.table_size = table_size;
432 ptrs->panel_name.offset = size * 16;
433 }
434
435 offset = block - bdb;
436
437 for (i = 0; i < 16; i++) {
438 ptrs->ptr[i].fp_timing.offset += offset;
439 ptrs->ptr[i].dvo_timing.offset += offset;
440 ptrs->ptr[i].panel_pnp_id.offset += offset;
441 }
442
443 if (ptrs->panel_name.table_size)
444 ptrs->panel_name.offset += offset;
445
446 return ptrs_block;
447}
448
449static void
450init_bdb_block(struct drm_i915_private *i915,
451 const void *bdb, enum bdb_block_id section_id,
452 size_t min_size)
453{
454 struct bdb_block_entry *entry;
455 void *temp_block = NULL;
456 const void *block;
457 size_t block_size;
458
459 block = find_raw_section(bdb, section_id);
460
461 /* Modern VBTs lack the LFP data table pointers block, make one up */
462 if (!block && section_id == BDB_LVDS_LFP_DATA_PTRS) {
463 temp_block = generate_lfp_data_ptrs(i915, bdb);
464 if (temp_block)
465 block = temp_block + 3;
466 }
467 if (!block)
468 return;
469
470 drm_WARN(&i915->drm, min_size == 0,
471 "Block %d min_size is zero\n", section_id);
472
473 block_size = get_blocksize(block);
474
475 /*
476 * Version number and new block size are considered
477 * part of the header for MIPI sequenece block v3+.
478 */
479 if (section_id == BDB_MIPI_SEQUENCE && *(const u8 *)block >= 3)
480 block_size += 5;
481
482 entry = kzalloc(struct_size(entry, data, max(min_size, block_size) + 3),
483 GFP_KERNEL);
484 if (!entry) {
485 kfree(temp_block);
486 return;
487 }
488
489 entry->section_id = section_id;
490 memcpy(entry->data, block - 3, block_size + 3);
491
492 kfree(temp_block);
493
494 drm_dbg_kms(&i915->drm, "Found BDB block %d (size %zu, min size %zu)\n",
495 section_id, block_size, min_size);
496
497 if (section_id == BDB_LVDS_LFP_DATA_PTRS &&
498 !fixup_lfp_data_ptrs(bdb, entry->data + 3)) {
499 drm_err(&i915->drm, "VBT has malformed LFP data table pointers\n");
500 kfree(entry);
501 return;
502 }
503
504 list_add_tail(&entry->node, &i915->display.vbt.bdb_blocks);
505}
506
507static void init_bdb_blocks(struct drm_i915_private *i915,
508 const void *bdb)
509{
510 int i;
511
512 for (i = 0; i < ARRAY_SIZE(bdb_blocks); i++) {
513 enum bdb_block_id section_id = bdb_blocks[i].section_id;
514 size_t min_size = bdb_blocks[i].min_size;
515
516 if (section_id == BDB_LVDS_LFP_DATA)
517 min_size = lfp_data_min_size(i915);
518
519 init_bdb_block(i915, bdb, section_id, min_size);
520 }
521}
522
523static void
524fill_detail_timing_data(struct drm_i915_private *i915,
525 struct drm_display_mode *panel_fixed_mode,
526 const struct lvds_dvo_timing *dvo_timing)
527{
528 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
529 dvo_timing->hactive_lo;
530 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
531 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
532 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
533 ((dvo_timing->hsync_pulse_width_hi << 8) |
534 dvo_timing->hsync_pulse_width_lo);
535 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
536 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
537
538 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
539 dvo_timing->vactive_lo;
540 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
541 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
542 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
543 ((dvo_timing->vsync_pulse_width_hi << 4) |
544 dvo_timing->vsync_pulse_width_lo);
545 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
546 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
547 panel_fixed_mode->clock = dvo_timing->clock * 10;
548 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
549
550 if (dvo_timing->hsync_positive)
551 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
552 else
553 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
554
555 if (dvo_timing->vsync_positive)
556 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
557 else
558 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
559
560 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
561 dvo_timing->himage_lo;
562 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
563 dvo_timing->vimage_lo;
564
565 /* Some VBTs have bogus h/vsync_end values */
566 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) {
567 drm_dbg_kms(&i915->drm, "reducing hsync_end %d->%d\n",
568 panel_fixed_mode->hsync_end, panel_fixed_mode->htotal);
569 panel_fixed_mode->hsync_end = panel_fixed_mode->htotal;
570 }
571 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) {
572 drm_dbg_kms(&i915->drm, "reducing vsync_end %d->%d\n",
573 panel_fixed_mode->vsync_end, panel_fixed_mode->vtotal);
574 panel_fixed_mode->vsync_end = panel_fixed_mode->vtotal;
575 }
576
577 drm_mode_set_name(panel_fixed_mode);
578}
579
580static const struct lvds_dvo_timing *
581get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *data,
582 const struct bdb_lvds_lfp_data_ptrs *ptrs,
583 int index)
584{
585 return (const void *)data + ptrs->ptr[index].dvo_timing.offset;
586}
587
588static const struct lvds_fp_timing *
589get_lvds_fp_timing(const struct bdb_lvds_lfp_data *data,
590 const struct bdb_lvds_lfp_data_ptrs *ptrs,
591 int index)
592{
593 return (const void *)data + ptrs->ptr[index].fp_timing.offset;
594}
595
596static const struct lvds_pnp_id *
597get_lvds_pnp_id(const struct bdb_lvds_lfp_data *data,
598 const struct bdb_lvds_lfp_data_ptrs *ptrs,
599 int index)
600{
601 return (const void *)data + ptrs->ptr[index].panel_pnp_id.offset;
602}
603
604static const struct bdb_lvds_lfp_data_tail *
605get_lfp_data_tail(const struct bdb_lvds_lfp_data *data,
606 const struct bdb_lvds_lfp_data_ptrs *ptrs)
607{
608 if (ptrs->panel_name.table_size)
609 return (const void *)data + ptrs->panel_name.offset;
610 else
611 return NULL;
612}
613
614static void dump_pnp_id(struct drm_i915_private *i915,
615 const struct lvds_pnp_id *pnp_id,
616 const char *name)
617{
618 u16 mfg_name = be16_to_cpu((__force __be16)pnp_id->mfg_name);
619 char vend[4];
620
621 drm_dbg_kms(&i915->drm, "%s PNPID mfg: %s (0x%x), prod: %u, serial: %u, week: %d, year: %d\n",
622 name, drm_edid_decode_mfg_id(mfg_name, vend),
623 pnp_id->mfg_name, pnp_id->product_code, pnp_id->serial,
624 pnp_id->mfg_week, pnp_id->mfg_year + 1990);
625}
626
627static int opregion_get_panel_type(struct drm_i915_private *i915,
628 const struct intel_bios_encoder_data *devdata,
629 const struct drm_edid *drm_edid, bool use_fallback)
630{
631 return intel_opregion_get_panel_type(i915);
632}
633
634static int vbt_get_panel_type(struct drm_i915_private *i915,
635 const struct intel_bios_encoder_data *devdata,
636 const struct drm_edid *drm_edid, bool use_fallback)
637{
638 const struct bdb_lvds_options *lvds_options;
639
640 lvds_options = bdb_find_section(i915, BDB_LVDS_OPTIONS);
641 if (!lvds_options)
642 return -1;
643
644 if (lvds_options->panel_type > 0xf &&
645 lvds_options->panel_type != 0xff) {
646 drm_dbg_kms(&i915->drm, "Invalid VBT panel type 0x%x\n",
647 lvds_options->panel_type);
648 return -1;
649 }
650
651 if (devdata && devdata->child.handle == DEVICE_HANDLE_LFP2)
652 return lvds_options->panel_type2;
653
654 drm_WARN_ON(&i915->drm, devdata && devdata->child.handle != DEVICE_HANDLE_LFP1);
655
656 return lvds_options->panel_type;
657}
658
659static int pnpid_get_panel_type(struct drm_i915_private *i915,
660 const struct intel_bios_encoder_data *devdata,
661 const struct drm_edid *drm_edid, bool use_fallback)
662{
663 const struct bdb_lvds_lfp_data *data;
664 const struct bdb_lvds_lfp_data_ptrs *ptrs;
665 const struct lvds_pnp_id *edid_id;
666 struct lvds_pnp_id edid_id_nodate;
667 const struct edid *edid = drm_edid_raw(drm_edid); /* FIXME */
668 int i, best = -1;
669
670 if (!edid)
671 return -1;
672
673 edid_id = (const void *)&edid->mfg_id[0];
674
675 edid_id_nodate = *edid_id;
676 edid_id_nodate.mfg_week = 0;
677 edid_id_nodate.mfg_year = 0;
678
679 dump_pnp_id(i915, edid_id, "EDID");
680
681 ptrs = bdb_find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
682 if (!ptrs)
683 return -1;
684
685 data = bdb_find_section(i915, BDB_LVDS_LFP_DATA);
686 if (!data)
687 return -1;
688
689 for (i = 0; i < 16; i++) {
690 const struct lvds_pnp_id *vbt_id =
691 get_lvds_pnp_id(data, ptrs, i);
692
693 /* full match? */
694 if (!memcmp(vbt_id, edid_id, sizeof(*vbt_id)))
695 return i;
696
697 /*
698 * Accept a match w/o date if no full match is found,
699 * and the VBT entry does not specify a date.
700 */
701 if (best < 0 &&
702 !memcmp(vbt_id, &edid_id_nodate, sizeof(*vbt_id)))
703 best = i;
704 }
705
706 return best;
707}
708
709static int fallback_get_panel_type(struct drm_i915_private *i915,
710 const struct intel_bios_encoder_data *devdata,
711 const struct drm_edid *drm_edid, bool use_fallback)
712{
713 return use_fallback ? 0 : -1;
714}
715
716enum panel_type {
717 PANEL_TYPE_OPREGION,
718 PANEL_TYPE_VBT,
719 PANEL_TYPE_PNPID,
720 PANEL_TYPE_FALLBACK,
721};
722
723static int get_panel_type(struct drm_i915_private *i915,
724 const struct intel_bios_encoder_data *devdata,
725 const struct drm_edid *drm_edid, bool use_fallback)
726{
727 struct {
728 const char *name;
729 int (*get_panel_type)(struct drm_i915_private *i915,
730 const struct intel_bios_encoder_data *devdata,
731 const struct drm_edid *drm_edid, bool use_fallback);
732 int panel_type;
733 } panel_types[] = {
734 [PANEL_TYPE_OPREGION] = {
735 .name = "OpRegion",
736 .get_panel_type = opregion_get_panel_type,
737 },
738 [PANEL_TYPE_VBT] = {
739 .name = "VBT",
740 .get_panel_type = vbt_get_panel_type,
741 },
742 [PANEL_TYPE_PNPID] = {
743 .name = "PNPID",
744 .get_panel_type = pnpid_get_panel_type,
745 },
746 [PANEL_TYPE_FALLBACK] = {
747 .name = "fallback",
748 .get_panel_type = fallback_get_panel_type,
749 },
750 };
751 int i;
752
753 for (i = 0; i < ARRAY_SIZE(panel_types); i++) {
754 panel_types[i].panel_type = panel_types[i].get_panel_type(i915, devdata,
755 drm_edid, use_fallback);
756
757 drm_WARN_ON(&i915->drm, panel_types[i].panel_type > 0xf &&
758 panel_types[i].panel_type != 0xff);
759
760 if (panel_types[i].panel_type >= 0)
761 drm_dbg_kms(&i915->drm, "Panel type (%s): %d\n",
762 panel_types[i].name, panel_types[i].panel_type);
763 }
764
765 if (panel_types[PANEL_TYPE_OPREGION].panel_type >= 0)
766 i = PANEL_TYPE_OPREGION;
767 else if (panel_types[PANEL_TYPE_VBT].panel_type == 0xff &&
768 panel_types[PANEL_TYPE_PNPID].panel_type >= 0)
769 i = PANEL_TYPE_PNPID;
770 else if (panel_types[PANEL_TYPE_VBT].panel_type != 0xff &&
771 panel_types[PANEL_TYPE_VBT].panel_type >= 0)
772 i = PANEL_TYPE_VBT;
773 else
774 i = PANEL_TYPE_FALLBACK;
775
776 drm_dbg_kms(&i915->drm, "Selected panel type (%s): %d\n",
777 panel_types[i].name, panel_types[i].panel_type);
778
779 return panel_types[i].panel_type;
780}
781
782static unsigned int panel_bits(unsigned int value, int panel_type, int num_bits)
783{
784 return (value >> (panel_type * num_bits)) & (BIT(num_bits) - 1);
785}
786
787static bool panel_bool(unsigned int value, int panel_type)
788{
789 return panel_bits(value, panel_type, 1);
790}
791
792/* Parse general panel options */
793static void
794parse_panel_options(struct drm_i915_private *i915,
795 struct intel_panel *panel)
796{
797 const struct bdb_lvds_options *lvds_options;
798 int panel_type = panel->vbt.panel_type;
799 int drrs_mode;
800
801 lvds_options = bdb_find_section(i915, BDB_LVDS_OPTIONS);
802 if (!lvds_options)
803 return;
804
805 panel->vbt.lvds_dither = lvds_options->pixel_dither;
806
807 /*
808 * Empirical evidence indicates the block size can be
809 * either 4,14,16,24+ bytes. For older VBTs no clear
810 * relationship between the block size vs. BDB version.
811 */
812 if (get_blocksize(lvds_options) < 16)
813 return;
814
815 drrs_mode = panel_bits(lvds_options->dps_panel_type_bits,
816 panel_type, 2);
817 /*
818 * VBT has static DRRS = 0 and seamless DRRS = 2.
819 * The below piece of code is required to adjust vbt.drrs_type
820 * to match the enum drrs_support_type.
821 */
822 switch (drrs_mode) {
823 case 0:
824 panel->vbt.drrs_type = DRRS_TYPE_STATIC;
825 drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n");
826 break;
827 case 2:
828 panel->vbt.drrs_type = DRRS_TYPE_SEAMLESS;
829 drm_dbg_kms(&i915->drm,
830 "DRRS supported mode is seamless\n");
831 break;
832 default:
833 panel->vbt.drrs_type = DRRS_TYPE_NONE;
834 drm_dbg_kms(&i915->drm,
835 "DRRS not supported (VBT input)\n");
836 break;
837 }
838}
839
840static void
841parse_lfp_panel_dtd(struct drm_i915_private *i915,
842 struct intel_panel *panel,
843 const struct bdb_lvds_lfp_data *lvds_lfp_data,
844 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs)
845{
846 const struct lvds_dvo_timing *panel_dvo_timing;
847 const struct lvds_fp_timing *fp_timing;
848 struct drm_display_mode *panel_fixed_mode;
849 int panel_type = panel->vbt.panel_type;
850
851 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
852 lvds_lfp_data_ptrs,
853 panel_type);
854
855 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
856 if (!panel_fixed_mode)
857 return;
858
859 fill_detail_timing_data(i915, panel_fixed_mode, panel_dvo_timing);
860
861 panel->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
862
863 drm_dbg_kms(&i915->drm,
864 "Found panel mode in BIOS VBT legacy lfp table: " DRM_MODE_FMT "\n",
865 DRM_MODE_ARG(panel_fixed_mode));
866
867 fp_timing = get_lvds_fp_timing(lvds_lfp_data,
868 lvds_lfp_data_ptrs,
869 panel_type);
870
871 /* check the resolution, just to be sure */
872 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
873 fp_timing->y_res == panel_fixed_mode->vdisplay) {
874 panel->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
875 drm_dbg_kms(&i915->drm,
876 "VBT initial LVDS value %x\n",
877 panel->vbt.bios_lvds_val);
878 }
879}
880
881static void
882parse_lfp_data(struct drm_i915_private *i915,
883 struct intel_panel *panel)
884{
885 const struct bdb_lvds_lfp_data *data;
886 const struct bdb_lvds_lfp_data_tail *tail;
887 const struct bdb_lvds_lfp_data_ptrs *ptrs;
888 const struct lvds_pnp_id *pnp_id;
889 int panel_type = panel->vbt.panel_type;
890
891 ptrs = bdb_find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
892 if (!ptrs)
893 return;
894
895 data = bdb_find_section(i915, BDB_LVDS_LFP_DATA);
896 if (!data)
897 return;
898
899 if (!panel->vbt.lfp_lvds_vbt_mode)
900 parse_lfp_panel_dtd(i915, panel, data, ptrs);
901
902 pnp_id = get_lvds_pnp_id(data, ptrs, panel_type);
903 dump_pnp_id(i915, pnp_id, "Panel");
904
905 tail = get_lfp_data_tail(data, ptrs);
906 if (!tail)
907 return;
908
909 drm_dbg_kms(&i915->drm, "Panel name: %.*s\n",
910 (int)sizeof(tail->panel_name[0].name),
911 tail->panel_name[panel_type].name);
912
913 if (i915->display.vbt.version >= 188) {
914 panel->vbt.seamless_drrs_min_refresh_rate =
915 tail->seamless_drrs_min_refresh_rate[panel_type];
916 drm_dbg_kms(&i915->drm,
917 "Seamless DRRS min refresh rate: %d Hz\n",
918 panel->vbt.seamless_drrs_min_refresh_rate);
919 }
920}
921
922static void
923parse_generic_dtd(struct drm_i915_private *i915,
924 struct intel_panel *panel)
925{
926 const struct bdb_generic_dtd *generic_dtd;
927 const struct generic_dtd_entry *dtd;
928 struct drm_display_mode *panel_fixed_mode;
929 int num_dtd;
930
931 /*
932 * Older VBTs provided DTD information for internal displays through
933 * the "LFP panel tables" block (42). As of VBT revision 229 the
934 * DTD information should be provided via a newer "generic DTD"
935 * block (58). Just to be safe, we'll try the new generic DTD block
936 * first on VBT >= 229, but still fall back to trying the old LFP
937 * block if that fails.
938 */
939 if (i915->display.vbt.version < 229)
940 return;
941
942 generic_dtd = bdb_find_section(i915, BDB_GENERIC_DTD);
943 if (!generic_dtd)
944 return;
945
946 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
947 drm_err(&i915->drm, "GDTD size %u is too small.\n",
948 generic_dtd->gdtd_size);
949 return;
950 } else if (generic_dtd->gdtd_size !=
951 sizeof(struct generic_dtd_entry)) {
952 drm_err(&i915->drm, "Unexpected GDTD size %u\n",
953 generic_dtd->gdtd_size);
954 /* DTD has unknown fields, but keep going */
955 }
956
957 num_dtd = (get_blocksize(generic_dtd) -
958 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
959 if (panel->vbt.panel_type >= num_dtd) {
960 drm_err(&i915->drm,
961 "Panel type %d not found in table of %d DTD's\n",
962 panel->vbt.panel_type, num_dtd);
963 return;
964 }
965
966 dtd = &generic_dtd->dtd[panel->vbt.panel_type];
967
968 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
969 if (!panel_fixed_mode)
970 return;
971
972 panel_fixed_mode->hdisplay = dtd->hactive;
973 panel_fixed_mode->hsync_start =
974 panel_fixed_mode->hdisplay + dtd->hfront_porch;
975 panel_fixed_mode->hsync_end =
976 panel_fixed_mode->hsync_start + dtd->hsync;
977 panel_fixed_mode->htotal =
978 panel_fixed_mode->hdisplay + dtd->hblank;
979
980 panel_fixed_mode->vdisplay = dtd->vactive;
981 panel_fixed_mode->vsync_start =
982 panel_fixed_mode->vdisplay + dtd->vfront_porch;
983 panel_fixed_mode->vsync_end =
984 panel_fixed_mode->vsync_start + dtd->vsync;
985 panel_fixed_mode->vtotal =
986 panel_fixed_mode->vdisplay + dtd->vblank;
987
988 panel_fixed_mode->clock = dtd->pixel_clock;
989 panel_fixed_mode->width_mm = dtd->width_mm;
990 panel_fixed_mode->height_mm = dtd->height_mm;
991
992 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
993 drm_mode_set_name(panel_fixed_mode);
994
995 if (dtd->hsync_positive_polarity)
996 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
997 else
998 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
999
1000 if (dtd->vsync_positive_polarity)
1001 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
1002 else
1003 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
1004
1005 drm_dbg_kms(&i915->drm,
1006 "Found panel mode in BIOS VBT generic dtd table: " DRM_MODE_FMT "\n",
1007 DRM_MODE_ARG(panel_fixed_mode));
1008
1009 panel->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
1010}
1011
1012static void
1013parse_lfp_backlight(struct drm_i915_private *i915,
1014 struct intel_panel *panel)
1015{
1016 const struct bdb_lfp_backlight_data *backlight_data;
1017 const struct lfp_backlight_data_entry *entry;
1018 int panel_type = panel->vbt.panel_type;
1019 u16 level;
1020
1021 backlight_data = bdb_find_section(i915, BDB_LVDS_BACKLIGHT);
1022 if (!backlight_data)
1023 return;
1024
1025 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
1026 drm_dbg_kms(&i915->drm,
1027 "Unsupported backlight data entry size %u\n",
1028 backlight_data->entry_size);
1029 return;
1030 }
1031
1032 entry = &backlight_data->data[panel_type];
1033
1034 panel->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
1035 if (!panel->vbt.backlight.present) {
1036 drm_dbg_kms(&i915->drm,
1037 "PWM backlight not present in VBT (type %u)\n",
1038 entry->type);
1039 return;
1040 }
1041
1042 panel->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
1043 panel->vbt.backlight.controller = 0;
1044 if (i915->display.vbt.version >= 191) {
1045 size_t exp_size;
1046
1047 if (i915->display.vbt.version >= 236)
1048 exp_size = sizeof(struct bdb_lfp_backlight_data);
1049 else if (i915->display.vbt.version >= 234)
1050 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234;
1051 else
1052 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191;
1053
1054 if (get_blocksize(backlight_data) >= exp_size) {
1055 const struct lfp_backlight_control_method *method;
1056
1057 method = &backlight_data->backlight_control[panel_type];
1058 panel->vbt.backlight.type = method->type;
1059 panel->vbt.backlight.controller = method->controller;
1060 }
1061 }
1062
1063 panel->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
1064 panel->vbt.backlight.active_low_pwm = entry->active_low_pwm;
1065
1066 if (i915->display.vbt.version >= 234) {
1067 u16 min_level;
1068 bool scale;
1069
1070 level = backlight_data->brightness_level[panel_type].level;
1071 min_level = backlight_data->brightness_min_level[panel_type].level;
1072
1073 if (i915->display.vbt.version >= 236)
1074 scale = backlight_data->brightness_precision_bits[panel_type] == 16;
1075 else
1076 scale = level > 255;
1077
1078 if (scale)
1079 min_level = min_level / 255;
1080
1081 if (min_level > 255) {
1082 drm_warn(&i915->drm, "Brightness min level > 255\n");
1083 level = 255;
1084 }
1085 panel->vbt.backlight.min_brightness = min_level;
1086
1087 panel->vbt.backlight.brightness_precision_bits =
1088 backlight_data->brightness_precision_bits[panel_type];
1089 } else {
1090 level = backlight_data->level[panel_type];
1091 panel->vbt.backlight.min_brightness = entry->min_brightness;
1092 }
1093
1094 if (i915->display.vbt.version >= 239)
1095 panel->vbt.backlight.hdr_dpcd_refresh_timeout =
1096 DIV_ROUND_UP(backlight_data->hdr_dpcd_refresh_timeout[panel_type], 100);
1097 else
1098 panel->vbt.backlight.hdr_dpcd_refresh_timeout = 30;
1099
1100 drm_dbg_kms(&i915->drm,
1101 "VBT backlight PWM modulation frequency %u Hz, "
1102 "active %s, min brightness %u, level %u, controller %u\n",
1103 panel->vbt.backlight.pwm_freq_hz,
1104 panel->vbt.backlight.active_low_pwm ? "low" : "high",
1105 panel->vbt.backlight.min_brightness,
1106 level,
1107 panel->vbt.backlight.controller);
1108}
1109
1110/* Try to find sdvo panel data */
1111static void
1112parse_sdvo_panel_data(struct drm_i915_private *i915,
1113 struct intel_panel *panel)
1114{
1115 const struct bdb_sdvo_panel_dtds *dtds;
1116 struct drm_display_mode *panel_fixed_mode;
1117 int index;
1118
1119 index = i915->display.params.vbt_sdvo_panel_type;
1120 if (index == -2) {
1121 drm_dbg_kms(&i915->drm,
1122 "Ignore SDVO panel mode from BIOS VBT tables.\n");
1123 return;
1124 }
1125
1126 if (index == -1) {
1127 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
1128
1129 sdvo_lvds_options = bdb_find_section(i915, BDB_SDVO_LVDS_OPTIONS);
1130 if (!sdvo_lvds_options)
1131 return;
1132
1133 index = sdvo_lvds_options->panel_type;
1134 }
1135
1136 dtds = bdb_find_section(i915, BDB_SDVO_PANEL_DTDS);
1137 if (!dtds)
1138 return;
1139
1140 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
1141 if (!panel_fixed_mode)
1142 return;
1143
1144 fill_detail_timing_data(i915, panel_fixed_mode, &dtds->dtds[index]);
1145
1146 panel->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
1147
1148 drm_dbg_kms(&i915->drm,
1149 "Found SDVO panel mode in BIOS VBT tables: " DRM_MODE_FMT "\n",
1150 DRM_MODE_ARG(panel_fixed_mode));
1151}
1152
1153static int intel_bios_ssc_frequency(struct drm_i915_private *i915,
1154 bool alternate)
1155{
1156 switch (DISPLAY_VER(i915)) {
1157 case 2:
1158 return alternate ? 66667 : 48000;
1159 case 3:
1160 case 4:
1161 return alternate ? 100000 : 96000;
1162 default:
1163 return alternate ? 100000 : 120000;
1164 }
1165}
1166
1167static void
1168parse_general_features(struct drm_i915_private *i915)
1169{
1170 const struct bdb_general_features *general;
1171
1172 general = bdb_find_section(i915, BDB_GENERAL_FEATURES);
1173 if (!general)
1174 return;
1175
1176 i915->display.vbt.int_tv_support = general->int_tv_support;
1177 /* int_crt_support can't be trusted on earlier platforms */
1178 if (i915->display.vbt.version >= 155 &&
1179 (HAS_DDI(i915) || IS_VALLEYVIEW(i915)))
1180 i915->display.vbt.int_crt_support = general->int_crt_support;
1181 i915->display.vbt.lvds_use_ssc = general->enable_ssc;
1182 i915->display.vbt.lvds_ssc_freq =
1183 intel_bios_ssc_frequency(i915, general->ssc_freq);
1184 i915->display.vbt.display_clock_mode = general->display_clock_mode;
1185 i915->display.vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
1186 if (i915->display.vbt.version >= 181) {
1187 i915->display.vbt.orientation = general->rotate_180 ?
1188 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
1189 DRM_MODE_PANEL_ORIENTATION_NORMAL;
1190 } else {
1191 i915->display.vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1192 }
1193
1194 if (i915->display.vbt.version >= 249 && general->afc_startup_config) {
1195 i915->display.vbt.override_afc_startup = true;
1196 i915->display.vbt.override_afc_startup_val = general->afc_startup_config == 0x1 ? 0x0 : 0x7;
1197 }
1198
1199 drm_dbg_kms(&i915->drm,
1200 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
1201 i915->display.vbt.int_tv_support,
1202 i915->display.vbt.int_crt_support,
1203 i915->display.vbt.lvds_use_ssc,
1204 i915->display.vbt.lvds_ssc_freq,
1205 i915->display.vbt.display_clock_mode,
1206 i915->display.vbt.fdi_rx_polarity_inverted);
1207}
1208
1209static const struct child_device_config *
1210child_device_ptr(const struct bdb_general_definitions *defs, int i)
1211{
1212 return (const void *) &defs->devices[i * defs->child_dev_size];
1213}
1214
1215static void
1216parse_sdvo_device_mapping(struct drm_i915_private *i915)
1217{
1218 const struct intel_bios_encoder_data *devdata;
1219 int count = 0;
1220
1221 /*
1222 * Only parse SDVO mappings on gens that could have SDVO. This isn't
1223 * accurate and doesn't have to be, as long as it's not too strict.
1224 */
1225 if (!IS_DISPLAY_VER(i915, 3, 7)) {
1226 drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n");
1227 return;
1228 }
1229
1230 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
1231 const struct child_device_config *child = &devdata->child;
1232 struct sdvo_device_mapping *mapping;
1233
1234 if (child->slave_addr != SLAVE_ADDR1 &&
1235 child->slave_addr != SLAVE_ADDR2) {
1236 /*
1237 * If the slave address is neither 0x70 nor 0x72,
1238 * it is not a SDVO device. Skip it.
1239 */
1240 continue;
1241 }
1242 if (child->dvo_port != DEVICE_PORT_DVOB &&
1243 child->dvo_port != DEVICE_PORT_DVOC) {
1244 /* skip the incorrect SDVO port */
1245 drm_dbg_kms(&i915->drm,
1246 "Incorrect SDVO port. Skip it\n");
1247 continue;
1248 }
1249 drm_dbg_kms(&i915->drm,
1250 "the SDVO device with slave addr %2x is found on"
1251 " %s port\n",
1252 child->slave_addr,
1253 (child->dvo_port == DEVICE_PORT_DVOB) ?
1254 "SDVOB" : "SDVOC");
1255 mapping = &i915->display.vbt.sdvo_mappings[child->dvo_port - 1];
1256 if (!mapping->initialized) {
1257 mapping->dvo_port = child->dvo_port;
1258 mapping->slave_addr = child->slave_addr;
1259 mapping->dvo_wiring = child->dvo_wiring;
1260 mapping->ddc_pin = child->ddc_pin;
1261 mapping->i2c_pin = child->i2c_pin;
1262 mapping->initialized = 1;
1263 drm_dbg_kms(&i915->drm,
1264 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
1265 mapping->dvo_port, mapping->slave_addr,
1266 mapping->dvo_wiring, mapping->ddc_pin,
1267 mapping->i2c_pin);
1268 } else {
1269 drm_dbg_kms(&i915->drm,
1270 "Maybe one SDVO port is shared by "
1271 "two SDVO device.\n");
1272 }
1273 if (child->slave2_addr) {
1274 /* Maybe this is a SDVO device with multiple inputs */
1275 /* And the mapping info is not added */
1276 drm_dbg_kms(&i915->drm,
1277 "there exists the slave2_addr. Maybe this"
1278 " is a SDVO device with multiple inputs.\n");
1279 }
1280 count++;
1281 }
1282
1283 if (!count) {
1284 /* No SDVO device info is found */
1285 drm_dbg_kms(&i915->drm,
1286 "No SDVO device info is found in VBT\n");
1287 }
1288}
1289
1290static void
1291parse_driver_features(struct drm_i915_private *i915)
1292{
1293 const struct bdb_driver_features *driver;
1294
1295 driver = bdb_find_section(i915, BDB_DRIVER_FEATURES);
1296 if (!driver)
1297 return;
1298
1299 if (DISPLAY_VER(i915) >= 5) {
1300 /*
1301 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
1302 * to mean "eDP". The VBT spec doesn't agree with that
1303 * interpretation, but real world VBTs seem to.
1304 */
1305 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
1306 i915->display.vbt.int_lvds_support = 0;
1307 } else {
1308 /*
1309 * FIXME it's not clear which BDB version has the LVDS config
1310 * bits defined. Revision history in the VBT spec says:
1311 * "0.92 | Add two definitions for VBT value of LVDS Active
1312 * Config (00b and 11b values defined) | 06/13/2005"
1313 * but does not the specify the BDB version.
1314 *
1315 * So far version 134 (on i945gm) is the oldest VBT observed
1316 * in the wild with the bits correctly populated. Version
1317 * 108 (on i85x) does not have the bits correctly populated.
1318 */
1319 if (i915->display.vbt.version >= 134 &&
1320 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
1321 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
1322 i915->display.vbt.int_lvds_support = 0;
1323 }
1324}
1325
1326static void
1327parse_panel_driver_features(struct drm_i915_private *i915,
1328 struct intel_panel *panel)
1329{
1330 const struct bdb_driver_features *driver;
1331
1332 driver = bdb_find_section(i915, BDB_DRIVER_FEATURES);
1333 if (!driver)
1334 return;
1335
1336 if (i915->display.vbt.version < 228) {
1337 drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n",
1338 driver->drrs_enabled);
1339 /*
1340 * If DRRS is not supported, drrs_type has to be set to 0.
1341 * This is because, VBT is configured in such a way that
1342 * static DRRS is 0 and DRRS not supported is represented by
1343 * driver->drrs_enabled=false
1344 */
1345 if (!driver->drrs_enabled && panel->vbt.drrs_type != DRRS_TYPE_NONE) {
1346 /*
1347 * FIXME Should DMRRS perhaps be treated as seamless
1348 * but without the automatic downclocking?
1349 */
1350 if (driver->dmrrs_enabled)
1351 panel->vbt.drrs_type = DRRS_TYPE_STATIC;
1352 else
1353 panel->vbt.drrs_type = DRRS_TYPE_NONE;
1354 }
1355
1356 panel->vbt.psr.enable = driver->psr_enabled;
1357 }
1358}
1359
1360static void
1361parse_power_conservation_features(struct drm_i915_private *i915,
1362 struct intel_panel *panel)
1363{
1364 const struct bdb_lfp_power *power;
1365 u8 panel_type = panel->vbt.panel_type;
1366
1367 panel->vbt.vrr = true; /* matches Windows behaviour */
1368
1369 if (i915->display.vbt.version < 228)
1370 return;
1371
1372 power = bdb_find_section(i915, BDB_LFP_POWER);
1373 if (!power)
1374 return;
1375
1376 panel->vbt.psr.enable = panel_bool(power->psr, panel_type);
1377
1378 /*
1379 * If DRRS is not supported, drrs_type has to be set to 0.
1380 * This is because, VBT is configured in such a way that
1381 * static DRRS is 0 and DRRS not supported is represented by
1382 * power->drrs & BIT(panel_type)=false
1383 */
1384 if (!panel_bool(power->drrs, panel_type) && panel->vbt.drrs_type != DRRS_TYPE_NONE) {
1385 /*
1386 * FIXME Should DMRRS perhaps be treated as seamless
1387 * but without the automatic downclocking?
1388 */
1389 if (panel_bool(power->dmrrs, panel_type))
1390 panel->vbt.drrs_type = DRRS_TYPE_STATIC;
1391 else
1392 panel->vbt.drrs_type = DRRS_TYPE_NONE;
1393 }
1394
1395 if (i915->display.vbt.version >= 232)
1396 panel->vbt.edp.hobl = panel_bool(power->hobl, panel_type);
1397
1398 if (i915->display.vbt.version >= 233)
1399 panel->vbt.vrr = panel_bool(power->vrr_feature_enabled,
1400 panel_type);
1401}
1402
1403static void
1404parse_edp(struct drm_i915_private *i915,
1405 struct intel_panel *panel)
1406{
1407 const struct bdb_edp *edp;
1408 const struct edp_power_seq *edp_pps;
1409 const struct edp_fast_link_params *edp_link_params;
1410 int panel_type = panel->vbt.panel_type;
1411
1412 edp = bdb_find_section(i915, BDB_EDP);
1413 if (!edp)
1414 return;
1415
1416 switch (panel_bits(edp->color_depth, panel_type, 2)) {
1417 case EDP_18BPP:
1418 panel->vbt.edp.bpp = 18;
1419 break;
1420 case EDP_24BPP:
1421 panel->vbt.edp.bpp = 24;
1422 break;
1423 case EDP_30BPP:
1424 panel->vbt.edp.bpp = 30;
1425 break;
1426 }
1427
1428 /* Get the eDP sequencing and link info */
1429 edp_pps = &edp->power_seqs[panel_type];
1430 edp_link_params = &edp->fast_link_params[panel_type];
1431
1432 panel->vbt.edp.pps = *edp_pps;
1433
1434 if (i915->display.vbt.version >= 224) {
1435 panel->vbt.edp.rate =
1436 edp->edp_fast_link_training_rate[panel_type] * 20;
1437 } else {
1438 switch (edp_link_params->rate) {
1439 case EDP_RATE_1_62:
1440 panel->vbt.edp.rate = 162000;
1441 break;
1442 case EDP_RATE_2_7:
1443 panel->vbt.edp.rate = 270000;
1444 break;
1445 case EDP_RATE_5_4:
1446 panel->vbt.edp.rate = 540000;
1447 break;
1448 default:
1449 drm_dbg_kms(&i915->drm,
1450 "VBT has unknown eDP link rate value %u\n",
1451 edp_link_params->rate);
1452 break;
1453 }
1454 }
1455
1456 switch (edp_link_params->lanes) {
1457 case EDP_LANE_1:
1458 panel->vbt.edp.lanes = 1;
1459 break;
1460 case EDP_LANE_2:
1461 panel->vbt.edp.lanes = 2;
1462 break;
1463 case EDP_LANE_4:
1464 panel->vbt.edp.lanes = 4;
1465 break;
1466 default:
1467 drm_dbg_kms(&i915->drm,
1468 "VBT has unknown eDP lane count value %u\n",
1469 edp_link_params->lanes);
1470 break;
1471 }
1472
1473 switch (edp_link_params->preemphasis) {
1474 case EDP_PREEMPHASIS_NONE:
1475 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
1476 break;
1477 case EDP_PREEMPHASIS_3_5dB:
1478 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
1479 break;
1480 case EDP_PREEMPHASIS_6dB:
1481 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
1482 break;
1483 case EDP_PREEMPHASIS_9_5dB:
1484 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
1485 break;
1486 default:
1487 drm_dbg_kms(&i915->drm,
1488 "VBT has unknown eDP pre-emphasis value %u\n",
1489 edp_link_params->preemphasis);
1490 break;
1491 }
1492
1493 switch (edp_link_params->vswing) {
1494 case EDP_VSWING_0_4V:
1495 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
1496 break;
1497 case EDP_VSWING_0_6V:
1498 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
1499 break;
1500 case EDP_VSWING_0_8V:
1501 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
1502 break;
1503 case EDP_VSWING_1_2V:
1504 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
1505 break;
1506 default:
1507 drm_dbg_kms(&i915->drm,
1508 "VBT has unknown eDP voltage swing value %u\n",
1509 edp_link_params->vswing);
1510 break;
1511 }
1512
1513 if (i915->display.vbt.version >= 173) {
1514 u8 vswing;
1515
1516 /* Don't read from VBT if module parameter has valid value*/
1517 if (i915->display.params.edp_vswing) {
1518 panel->vbt.edp.low_vswing =
1519 i915->display.params.edp_vswing == 1;
1520 } else {
1521 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
1522 panel->vbt.edp.low_vswing = vswing == 0;
1523 }
1524 }
1525
1526 panel->vbt.edp.drrs_msa_timing_delay =
1527 panel_bits(edp->sdrrs_msa_timing_delay, panel_type, 2);
1528
1529 if (i915->display.vbt.version >= 244)
1530 panel->vbt.edp.max_link_rate =
1531 edp->edp_max_port_link_rate[panel_type] * 20;
1532}
1533
1534static void
1535parse_psr(struct drm_i915_private *i915,
1536 struct intel_panel *panel)
1537{
1538 const struct bdb_psr *psr;
1539 const struct psr_table *psr_table;
1540 int panel_type = panel->vbt.panel_type;
1541
1542 psr = bdb_find_section(i915, BDB_PSR);
1543 if (!psr) {
1544 drm_dbg_kms(&i915->drm, "No PSR BDB found.\n");
1545 return;
1546 }
1547
1548 psr_table = &psr->psr_table[panel_type];
1549
1550 panel->vbt.psr.full_link = psr_table->full_link;
1551 panel->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
1552
1553 /* Allowed VBT values goes from 0 to 15 */
1554 panel->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
1555 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
1556
1557 /*
1558 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
1559 * Old decimal value is wake up time in multiples of 100 us.
1560 */
1561 if (i915->display.vbt.version >= 205 &&
1562 (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) {
1563 switch (psr_table->tp1_wakeup_time) {
1564 case 0:
1565 panel->vbt.psr.tp1_wakeup_time_us = 500;
1566 break;
1567 case 1:
1568 panel->vbt.psr.tp1_wakeup_time_us = 100;
1569 break;
1570 case 3:
1571 panel->vbt.psr.tp1_wakeup_time_us = 0;
1572 break;
1573 default:
1574 drm_dbg_kms(&i915->drm,
1575 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1576 psr_table->tp1_wakeup_time);
1577 fallthrough;
1578 case 2:
1579 panel->vbt.psr.tp1_wakeup_time_us = 2500;
1580 break;
1581 }
1582
1583 switch (psr_table->tp2_tp3_wakeup_time) {
1584 case 0:
1585 panel->vbt.psr.tp2_tp3_wakeup_time_us = 500;
1586 break;
1587 case 1:
1588 panel->vbt.psr.tp2_tp3_wakeup_time_us = 100;
1589 break;
1590 case 3:
1591 panel->vbt.psr.tp2_tp3_wakeup_time_us = 0;
1592 break;
1593 default:
1594 drm_dbg_kms(&i915->drm,
1595 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1596 psr_table->tp2_tp3_wakeup_time);
1597 fallthrough;
1598 case 2:
1599 panel->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
1600 break;
1601 }
1602 } else {
1603 panel->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
1604 panel->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
1605 }
1606
1607 if (i915->display.vbt.version >= 226) {
1608 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
1609
1610 wakeup_time = panel_bits(wakeup_time, panel_type, 2);
1611 switch (wakeup_time) {
1612 case 0:
1613 wakeup_time = 500;
1614 break;
1615 case 1:
1616 wakeup_time = 100;
1617 break;
1618 case 3:
1619 wakeup_time = 50;
1620 break;
1621 default:
1622 case 2:
1623 wakeup_time = 2500;
1624 break;
1625 }
1626 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
1627 } else {
1628 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */
1629 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = panel->vbt.psr.tp2_tp3_wakeup_time_us;
1630 }
1631}
1632
1633static void parse_dsi_backlight_ports(struct drm_i915_private *i915,
1634 struct intel_panel *panel,
1635 enum port port)
1636{
1637 enum port port_bc = DISPLAY_VER(i915) >= 11 ? PORT_B : PORT_C;
1638
1639 if (!panel->vbt.dsi.config->dual_link || i915->display.vbt.version < 197) {
1640 panel->vbt.dsi.bl_ports = BIT(port);
1641 if (panel->vbt.dsi.config->cabc_supported)
1642 panel->vbt.dsi.cabc_ports = BIT(port);
1643
1644 return;
1645 }
1646
1647 switch (panel->vbt.dsi.config->dl_dcs_backlight_ports) {
1648 case DL_DCS_PORT_A:
1649 panel->vbt.dsi.bl_ports = BIT(PORT_A);
1650 break;
1651 case DL_DCS_PORT_C:
1652 panel->vbt.dsi.bl_ports = BIT(port_bc);
1653 break;
1654 default:
1655 case DL_DCS_PORT_A_AND_C:
1656 panel->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(port_bc);
1657 break;
1658 }
1659
1660 if (!panel->vbt.dsi.config->cabc_supported)
1661 return;
1662
1663 switch (panel->vbt.dsi.config->dl_dcs_cabc_ports) {
1664 case DL_DCS_PORT_A:
1665 panel->vbt.dsi.cabc_ports = BIT(PORT_A);
1666 break;
1667 case DL_DCS_PORT_C:
1668 panel->vbt.dsi.cabc_ports = BIT(port_bc);
1669 break;
1670 default:
1671 case DL_DCS_PORT_A_AND_C:
1672 panel->vbt.dsi.cabc_ports =
1673 BIT(PORT_A) | BIT(port_bc);
1674 break;
1675 }
1676}
1677
1678static void
1679parse_mipi_config(struct drm_i915_private *i915,
1680 struct intel_panel *panel)
1681{
1682 const struct bdb_mipi_config *start;
1683 const struct mipi_config *config;
1684 const struct mipi_pps_data *pps;
1685 int panel_type = panel->vbt.panel_type;
1686 enum port port;
1687
1688 /* parse MIPI blocks only if LFP type is MIPI */
1689 if (!intel_bios_is_dsi_present(i915, &port))
1690 return;
1691
1692 /* Initialize this to undefined indicating no generic MIPI support */
1693 panel->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1694
1695 /* Block #40 is already parsed and panel_fixed_mode is
1696 * stored in i915->lfp_lvds_vbt_mode
1697 * resuse this when needed
1698 */
1699
1700 /* Parse #52 for panel index used from panel_type already
1701 * parsed
1702 */
1703 start = bdb_find_section(i915, BDB_MIPI_CONFIG);
1704 if (!start) {
1705 drm_dbg_kms(&i915->drm, "No MIPI config BDB found");
1706 return;
1707 }
1708
1709 drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n",
1710 panel_type);
1711
1712 /*
1713 * get hold of the correct configuration block and pps data as per
1714 * the panel_type as index
1715 */
1716 config = &start->config[panel_type];
1717 pps = &start->pps[panel_type];
1718
1719 /* store as of now full data. Trim when we realise all is not needed */
1720 panel->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1721 if (!panel->vbt.dsi.config)
1722 return;
1723
1724 panel->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1725 if (!panel->vbt.dsi.pps) {
1726 kfree(panel->vbt.dsi.config);
1727 return;
1728 }
1729
1730 parse_dsi_backlight_ports(i915, panel, port);
1731
1732 /* FIXME is the 90 vs. 270 correct? */
1733 switch (config->rotation) {
1734 case ENABLE_ROTATION_0:
1735 /*
1736 * Most (all?) VBTs claim 0 degrees despite having
1737 * an upside down panel, thus we do not trust this.
1738 */
1739 panel->vbt.dsi.orientation =
1740 DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1741 break;
1742 case ENABLE_ROTATION_90:
1743 panel->vbt.dsi.orientation =
1744 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1745 break;
1746 case ENABLE_ROTATION_180:
1747 panel->vbt.dsi.orientation =
1748 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1749 break;
1750 case ENABLE_ROTATION_270:
1751 panel->vbt.dsi.orientation =
1752 DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1753 break;
1754 }
1755
1756 /* We have mandatory mipi config blocks. Initialize as generic panel */
1757 panel->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1758}
1759
1760/* Find the sequence block and size for the given panel. */
1761static const u8 *
1762find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
1763 u16 panel_id, u32 *seq_size)
1764{
1765 u32 total = get_blocksize(sequence);
1766 const u8 *data = &sequence->data[0];
1767 u8 current_id;
1768 u32 current_size;
1769 int header_size = sequence->version >= 3 ? 5 : 3;
1770 int index = 0;
1771 int i;
1772
1773 /* skip new block size */
1774 if (sequence->version >= 3)
1775 data += 4;
1776
1777 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1778 if (index + header_size > total) {
1779 DRM_ERROR("Invalid sequence block (header)\n");
1780 return NULL;
1781 }
1782
1783 current_id = *(data + index);
1784 if (sequence->version >= 3)
1785 current_size = *((const u32 *)(data + index + 1));
1786 else
1787 current_size = *((const u16 *)(data + index + 1));
1788
1789 index += header_size;
1790
1791 if (index + current_size > total) {
1792 DRM_ERROR("Invalid sequence block\n");
1793 return NULL;
1794 }
1795
1796 if (current_id == panel_id) {
1797 *seq_size = current_size;
1798 return data + index;
1799 }
1800
1801 index += current_size;
1802 }
1803
1804 DRM_ERROR("Sequence block detected but no valid configuration\n");
1805
1806 return NULL;
1807}
1808
1809static int goto_next_sequence(const u8 *data, int index, int total)
1810{
1811 u16 len;
1812
1813 /* Skip Sequence Byte. */
1814 for (index = index + 1; index < total; index += len) {
1815 u8 operation_byte = *(data + index);
1816 index++;
1817
1818 switch (operation_byte) {
1819 case MIPI_SEQ_ELEM_END:
1820 return index;
1821 case MIPI_SEQ_ELEM_SEND_PKT:
1822 if (index + 4 > total)
1823 return 0;
1824
1825 len = *((const u16 *)(data + index + 2)) + 4;
1826 break;
1827 case MIPI_SEQ_ELEM_DELAY:
1828 len = 4;
1829 break;
1830 case MIPI_SEQ_ELEM_GPIO:
1831 len = 2;
1832 break;
1833 case MIPI_SEQ_ELEM_I2C:
1834 if (index + 7 > total)
1835 return 0;
1836 len = *(data + index + 6) + 7;
1837 break;
1838 default:
1839 DRM_ERROR("Unknown operation byte\n");
1840 return 0;
1841 }
1842 }
1843
1844 return 0;
1845}
1846
1847static int goto_next_sequence_v3(const u8 *data, int index, int total)
1848{
1849 int seq_end;
1850 u16 len;
1851 u32 size_of_sequence;
1852
1853 /*
1854 * Could skip sequence based on Size of Sequence alone, but also do some
1855 * checking on the structure.
1856 */
1857 if (total < 5) {
1858 DRM_ERROR("Too small sequence size\n");
1859 return 0;
1860 }
1861
1862 /* Skip Sequence Byte. */
1863 index++;
1864
1865 /*
1866 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1867 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1868 * byte.
1869 */
1870 size_of_sequence = *((const u32 *)(data + index));
1871 index += 4;
1872
1873 seq_end = index + size_of_sequence;
1874 if (seq_end > total) {
1875 DRM_ERROR("Invalid sequence size\n");
1876 return 0;
1877 }
1878
1879 for (; index < total; index += len) {
1880 u8 operation_byte = *(data + index);
1881 index++;
1882
1883 if (operation_byte == MIPI_SEQ_ELEM_END) {
1884 if (index != seq_end) {
1885 DRM_ERROR("Invalid element structure\n");
1886 return 0;
1887 }
1888 return index;
1889 }
1890
1891 len = *(data + index);
1892 index++;
1893
1894 /*
1895 * FIXME: Would be nice to check elements like for v1/v2 in
1896 * goto_next_sequence() above.
1897 */
1898 switch (operation_byte) {
1899 case MIPI_SEQ_ELEM_SEND_PKT:
1900 case MIPI_SEQ_ELEM_DELAY:
1901 case MIPI_SEQ_ELEM_GPIO:
1902 case MIPI_SEQ_ELEM_I2C:
1903 case MIPI_SEQ_ELEM_SPI:
1904 case MIPI_SEQ_ELEM_PMIC:
1905 break;
1906 default:
1907 DRM_ERROR("Unknown operation byte %u\n",
1908 operation_byte);
1909 break;
1910 }
1911 }
1912
1913 return 0;
1914}
1915
1916/*
1917 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1918 * skip all delay + gpio operands and stop at the first DSI packet op.
1919 */
1920static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915,
1921 struct intel_panel *panel)
1922{
1923 const u8 *data = panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1924 int index, len;
1925
1926 if (drm_WARN_ON(&i915->drm,
1927 !data || panel->vbt.dsi.seq_version != 1))
1928 return 0;
1929
1930 /* index = 1 to skip sequence byte */
1931 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1932 switch (data[index]) {
1933 case MIPI_SEQ_ELEM_SEND_PKT:
1934 return index == 1 ? 0 : index;
1935 case MIPI_SEQ_ELEM_DELAY:
1936 len = 5; /* 1 byte for operand + uint32 */
1937 break;
1938 case MIPI_SEQ_ELEM_GPIO:
1939 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1940 break;
1941 default:
1942 return 0;
1943 }
1944 }
1945
1946 return 0;
1947}
1948
1949/*
1950 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1951 * The deassert must be done before calling intel_dsi_device_ready, so for
1952 * these devices we split the init OTP sequence into a deassert sequence and
1953 * the actual init OTP part.
1954 */
1955static void fixup_mipi_sequences(struct drm_i915_private *i915,
1956 struct intel_panel *panel)
1957{
1958 u8 *init_otp;
1959 int len;
1960
1961 /* Limit this to VLV for now. */
1962 if (!IS_VALLEYVIEW(i915))
1963 return;
1964
1965 /* Limit this to v1 vid-mode sequences */
1966 if (panel->vbt.dsi.config->is_cmd_mode ||
1967 panel->vbt.dsi.seq_version != 1)
1968 return;
1969
1970 /* Only do this if there are otp and assert seqs and no deassert seq */
1971 if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1972 !panel->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1973 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1974 return;
1975
1976 /* The deassert-sequence ends at the first DSI packet */
1977 len = get_init_otp_deassert_fragment_len(i915, panel);
1978 if (!len)
1979 return;
1980
1981 drm_dbg_kms(&i915->drm,
1982 "Using init OTP fragment to deassert reset\n");
1983
1984 /* Copy the fragment, update seq byte and terminate it */
1985 init_otp = (u8 *)panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1986 panel->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1987 if (!panel->vbt.dsi.deassert_seq)
1988 return;
1989 panel->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1990 panel->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1991 /* Use the copy for deassert */
1992 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1993 panel->vbt.dsi.deassert_seq;
1994 /* Replace the last byte of the fragment with init OTP seq byte */
1995 init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1996 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1997 panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1998}
1999
2000static void
2001parse_mipi_sequence(struct drm_i915_private *i915,
2002 struct intel_panel *panel)
2003{
2004 int panel_type = panel->vbt.panel_type;
2005 const struct bdb_mipi_sequence *sequence;
2006 const u8 *seq_data;
2007 u32 seq_size;
2008 u8 *data;
2009 int index = 0;
2010
2011 /* Only our generic panel driver uses the sequence block. */
2012 if (panel->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
2013 return;
2014
2015 sequence = bdb_find_section(i915, BDB_MIPI_SEQUENCE);
2016 if (!sequence) {
2017 drm_dbg_kms(&i915->drm,
2018 "No MIPI Sequence found, parsing complete\n");
2019 return;
2020 }
2021
2022 /* Fail gracefully for forward incompatible sequence block. */
2023 if (sequence->version >= 4) {
2024 drm_err(&i915->drm,
2025 "Unable to parse MIPI Sequence Block v%u\n",
2026 sequence->version);
2027 return;
2028 }
2029
2030 drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n",
2031 sequence->version);
2032
2033 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
2034 if (!seq_data)
2035 return;
2036
2037 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
2038 if (!data)
2039 return;
2040
2041 /* Parse the sequences, store pointers to each sequence. */
2042 for (;;) {
2043 u8 seq_id = *(data + index);
2044 if (seq_id == MIPI_SEQ_END)
2045 break;
2046
2047 if (seq_id >= MIPI_SEQ_MAX) {
2048 drm_err(&i915->drm, "Unknown sequence %u\n",
2049 seq_id);
2050 goto err;
2051 }
2052
2053 /* Log about presence of sequences we won't run. */
2054 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
2055 drm_dbg_kms(&i915->drm,
2056 "Unsupported sequence %u\n", seq_id);
2057
2058 panel->vbt.dsi.sequence[seq_id] = data + index;
2059
2060 if (sequence->version >= 3)
2061 index = goto_next_sequence_v3(data, index, seq_size);
2062 else
2063 index = goto_next_sequence(data, index, seq_size);
2064 if (!index) {
2065 drm_err(&i915->drm, "Invalid sequence %u\n",
2066 seq_id);
2067 goto err;
2068 }
2069 }
2070
2071 panel->vbt.dsi.data = data;
2072 panel->vbt.dsi.size = seq_size;
2073 panel->vbt.dsi.seq_version = sequence->version;
2074
2075 fixup_mipi_sequences(i915, panel);
2076
2077 drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n");
2078 return;
2079
2080err:
2081 kfree(data);
2082 memset(panel->vbt.dsi.sequence, 0, sizeof(panel->vbt.dsi.sequence));
2083}
2084
2085static void
2086parse_compression_parameters(struct drm_i915_private *i915)
2087{
2088 const struct bdb_compression_parameters *params;
2089 struct intel_bios_encoder_data *devdata;
2090 u16 block_size;
2091 int index;
2092
2093 if (i915->display.vbt.version < 198)
2094 return;
2095
2096 params = bdb_find_section(i915, BDB_COMPRESSION_PARAMETERS);
2097 if (params) {
2098 /* Sanity checks */
2099 if (params->entry_size != sizeof(params->data[0])) {
2100 drm_dbg_kms(&i915->drm,
2101 "VBT: unsupported compression param entry size\n");
2102 return;
2103 }
2104
2105 block_size = get_blocksize(params);
2106 if (block_size < sizeof(*params)) {
2107 drm_dbg_kms(&i915->drm,
2108 "VBT: expected 16 compression param entries\n");
2109 return;
2110 }
2111 }
2112
2113 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
2114 const struct child_device_config *child = &devdata->child;
2115
2116 if (!child->compression_enable)
2117 continue;
2118
2119 if (!params) {
2120 drm_dbg_kms(&i915->drm,
2121 "VBT: compression params not available\n");
2122 continue;
2123 }
2124
2125 if (child->compression_method_cps) {
2126 drm_dbg_kms(&i915->drm,
2127 "VBT: CPS compression not supported\n");
2128 continue;
2129 }
2130
2131 index = child->compression_structure_index;
2132
2133 devdata->dsc = kmemdup(¶ms->data[index],
2134 sizeof(*devdata->dsc), GFP_KERNEL);
2135 }
2136}
2137
2138static u8 translate_iboost(u8 val)
2139{
2140 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
2141
2142 if (val >= ARRAY_SIZE(mapping)) {
2143 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
2144 return 0;
2145 }
2146 return mapping[val];
2147}
2148
2149static const u8 cnp_ddc_pin_map[] = {
2150 [0] = 0, /* N/A */
2151 [GMBUS_PIN_1_BXT] = DDC_BUS_DDI_B,
2152 [GMBUS_PIN_2_BXT] = DDC_BUS_DDI_C,
2153 [GMBUS_PIN_4_CNP] = DDC_BUS_DDI_D, /* sic */
2154 [GMBUS_PIN_3_BXT] = DDC_BUS_DDI_F, /* sic */
2155};
2156
2157static const u8 icp_ddc_pin_map[] = {
2158 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2159 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
2160 [GMBUS_PIN_3_BXT] = TGL_DDC_BUS_DDI_C,
2161 [GMBUS_PIN_9_TC1_ICP] = ICL_DDC_BUS_PORT_1,
2162 [GMBUS_PIN_10_TC2_ICP] = ICL_DDC_BUS_PORT_2,
2163 [GMBUS_PIN_11_TC3_ICP] = ICL_DDC_BUS_PORT_3,
2164 [GMBUS_PIN_12_TC4_ICP] = ICL_DDC_BUS_PORT_4,
2165 [GMBUS_PIN_13_TC5_TGP] = TGL_DDC_BUS_PORT_5,
2166 [GMBUS_PIN_14_TC6_TGP] = TGL_DDC_BUS_PORT_6,
2167};
2168
2169static const u8 rkl_pch_tgp_ddc_pin_map[] = {
2170 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2171 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
2172 [GMBUS_PIN_9_TC1_ICP] = RKL_DDC_BUS_DDI_D,
2173 [GMBUS_PIN_10_TC2_ICP] = RKL_DDC_BUS_DDI_E,
2174};
2175
2176static const u8 adls_ddc_pin_map[] = {
2177 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2178 [GMBUS_PIN_9_TC1_ICP] = ADLS_DDC_BUS_PORT_TC1,
2179 [GMBUS_PIN_10_TC2_ICP] = ADLS_DDC_BUS_PORT_TC2,
2180 [GMBUS_PIN_11_TC3_ICP] = ADLS_DDC_BUS_PORT_TC3,
2181 [GMBUS_PIN_12_TC4_ICP] = ADLS_DDC_BUS_PORT_TC4,
2182};
2183
2184static const u8 gen9bc_tgp_ddc_pin_map[] = {
2185 [GMBUS_PIN_2_BXT] = DDC_BUS_DDI_B,
2186 [GMBUS_PIN_9_TC1_ICP] = DDC_BUS_DDI_C,
2187 [GMBUS_PIN_10_TC2_ICP] = DDC_BUS_DDI_D,
2188};
2189
2190static const u8 adlp_ddc_pin_map[] = {
2191 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2192 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
2193 [GMBUS_PIN_9_TC1_ICP] = ADLP_DDC_BUS_PORT_TC1,
2194 [GMBUS_PIN_10_TC2_ICP] = ADLP_DDC_BUS_PORT_TC2,
2195 [GMBUS_PIN_11_TC3_ICP] = ADLP_DDC_BUS_PORT_TC3,
2196 [GMBUS_PIN_12_TC4_ICP] = ADLP_DDC_BUS_PORT_TC4,
2197};
2198
2199static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
2200{
2201 const u8 *ddc_pin_map;
2202 int i, n_entries;
2203
2204 if (IS_DGFX(i915))
2205 return vbt_pin;
2206
2207 if (INTEL_PCH_TYPE(i915) >= PCH_LNL || HAS_PCH_MTP(i915) ||
2208 IS_ALDERLAKE_P(i915)) {
2209 ddc_pin_map = adlp_ddc_pin_map;
2210 n_entries = ARRAY_SIZE(adlp_ddc_pin_map);
2211 } else if (IS_ALDERLAKE_S(i915)) {
2212 ddc_pin_map = adls_ddc_pin_map;
2213 n_entries = ARRAY_SIZE(adls_ddc_pin_map);
2214 } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
2215 ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
2216 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
2217 } else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) {
2218 ddc_pin_map = gen9bc_tgp_ddc_pin_map;
2219 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
2220 } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
2221 ddc_pin_map = icp_ddc_pin_map;
2222 n_entries = ARRAY_SIZE(icp_ddc_pin_map);
2223 } else if (HAS_PCH_CNP(i915)) {
2224 ddc_pin_map = cnp_ddc_pin_map;
2225 n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
2226 } else {
2227 /* Assuming direct map */
2228 return vbt_pin;
2229 }
2230
2231 for (i = 0; i < n_entries; i++) {
2232 if (ddc_pin_map[i] == vbt_pin)
2233 return i;
2234 }
2235
2236 drm_dbg_kms(&i915->drm,
2237 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
2238 vbt_pin);
2239 return 0;
2240}
2241
2242static u8 dvo_port_type(u8 dvo_port)
2243{
2244 switch (dvo_port) {
2245 case DVO_PORT_HDMIA:
2246 case DVO_PORT_HDMIB:
2247 case DVO_PORT_HDMIC:
2248 case DVO_PORT_HDMID:
2249 case DVO_PORT_HDMIE:
2250 case DVO_PORT_HDMIF:
2251 case DVO_PORT_HDMIG:
2252 case DVO_PORT_HDMIH:
2253 case DVO_PORT_HDMII:
2254 return DVO_PORT_HDMIA;
2255 case DVO_PORT_DPA:
2256 case DVO_PORT_DPB:
2257 case DVO_PORT_DPC:
2258 case DVO_PORT_DPD:
2259 case DVO_PORT_DPE:
2260 case DVO_PORT_DPF:
2261 case DVO_PORT_DPG:
2262 case DVO_PORT_DPH:
2263 case DVO_PORT_DPI:
2264 return DVO_PORT_DPA;
2265 case DVO_PORT_MIPIA:
2266 case DVO_PORT_MIPIB:
2267 case DVO_PORT_MIPIC:
2268 case DVO_PORT_MIPID:
2269 return DVO_PORT_MIPIA;
2270 default:
2271 return dvo_port;
2272 }
2273}
2274
2275static enum port __dvo_port_to_port(int n_ports, int n_dvo,
2276 const int port_mapping[][3], u8 dvo_port)
2277{
2278 enum port port;
2279 int i;
2280
2281 for (port = PORT_A; port < n_ports; port++) {
2282 for (i = 0; i < n_dvo; i++) {
2283 if (port_mapping[port][i] == -1)
2284 break;
2285
2286 if (dvo_port == port_mapping[port][i])
2287 return port;
2288 }
2289 }
2290
2291 return PORT_NONE;
2292}
2293
2294static enum port dvo_port_to_port(struct drm_i915_private *i915,
2295 u8 dvo_port)
2296{
2297 /*
2298 * Each DDI port can have more than one value on the "DVO Port" field,
2299 * so look for all the possible values for each port.
2300 */
2301 static const int port_mapping[][3] = {
2302 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2303 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2304 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2305 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2306 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
2307 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2308 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2309 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2310 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2311 };
2312 /*
2313 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
2314 * map to DDI A,B,TC1,TC2 respectively.
2315 */
2316 static const int rkl_port_mapping[][3] = {
2317 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2318 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2319 [PORT_C] = { -1 },
2320 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2321 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2322 };
2323 /*
2324 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E,
2325 * PORT_F and PORT_G, we need to map that to correct VBT sections.
2326 */
2327 static const int adls_port_mapping[][3] = {
2328 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2329 [PORT_B] = { -1 },
2330 [PORT_C] = { -1 },
2331 [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2332 [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2333 [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2334 [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2335 };
2336 static const int xelpd_port_mapping[][3] = {
2337 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2338 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2339 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2340 [PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2341 [PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2342 [PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2343 [PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2344 [PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2345 [PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2346 };
2347
2348 if (DISPLAY_VER(i915) >= 13)
2349 return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping),
2350 ARRAY_SIZE(xelpd_port_mapping[0]),
2351 xelpd_port_mapping,
2352 dvo_port);
2353 else if (IS_ALDERLAKE_S(i915))
2354 return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping),
2355 ARRAY_SIZE(adls_port_mapping[0]),
2356 adls_port_mapping,
2357 dvo_port);
2358 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
2359 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
2360 ARRAY_SIZE(rkl_port_mapping[0]),
2361 rkl_port_mapping,
2362 dvo_port);
2363 else
2364 return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
2365 ARRAY_SIZE(port_mapping[0]),
2366 port_mapping,
2367 dvo_port);
2368}
2369
2370static enum port
2371dsi_dvo_port_to_port(struct drm_i915_private *i915, u8 dvo_port)
2372{
2373 switch (dvo_port) {
2374 case DVO_PORT_MIPIA:
2375 return PORT_A;
2376 case DVO_PORT_MIPIC:
2377 if (DISPLAY_VER(i915) >= 11)
2378 return PORT_B;
2379 else
2380 return PORT_C;
2381 default:
2382 return PORT_NONE;
2383 }
2384}
2385
2386enum port intel_bios_encoder_port(const struct intel_bios_encoder_data *devdata)
2387{
2388 struct drm_i915_private *i915 = devdata->i915;
2389 const struct child_device_config *child = &devdata->child;
2390 enum port port;
2391
2392 port = dvo_port_to_port(i915, child->dvo_port);
2393 if (port == PORT_NONE && DISPLAY_VER(i915) >= 11)
2394 port = dsi_dvo_port_to_port(i915, child->dvo_port);
2395
2396 return port;
2397}
2398
2399static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate)
2400{
2401 switch (vbt_max_link_rate) {
2402 default:
2403 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF:
2404 return 0;
2405 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20:
2406 return 2000000;
2407 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5:
2408 return 1350000;
2409 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10:
2410 return 1000000;
2411 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3:
2412 return 810000;
2413 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2:
2414 return 540000;
2415 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR:
2416 return 270000;
2417 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR:
2418 return 162000;
2419 }
2420}
2421
2422static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
2423{
2424 switch (vbt_max_link_rate) {
2425 default:
2426 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3:
2427 return 810000;
2428 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2:
2429 return 540000;
2430 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR:
2431 return 270000;
2432 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR:
2433 return 162000;
2434 }
2435}
2436
2437int intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata)
2438{
2439 if (!devdata || devdata->i915->display.vbt.version < 216)
2440 return 0;
2441
2442 if (devdata->i915->display.vbt.version >= 230)
2443 return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate);
2444 else
2445 return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate);
2446}
2447
2448int intel_bios_dp_max_lane_count(const struct intel_bios_encoder_data *devdata)
2449{
2450 if (!devdata || devdata->i915->display.vbt.version < 244)
2451 return 0;
2452
2453 return devdata->child.dp_max_lane_count + 1;
2454}
2455
2456static void sanitize_device_type(struct intel_bios_encoder_data *devdata,
2457 enum port port)
2458{
2459 struct drm_i915_private *i915 = devdata->i915;
2460 bool is_hdmi;
2461
2462 if (port != PORT_A || DISPLAY_VER(i915) >= 12)
2463 return;
2464
2465 if (!intel_bios_encoder_supports_dvi(devdata))
2466 return;
2467
2468 is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2469
2470 drm_dbg_kms(&i915->drm, "VBT claims port A supports DVI%s, ignoring\n",
2471 is_hdmi ? "/HDMI" : "");
2472
2473 devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
2474 devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
2475}
2476
2477static void sanitize_hdmi_level_shift(struct intel_bios_encoder_data *devdata,
2478 enum port port)
2479{
2480 struct drm_i915_private *i915 = devdata->i915;
2481
2482 if (!intel_bios_encoder_supports_dvi(devdata))
2483 return;
2484
2485 /*
2486 * Some BDW machines (eg. HP Pavilion 15-ab) shipped
2487 * with a HSW VBT where the level shifter value goes
2488 * up to 11, whereas the BDW max is 9.
2489 */
2490 if (IS_BROADWELL(i915) && devdata->child.hdmi_level_shifter_value > 9) {
2491 drm_dbg_kms(&i915->drm, "Bogus port %c VBT HDMI level shift %d, adjusting to %d\n",
2492 port_name(port), devdata->child.hdmi_level_shifter_value, 9);
2493
2494 devdata->child.hdmi_level_shifter_value = 9;
2495 }
2496}
2497
2498static bool
2499intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata)
2500{
2501 return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
2502}
2503
2504bool
2505intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata)
2506{
2507 return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
2508}
2509
2510bool
2511intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata)
2512{
2513 return intel_bios_encoder_supports_dvi(devdata) &&
2514 (devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
2515}
2516
2517bool
2518intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata)
2519{
2520 return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2521}
2522
2523bool
2524intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata)
2525{
2526 return intel_bios_encoder_supports_dp(devdata) &&
2527 devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR;
2528}
2529
2530bool
2531intel_bios_encoder_supports_dsi(const struct intel_bios_encoder_data *devdata)
2532{
2533 return devdata->child.device_type & DEVICE_TYPE_MIPI_OUTPUT;
2534}
2535
2536bool
2537intel_bios_encoder_is_lspcon(const struct intel_bios_encoder_data *devdata)
2538{
2539 return devdata && HAS_LSPCON(devdata->i915) && devdata->child.lspcon;
2540}
2541
2542/* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */
2543int intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata)
2544{
2545 if (!devdata || devdata->i915->display.vbt.version < 158 ||
2546 DISPLAY_VER(devdata->i915) >= 14)
2547 return -1;
2548
2549 return devdata->child.hdmi_level_shifter_value;
2550}
2551
2552int intel_bios_hdmi_max_tmds_clock(const struct intel_bios_encoder_data *devdata)
2553{
2554 if (!devdata || devdata->i915->display.vbt.version < 204)
2555 return 0;
2556
2557 switch (devdata->child.hdmi_max_data_rate) {
2558 default:
2559 MISSING_CASE(devdata->child.hdmi_max_data_rate);
2560 fallthrough;
2561 case HDMI_MAX_DATA_RATE_PLATFORM:
2562 return 0;
2563 case HDMI_MAX_DATA_RATE_594:
2564 return 594000;
2565 case HDMI_MAX_DATA_RATE_340:
2566 return 340000;
2567 case HDMI_MAX_DATA_RATE_300:
2568 return 300000;
2569 case HDMI_MAX_DATA_RATE_297:
2570 return 297000;
2571 case HDMI_MAX_DATA_RATE_165:
2572 return 165000;
2573 }
2574}
2575
2576static bool is_port_valid(struct drm_i915_private *i915, enum port port)
2577{
2578 /*
2579 * On some ICL SKUs port F is not present, but broken VBTs mark
2580 * the port as present. Only try to initialize port F for the
2581 * SKUs that may actually have it.
2582 */
2583 if (port == PORT_F && IS_ICELAKE(i915))
2584 return IS_ICL_WITH_PORT_F(i915);
2585
2586 return true;
2587}
2588
2589static void print_ddi_port(const struct intel_bios_encoder_data *devdata)
2590{
2591 struct drm_i915_private *i915 = devdata->i915;
2592 const struct child_device_config *child = &devdata->child;
2593 bool is_dvi, is_hdmi, is_dp, is_edp, is_dsi, is_crt, supports_typec_usb, supports_tbt;
2594 int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
2595 enum port port;
2596
2597 port = intel_bios_encoder_port(devdata);
2598 if (port == PORT_NONE)
2599 return;
2600
2601 is_dvi = intel_bios_encoder_supports_dvi(devdata);
2602 is_dp = intel_bios_encoder_supports_dp(devdata);
2603 is_crt = intel_bios_encoder_supports_crt(devdata);
2604 is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2605 is_edp = intel_bios_encoder_supports_edp(devdata);
2606 is_dsi = intel_bios_encoder_supports_dsi(devdata);
2607
2608 supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata);
2609 supports_tbt = intel_bios_encoder_supports_tbt(devdata);
2610
2611 drm_dbg_kms(&i915->drm,
2612 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d DSI:%d DP++:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
2613 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, is_dsi,
2614 intel_bios_encoder_supports_dp_dual_mode(devdata),
2615 intel_bios_encoder_is_lspcon(devdata),
2616 supports_typec_usb, supports_tbt,
2617 devdata->dsc != NULL);
2618
2619 hdmi_level_shift = intel_bios_hdmi_level_shift(devdata);
2620 if (hdmi_level_shift >= 0) {
2621 drm_dbg_kms(&i915->drm,
2622 "Port %c VBT HDMI level shift: %d\n",
2623 port_name(port), hdmi_level_shift);
2624 }
2625
2626 max_tmds_clock = intel_bios_hdmi_max_tmds_clock(devdata);
2627 if (max_tmds_clock)
2628 drm_dbg_kms(&i915->drm,
2629 "Port %c VBT HDMI max TMDS clock: %d kHz\n",
2630 port_name(port), max_tmds_clock);
2631
2632 /* I_boost config for SKL and above */
2633 dp_boost_level = intel_bios_dp_boost_level(devdata);
2634 if (dp_boost_level)
2635 drm_dbg_kms(&i915->drm,
2636 "Port %c VBT (e)DP boost level: %d\n",
2637 port_name(port), dp_boost_level);
2638
2639 hdmi_boost_level = intel_bios_hdmi_boost_level(devdata);
2640 if (hdmi_boost_level)
2641 drm_dbg_kms(&i915->drm,
2642 "Port %c VBT HDMI boost level: %d\n",
2643 port_name(port), hdmi_boost_level);
2644
2645 dp_max_link_rate = intel_bios_dp_max_link_rate(devdata);
2646 if (dp_max_link_rate)
2647 drm_dbg_kms(&i915->drm,
2648 "Port %c VBT DP max link rate: %d\n",
2649 port_name(port), dp_max_link_rate);
2650
2651 /*
2652 * FIXME need to implement support for VBT
2653 * vswing/preemph tables should this ever trigger.
2654 */
2655 drm_WARN(&i915->drm, child->use_vbt_vswing,
2656 "Port %c asks to use VBT vswing/preemph tables\n",
2657 port_name(port));
2658}
2659
2660static void parse_ddi_port(struct intel_bios_encoder_data *devdata)
2661{
2662 struct drm_i915_private *i915 = devdata->i915;
2663 enum port port;
2664
2665 port = intel_bios_encoder_port(devdata);
2666 if (port == PORT_NONE)
2667 return;
2668
2669 if (!is_port_valid(i915, port)) {
2670 drm_dbg_kms(&i915->drm,
2671 "VBT reports port %c as supported, but that can't be true: skipping\n",
2672 port_name(port));
2673 return;
2674 }
2675
2676 sanitize_device_type(devdata, port);
2677 sanitize_hdmi_level_shift(devdata, port);
2678}
2679
2680static bool has_ddi_port_info(struct drm_i915_private *i915)
2681{
2682 return DISPLAY_VER(i915) >= 5 || IS_G4X(i915);
2683}
2684
2685static void parse_ddi_ports(struct drm_i915_private *i915)
2686{
2687 struct intel_bios_encoder_data *devdata;
2688
2689 if (!has_ddi_port_info(i915))
2690 return;
2691
2692 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node)
2693 parse_ddi_port(devdata);
2694
2695 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node)
2696 print_ddi_port(devdata);
2697}
2698
2699static void
2700parse_general_definitions(struct drm_i915_private *i915)
2701{
2702 const struct bdb_general_definitions *defs;
2703 struct intel_bios_encoder_data *devdata;
2704 const struct child_device_config *child;
2705 int i, child_device_num;
2706 u8 expected_size;
2707 u16 block_size;
2708 int bus_pin;
2709
2710 defs = bdb_find_section(i915, BDB_GENERAL_DEFINITIONS);
2711 if (!defs) {
2712 drm_dbg_kms(&i915->drm,
2713 "No general definition block is found, no devices defined.\n");
2714 return;
2715 }
2716
2717 block_size = get_blocksize(defs);
2718 if (block_size < sizeof(*defs)) {
2719 drm_dbg_kms(&i915->drm,
2720 "General definitions block too small (%u)\n",
2721 block_size);
2722 return;
2723 }
2724
2725 bus_pin = defs->crt_ddc_gmbus_pin;
2726 drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
2727 if (intel_gmbus_is_valid_pin(i915, bus_pin))
2728 i915->display.vbt.crt_ddc_pin = bus_pin;
2729
2730 if (i915->display.vbt.version < 106) {
2731 expected_size = 22;
2732 } else if (i915->display.vbt.version < 111) {
2733 expected_size = 27;
2734 } else if (i915->display.vbt.version < 195) {
2735 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
2736 } else if (i915->display.vbt.version == 195) {
2737 expected_size = 37;
2738 } else if (i915->display.vbt.version <= 215) {
2739 expected_size = 38;
2740 } else if (i915->display.vbt.version <= 250) {
2741 expected_size = 39;
2742 } else {
2743 expected_size = sizeof(*child);
2744 BUILD_BUG_ON(sizeof(*child) < 39);
2745 drm_dbg(&i915->drm,
2746 "Expected child device config size for VBT version %u not known; assuming %u\n",
2747 i915->display.vbt.version, expected_size);
2748 }
2749
2750 /* Flag an error for unexpected size, but continue anyway. */
2751 if (defs->child_dev_size != expected_size)
2752 drm_err(&i915->drm,
2753 "Unexpected child device config size %u (expected %u for VBT version %u)\n",
2754 defs->child_dev_size, expected_size, i915->display.vbt.version);
2755
2756 /* The legacy sized child device config is the minimum we need. */
2757 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
2758 drm_dbg_kms(&i915->drm,
2759 "Child device config size %u is too small.\n",
2760 defs->child_dev_size);
2761 return;
2762 }
2763
2764 /* get the number of child device */
2765 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
2766
2767 for (i = 0; i < child_device_num; i++) {
2768 child = child_device_ptr(defs, i);
2769 if (!child->device_type)
2770 continue;
2771
2772 drm_dbg_kms(&i915->drm,
2773 "Found VBT child device with type 0x%x\n",
2774 child->device_type);
2775
2776 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2777 if (!devdata)
2778 break;
2779
2780 devdata->i915 = i915;
2781
2782 /*
2783 * Copy as much as we know (sizeof) and is available
2784 * (child_dev_size) of the child device config. Accessing the
2785 * data must depend on VBT version.
2786 */
2787 memcpy(&devdata->child, child,
2788 min_t(size_t, defs->child_dev_size, sizeof(*child)));
2789
2790 list_add_tail(&devdata->node, &i915->display.vbt.display_devices);
2791 }
2792
2793 if (list_empty(&i915->display.vbt.display_devices))
2794 drm_dbg_kms(&i915->drm,
2795 "no child dev is parsed from VBT\n");
2796}
2797
2798/* Common defaults which may be overridden by VBT. */
2799static void
2800init_vbt_defaults(struct drm_i915_private *i915)
2801{
2802 i915->display.vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
2803
2804 /* general features */
2805 i915->display.vbt.int_tv_support = 1;
2806 i915->display.vbt.int_crt_support = 1;
2807
2808 /* driver features */
2809 i915->display.vbt.int_lvds_support = 1;
2810
2811 /* Default to using SSC */
2812 i915->display.vbt.lvds_use_ssc = 1;
2813 /*
2814 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
2815 * clock for LVDS.
2816 */
2817 i915->display.vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915,
2818 !HAS_PCH_SPLIT(i915));
2819 drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n",
2820 i915->display.vbt.lvds_ssc_freq);
2821}
2822
2823/* Common defaults which may be overridden by VBT. */
2824static void
2825init_vbt_panel_defaults(struct intel_panel *panel)
2826{
2827 /* Default to having backlight */
2828 panel->vbt.backlight.present = true;
2829
2830 /* LFP panel data */
2831 panel->vbt.lvds_dither = true;
2832}
2833
2834/* Defaults to initialize only if there is no VBT. */
2835static void
2836init_vbt_missing_defaults(struct drm_i915_private *i915)
2837{
2838 enum port port;
2839 int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) |
2840 BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F);
2841
2842 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
2843 return;
2844
2845 for_each_port_masked(port, ports) {
2846 struct intel_bios_encoder_data *devdata;
2847 struct child_device_config *child;
2848 enum phy phy = intel_port_to_phy(i915, port);
2849
2850 /*
2851 * VBT has the TypeC mode (native,TBT/USB) and we don't want
2852 * to detect it.
2853 */
2854 if (intel_phy_is_tc(i915, phy))
2855 continue;
2856
2857 /* Create fake child device config */
2858 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2859 if (!devdata)
2860 break;
2861
2862 devdata->i915 = i915;
2863 child = &devdata->child;
2864
2865 if (port == PORT_F)
2866 child->dvo_port = DVO_PORT_HDMIF;
2867 else if (port == PORT_E)
2868 child->dvo_port = DVO_PORT_HDMIE;
2869 else
2870 child->dvo_port = DVO_PORT_HDMIA + port;
2871
2872 if (port != PORT_A && port != PORT_E)
2873 child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING;
2874
2875 if (port != PORT_E)
2876 child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2877
2878 if (port == PORT_A)
2879 child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR;
2880
2881 list_add_tail(&devdata->node, &i915->display.vbt.display_devices);
2882
2883 drm_dbg_kms(&i915->drm,
2884 "Generating default VBT child device with type 0x04%x on port %c\n",
2885 child->device_type, port_name(port));
2886 }
2887
2888 /* Bypass some minimum baseline VBT version checks */
2889 i915->display.vbt.version = 155;
2890}
2891
2892static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2893{
2894 const void *_vbt = vbt;
2895
2896 return _vbt + vbt->bdb_offset;
2897}
2898
2899/**
2900 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2901 * @buf: pointer to a buffer to validate
2902 * @size: size of the buffer
2903 *
2904 * Returns true on valid VBT.
2905 */
2906bool intel_bios_is_valid_vbt(const void *buf, size_t size)
2907{
2908 const struct vbt_header *vbt = buf;
2909 const struct bdb_header *bdb;
2910
2911 if (!vbt)
2912 return false;
2913
2914 if (sizeof(struct vbt_header) > size) {
2915 DRM_DEBUG_DRIVER("VBT header incomplete\n");
2916 return false;
2917 }
2918
2919 if (memcmp(vbt->signature, "$VBT", 4)) {
2920 DRM_DEBUG_DRIVER("VBT invalid signature\n");
2921 return false;
2922 }
2923
2924 if (vbt->vbt_size > size) {
2925 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n");
2926 return false;
2927 }
2928
2929 size = vbt->vbt_size;
2930
2931 if (range_overflows_t(size_t,
2932 vbt->bdb_offset,
2933 sizeof(struct bdb_header),
2934 size)) {
2935 DRM_DEBUG_DRIVER("BDB header incomplete\n");
2936 return false;
2937 }
2938
2939 bdb = get_bdb_header(vbt);
2940 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
2941 DRM_DEBUG_DRIVER("BDB incomplete\n");
2942 return false;
2943 }
2944
2945 return vbt;
2946}
2947
2948static u32 intel_spi_read(struct intel_uncore *uncore, u32 offset)
2949{
2950 intel_uncore_write(uncore, PRIMARY_SPI_ADDRESS, offset);
2951
2952 return intel_uncore_read(uncore, PRIMARY_SPI_TRIGGER);
2953}
2954
2955static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915)
2956{
2957 u32 count, data, found, store = 0;
2958 u32 static_region, oprom_offset;
2959 u32 oprom_size = 0x200000;
2960 u16 vbt_size;
2961 u32 *vbt;
2962
2963 static_region = intel_uncore_read(&i915->uncore, SPI_STATIC_REGIONS);
2964 static_region &= OPTIONROM_SPI_REGIONID_MASK;
2965 intel_uncore_write(&i915->uncore, PRIMARY_SPI_REGIONID, static_region);
2966
2967 oprom_offset = intel_uncore_read(&i915->uncore, OROM_OFFSET);
2968 oprom_offset &= OROM_OFFSET_MASK;
2969
2970 for (count = 0; count < oprom_size; count += 4) {
2971 data = intel_spi_read(&i915->uncore, oprom_offset + count);
2972 if (data == *((const u32 *)"$VBT")) {
2973 found = oprom_offset + count;
2974 break;
2975 }
2976 }
2977
2978 if (count >= oprom_size)
2979 goto err_not_found;
2980
2981 /* Get VBT size and allocate space for the VBT */
2982 vbt_size = intel_spi_read(&i915->uncore,
2983 found + offsetof(struct vbt_header, vbt_size));
2984 vbt_size &= 0xffff;
2985
2986 vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL);
2987 if (!vbt)
2988 goto err_not_found;
2989
2990 for (count = 0; count < vbt_size; count += 4)
2991 *(vbt + store++) = intel_spi_read(&i915->uncore, found + count);
2992
2993 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
2994 goto err_free_vbt;
2995
2996 drm_dbg_kms(&i915->drm, "Found valid VBT in SPI flash\n");
2997
2998 return (struct vbt_header *)vbt;
2999
3000err_free_vbt:
3001 kfree(vbt);
3002err_not_found:
3003 return NULL;
3004}
3005
3006static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)
3007{
3008 struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
3009 void __iomem *p = NULL, *oprom;
3010 struct vbt_header *vbt;
3011 u16 vbt_size;
3012 size_t i, size;
3013
3014 oprom = pci_map_rom(pdev, &size);
3015 if (!oprom)
3016 return NULL;
3017
3018 /* Scour memory looking for the VBT signature. */
3019 for (i = 0; i + 4 < size; i += 4) {
3020 if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
3021 continue;
3022
3023 p = oprom + i;
3024 size -= i;
3025 break;
3026 }
3027
3028 if (!p)
3029 goto err_unmap_oprom;
3030
3031 if (sizeof(struct vbt_header) > size) {
3032 drm_dbg(&i915->drm, "VBT header incomplete\n");
3033 goto err_unmap_oprom;
3034 }
3035
3036 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
3037 if (vbt_size > size) {
3038 drm_dbg(&i915->drm,
3039 "VBT incomplete (vbt_size overflows)\n");
3040 goto err_unmap_oprom;
3041 }
3042
3043 /* The rest will be validated by intel_bios_is_valid_vbt() */
3044 vbt = kmalloc(vbt_size, GFP_KERNEL);
3045 if (!vbt)
3046 goto err_unmap_oprom;
3047
3048 memcpy_fromio(vbt, p, vbt_size);
3049
3050 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
3051 goto err_free_vbt;
3052
3053 pci_unmap_rom(pdev, oprom);
3054
3055 drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n");
3056
3057 return vbt;
3058
3059err_free_vbt:
3060 kfree(vbt);
3061err_unmap_oprom:
3062 pci_unmap_rom(pdev, oprom);
3063
3064 return NULL;
3065}
3066
3067/**
3068 * intel_bios_init - find VBT and initialize settings from the BIOS
3069 * @i915: i915 device instance
3070 *
3071 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
3072 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
3073 * initialize some defaults if the VBT is not present at all.
3074 */
3075void intel_bios_init(struct drm_i915_private *i915)
3076{
3077 const struct vbt_header *vbt = i915->display.opregion.vbt;
3078 struct vbt_header *oprom_vbt = NULL;
3079 const struct bdb_header *bdb;
3080
3081 INIT_LIST_HEAD(&i915->display.vbt.display_devices);
3082 INIT_LIST_HEAD(&i915->display.vbt.bdb_blocks);
3083
3084 if (!HAS_DISPLAY(i915)) {
3085 drm_dbg_kms(&i915->drm,
3086 "Skipping VBT init due to disabled display.\n");
3087 return;
3088 }
3089
3090 init_vbt_defaults(i915);
3091
3092 /*
3093 * If the OpRegion does not have VBT, look in SPI flash through MMIO or
3094 * PCI mapping
3095 */
3096 if (!vbt && IS_DGFX(i915)) {
3097 oprom_vbt = spi_oprom_get_vbt(i915);
3098 vbt = oprom_vbt;
3099 }
3100
3101 if (!vbt) {
3102 oprom_vbt = oprom_get_vbt(i915);
3103 vbt = oprom_vbt;
3104 }
3105
3106 if (!vbt)
3107 goto out;
3108
3109 bdb = get_bdb_header(vbt);
3110 i915->display.vbt.version = bdb->version;
3111
3112 drm_dbg_kms(&i915->drm,
3113 "VBT signature \"%.*s\", BDB version %d\n",
3114 (int)sizeof(vbt->signature), vbt->signature, i915->display.vbt.version);
3115
3116 init_bdb_blocks(i915, bdb);
3117
3118 /* Grab useful general definitions */
3119 parse_general_features(i915);
3120 parse_general_definitions(i915);
3121 parse_driver_features(i915);
3122
3123 /* Depends on child device list */
3124 parse_compression_parameters(i915);
3125
3126out:
3127 if (!vbt) {
3128 drm_info(&i915->drm,
3129 "Failed to find VBIOS tables (VBT)\n");
3130 init_vbt_missing_defaults(i915);
3131 }
3132
3133 /* Further processing on pre-parsed or generated child device data */
3134 parse_sdvo_device_mapping(i915);
3135 parse_ddi_ports(i915);
3136
3137 kfree(oprom_vbt);
3138}
3139
3140static void intel_bios_init_panel(struct drm_i915_private *i915,
3141 struct intel_panel *panel,
3142 const struct intel_bios_encoder_data *devdata,
3143 const struct drm_edid *drm_edid,
3144 bool use_fallback)
3145{
3146 /* already have it? */
3147 if (panel->vbt.panel_type >= 0) {
3148 drm_WARN_ON(&i915->drm, !use_fallback);
3149 return;
3150 }
3151
3152 panel->vbt.panel_type = get_panel_type(i915, devdata,
3153 drm_edid, use_fallback);
3154 if (panel->vbt.panel_type < 0) {
3155 drm_WARN_ON(&i915->drm, use_fallback);
3156 return;
3157 }
3158
3159 init_vbt_panel_defaults(panel);
3160
3161 parse_panel_options(i915, panel);
3162 parse_generic_dtd(i915, panel);
3163 parse_lfp_data(i915, panel);
3164 parse_lfp_backlight(i915, panel);
3165 parse_sdvo_panel_data(i915, panel);
3166 parse_panel_driver_features(i915, panel);
3167 parse_power_conservation_features(i915, panel);
3168 parse_edp(i915, panel);
3169 parse_psr(i915, panel);
3170 parse_mipi_config(i915, panel);
3171 parse_mipi_sequence(i915, panel);
3172}
3173
3174void intel_bios_init_panel_early(struct drm_i915_private *i915,
3175 struct intel_panel *panel,
3176 const struct intel_bios_encoder_data *devdata)
3177{
3178 intel_bios_init_panel(i915, panel, devdata, NULL, false);
3179}
3180
3181void intel_bios_init_panel_late(struct drm_i915_private *i915,
3182 struct intel_panel *panel,
3183 const struct intel_bios_encoder_data *devdata,
3184 const struct drm_edid *drm_edid)
3185{
3186 intel_bios_init_panel(i915, panel, devdata, drm_edid, true);
3187}
3188
3189/**
3190 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
3191 * @i915: i915 device instance
3192 */
3193void intel_bios_driver_remove(struct drm_i915_private *i915)
3194{
3195 struct intel_bios_encoder_data *devdata, *nd;
3196 struct bdb_block_entry *entry, *ne;
3197
3198 list_for_each_entry_safe(devdata, nd, &i915->display.vbt.display_devices, node) {
3199 list_del(&devdata->node);
3200 kfree(devdata->dsc);
3201 kfree(devdata);
3202 }
3203
3204 list_for_each_entry_safe(entry, ne, &i915->display.vbt.bdb_blocks, node) {
3205 list_del(&entry->node);
3206 kfree(entry);
3207 }
3208}
3209
3210void intel_bios_fini_panel(struct intel_panel *panel)
3211{
3212 kfree(panel->vbt.sdvo_lvds_vbt_mode);
3213 panel->vbt.sdvo_lvds_vbt_mode = NULL;
3214 kfree(panel->vbt.lfp_lvds_vbt_mode);
3215 panel->vbt.lfp_lvds_vbt_mode = NULL;
3216 kfree(panel->vbt.dsi.data);
3217 panel->vbt.dsi.data = NULL;
3218 kfree(panel->vbt.dsi.pps);
3219 panel->vbt.dsi.pps = NULL;
3220 kfree(panel->vbt.dsi.config);
3221 panel->vbt.dsi.config = NULL;
3222 kfree(panel->vbt.dsi.deassert_seq);
3223 panel->vbt.dsi.deassert_seq = NULL;
3224}
3225
3226/**
3227 * intel_bios_is_tv_present - is integrated TV present in VBT
3228 * @i915: i915 device instance
3229 *
3230 * Return true if TV is present. If no child devices were parsed from VBT,
3231 * assume TV is present.
3232 */
3233bool intel_bios_is_tv_present(struct drm_i915_private *i915)
3234{
3235 const struct intel_bios_encoder_data *devdata;
3236
3237 if (!i915->display.vbt.int_tv_support)
3238 return false;
3239
3240 if (list_empty(&i915->display.vbt.display_devices))
3241 return true;
3242
3243 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3244 const struct child_device_config *child = &devdata->child;
3245
3246 /*
3247 * If the device type is not TV, continue.
3248 */
3249 switch (child->device_type) {
3250 case DEVICE_TYPE_INT_TV:
3251 case DEVICE_TYPE_TV:
3252 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
3253 break;
3254 default:
3255 continue;
3256 }
3257 /* Only when the addin_offset is non-zero, it is regarded
3258 * as present.
3259 */
3260 if (child->addin_offset)
3261 return true;
3262 }
3263
3264 return false;
3265}
3266
3267/**
3268 * intel_bios_is_lvds_present - is LVDS present in VBT
3269 * @i915: i915 device instance
3270 * @i2c_pin: i2c pin for LVDS if present
3271 *
3272 * Return true if LVDS is present. If no child devices were parsed from VBT,
3273 * assume LVDS is present.
3274 */
3275bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin)
3276{
3277 const struct intel_bios_encoder_data *devdata;
3278
3279 if (list_empty(&i915->display.vbt.display_devices))
3280 return true;
3281
3282 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3283 const struct child_device_config *child = &devdata->child;
3284
3285 /* If the device type is not LFP, continue.
3286 * We have to check both the new identifiers as well as the
3287 * old for compatibility with some BIOSes.
3288 */
3289 if (child->device_type != DEVICE_TYPE_INT_LFP &&
3290 child->device_type != DEVICE_TYPE_LFP)
3291 continue;
3292
3293 if (intel_gmbus_is_valid_pin(i915, child->i2c_pin))
3294 *i2c_pin = child->i2c_pin;
3295
3296 /* However, we cannot trust the BIOS writers to populate
3297 * the VBT correctly. Since LVDS requires additional
3298 * information from AIM blocks, a non-zero addin offset is
3299 * a good indicator that the LVDS is actually present.
3300 */
3301 if (child->addin_offset)
3302 return true;
3303
3304 /* But even then some BIOS writers perform some black magic
3305 * and instantiate the device without reference to any
3306 * additional data. Trust that if the VBT was written into
3307 * the OpRegion then they have validated the LVDS's existence.
3308 */
3309 if (i915->display.opregion.vbt)
3310 return true;
3311 }
3312
3313 return false;
3314}
3315
3316/**
3317 * intel_bios_is_port_present - is the specified digital port present
3318 * @i915: i915 device instance
3319 * @port: port to check
3320 *
3321 * Return true if the device in %port is present.
3322 */
3323bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port)
3324{
3325 const struct intel_bios_encoder_data *devdata;
3326
3327 if (WARN_ON(!has_ddi_port_info(i915)))
3328 return true;
3329
3330 if (!is_port_valid(i915, port))
3331 return false;
3332
3333 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3334 const struct child_device_config *child = &devdata->child;
3335
3336 if (dvo_port_to_port(i915, child->dvo_port) == port)
3337 return true;
3338 }
3339
3340 return false;
3341}
3342
3343bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata)
3344{
3345 const struct child_device_config *child = &devdata->child;
3346
3347 if (!intel_bios_encoder_supports_dp(devdata) ||
3348 !intel_bios_encoder_supports_hdmi(devdata))
3349 return false;
3350
3351 if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA)
3352 return true;
3353
3354 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
3355 if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA &&
3356 child->aux_channel != 0)
3357 return true;
3358
3359 return false;
3360}
3361
3362/**
3363 * intel_bios_is_dsi_present - is DSI present in VBT
3364 * @i915: i915 device instance
3365 * @port: port for DSI if present
3366 *
3367 * Return true if DSI is present, and return the port in %port.
3368 */
3369bool intel_bios_is_dsi_present(struct drm_i915_private *i915,
3370 enum port *port)
3371{
3372 const struct intel_bios_encoder_data *devdata;
3373
3374 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3375 const struct child_device_config *child = &devdata->child;
3376 u8 dvo_port = child->dvo_port;
3377
3378 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3379 continue;
3380
3381 if (dsi_dvo_port_to_port(i915, dvo_port) == PORT_NONE) {
3382 drm_dbg_kms(&i915->drm,
3383 "VBT has unsupported DSI port %c\n",
3384 port_name(dvo_port - DVO_PORT_MIPIA));
3385 continue;
3386 }
3387
3388 if (port)
3389 *port = dsi_dvo_port_to_port(i915, dvo_port);
3390 return true;
3391 }
3392
3393 return false;
3394}
3395
3396static void fill_dsc(struct intel_crtc_state *crtc_state,
3397 struct dsc_compression_parameters_entry *dsc,
3398 int dsc_max_bpc)
3399{
3400 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
3401 int bpc = 8;
3402
3403 vdsc_cfg->dsc_version_major = dsc->version_major;
3404 vdsc_cfg->dsc_version_minor = dsc->version_minor;
3405
3406 if (dsc->support_12bpc && dsc_max_bpc >= 12)
3407 bpc = 12;
3408 else if (dsc->support_10bpc && dsc_max_bpc >= 10)
3409 bpc = 10;
3410 else if (dsc->support_8bpc && dsc_max_bpc >= 8)
3411 bpc = 8;
3412 else
3413 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n",
3414 dsc_max_bpc);
3415
3416 crtc_state->pipe_bpp = bpc * 3;
3417
3418 crtc_state->dsc.compressed_bpp_x16 = to_bpp_x16(min(crtc_state->pipe_bpp,
3419 VBT_DSC_MAX_BPP(dsc->max_bpp)));
3420
3421 /*
3422 * FIXME: This is ugly, and slice count should take DSC engine
3423 * throughput etc. into account.
3424 *
3425 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
3426 */
3427 if (dsc->slices_per_line & BIT(2)) {
3428 crtc_state->dsc.slice_count = 4;
3429 } else if (dsc->slices_per_line & BIT(1)) {
3430 crtc_state->dsc.slice_count = 2;
3431 } else {
3432 /* FIXME */
3433 if (!(dsc->slices_per_line & BIT(0)))
3434 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n");
3435
3436 crtc_state->dsc.slice_count = 1;
3437 }
3438
3439 if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
3440 crtc_state->dsc.slice_count != 0)
3441 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n",
3442 crtc_state->hw.adjusted_mode.crtc_hdisplay,
3443 crtc_state->dsc.slice_count);
3444
3445 /*
3446 * The VBT rc_buffer_block_size and rc_buffer_size definitions
3447 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63.
3448 */
3449 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size,
3450 dsc->rc_buffer_size);
3451
3452 /* FIXME: DSI spec says bpc + 1 for this one */
3453 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
3454
3455 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
3456
3457 vdsc_cfg->slice_height = dsc->slice_height;
3458}
3459
3460/* FIXME: initially DSI specific */
3461bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
3462 struct intel_crtc_state *crtc_state,
3463 int dsc_max_bpc)
3464{
3465 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3466 const struct intel_bios_encoder_data *devdata;
3467
3468 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3469 const struct child_device_config *child = &devdata->child;
3470
3471 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3472 continue;
3473
3474 if (dsi_dvo_port_to_port(i915, child->dvo_port) == encoder->port) {
3475 if (!devdata->dsc)
3476 return false;
3477
3478 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
3479
3480 return true;
3481 }
3482 }
3483
3484 return false;
3485}
3486
3487static const u8 adlp_aux_ch_map[] = {
3488 [AUX_CH_A] = DP_AUX_A,
3489 [AUX_CH_B] = DP_AUX_B,
3490 [AUX_CH_C] = DP_AUX_C,
3491 [AUX_CH_D_XELPD] = DP_AUX_D,
3492 [AUX_CH_E_XELPD] = DP_AUX_E,
3493 [AUX_CH_USBC1] = DP_AUX_F,
3494 [AUX_CH_USBC2] = DP_AUX_G,
3495 [AUX_CH_USBC3] = DP_AUX_H,
3496 [AUX_CH_USBC4] = DP_AUX_I,
3497};
3498
3499/*
3500 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
3501 * map to DDI A,TC1,TC2,TC3,TC4 respectively.
3502 */
3503static const u8 adls_aux_ch_map[] = {
3504 [AUX_CH_A] = DP_AUX_A,
3505 [AUX_CH_USBC1] = DP_AUX_B,
3506 [AUX_CH_USBC2] = DP_AUX_C,
3507 [AUX_CH_USBC3] = DP_AUX_D,
3508 [AUX_CH_USBC4] = DP_AUX_E,
3509};
3510
3511/*
3512 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
3513 * map to DDI A,B,TC1,TC2 respectively.
3514 */
3515static const u8 rkl_aux_ch_map[] = {
3516 [AUX_CH_A] = DP_AUX_A,
3517 [AUX_CH_B] = DP_AUX_B,
3518 [AUX_CH_USBC1] = DP_AUX_C,
3519 [AUX_CH_USBC2] = DP_AUX_D,
3520};
3521
3522static const u8 direct_aux_ch_map[] = {
3523 [AUX_CH_A] = DP_AUX_A,
3524 [AUX_CH_B] = DP_AUX_B,
3525 [AUX_CH_C] = DP_AUX_C,
3526 [AUX_CH_D] = DP_AUX_D, /* aka AUX_CH_USBC1 */
3527 [AUX_CH_E] = DP_AUX_E, /* aka AUX_CH_USBC2 */
3528 [AUX_CH_F] = DP_AUX_F, /* aka AUX_CH_USBC3 */
3529 [AUX_CH_G] = DP_AUX_G, /* aka AUX_CH_USBC4 */
3530 [AUX_CH_H] = DP_AUX_H, /* aka AUX_CH_USBC5 */
3531 [AUX_CH_I] = DP_AUX_I, /* aka AUX_CH_USBC6 */
3532};
3533
3534static enum aux_ch map_aux_ch(struct drm_i915_private *i915, u8 aux_channel)
3535{
3536 const u8 *aux_ch_map;
3537 int i, n_entries;
3538
3539 if (DISPLAY_VER(i915) >= 13) {
3540 aux_ch_map = adlp_aux_ch_map;
3541 n_entries = ARRAY_SIZE(adlp_aux_ch_map);
3542 } else if (IS_ALDERLAKE_S(i915)) {
3543 aux_ch_map = adls_aux_ch_map;
3544 n_entries = ARRAY_SIZE(adls_aux_ch_map);
3545 } else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) {
3546 aux_ch_map = rkl_aux_ch_map;
3547 n_entries = ARRAY_SIZE(rkl_aux_ch_map);
3548 } else {
3549 aux_ch_map = direct_aux_ch_map;
3550 n_entries = ARRAY_SIZE(direct_aux_ch_map);
3551 }
3552
3553 for (i = 0; i < n_entries; i++) {
3554 if (aux_ch_map[i] == aux_channel)
3555 return i;
3556 }
3557
3558 drm_dbg_kms(&i915->drm,
3559 "Ignoring alternate AUX CH: VBT claims AUX 0x%x, which is not valid for this platform\n",
3560 aux_channel);
3561
3562 return AUX_CH_NONE;
3563}
3564
3565enum aux_ch intel_bios_dp_aux_ch(const struct intel_bios_encoder_data *devdata)
3566{
3567 if (!devdata || !devdata->child.aux_channel)
3568 return AUX_CH_NONE;
3569
3570 return map_aux_ch(devdata->i915, devdata->child.aux_channel);
3571}
3572
3573bool intel_bios_dp_has_shared_aux_ch(const struct intel_bios_encoder_data *devdata)
3574{
3575 struct drm_i915_private *i915;
3576 u8 aux_channel;
3577 int count = 0;
3578
3579 if (!devdata || !devdata->child.aux_channel)
3580 return false;
3581
3582 i915 = devdata->i915;
3583 aux_channel = devdata->child.aux_channel;
3584
3585 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3586 if (intel_bios_encoder_supports_dp(devdata) &&
3587 aux_channel == devdata->child.aux_channel)
3588 count++;
3589 }
3590
3591 return count > 1;
3592}
3593
3594int intel_bios_dp_boost_level(const struct intel_bios_encoder_data *devdata)
3595{
3596 if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost)
3597 return 0;
3598
3599 return translate_iboost(devdata->child.dp_iboost_level);
3600}
3601
3602int intel_bios_hdmi_boost_level(const struct intel_bios_encoder_data *devdata)
3603{
3604 if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost)
3605 return 0;
3606
3607 return translate_iboost(devdata->child.hdmi_iboost_level);
3608}
3609
3610int intel_bios_hdmi_ddc_pin(const struct intel_bios_encoder_data *devdata)
3611{
3612 if (!devdata || !devdata->child.ddc_pin)
3613 return 0;
3614
3615 return map_ddc_pin(devdata->i915, devdata->child.ddc_pin);
3616}
3617
3618bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata)
3619{
3620 return devdata->i915->display.vbt.version >= 195 && devdata->child.dp_usb_type_c;
3621}
3622
3623bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata)
3624{
3625 return devdata->i915->display.vbt.version >= 209 && devdata->child.tbt;
3626}
3627
3628bool intel_bios_encoder_lane_reversal(const struct intel_bios_encoder_data *devdata)
3629{
3630 return devdata && devdata->child.lane_reversal;
3631}
3632
3633bool intel_bios_encoder_hpd_invert(const struct intel_bios_encoder_data *devdata)
3634{
3635 return devdata && devdata->child.hpd_invert;
3636}
3637
3638const struct intel_bios_encoder_data *
3639intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port)
3640{
3641 struct intel_bios_encoder_data *devdata;
3642
3643 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3644 if (intel_bios_encoder_port(devdata) == port)
3645 return devdata;
3646 }
3647
3648 return NULL;
3649}
3650
3651void intel_bios_for_each_encoder(struct drm_i915_private *i915,
3652 void (*func)(struct drm_i915_private *i915,
3653 const struct intel_bios_encoder_data *devdata))
3654{
3655 struct intel_bios_encoder_data *devdata;
3656
3657 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node)
3658 func(i915, devdata);
3659}