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1# SPDX-License-Identifier: GPL-2.0
2config MIPS
3 bool
4 default y
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
8 select ARCH_HAS_FORTIFY_SOURCE
9 select ARCH_HAS_KCOV
10 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
11 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
12 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
13 select ARCH_HAS_UBSAN_SANITIZE_ALL
14 select ARCH_HAS_GCOV_PROFILE_ALL
15 select ARCH_KEEP_MEMBLOCK
16 select ARCH_SUPPORTS_UPROBES
17 select ARCH_USE_BUILTIN_BSWAP
18 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
19 select ARCH_USE_MEMTEST
20 select ARCH_USE_QUEUED_RWLOCKS
21 select ARCH_USE_QUEUED_SPINLOCKS
22 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
23 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
24 select ARCH_WANT_IPC_PARSE_VERSION
25 select ARCH_WANT_LD_ORPHAN_WARN
26 select BUILDTIME_TABLE_SORT
27 select CLONE_BACKWARDS
28 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
29 select CPU_PM if CPU_IDLE
30 select GENERIC_ATOMIC64 if !64BIT
31 select GENERIC_CMOS_UPDATE
32 select GENERIC_CPU_AUTOPROBE
33 select GENERIC_FIND_FIRST_BIT
34 select GENERIC_GETTIMEOFDAY
35 select GENERIC_IOMAP
36 select GENERIC_IRQ_PROBE
37 select GENERIC_IRQ_SHOW
38 select GENERIC_ISA_DMA if EISA
39 select GENERIC_LIB_ASHLDI3
40 select GENERIC_LIB_ASHRDI3
41 select GENERIC_LIB_CMPDI2
42 select GENERIC_LIB_LSHRDI3
43 select GENERIC_LIB_UCMPDI2
44 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
45 select GENERIC_SMP_IDLE_THREAD
46 select GENERIC_TIME_VSYSCALL
47 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
48 select HANDLE_DOMAIN_IRQ
49 select HAVE_ARCH_COMPILER_H
50 select HAVE_ARCH_JUMP_LABEL
51 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
52 select HAVE_ARCH_MMAP_RND_BITS if MMU
53 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
54 select HAVE_ARCH_SECCOMP_FILTER
55 select HAVE_ARCH_TRACEHOOK
56 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
57 select HAVE_ASM_MODVERSIONS
58 select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
59 select HAVE_CONTEXT_TRACKING
60 select HAVE_TIF_NOHZ
61 select HAVE_C_RECORDMCOUNT
62 select HAVE_DEBUG_KMEMLEAK
63 select HAVE_DEBUG_STACKOVERFLOW
64 select HAVE_DMA_CONTIGUOUS
65 select HAVE_DYNAMIC_FTRACE
66 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
67 select HAVE_EXIT_THREAD
68 select HAVE_FAST_GUP
69 select HAVE_FTRACE_MCOUNT_RECORD
70 select HAVE_FUNCTION_GRAPH_TRACER
71 select HAVE_FUNCTION_TRACER
72 select HAVE_GCC_PLUGINS
73 select HAVE_GENERIC_VDSO
74 select HAVE_IOREMAP_PROT
75 select HAVE_IRQ_EXIT_ON_IRQ_STACK
76 select HAVE_IRQ_TIME_ACCOUNTING
77 select HAVE_KPROBES
78 select HAVE_KRETPROBES
79 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
80 select HAVE_MOD_ARCH_SPECIFIC
81 select HAVE_NMI
82 select HAVE_PERF_EVENTS
83 select HAVE_PERF_REGS
84 select HAVE_PERF_USER_STACK_DUMP
85 select HAVE_REGS_AND_STACK_ACCESS_API
86 select HAVE_RSEQ
87 select HAVE_SPARSE_SYSCALL_NR
88 select HAVE_STACKPROTECTOR
89 select HAVE_SYSCALL_TRACEPOINTS
90 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
91 select IRQ_FORCED_THREADING
92 select ISA if EISA
93 select MODULES_USE_ELF_REL if MODULES
94 select MODULES_USE_ELF_RELA if MODULES && 64BIT
95 select PERF_USE_VMALLOC
96 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
97 select RTC_LIB
98 select SYSCTL_EXCEPTION_TRACE
99 select VIRT_TO_BUS
100 select ARCH_HAS_ELFCORE_COMPAT
101
102config MIPS_FIXUP_BIGPHYS_ADDR
103 bool
104
105config MIPS_GENERIC
106 bool
107
108config MACH_INGENIC
109 bool
110 select SYS_SUPPORTS_32BIT_KERNEL
111 select SYS_SUPPORTS_LITTLE_ENDIAN
112 select SYS_SUPPORTS_ZBOOT
113 select DMA_NONCOHERENT
114 select ARCH_HAS_SYNC_DMA_FOR_CPU
115 select IRQ_MIPS_CPU
116 select PINCTRL
117 select GPIOLIB
118 select COMMON_CLK
119 select GENERIC_IRQ_CHIP
120 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
121 select USE_OF
122 select CPU_SUPPORTS_CPUFREQ
123 select MIPS_EXTERNAL_TIMER
124
125menu "Machine selection"
126
127choice
128 prompt "System type"
129 default MIPS_GENERIC_KERNEL
130
131config MIPS_GENERIC_KERNEL
132 bool "Generic board-agnostic MIPS kernel"
133 select ARCH_HAS_SETUP_DMA_OPS
134 select MIPS_GENERIC
135 select BOOT_RAW
136 select BUILTIN_DTB
137 select CEVT_R4K
138 select CLKSRC_MIPS_GIC
139 select COMMON_CLK
140 select CPU_MIPSR2_IRQ_EI
141 select CPU_MIPSR2_IRQ_VI
142 select CSRC_R4K
143 select DMA_NONCOHERENT
144 select HAVE_PCI
145 select IRQ_MIPS_CPU
146 select MIPS_AUTO_PFN_OFFSET
147 select MIPS_CPU_SCACHE
148 select MIPS_GIC
149 select MIPS_L1_CACHE_SHIFT_7
150 select NO_EXCEPT_FILL
151 select PCI_DRIVERS_GENERIC
152 select SMP_UP if SMP
153 select SWAP_IO_SPACE
154 select SYS_HAS_CPU_MIPS32_R1
155 select SYS_HAS_CPU_MIPS32_R2
156 select SYS_HAS_CPU_MIPS32_R6
157 select SYS_HAS_CPU_MIPS64_R1
158 select SYS_HAS_CPU_MIPS64_R2
159 select SYS_HAS_CPU_MIPS64_R6
160 select SYS_SUPPORTS_32BIT_KERNEL
161 select SYS_SUPPORTS_64BIT_KERNEL
162 select SYS_SUPPORTS_BIG_ENDIAN
163 select SYS_SUPPORTS_HIGHMEM
164 select SYS_SUPPORTS_LITTLE_ENDIAN
165 select SYS_SUPPORTS_MICROMIPS
166 select SYS_SUPPORTS_MIPS16
167 select SYS_SUPPORTS_MIPS_CPS
168 select SYS_SUPPORTS_MULTITHREADING
169 select SYS_SUPPORTS_RELOCATABLE
170 select SYS_SUPPORTS_SMARTMIPS
171 select SYS_SUPPORTS_ZBOOT
172 select UHI_BOOT
173 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
174 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
175 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
176 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
177 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
178 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
179 select USE_OF
180 help
181 Select this to build a kernel which aims to support multiple boards,
182 generally using a flattened device tree passed from the bootloader
183 using the boot protocol defined in the UHI (Unified Hosting
184 Interface) specification.
185
186config MIPS_ALCHEMY
187 bool "Alchemy processor based machines"
188 select PHYS_ADDR_T_64BIT
189 select CEVT_R4K
190 select CSRC_R4K
191 select IRQ_MIPS_CPU
192 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
193 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
194 select SYS_HAS_CPU_MIPS32_R1
195 select SYS_SUPPORTS_32BIT_KERNEL
196 select SYS_SUPPORTS_APM_EMULATION
197 select GPIOLIB
198 select SYS_SUPPORTS_ZBOOT
199 select COMMON_CLK
200
201config AR7
202 bool "Texas Instruments AR7"
203 select BOOT_ELF32
204 select COMMON_CLK
205 select DMA_NONCOHERENT
206 select CEVT_R4K
207 select CSRC_R4K
208 select IRQ_MIPS_CPU
209 select NO_EXCEPT_FILL
210 select SWAP_IO_SPACE
211 select SYS_HAS_CPU_MIPS32_R1
212 select SYS_HAS_EARLY_PRINTK
213 select SYS_SUPPORTS_32BIT_KERNEL
214 select SYS_SUPPORTS_LITTLE_ENDIAN
215 select SYS_SUPPORTS_MIPS16
216 select SYS_SUPPORTS_ZBOOT_UART16550
217 select GPIOLIB
218 select VLYNQ
219 help
220 Support for the Texas Instruments AR7 System-on-a-Chip
221 family: TNETD7100, 7200 and 7300.
222
223config ATH25
224 bool "Atheros AR231x/AR531x SoC support"
225 select CEVT_R4K
226 select CSRC_R4K
227 select DMA_NONCOHERENT
228 select IRQ_MIPS_CPU
229 select IRQ_DOMAIN
230 select SYS_HAS_CPU_MIPS32_R1
231 select SYS_SUPPORTS_BIG_ENDIAN
232 select SYS_SUPPORTS_32BIT_KERNEL
233 select SYS_HAS_EARLY_PRINTK
234 help
235 Support for Atheros AR231x and Atheros AR531x based boards
236
237config ATH79
238 bool "Atheros AR71XX/AR724X/AR913X based boards"
239 select ARCH_HAS_RESET_CONTROLLER
240 select BOOT_RAW
241 select CEVT_R4K
242 select CSRC_R4K
243 select DMA_NONCOHERENT
244 select GPIOLIB
245 select PINCTRL
246 select COMMON_CLK
247 select IRQ_MIPS_CPU
248 select SYS_HAS_CPU_MIPS32_R2
249 select SYS_HAS_EARLY_PRINTK
250 select SYS_SUPPORTS_32BIT_KERNEL
251 select SYS_SUPPORTS_BIG_ENDIAN
252 select SYS_SUPPORTS_MIPS16
253 select SYS_SUPPORTS_ZBOOT_UART_PROM
254 select USE_OF
255 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
256 help
257 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
258
259config BMIPS_GENERIC
260 bool "Broadcom Generic BMIPS kernel"
261 select ARCH_HAS_RESET_CONTROLLER
262 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
263 select ARCH_HAS_PHYS_TO_DMA
264 select BOOT_RAW
265 select NO_EXCEPT_FILL
266 select USE_OF
267 select CEVT_R4K
268 select CSRC_R4K
269 select SYNC_R4K
270 select COMMON_CLK
271 select BCM6345_L1_IRQ
272 select BCM7038_L1_IRQ
273 select BCM7120_L2_IRQ
274 select BRCMSTB_L2_IRQ
275 select IRQ_MIPS_CPU
276 select DMA_NONCOHERENT
277 select SYS_SUPPORTS_32BIT_KERNEL
278 select SYS_SUPPORTS_LITTLE_ENDIAN
279 select SYS_SUPPORTS_BIG_ENDIAN
280 select SYS_SUPPORTS_HIGHMEM
281 select SYS_HAS_CPU_BMIPS32_3300
282 select SYS_HAS_CPU_BMIPS4350
283 select SYS_HAS_CPU_BMIPS4380
284 select SYS_HAS_CPU_BMIPS5000
285 select SWAP_IO_SPACE
286 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
287 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
288 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
289 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
290 select HARDIRQS_SW_RESEND
291 help
292 Build a generic DT-based kernel image that boots on select
293 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
294 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
295 must be set appropriately for your board.
296
297config BCM47XX
298 bool "Broadcom BCM47XX based boards"
299 select BOOT_RAW
300 select CEVT_R4K
301 select CSRC_R4K
302 select DMA_NONCOHERENT
303 select HAVE_PCI
304 select IRQ_MIPS_CPU
305 select SYS_HAS_CPU_MIPS32_R1
306 select NO_EXCEPT_FILL
307 select SYS_SUPPORTS_32BIT_KERNEL
308 select SYS_SUPPORTS_LITTLE_ENDIAN
309 select SYS_SUPPORTS_MIPS16
310 select SYS_SUPPORTS_ZBOOT
311 select SYS_HAS_EARLY_PRINTK
312 select USE_GENERIC_EARLY_PRINTK_8250
313 select GPIOLIB
314 select LEDS_GPIO_REGISTER
315 select BCM47XX_NVRAM
316 select BCM47XX_SPROM
317 select BCM47XX_SSB if !BCM47XX_BCMA
318 help
319 Support for BCM47XX based boards
320
321config BCM63XX
322 bool "Broadcom BCM63XX based boards"
323 select BOOT_RAW
324 select CEVT_R4K
325 select CSRC_R4K
326 select SYNC_R4K
327 select DMA_NONCOHERENT
328 select IRQ_MIPS_CPU
329 select SYS_SUPPORTS_32BIT_KERNEL
330 select SYS_SUPPORTS_BIG_ENDIAN
331 select SYS_HAS_EARLY_PRINTK
332 select SWAP_IO_SPACE
333 select GPIOLIB
334 select MIPS_L1_CACHE_SHIFT_4
335 select HAVE_LEGACY_CLK
336 help
337 Support for BCM63XX based boards
338
339config MIPS_COBALT
340 bool "Cobalt Server"
341 select CEVT_R4K
342 select CSRC_R4K
343 select CEVT_GT641XX
344 select DMA_NONCOHERENT
345 select FORCE_PCI
346 select I8253
347 select I8259
348 select IRQ_MIPS_CPU
349 select IRQ_GT641XX
350 select PCI_GT64XXX_PCI0
351 select SYS_HAS_CPU_NEVADA
352 select SYS_HAS_EARLY_PRINTK
353 select SYS_SUPPORTS_32BIT_KERNEL
354 select SYS_SUPPORTS_64BIT_KERNEL
355 select SYS_SUPPORTS_LITTLE_ENDIAN
356 select USE_GENERIC_EARLY_PRINTK_8250
357
358config MACH_DECSTATION
359 bool "DECstations"
360 select BOOT_ELF32
361 select CEVT_DS1287
362 select CEVT_R4K if CPU_R4X00
363 select CSRC_IOASIC
364 select CSRC_R4K if CPU_R4X00
365 select CPU_DADDI_WORKAROUNDS if 64BIT
366 select CPU_R4000_WORKAROUNDS if 64BIT
367 select CPU_R4400_WORKAROUNDS if 64BIT
368 select DMA_NONCOHERENT
369 select NO_IOPORT_MAP
370 select IRQ_MIPS_CPU
371 select SYS_HAS_CPU_R3000
372 select SYS_HAS_CPU_R4X00
373 select SYS_SUPPORTS_32BIT_KERNEL
374 select SYS_SUPPORTS_64BIT_KERNEL
375 select SYS_SUPPORTS_LITTLE_ENDIAN
376 select SYS_SUPPORTS_128HZ
377 select SYS_SUPPORTS_256HZ
378 select SYS_SUPPORTS_1024HZ
379 select MIPS_L1_CACHE_SHIFT_4
380 help
381 This enables support for DEC's MIPS based workstations. For details
382 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
383 DECstation porting pages on <http://decstation.unix-ag.org/>.
384
385 If you have one of the following DECstation Models you definitely
386 want to choose R4xx0 for the CPU Type:
387
388 DECstation 5000/50
389 DECstation 5000/150
390 DECstation 5000/260
391 DECsystem 5900/260
392
393 otherwise choose R3000.
394
395config MACH_JAZZ
396 bool "Jazz family of machines"
397 select ARC_MEMORY
398 select ARC_PROMLIB
399 select ARCH_MIGHT_HAVE_PC_PARPORT
400 select ARCH_MIGHT_HAVE_PC_SERIO
401 select DMA_OPS
402 select FW_ARC
403 select FW_ARC32
404 select ARCH_MAY_HAVE_PC_FDC
405 select CEVT_R4K
406 select CSRC_R4K
407 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
408 select GENERIC_ISA_DMA
409 select HAVE_PCSPKR_PLATFORM
410 select IRQ_MIPS_CPU
411 select I8253
412 select I8259
413 select ISA
414 select SYS_HAS_CPU_R4X00
415 select SYS_SUPPORTS_32BIT_KERNEL
416 select SYS_SUPPORTS_64BIT_KERNEL
417 select SYS_SUPPORTS_100HZ
418 select SYS_SUPPORTS_LITTLE_ENDIAN
419 help
420 This a family of machines based on the MIPS R4030 chipset which was
421 used by several vendors to build RISC/os and Windows NT workstations.
422 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
423 Olivetti M700-10 workstations.
424
425config MACH_INGENIC_SOC
426 bool "Ingenic SoC based machines"
427 select MIPS_GENERIC
428 select MACH_INGENIC
429 select SYS_SUPPORTS_ZBOOT_UART16550
430 select CPU_SUPPORTS_CPUFREQ
431 select MIPS_EXTERNAL_TIMER
432
433config LANTIQ
434 bool "Lantiq based platforms"
435 select DMA_NONCOHERENT
436 select IRQ_MIPS_CPU
437 select CEVT_R4K
438 select CSRC_R4K
439 select SYS_HAS_CPU_MIPS32_R1
440 select SYS_HAS_CPU_MIPS32_R2
441 select SYS_SUPPORTS_BIG_ENDIAN
442 select SYS_SUPPORTS_32BIT_KERNEL
443 select SYS_SUPPORTS_MIPS16
444 select SYS_SUPPORTS_MULTITHREADING
445 select SYS_SUPPORTS_VPE_LOADER
446 select SYS_HAS_EARLY_PRINTK
447 select GPIOLIB
448 select SWAP_IO_SPACE
449 select BOOT_RAW
450 select HAVE_LEGACY_CLK
451 select USE_OF
452 select PINCTRL
453 select PINCTRL_LANTIQ
454 select ARCH_HAS_RESET_CONTROLLER
455 select RESET_CONTROLLER
456
457config MACH_LOONGSON32
458 bool "Loongson 32-bit family of machines"
459 select SYS_SUPPORTS_ZBOOT
460 help
461 This enables support for the Loongson-1 family of machines.
462
463 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
464 the Institute of Computing Technology (ICT), Chinese Academy of
465 Sciences (CAS).
466
467config MACH_LOONGSON2EF
468 bool "Loongson-2E/F family of machines"
469 select SYS_SUPPORTS_ZBOOT
470 help
471 This enables the support of early Loongson-2E/F family of machines.
472
473config MACH_LOONGSON64
474 bool "Loongson 64-bit family of machines"
475 select ARCH_SPARSEMEM_ENABLE
476 select ARCH_MIGHT_HAVE_PC_PARPORT
477 select ARCH_MIGHT_HAVE_PC_SERIO
478 select GENERIC_ISA_DMA_SUPPORT_BROKEN
479 select BOOT_ELF32
480 select BOARD_SCACHE
481 select CSRC_R4K
482 select CEVT_R4K
483 select CPU_HAS_WB
484 select FORCE_PCI
485 select ISA
486 select I8259
487 select IRQ_MIPS_CPU
488 select NO_EXCEPT_FILL
489 select NR_CPUS_DEFAULT_64
490 select USE_GENERIC_EARLY_PRINTK_8250
491 select PCI_DRIVERS_GENERIC
492 select SYS_HAS_CPU_LOONGSON64
493 select SYS_HAS_EARLY_PRINTK
494 select SYS_SUPPORTS_SMP
495 select SYS_SUPPORTS_HOTPLUG_CPU
496 select SYS_SUPPORTS_NUMA
497 select SYS_SUPPORTS_64BIT_KERNEL
498 select SYS_SUPPORTS_HIGHMEM
499 select SYS_SUPPORTS_LITTLE_ENDIAN
500 select SYS_SUPPORTS_ZBOOT
501 select SYS_SUPPORTS_RELOCATABLE
502 select ZONE_DMA32
503 select COMMON_CLK
504 select USE_OF
505 select BUILTIN_DTB
506 select PCI_HOST_GENERIC
507 help
508 This enables the support of Loongson-2/3 family of machines.
509
510 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
511 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
512 and Loongson-2F which will be removed), developed by the Institute
513 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
514
515config MACH_PISTACHIO
516 bool "IMG Pistachio SoC based boards"
517 select BOOT_ELF32
518 select BOOT_RAW
519 select CEVT_R4K
520 select CLKSRC_MIPS_GIC
521 select COMMON_CLK
522 select CSRC_R4K
523 select DMA_NONCOHERENT
524 select GPIOLIB
525 select IRQ_MIPS_CPU
526 select MFD_SYSCON
527 select MIPS_CPU_SCACHE
528 select MIPS_GIC
529 select PINCTRL
530 select REGULATOR
531 select SYS_HAS_CPU_MIPS32_R2
532 select SYS_SUPPORTS_32BIT_KERNEL
533 select SYS_SUPPORTS_LITTLE_ENDIAN
534 select SYS_SUPPORTS_MIPS_CPS
535 select SYS_SUPPORTS_MULTITHREADING
536 select SYS_SUPPORTS_RELOCATABLE
537 select SYS_SUPPORTS_ZBOOT
538 select SYS_HAS_EARLY_PRINTK
539 select USE_GENERIC_EARLY_PRINTK_8250
540 select USE_OF
541 help
542 This enables support for the IMG Pistachio SoC platform.
543
544config MIPS_MALTA
545 bool "MIPS Malta board"
546 select ARCH_MAY_HAVE_PC_FDC
547 select ARCH_MIGHT_HAVE_PC_PARPORT
548 select ARCH_MIGHT_HAVE_PC_SERIO
549 select BOOT_ELF32
550 select BOOT_RAW
551 select BUILTIN_DTB
552 select CEVT_R4K
553 select CLKSRC_MIPS_GIC
554 select COMMON_CLK
555 select CSRC_R4K
556 select DMA_NONCOHERENT
557 select GENERIC_ISA_DMA
558 select HAVE_PCSPKR_PLATFORM
559 select HAVE_PCI
560 select I8253
561 select I8259
562 select IRQ_MIPS_CPU
563 select MIPS_BONITO64
564 select MIPS_CPU_SCACHE
565 select MIPS_GIC
566 select MIPS_L1_CACHE_SHIFT_6
567 select MIPS_MSC
568 select PCI_GT64XXX_PCI0
569 select SMP_UP if SMP
570 select SWAP_IO_SPACE
571 select SYS_HAS_CPU_MIPS32_R1
572 select SYS_HAS_CPU_MIPS32_R2
573 select SYS_HAS_CPU_MIPS32_R3_5
574 select SYS_HAS_CPU_MIPS32_R5
575 select SYS_HAS_CPU_MIPS32_R6
576 select SYS_HAS_CPU_MIPS64_R1
577 select SYS_HAS_CPU_MIPS64_R2
578 select SYS_HAS_CPU_MIPS64_R6
579 select SYS_HAS_CPU_NEVADA
580 select SYS_HAS_CPU_RM7000
581 select SYS_SUPPORTS_32BIT_KERNEL
582 select SYS_SUPPORTS_64BIT_KERNEL
583 select SYS_SUPPORTS_BIG_ENDIAN
584 select SYS_SUPPORTS_HIGHMEM
585 select SYS_SUPPORTS_LITTLE_ENDIAN
586 select SYS_SUPPORTS_MICROMIPS
587 select SYS_SUPPORTS_MIPS16
588 select SYS_SUPPORTS_MIPS_CMP
589 select SYS_SUPPORTS_MIPS_CPS
590 select SYS_SUPPORTS_MULTITHREADING
591 select SYS_SUPPORTS_RELOCATABLE
592 select SYS_SUPPORTS_SMARTMIPS
593 select SYS_SUPPORTS_VPE_LOADER
594 select SYS_SUPPORTS_ZBOOT
595 select USE_OF
596 select WAR_ICACHE_REFILLS
597 select ZONE_DMA32 if 64BIT
598 help
599 This enables support for the MIPS Technologies Malta evaluation
600 board.
601
602config MACH_PIC32
603 bool "Microchip PIC32 Family"
604 help
605 This enables support for the Microchip PIC32 family of platforms.
606
607 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
608 microcontrollers.
609
610config MACH_VR41XX
611 bool "NEC VR4100 series based machines"
612 select CEVT_R4K
613 select CSRC_R4K
614 select SYS_HAS_CPU_VR41XX
615 select SYS_SUPPORTS_MIPS16
616 select GPIOLIB
617
618config MACH_NINTENDO64
619 bool "Nintendo 64 console"
620 select CEVT_R4K
621 select CSRC_R4K
622 select SYS_HAS_CPU_R4300
623 select SYS_SUPPORTS_BIG_ENDIAN
624 select SYS_SUPPORTS_ZBOOT
625 select SYS_SUPPORTS_32BIT_KERNEL
626 select SYS_SUPPORTS_64BIT_KERNEL
627 select DMA_NONCOHERENT
628 select IRQ_MIPS_CPU
629
630config RALINK
631 bool "Ralink based machines"
632 select CEVT_R4K
633 select COMMON_CLK
634 select CSRC_R4K
635 select BOOT_RAW
636 select DMA_NONCOHERENT
637 select IRQ_MIPS_CPU
638 select USE_OF
639 select SYS_HAS_CPU_MIPS32_R1
640 select SYS_HAS_CPU_MIPS32_R2
641 select SYS_SUPPORTS_32BIT_KERNEL
642 select SYS_SUPPORTS_LITTLE_ENDIAN
643 select SYS_SUPPORTS_MIPS16
644 select SYS_SUPPORTS_ZBOOT
645 select SYS_HAS_EARLY_PRINTK
646 select ARCH_HAS_RESET_CONTROLLER
647 select RESET_CONTROLLER
648
649config MACH_REALTEK_RTL
650 bool "Realtek RTL838x/RTL839x based machines"
651 select MIPS_GENERIC
652 select DMA_NONCOHERENT
653 select IRQ_MIPS_CPU
654 select CSRC_R4K
655 select CEVT_R4K
656 select SYS_HAS_CPU_MIPS32_R1
657 select SYS_HAS_CPU_MIPS32_R2
658 select SYS_SUPPORTS_BIG_ENDIAN
659 select SYS_SUPPORTS_32BIT_KERNEL
660 select SYS_SUPPORTS_MIPS16
661 select SYS_SUPPORTS_MULTITHREADING
662 select SYS_SUPPORTS_VPE_LOADER
663 select SYS_HAS_EARLY_PRINTK
664 select SYS_HAS_EARLY_PRINTK_8250
665 select USE_GENERIC_EARLY_PRINTK_8250
666 select BOOT_RAW
667 select PINCTRL
668 select USE_OF
669
670config SGI_IP22
671 bool "SGI IP22 (Indy/Indigo2)"
672 select ARC_MEMORY
673 select ARC_PROMLIB
674 select FW_ARC
675 select FW_ARC32
676 select ARCH_MIGHT_HAVE_PC_SERIO
677 select BOOT_ELF32
678 select CEVT_R4K
679 select CSRC_R4K
680 select DEFAULT_SGI_PARTITION
681 select DMA_NONCOHERENT
682 select HAVE_EISA
683 select I8253
684 select I8259
685 select IP22_CPU_SCACHE
686 select IRQ_MIPS_CPU
687 select GENERIC_ISA_DMA_SUPPORT_BROKEN
688 select SGI_HAS_I8042
689 select SGI_HAS_INDYDOG
690 select SGI_HAS_HAL2
691 select SGI_HAS_SEEQ
692 select SGI_HAS_WD93
693 select SGI_HAS_ZILOG
694 select SWAP_IO_SPACE
695 select SYS_HAS_CPU_R4X00
696 select SYS_HAS_CPU_R5000
697 select SYS_HAS_EARLY_PRINTK
698 select SYS_SUPPORTS_32BIT_KERNEL
699 select SYS_SUPPORTS_64BIT_KERNEL
700 select SYS_SUPPORTS_BIG_ENDIAN
701 select WAR_R4600_V1_INDEX_ICACHEOP
702 select WAR_R4600_V1_HIT_CACHEOP
703 select WAR_R4600_V2_HIT_CACHEOP
704 select MIPS_L1_CACHE_SHIFT_7
705 help
706 This are the SGI Indy, Challenge S and Indigo2, as well as certain
707 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
708 that runs on these, say Y here.
709
710config SGI_IP27
711 bool "SGI IP27 (Origin200/2000)"
712 select ARCH_HAS_PHYS_TO_DMA
713 select ARCH_SPARSEMEM_ENABLE
714 select FW_ARC
715 select FW_ARC64
716 select ARC_CMDLINE_ONLY
717 select BOOT_ELF64
718 select DEFAULT_SGI_PARTITION
719 select FORCE_PCI
720 select SYS_HAS_EARLY_PRINTK
721 select HAVE_PCI
722 select IRQ_MIPS_CPU
723 select IRQ_DOMAIN_HIERARCHY
724 select NR_CPUS_DEFAULT_64
725 select PCI_DRIVERS_GENERIC
726 select PCI_XTALK_BRIDGE
727 select SYS_HAS_CPU_R10000
728 select SYS_SUPPORTS_64BIT_KERNEL
729 select SYS_SUPPORTS_BIG_ENDIAN
730 select SYS_SUPPORTS_NUMA
731 select SYS_SUPPORTS_SMP
732 select WAR_R10000_LLSC
733 select MIPS_L1_CACHE_SHIFT_7
734 select NUMA
735 help
736 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
737 workstations. To compile a Linux kernel that runs on these, say Y
738 here.
739
740config SGI_IP28
741 bool "SGI IP28 (Indigo2 R10k)"
742 select ARC_MEMORY
743 select ARC_PROMLIB
744 select FW_ARC
745 select FW_ARC64
746 select ARCH_MIGHT_HAVE_PC_SERIO
747 select BOOT_ELF64
748 select CEVT_R4K
749 select CSRC_R4K
750 select DEFAULT_SGI_PARTITION
751 select DMA_NONCOHERENT
752 select GENERIC_ISA_DMA_SUPPORT_BROKEN
753 select IRQ_MIPS_CPU
754 select HAVE_EISA
755 select I8253
756 select I8259
757 select SGI_HAS_I8042
758 select SGI_HAS_INDYDOG
759 select SGI_HAS_HAL2
760 select SGI_HAS_SEEQ
761 select SGI_HAS_WD93
762 select SGI_HAS_ZILOG
763 select SWAP_IO_SPACE
764 select SYS_HAS_CPU_R10000
765 select SYS_HAS_EARLY_PRINTK
766 select SYS_SUPPORTS_64BIT_KERNEL
767 select SYS_SUPPORTS_BIG_ENDIAN
768 select WAR_R10000_LLSC
769 select MIPS_L1_CACHE_SHIFT_7
770 help
771 This is the SGI Indigo2 with R10000 processor. To compile a Linux
772 kernel that runs on these, say Y here.
773
774config SGI_IP30
775 bool "SGI IP30 (Octane/Octane2)"
776 select ARCH_HAS_PHYS_TO_DMA
777 select FW_ARC
778 select FW_ARC64
779 select BOOT_ELF64
780 select CEVT_R4K
781 select CSRC_R4K
782 select FORCE_PCI
783 select SYNC_R4K if SMP
784 select ZONE_DMA32
785 select HAVE_PCI
786 select IRQ_MIPS_CPU
787 select IRQ_DOMAIN_HIERARCHY
788 select NR_CPUS_DEFAULT_2
789 select PCI_DRIVERS_GENERIC
790 select PCI_XTALK_BRIDGE
791 select SYS_HAS_EARLY_PRINTK
792 select SYS_HAS_CPU_R10000
793 select SYS_SUPPORTS_64BIT_KERNEL
794 select SYS_SUPPORTS_BIG_ENDIAN
795 select SYS_SUPPORTS_SMP
796 select WAR_R10000_LLSC
797 select MIPS_L1_CACHE_SHIFT_7
798 select ARC_MEMORY
799 help
800 These are the SGI Octane and Octane2 graphics workstations. To
801 compile a Linux kernel that runs on these, say Y here.
802
803config SGI_IP32
804 bool "SGI IP32 (O2)"
805 select ARC_MEMORY
806 select ARC_PROMLIB
807 select ARCH_HAS_PHYS_TO_DMA
808 select FW_ARC
809 select FW_ARC32
810 select BOOT_ELF32
811 select CEVT_R4K
812 select CSRC_R4K
813 select DMA_NONCOHERENT
814 select HAVE_PCI
815 select IRQ_MIPS_CPU
816 select R5000_CPU_SCACHE
817 select RM7000_CPU_SCACHE
818 select SYS_HAS_CPU_R5000
819 select SYS_HAS_CPU_R10000 if BROKEN
820 select SYS_HAS_CPU_RM7000
821 select SYS_HAS_CPU_NEVADA
822 select SYS_SUPPORTS_64BIT_KERNEL
823 select SYS_SUPPORTS_BIG_ENDIAN
824 select WAR_ICACHE_REFILLS
825 help
826 If you want this kernel to run on SGI O2 workstation, say Y here.
827
828config SIBYTE_CRHINE
829 bool "Sibyte BCM91120C-CRhine"
830 select BOOT_ELF32
831 select SIBYTE_BCM1120
832 select SWAP_IO_SPACE
833 select SYS_HAS_CPU_SB1
834 select SYS_SUPPORTS_BIG_ENDIAN
835 select SYS_SUPPORTS_LITTLE_ENDIAN
836
837config SIBYTE_CARMEL
838 bool "Sibyte BCM91120x-Carmel"
839 select BOOT_ELF32
840 select SIBYTE_BCM1120
841 select SWAP_IO_SPACE
842 select SYS_HAS_CPU_SB1
843 select SYS_SUPPORTS_BIG_ENDIAN
844 select SYS_SUPPORTS_LITTLE_ENDIAN
845
846config SIBYTE_CRHONE
847 bool "Sibyte BCM91125C-CRhone"
848 select BOOT_ELF32
849 select SIBYTE_BCM1125
850 select SWAP_IO_SPACE
851 select SYS_HAS_CPU_SB1
852 select SYS_SUPPORTS_BIG_ENDIAN
853 select SYS_SUPPORTS_HIGHMEM
854 select SYS_SUPPORTS_LITTLE_ENDIAN
855
856config SIBYTE_RHONE
857 bool "Sibyte BCM91125E-Rhone"
858 select BOOT_ELF32
859 select SIBYTE_BCM1125H
860 select SWAP_IO_SPACE
861 select SYS_HAS_CPU_SB1
862 select SYS_SUPPORTS_BIG_ENDIAN
863 select SYS_SUPPORTS_LITTLE_ENDIAN
864
865config SIBYTE_SWARM
866 bool "Sibyte BCM91250A-SWARM"
867 select BOOT_ELF32
868 select HAVE_PATA_PLATFORM
869 select SIBYTE_SB1250
870 select SWAP_IO_SPACE
871 select SYS_HAS_CPU_SB1
872 select SYS_SUPPORTS_BIG_ENDIAN
873 select SYS_SUPPORTS_HIGHMEM
874 select SYS_SUPPORTS_LITTLE_ENDIAN
875 select ZONE_DMA32 if 64BIT
876 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
877
878config SIBYTE_LITTLESUR
879 bool "Sibyte BCM91250C2-LittleSur"
880 select BOOT_ELF32
881 select HAVE_PATA_PLATFORM
882 select SIBYTE_SB1250
883 select SWAP_IO_SPACE
884 select SYS_HAS_CPU_SB1
885 select SYS_SUPPORTS_BIG_ENDIAN
886 select SYS_SUPPORTS_HIGHMEM
887 select SYS_SUPPORTS_LITTLE_ENDIAN
888 select ZONE_DMA32 if 64BIT
889
890config SIBYTE_SENTOSA
891 bool "Sibyte BCM91250E-Sentosa"
892 select BOOT_ELF32
893 select SIBYTE_SB1250
894 select SWAP_IO_SPACE
895 select SYS_HAS_CPU_SB1
896 select SYS_SUPPORTS_BIG_ENDIAN
897 select SYS_SUPPORTS_LITTLE_ENDIAN
898 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
899
900config SIBYTE_BIGSUR
901 bool "Sibyte BCM91480B-BigSur"
902 select BOOT_ELF32
903 select NR_CPUS_DEFAULT_4
904 select SIBYTE_BCM1x80
905 select SWAP_IO_SPACE
906 select SYS_HAS_CPU_SB1
907 select SYS_SUPPORTS_BIG_ENDIAN
908 select SYS_SUPPORTS_HIGHMEM
909 select SYS_SUPPORTS_LITTLE_ENDIAN
910 select ZONE_DMA32 if 64BIT
911 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
912
913config SNI_RM
914 bool "SNI RM200/300/400"
915 select ARC_MEMORY
916 select ARC_PROMLIB
917 select FW_ARC if CPU_LITTLE_ENDIAN
918 select FW_ARC32 if CPU_LITTLE_ENDIAN
919 select FW_SNIPROM if CPU_BIG_ENDIAN
920 select ARCH_MAY_HAVE_PC_FDC
921 select ARCH_MIGHT_HAVE_PC_PARPORT
922 select ARCH_MIGHT_HAVE_PC_SERIO
923 select BOOT_ELF32
924 select CEVT_R4K
925 select CSRC_R4K
926 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
927 select DMA_NONCOHERENT
928 select GENERIC_ISA_DMA
929 select HAVE_EISA
930 select HAVE_PCSPKR_PLATFORM
931 select HAVE_PCI
932 select IRQ_MIPS_CPU
933 select I8253
934 select I8259
935 select ISA
936 select MIPS_L1_CACHE_SHIFT_6
937 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
938 select SYS_HAS_CPU_R4X00
939 select SYS_HAS_CPU_R5000
940 select SYS_HAS_CPU_R10000
941 select R5000_CPU_SCACHE
942 select SYS_HAS_EARLY_PRINTK
943 select SYS_SUPPORTS_32BIT_KERNEL
944 select SYS_SUPPORTS_64BIT_KERNEL
945 select SYS_SUPPORTS_BIG_ENDIAN
946 select SYS_SUPPORTS_HIGHMEM
947 select SYS_SUPPORTS_LITTLE_ENDIAN
948 select WAR_R4600_V2_HIT_CACHEOP
949 help
950 The SNI RM200/300/400 are MIPS-based machines manufactured by
951 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
952 Technology and now in turn merged with Fujitsu. Say Y here to
953 support this machine type.
954
955config MACH_TX39XX
956 bool "Toshiba TX39 series based machines"
957
958config MACH_TX49XX
959 bool "Toshiba TX49 series based machines"
960 select WAR_TX49XX_ICACHE_INDEX_INV
961
962config MIKROTIK_RB532
963 bool "Mikrotik RB532 boards"
964 select CEVT_R4K
965 select CSRC_R4K
966 select DMA_NONCOHERENT
967 select HAVE_PCI
968 select IRQ_MIPS_CPU
969 select SYS_HAS_CPU_MIPS32_R1
970 select SYS_SUPPORTS_32BIT_KERNEL
971 select SYS_SUPPORTS_LITTLE_ENDIAN
972 select SWAP_IO_SPACE
973 select BOOT_RAW
974 select GPIOLIB
975 select MIPS_L1_CACHE_SHIFT_4
976 help
977 Support the Mikrotik(tm) RouterBoard 532 series,
978 based on the IDT RC32434 SoC.
979
980config CAVIUM_OCTEON_SOC
981 bool "Cavium Networks Octeon SoC based boards"
982 select CEVT_R4K
983 select ARCH_HAS_PHYS_TO_DMA
984 select HAVE_RAPIDIO
985 select PHYS_ADDR_T_64BIT
986 select SYS_SUPPORTS_64BIT_KERNEL
987 select SYS_SUPPORTS_BIG_ENDIAN
988 select EDAC_SUPPORT
989 select EDAC_ATOMIC_SCRUB
990 select SYS_SUPPORTS_LITTLE_ENDIAN
991 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
992 select SYS_HAS_EARLY_PRINTK
993 select SYS_HAS_CPU_CAVIUM_OCTEON
994 select HAVE_PCI
995 select HAVE_PLAT_DELAY
996 select HAVE_PLAT_FW_INIT_CMDLINE
997 select HAVE_PLAT_MEMCPY
998 select ZONE_DMA32
999 select GPIOLIB
1000 select USE_OF
1001 select ARCH_SPARSEMEM_ENABLE
1002 select SYS_SUPPORTS_SMP
1003 select NR_CPUS_DEFAULT_64
1004 select MIPS_NR_CPU_NR_MAP_1024
1005 select BUILTIN_DTB
1006 select MTD
1007 select MTD_COMPLEX_MAPPINGS
1008 select SWIOTLB
1009 select SYS_SUPPORTS_RELOCATABLE
1010 help
1011 This option supports all of the Octeon reference boards from Cavium
1012 Networks. It builds a kernel that dynamically determines the Octeon
1013 CPU type and supports all known board reference implementations.
1014 Some of the supported boards are:
1015 EBT3000
1016 EBH3000
1017 EBH3100
1018 Thunder
1019 Kodama
1020 Hikari
1021 Say Y here for most Octeon reference boards.
1022
1023config NLM_XLR_BOARD
1024 bool "Netlogic XLR/XLS based systems"
1025 select BOOT_ELF32
1026 select NLM_COMMON
1027 select SYS_HAS_CPU_XLR
1028 select SYS_SUPPORTS_SMP
1029 select HAVE_PCI
1030 select SWAP_IO_SPACE
1031 select SYS_SUPPORTS_32BIT_KERNEL
1032 select SYS_SUPPORTS_64BIT_KERNEL
1033 select PHYS_ADDR_T_64BIT
1034 select SYS_SUPPORTS_BIG_ENDIAN
1035 select SYS_SUPPORTS_HIGHMEM
1036 select NR_CPUS_DEFAULT_32
1037 select CEVT_R4K
1038 select CSRC_R4K
1039 select IRQ_MIPS_CPU
1040 select ZONE_DMA32 if 64BIT
1041 select SYNC_R4K
1042 select SYS_HAS_EARLY_PRINTK
1043 select SYS_SUPPORTS_ZBOOT
1044 select SYS_SUPPORTS_ZBOOT_UART16550
1045 help
1046 Support for systems based on Netlogic XLR and XLS processors.
1047 Say Y here if you have a XLR or XLS based board.
1048
1049config NLM_XLP_BOARD
1050 bool "Netlogic XLP based systems"
1051 select BOOT_ELF32
1052 select NLM_COMMON
1053 select SYS_HAS_CPU_XLP
1054 select SYS_SUPPORTS_SMP
1055 select HAVE_PCI
1056 select SYS_SUPPORTS_32BIT_KERNEL
1057 select SYS_SUPPORTS_64BIT_KERNEL
1058 select PHYS_ADDR_T_64BIT
1059 select GPIOLIB
1060 select SYS_SUPPORTS_BIG_ENDIAN
1061 select SYS_SUPPORTS_LITTLE_ENDIAN
1062 select SYS_SUPPORTS_HIGHMEM
1063 select NR_CPUS_DEFAULT_32
1064 select CEVT_R4K
1065 select CSRC_R4K
1066 select IRQ_MIPS_CPU
1067 select ZONE_DMA32 if 64BIT
1068 select SYNC_R4K
1069 select SYS_HAS_EARLY_PRINTK
1070 select USE_OF
1071 select SYS_SUPPORTS_ZBOOT
1072 select SYS_SUPPORTS_ZBOOT_UART16550
1073 help
1074 This board is based on Netlogic XLP Processor.
1075 Say Y here if you have a XLP based board.
1076
1077endchoice
1078
1079source "arch/mips/alchemy/Kconfig"
1080source "arch/mips/ath25/Kconfig"
1081source "arch/mips/ath79/Kconfig"
1082source "arch/mips/bcm47xx/Kconfig"
1083source "arch/mips/bcm63xx/Kconfig"
1084source "arch/mips/bmips/Kconfig"
1085source "arch/mips/generic/Kconfig"
1086source "arch/mips/ingenic/Kconfig"
1087source "arch/mips/jazz/Kconfig"
1088source "arch/mips/lantiq/Kconfig"
1089source "arch/mips/pic32/Kconfig"
1090source "arch/mips/pistachio/Kconfig"
1091source "arch/mips/ralink/Kconfig"
1092source "arch/mips/sgi-ip27/Kconfig"
1093source "arch/mips/sibyte/Kconfig"
1094source "arch/mips/txx9/Kconfig"
1095source "arch/mips/vr41xx/Kconfig"
1096source "arch/mips/cavium-octeon/Kconfig"
1097source "arch/mips/loongson2ef/Kconfig"
1098source "arch/mips/loongson32/Kconfig"
1099source "arch/mips/loongson64/Kconfig"
1100source "arch/mips/netlogic/Kconfig"
1101
1102endmenu
1103
1104config GENERIC_HWEIGHT
1105 bool
1106 default y
1107
1108config GENERIC_CALIBRATE_DELAY
1109 bool
1110 default y
1111
1112config SCHED_OMIT_FRAME_POINTER
1113 bool
1114 default y
1115
1116#
1117# Select some configuration options automatically based on user selections.
1118#
1119config FW_ARC
1120 bool
1121
1122config ARCH_MAY_HAVE_PC_FDC
1123 bool
1124
1125config BOOT_RAW
1126 bool
1127
1128config CEVT_BCM1480
1129 bool
1130
1131config CEVT_DS1287
1132 bool
1133
1134config CEVT_GT641XX
1135 bool
1136
1137config CEVT_R4K
1138 bool
1139
1140config CEVT_SB1250
1141 bool
1142
1143config CEVT_TXX9
1144 bool
1145
1146config CSRC_BCM1480
1147 bool
1148
1149config CSRC_IOASIC
1150 bool
1151
1152config CSRC_R4K
1153 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1154 bool
1155
1156config CSRC_SB1250
1157 bool
1158
1159config MIPS_CLOCK_VSYSCALL
1160 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1161
1162config GPIO_TXX9
1163 select GPIOLIB
1164 bool
1165
1166config FW_CFE
1167 bool
1168
1169config ARCH_SUPPORTS_UPROBES
1170 bool
1171
1172config DMA_PERDEV_COHERENT
1173 bool
1174 select ARCH_HAS_SETUP_DMA_OPS
1175 select DMA_NONCOHERENT
1176
1177config DMA_NONCOHERENT
1178 bool
1179 #
1180 # MIPS allows mixing "slightly different" Cacheability and Coherency
1181 # Attribute bits. It is believed that the uncached access through
1182 # KSEG1 and the implementation specific "uncached accelerated" used
1183 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1184 # significant advantages.
1185 #
1186 select ARCH_HAS_DMA_WRITE_COMBINE
1187 select ARCH_HAS_DMA_PREP_COHERENT
1188 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1189 select ARCH_HAS_DMA_SET_UNCACHED
1190 select DMA_NONCOHERENT_MMAP
1191 select NEED_DMA_MAP_STATE
1192
1193config SYS_HAS_EARLY_PRINTK
1194 bool
1195
1196config SYS_SUPPORTS_HOTPLUG_CPU
1197 bool
1198
1199config MIPS_BONITO64
1200 bool
1201
1202config MIPS_MSC
1203 bool
1204
1205config SYNC_R4K
1206 bool
1207
1208config NO_IOPORT_MAP
1209 def_bool n
1210
1211config GENERIC_CSUM
1212 def_bool CPU_NO_LOAD_STORE_LR
1213
1214config GENERIC_ISA_DMA
1215 bool
1216 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1217 select ISA_DMA_API
1218
1219config GENERIC_ISA_DMA_SUPPORT_BROKEN
1220 bool
1221 select GENERIC_ISA_DMA
1222
1223config HAVE_PLAT_DELAY
1224 bool
1225
1226config HAVE_PLAT_FW_INIT_CMDLINE
1227 bool
1228
1229config HAVE_PLAT_MEMCPY
1230 bool
1231
1232config ISA_DMA_API
1233 bool
1234
1235config SYS_SUPPORTS_RELOCATABLE
1236 bool
1237 help
1238 Selected if the platform supports relocating the kernel.
1239 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1240 to allow access to command line and entropy sources.
1241
1242config MIPS_CBPF_JIT
1243 def_bool y
1244 depends on BPF_JIT && HAVE_CBPF_JIT
1245
1246config MIPS_EBPF_JIT
1247 def_bool y
1248 depends on BPF_JIT && HAVE_EBPF_JIT
1249
1250
1251#
1252# Endianness selection. Sufficiently obscure so many users don't know what to
1253# answer,so we try hard to limit the available choices. Also the use of a
1254# choice statement should be more obvious to the user.
1255#
1256choice
1257 prompt "Endianness selection"
1258 help
1259 Some MIPS machines can be configured for either little or big endian
1260 byte order. These modes require different kernels and a different
1261 Linux distribution. In general there is one preferred byteorder for a
1262 particular system but some systems are just as commonly used in the
1263 one or the other endianness.
1264
1265config CPU_BIG_ENDIAN
1266 bool "Big endian"
1267 depends on SYS_SUPPORTS_BIG_ENDIAN
1268
1269config CPU_LITTLE_ENDIAN
1270 bool "Little endian"
1271 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1272
1273endchoice
1274
1275config EXPORT_UASM
1276 bool
1277
1278config SYS_SUPPORTS_APM_EMULATION
1279 bool
1280
1281config SYS_SUPPORTS_BIG_ENDIAN
1282 bool
1283
1284config SYS_SUPPORTS_LITTLE_ENDIAN
1285 bool
1286
1287config MIPS_HUGE_TLB_SUPPORT
1288 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1289
1290config IRQ_MSP_SLP
1291 bool
1292
1293config IRQ_MSP_CIC
1294 bool
1295
1296config IRQ_TXX9
1297 bool
1298
1299config IRQ_GT641XX
1300 bool
1301
1302config PCI_GT64XXX_PCI0
1303 bool
1304
1305config PCI_XTALK_BRIDGE
1306 bool
1307
1308config NO_EXCEPT_FILL
1309 bool
1310
1311config MIPS_SPRAM
1312 bool
1313
1314config SWAP_IO_SPACE
1315 bool
1316
1317config SGI_HAS_INDYDOG
1318 bool
1319
1320config SGI_HAS_HAL2
1321 bool
1322
1323config SGI_HAS_SEEQ
1324 bool
1325
1326config SGI_HAS_WD93
1327 bool
1328
1329config SGI_HAS_ZILOG
1330 bool
1331
1332config SGI_HAS_I8042
1333 bool
1334
1335config DEFAULT_SGI_PARTITION
1336 bool
1337
1338config FW_ARC32
1339 bool
1340
1341config FW_SNIPROM
1342 bool
1343
1344config BOOT_ELF32
1345 bool
1346
1347config MIPS_L1_CACHE_SHIFT_4
1348 bool
1349
1350config MIPS_L1_CACHE_SHIFT_5
1351 bool
1352
1353config MIPS_L1_CACHE_SHIFT_6
1354 bool
1355
1356config MIPS_L1_CACHE_SHIFT_7
1357 bool
1358
1359config MIPS_L1_CACHE_SHIFT
1360 int
1361 default "7" if MIPS_L1_CACHE_SHIFT_7
1362 default "6" if MIPS_L1_CACHE_SHIFT_6
1363 default "5" if MIPS_L1_CACHE_SHIFT_5
1364 default "4" if MIPS_L1_CACHE_SHIFT_4
1365 default "5"
1366
1367config ARC_CMDLINE_ONLY
1368 bool
1369
1370config ARC_CONSOLE
1371 bool "ARC console support"
1372 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1373
1374config ARC_MEMORY
1375 bool
1376
1377config ARC_PROMLIB
1378 bool
1379
1380config FW_ARC64
1381 bool
1382
1383config BOOT_ELF64
1384 bool
1385
1386menu "CPU selection"
1387
1388choice
1389 prompt "CPU type"
1390 default CPU_R4X00
1391
1392config CPU_LOONGSON64
1393 bool "Loongson 64-bit CPU"
1394 depends on SYS_HAS_CPU_LOONGSON64
1395 select ARCH_HAS_PHYS_TO_DMA
1396 select CPU_MIPSR2
1397 select CPU_HAS_PREFETCH
1398 select CPU_SUPPORTS_64BIT_KERNEL
1399 select CPU_SUPPORTS_HIGHMEM
1400 select CPU_SUPPORTS_HUGEPAGES
1401 select CPU_SUPPORTS_MSA
1402 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1403 select CPU_MIPSR2_IRQ_VI
1404 select WEAK_ORDERING
1405 select WEAK_REORDERING_BEYOND_LLSC
1406 select MIPS_ASID_BITS_VARIABLE
1407 select MIPS_PGD_C0_CONTEXT
1408 select MIPS_L1_CACHE_SHIFT_6
1409 select GPIOLIB
1410 select SWIOTLB
1411 select HAVE_KVM
1412 help
1413 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1414 cores implements the MIPS64R2 instruction set with many extensions,
1415 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1416 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1417 Loongson-2E/2F is not covered here and will be removed in future.
1418
1419config LOONGSON3_ENHANCEMENT
1420 bool "New Loongson-3 CPU Enhancements"
1421 default n
1422 depends on CPU_LOONGSON64
1423 help
1424 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1425 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1426 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1427 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1428 Fast TLB refill support, etc.
1429
1430 This option enable those enhancements which are not probed at run
1431 time. If you want a generic kernel to run on all Loongson 3 machines,
1432 please say 'N' here. If you want a high-performance kernel to run on
1433 new Loongson-3 machines only, please say 'Y' here.
1434
1435config CPU_LOONGSON3_WORKAROUNDS
1436 bool "Old Loongson-3 LLSC Workarounds"
1437 default y if SMP
1438 depends on CPU_LOONGSON64
1439 help
1440 Loongson-3 processors have the llsc issues which require workarounds.
1441 Without workarounds the system may hang unexpectedly.
1442
1443 Newer Loongson-3 will fix these issues and no workarounds are needed.
1444 The workarounds have no significant side effect on them but may
1445 decrease the performance of the system so this option should be
1446 disabled unless the kernel is intended to be run on old systems.
1447
1448 If unsure, please say Y.
1449
1450config CPU_LOONGSON3_CPUCFG_EMULATION
1451 bool "Emulate the CPUCFG instruction on older Loongson cores"
1452 default y
1453 depends on CPU_LOONGSON64
1454 help
1455 Loongson-3A R4 and newer have the CPUCFG instruction available for
1456 userland to query CPU capabilities, much like CPUID on x86. This
1457 option provides emulation of the instruction on older Loongson
1458 cores, back to Loongson-3A1000.
1459
1460 If unsure, please say Y.
1461
1462config CPU_LOONGSON2E
1463 bool "Loongson 2E"
1464 depends on SYS_HAS_CPU_LOONGSON2E
1465 select CPU_LOONGSON2EF
1466 help
1467 The Loongson 2E processor implements the MIPS III instruction set
1468 with many extensions.
1469
1470 It has an internal FPGA northbridge, which is compatible to
1471 bonito64.
1472
1473config CPU_LOONGSON2F
1474 bool "Loongson 2F"
1475 depends on SYS_HAS_CPU_LOONGSON2F
1476 select CPU_LOONGSON2EF
1477 select GPIOLIB
1478 help
1479 The Loongson 2F processor implements the MIPS III instruction set
1480 with many extensions.
1481
1482 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1483 have a similar programming interface with FPGA northbridge used in
1484 Loongson2E.
1485
1486config CPU_LOONGSON1B
1487 bool "Loongson 1B"
1488 depends on SYS_HAS_CPU_LOONGSON1B
1489 select CPU_LOONGSON32
1490 select LEDS_GPIO_REGISTER
1491 help
1492 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1493 Release 1 instruction set and part of the MIPS32 Release 2
1494 instruction set.
1495
1496config CPU_LOONGSON1C
1497 bool "Loongson 1C"
1498 depends on SYS_HAS_CPU_LOONGSON1C
1499 select CPU_LOONGSON32
1500 select LEDS_GPIO_REGISTER
1501 help
1502 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1503 Release 1 instruction set and part of the MIPS32 Release 2
1504 instruction set.
1505
1506config CPU_MIPS32_R1
1507 bool "MIPS32 Release 1"
1508 depends on SYS_HAS_CPU_MIPS32_R1
1509 select CPU_HAS_PREFETCH
1510 select CPU_SUPPORTS_32BIT_KERNEL
1511 select CPU_SUPPORTS_HIGHMEM
1512 help
1513 Choose this option to build a kernel for release 1 or later of the
1514 MIPS32 architecture. Most modern embedded systems with a 32-bit
1515 MIPS processor are based on a MIPS32 processor. If you know the
1516 specific type of processor in your system, choose those that one
1517 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1518 Release 2 of the MIPS32 architecture is available since several
1519 years so chances are you even have a MIPS32 Release 2 processor
1520 in which case you should choose CPU_MIPS32_R2 instead for better
1521 performance.
1522
1523config CPU_MIPS32_R2
1524 bool "MIPS32 Release 2"
1525 depends on SYS_HAS_CPU_MIPS32_R2
1526 select CPU_HAS_PREFETCH
1527 select CPU_SUPPORTS_32BIT_KERNEL
1528 select CPU_SUPPORTS_HIGHMEM
1529 select CPU_SUPPORTS_MSA
1530 select HAVE_KVM
1531 help
1532 Choose this option to build a kernel for release 2 or later of the
1533 MIPS32 architecture. Most modern embedded systems with a 32-bit
1534 MIPS processor are based on a MIPS32 processor. If you know the
1535 specific type of processor in your system, choose those that one
1536 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1537
1538config CPU_MIPS32_R5
1539 bool "MIPS32 Release 5"
1540 depends on SYS_HAS_CPU_MIPS32_R5
1541 select CPU_HAS_PREFETCH
1542 select CPU_SUPPORTS_32BIT_KERNEL
1543 select CPU_SUPPORTS_HIGHMEM
1544 select CPU_SUPPORTS_MSA
1545 select HAVE_KVM
1546 select MIPS_O32_FP64_SUPPORT
1547 help
1548 Choose this option to build a kernel for release 5 or later of the
1549 MIPS32 architecture. New MIPS processors, starting with the Warrior
1550 family, are based on a MIPS32r5 processor. If you own an older
1551 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1552
1553config CPU_MIPS32_R6
1554 bool "MIPS32 Release 6"
1555 depends on SYS_HAS_CPU_MIPS32_R6
1556 select CPU_HAS_PREFETCH
1557 select CPU_NO_LOAD_STORE_LR
1558 select CPU_SUPPORTS_32BIT_KERNEL
1559 select CPU_SUPPORTS_HIGHMEM
1560 select CPU_SUPPORTS_MSA
1561 select HAVE_KVM
1562 select MIPS_O32_FP64_SUPPORT
1563 help
1564 Choose this option to build a kernel for release 6 or later of the
1565 MIPS32 architecture. New MIPS processors, starting with the Warrior
1566 family, are based on a MIPS32r6 processor. If you own an older
1567 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1568
1569config CPU_MIPS64_R1
1570 bool "MIPS64 Release 1"
1571 depends on SYS_HAS_CPU_MIPS64_R1
1572 select CPU_HAS_PREFETCH
1573 select CPU_SUPPORTS_32BIT_KERNEL
1574 select CPU_SUPPORTS_64BIT_KERNEL
1575 select CPU_SUPPORTS_HIGHMEM
1576 select CPU_SUPPORTS_HUGEPAGES
1577 help
1578 Choose this option to build a kernel for release 1 or later of the
1579 MIPS64 architecture. Many modern embedded systems with a 64-bit
1580 MIPS processor are based on a MIPS64 processor. If you know the
1581 specific type of processor in your system, choose those that one
1582 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1583 Release 2 of the MIPS64 architecture is available since several
1584 years so chances are you even have a MIPS64 Release 2 processor
1585 in which case you should choose CPU_MIPS64_R2 instead for better
1586 performance.
1587
1588config CPU_MIPS64_R2
1589 bool "MIPS64 Release 2"
1590 depends on SYS_HAS_CPU_MIPS64_R2
1591 select CPU_HAS_PREFETCH
1592 select CPU_SUPPORTS_32BIT_KERNEL
1593 select CPU_SUPPORTS_64BIT_KERNEL
1594 select CPU_SUPPORTS_HIGHMEM
1595 select CPU_SUPPORTS_HUGEPAGES
1596 select CPU_SUPPORTS_MSA
1597 select HAVE_KVM
1598 help
1599 Choose this option to build a kernel for release 2 or later of the
1600 MIPS64 architecture. Many modern embedded systems with a 64-bit
1601 MIPS processor are based on a MIPS64 processor. If you know the
1602 specific type of processor in your system, choose those that one
1603 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1604
1605config CPU_MIPS64_R5
1606 bool "MIPS64 Release 5"
1607 depends on SYS_HAS_CPU_MIPS64_R5
1608 select CPU_HAS_PREFETCH
1609 select CPU_SUPPORTS_32BIT_KERNEL
1610 select CPU_SUPPORTS_64BIT_KERNEL
1611 select CPU_SUPPORTS_HIGHMEM
1612 select CPU_SUPPORTS_HUGEPAGES
1613 select CPU_SUPPORTS_MSA
1614 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1615 select HAVE_KVM
1616 help
1617 Choose this option to build a kernel for release 5 or later of the
1618 MIPS64 architecture. This is a intermediate MIPS architecture
1619 release partly implementing release 6 features. Though there is no
1620 any hardware known to be based on this release.
1621
1622config CPU_MIPS64_R6
1623 bool "MIPS64 Release 6"
1624 depends on SYS_HAS_CPU_MIPS64_R6
1625 select CPU_HAS_PREFETCH
1626 select CPU_NO_LOAD_STORE_LR
1627 select CPU_SUPPORTS_32BIT_KERNEL
1628 select CPU_SUPPORTS_64BIT_KERNEL
1629 select CPU_SUPPORTS_HIGHMEM
1630 select CPU_SUPPORTS_HUGEPAGES
1631 select CPU_SUPPORTS_MSA
1632 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1633 select HAVE_KVM
1634 help
1635 Choose this option to build a kernel for release 6 or later of the
1636 MIPS64 architecture. New MIPS processors, starting with the Warrior
1637 family, are based on a MIPS64r6 processor. If you own an older
1638 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1639
1640config CPU_P5600
1641 bool "MIPS Warrior P5600"
1642 depends on SYS_HAS_CPU_P5600
1643 select CPU_HAS_PREFETCH
1644 select CPU_SUPPORTS_32BIT_KERNEL
1645 select CPU_SUPPORTS_HIGHMEM
1646 select CPU_SUPPORTS_MSA
1647 select CPU_SUPPORTS_CPUFREQ
1648 select CPU_MIPSR2_IRQ_VI
1649 select CPU_MIPSR2_IRQ_EI
1650 select HAVE_KVM
1651 select MIPS_O32_FP64_SUPPORT
1652 help
1653 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1654 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1655 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1656 level features like up to six P5600 calculation cores, CM2 with L2
1657 cache, IOCU/IOMMU (though might be unused depending on the system-
1658 specific IP core configuration), GIC, CPC, virtualisation module,
1659 eJTAG and PDtrace.
1660
1661config CPU_R3000
1662 bool "R3000"
1663 depends on SYS_HAS_CPU_R3000
1664 select CPU_HAS_WB
1665 select CPU_R3K_TLB
1666 select CPU_SUPPORTS_32BIT_KERNEL
1667 select CPU_SUPPORTS_HIGHMEM
1668 help
1669 Please make sure to pick the right CPU type. Linux/MIPS is not
1670 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1671 *not* work on R4000 machines and vice versa. However, since most
1672 of the supported machines have an R4000 (or similar) CPU, R4x00
1673 might be a safe bet. If the resulting kernel does not work,
1674 try to recompile with R3000.
1675
1676config CPU_TX39XX
1677 bool "R39XX"
1678 depends on SYS_HAS_CPU_TX39XX
1679 select CPU_SUPPORTS_32BIT_KERNEL
1680 select CPU_R3K_TLB
1681
1682config CPU_VR41XX
1683 bool "R41xx"
1684 depends on SYS_HAS_CPU_VR41XX
1685 select CPU_SUPPORTS_32BIT_KERNEL
1686 select CPU_SUPPORTS_64BIT_KERNEL
1687 help
1688 The options selects support for the NEC VR4100 series of processors.
1689 Only choose this option if you have one of these processors as a
1690 kernel built with this option will not run on any other type of
1691 processor or vice versa.
1692
1693config CPU_R4300
1694 bool "R4300"
1695 depends on SYS_HAS_CPU_R4300
1696 select CPU_SUPPORTS_32BIT_KERNEL
1697 select CPU_SUPPORTS_64BIT_KERNEL
1698 select CPU_HAS_LOAD_STORE_LR
1699 help
1700 MIPS Technologies R4300-series processors.
1701
1702config CPU_R4X00
1703 bool "R4x00"
1704 depends on SYS_HAS_CPU_R4X00
1705 select CPU_SUPPORTS_32BIT_KERNEL
1706 select CPU_SUPPORTS_64BIT_KERNEL
1707 select CPU_SUPPORTS_HUGEPAGES
1708 help
1709 MIPS Technologies R4000-series processors other than 4300, including
1710 the R4000, R4400, R4600, and 4700.
1711
1712config CPU_TX49XX
1713 bool "R49XX"
1714 depends on SYS_HAS_CPU_TX49XX
1715 select CPU_HAS_PREFETCH
1716 select CPU_SUPPORTS_32BIT_KERNEL
1717 select CPU_SUPPORTS_64BIT_KERNEL
1718 select CPU_SUPPORTS_HUGEPAGES
1719
1720config CPU_R5000
1721 bool "R5000"
1722 depends on SYS_HAS_CPU_R5000
1723 select CPU_SUPPORTS_32BIT_KERNEL
1724 select CPU_SUPPORTS_64BIT_KERNEL
1725 select CPU_SUPPORTS_HUGEPAGES
1726 help
1727 MIPS Technologies R5000-series processors other than the Nevada.
1728
1729config CPU_R5500
1730 bool "R5500"
1731 depends on SYS_HAS_CPU_R5500
1732 select CPU_SUPPORTS_32BIT_KERNEL
1733 select CPU_SUPPORTS_64BIT_KERNEL
1734 select CPU_SUPPORTS_HUGEPAGES
1735 help
1736 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1737 instruction set.
1738
1739config CPU_NEVADA
1740 bool "RM52xx"
1741 depends on SYS_HAS_CPU_NEVADA
1742 select CPU_SUPPORTS_32BIT_KERNEL
1743 select CPU_SUPPORTS_64BIT_KERNEL
1744 select CPU_SUPPORTS_HUGEPAGES
1745 help
1746 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1747
1748config CPU_R10000
1749 bool "R10000"
1750 depends on SYS_HAS_CPU_R10000
1751 select CPU_HAS_PREFETCH
1752 select CPU_SUPPORTS_32BIT_KERNEL
1753 select CPU_SUPPORTS_64BIT_KERNEL
1754 select CPU_SUPPORTS_HIGHMEM
1755 select CPU_SUPPORTS_HUGEPAGES
1756 help
1757 MIPS Technologies R10000-series processors.
1758
1759config CPU_RM7000
1760 bool "RM7000"
1761 depends on SYS_HAS_CPU_RM7000
1762 select CPU_HAS_PREFETCH
1763 select CPU_SUPPORTS_32BIT_KERNEL
1764 select CPU_SUPPORTS_64BIT_KERNEL
1765 select CPU_SUPPORTS_HIGHMEM
1766 select CPU_SUPPORTS_HUGEPAGES
1767
1768config CPU_SB1
1769 bool "SB1"
1770 depends on SYS_HAS_CPU_SB1
1771 select CPU_SUPPORTS_32BIT_KERNEL
1772 select CPU_SUPPORTS_64BIT_KERNEL
1773 select CPU_SUPPORTS_HIGHMEM
1774 select CPU_SUPPORTS_HUGEPAGES
1775 select WEAK_ORDERING
1776
1777config CPU_CAVIUM_OCTEON
1778 bool "Cavium Octeon processor"
1779 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1780 select CPU_HAS_PREFETCH
1781 select CPU_SUPPORTS_64BIT_KERNEL
1782 select WEAK_ORDERING
1783 select CPU_SUPPORTS_HIGHMEM
1784 select CPU_SUPPORTS_HUGEPAGES
1785 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1786 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1787 select MIPS_L1_CACHE_SHIFT_7
1788 select HAVE_KVM
1789 help
1790 The Cavium Octeon processor is a highly integrated chip containing
1791 many ethernet hardware widgets for networking tasks. The processor
1792 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1793 Full details can be found at http://www.caviumnetworks.com.
1794
1795config CPU_BMIPS
1796 bool "Broadcom BMIPS"
1797 depends on SYS_HAS_CPU_BMIPS
1798 select CPU_MIPS32
1799 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1800 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1801 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1802 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1803 select CPU_SUPPORTS_32BIT_KERNEL
1804 select DMA_NONCOHERENT
1805 select IRQ_MIPS_CPU
1806 select SWAP_IO_SPACE
1807 select WEAK_ORDERING
1808 select CPU_SUPPORTS_HIGHMEM
1809 select CPU_HAS_PREFETCH
1810 select CPU_SUPPORTS_CPUFREQ
1811 select MIPS_EXTERNAL_TIMER
1812 help
1813 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1814
1815config CPU_XLR
1816 bool "Netlogic XLR SoC"
1817 depends on SYS_HAS_CPU_XLR
1818 select CPU_SUPPORTS_32BIT_KERNEL
1819 select CPU_SUPPORTS_64BIT_KERNEL
1820 select CPU_SUPPORTS_HIGHMEM
1821 select CPU_SUPPORTS_HUGEPAGES
1822 select WEAK_ORDERING
1823 select WEAK_REORDERING_BEYOND_LLSC
1824 help
1825 Netlogic Microsystems XLR/XLS processors.
1826
1827config CPU_XLP
1828 bool "Netlogic XLP SoC"
1829 depends on SYS_HAS_CPU_XLP
1830 select CPU_SUPPORTS_32BIT_KERNEL
1831 select CPU_SUPPORTS_64BIT_KERNEL
1832 select CPU_SUPPORTS_HIGHMEM
1833 select WEAK_ORDERING
1834 select WEAK_REORDERING_BEYOND_LLSC
1835 select CPU_HAS_PREFETCH
1836 select CPU_MIPSR2
1837 select CPU_SUPPORTS_HUGEPAGES
1838 select MIPS_ASID_BITS_VARIABLE
1839 help
1840 Netlogic Microsystems XLP processors.
1841endchoice
1842
1843config CPU_MIPS32_3_5_FEATURES
1844 bool "MIPS32 Release 3.5 Features"
1845 depends on SYS_HAS_CPU_MIPS32_R3_5
1846 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1847 CPU_P5600
1848 help
1849 Choose this option to build a kernel for release 2 or later of the
1850 MIPS32 architecture including features from the 3.5 release such as
1851 support for Enhanced Virtual Addressing (EVA).
1852
1853config CPU_MIPS32_3_5_EVA
1854 bool "Enhanced Virtual Addressing (EVA)"
1855 depends on CPU_MIPS32_3_5_FEATURES
1856 select EVA
1857 default y
1858 help
1859 Choose this option if you want to enable the Enhanced Virtual
1860 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1861 One of its primary benefits is an increase in the maximum size
1862 of lowmem (up to 3GB). If unsure, say 'N' here.
1863
1864config CPU_MIPS32_R5_FEATURES
1865 bool "MIPS32 Release 5 Features"
1866 depends on SYS_HAS_CPU_MIPS32_R5
1867 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1868 help
1869 Choose this option to build a kernel for release 2 or later of the
1870 MIPS32 architecture including features from release 5 such as
1871 support for Extended Physical Addressing (XPA).
1872
1873config CPU_MIPS32_R5_XPA
1874 bool "Extended Physical Addressing (XPA)"
1875 depends on CPU_MIPS32_R5_FEATURES
1876 depends on !EVA
1877 depends on !PAGE_SIZE_4KB
1878 depends on SYS_SUPPORTS_HIGHMEM
1879 select XPA
1880 select HIGHMEM
1881 select PHYS_ADDR_T_64BIT
1882 default n
1883 help
1884 Choose this option if you want to enable the Extended Physical
1885 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1886 benefit is to increase physical addressing equal to or greater
1887 than 40 bits. Note that this has the side effect of turning on
1888 64-bit addressing which in turn makes the PTEs 64-bit in size.
1889 If unsure, say 'N' here.
1890
1891if CPU_LOONGSON2F
1892config CPU_NOP_WORKAROUNDS
1893 bool
1894
1895config CPU_JUMP_WORKAROUNDS
1896 bool
1897
1898config CPU_LOONGSON2F_WORKAROUNDS
1899 bool "Loongson 2F Workarounds"
1900 default y
1901 select CPU_NOP_WORKAROUNDS
1902 select CPU_JUMP_WORKAROUNDS
1903 help
1904 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1905 require workarounds. Without workarounds the system may hang
1906 unexpectedly. For more information please refer to the gas
1907 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1908
1909 Loongson 2F03 and later have fixed these issues and no workarounds
1910 are needed. The workarounds have no significant side effect on them
1911 but may decrease the performance of the system so this option should
1912 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1913 systems.
1914
1915 If unsure, please say Y.
1916endif # CPU_LOONGSON2F
1917
1918config SYS_SUPPORTS_ZBOOT
1919 bool
1920 select HAVE_KERNEL_GZIP
1921 select HAVE_KERNEL_BZIP2
1922 select HAVE_KERNEL_LZ4
1923 select HAVE_KERNEL_LZMA
1924 select HAVE_KERNEL_LZO
1925 select HAVE_KERNEL_XZ
1926 select HAVE_KERNEL_ZSTD
1927
1928config SYS_SUPPORTS_ZBOOT_UART16550
1929 bool
1930 select SYS_SUPPORTS_ZBOOT
1931
1932config SYS_SUPPORTS_ZBOOT_UART_PROM
1933 bool
1934 select SYS_SUPPORTS_ZBOOT
1935
1936config CPU_LOONGSON2EF
1937 bool
1938 select CPU_SUPPORTS_32BIT_KERNEL
1939 select CPU_SUPPORTS_64BIT_KERNEL
1940 select CPU_SUPPORTS_HIGHMEM
1941 select CPU_SUPPORTS_HUGEPAGES
1942 select ARCH_HAS_PHYS_TO_DMA
1943
1944config CPU_LOONGSON32
1945 bool
1946 select CPU_MIPS32
1947 select CPU_MIPSR2
1948 select CPU_HAS_PREFETCH
1949 select CPU_SUPPORTS_32BIT_KERNEL
1950 select CPU_SUPPORTS_HIGHMEM
1951 select CPU_SUPPORTS_CPUFREQ
1952
1953config CPU_BMIPS32_3300
1954 select SMP_UP if SMP
1955 bool
1956
1957config CPU_BMIPS4350
1958 bool
1959 select SYS_SUPPORTS_SMP
1960 select SYS_SUPPORTS_HOTPLUG_CPU
1961
1962config CPU_BMIPS4380
1963 bool
1964 select MIPS_L1_CACHE_SHIFT_6
1965 select SYS_SUPPORTS_SMP
1966 select SYS_SUPPORTS_HOTPLUG_CPU
1967 select CPU_HAS_RIXI
1968
1969config CPU_BMIPS5000
1970 bool
1971 select MIPS_CPU_SCACHE
1972 select MIPS_L1_CACHE_SHIFT_7
1973 select SYS_SUPPORTS_SMP
1974 select SYS_SUPPORTS_HOTPLUG_CPU
1975 select CPU_HAS_RIXI
1976
1977config SYS_HAS_CPU_LOONGSON64
1978 bool
1979 select CPU_SUPPORTS_CPUFREQ
1980 select CPU_HAS_RIXI
1981
1982config SYS_HAS_CPU_LOONGSON2E
1983 bool
1984
1985config SYS_HAS_CPU_LOONGSON2F
1986 bool
1987 select CPU_SUPPORTS_CPUFREQ
1988 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1989
1990config SYS_HAS_CPU_LOONGSON1B
1991 bool
1992
1993config SYS_HAS_CPU_LOONGSON1C
1994 bool
1995
1996config SYS_HAS_CPU_MIPS32_R1
1997 bool
1998
1999config SYS_HAS_CPU_MIPS32_R2
2000 bool
2001
2002config SYS_HAS_CPU_MIPS32_R3_5
2003 bool
2004
2005config SYS_HAS_CPU_MIPS32_R5
2006 bool
2007 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2008
2009config SYS_HAS_CPU_MIPS32_R6
2010 bool
2011 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2012
2013config SYS_HAS_CPU_MIPS64_R1
2014 bool
2015
2016config SYS_HAS_CPU_MIPS64_R2
2017 bool
2018
2019config SYS_HAS_CPU_MIPS64_R6
2020 bool
2021 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2022
2023config SYS_HAS_CPU_P5600
2024 bool
2025 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2026
2027config SYS_HAS_CPU_R3000
2028 bool
2029
2030config SYS_HAS_CPU_TX39XX
2031 bool
2032
2033config SYS_HAS_CPU_VR41XX
2034 bool
2035
2036config SYS_HAS_CPU_R4300
2037 bool
2038
2039config SYS_HAS_CPU_R4X00
2040 bool
2041
2042config SYS_HAS_CPU_TX49XX
2043 bool
2044
2045config SYS_HAS_CPU_R5000
2046 bool
2047
2048config SYS_HAS_CPU_R5500
2049 bool
2050
2051config SYS_HAS_CPU_NEVADA
2052 bool
2053
2054config SYS_HAS_CPU_R10000
2055 bool
2056 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2057
2058config SYS_HAS_CPU_RM7000
2059 bool
2060
2061config SYS_HAS_CPU_SB1
2062 bool
2063
2064config SYS_HAS_CPU_CAVIUM_OCTEON
2065 bool
2066
2067config SYS_HAS_CPU_BMIPS
2068 bool
2069
2070config SYS_HAS_CPU_BMIPS32_3300
2071 bool
2072 select SYS_HAS_CPU_BMIPS
2073
2074config SYS_HAS_CPU_BMIPS4350
2075 bool
2076 select SYS_HAS_CPU_BMIPS
2077
2078config SYS_HAS_CPU_BMIPS4380
2079 bool
2080 select SYS_HAS_CPU_BMIPS
2081
2082config SYS_HAS_CPU_BMIPS5000
2083 bool
2084 select SYS_HAS_CPU_BMIPS
2085 select ARCH_HAS_SYNC_DMA_FOR_CPU
2086
2087config SYS_HAS_CPU_XLR
2088 bool
2089
2090config SYS_HAS_CPU_XLP
2091 bool
2092
2093#
2094# CPU may reorder R->R, R->W, W->R, W->W
2095# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
2096#
2097config WEAK_ORDERING
2098 bool
2099
2100#
2101# CPU may reorder reads and writes beyond LL/SC
2102# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2103#
2104config WEAK_REORDERING_BEYOND_LLSC
2105 bool
2106endmenu
2107
2108#
2109# These two indicate any level of the MIPS32 and MIPS64 architecture
2110#
2111config CPU_MIPS32
2112 bool
2113 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
2114 CPU_MIPS32_R6 || CPU_P5600
2115
2116config CPU_MIPS64
2117 bool
2118 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2119 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
2120
2121#
2122# These indicate the revision of the architecture
2123#
2124config CPU_MIPSR1
2125 bool
2126 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2127
2128config CPU_MIPSR2
2129 bool
2130 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2131 select CPU_HAS_RIXI
2132 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2133 select MIPS_SPRAM
2134
2135config CPU_MIPSR5
2136 bool
2137 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2138 select CPU_HAS_RIXI
2139 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2140 select MIPS_SPRAM
2141
2142config CPU_MIPSR6
2143 bool
2144 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2145 select CPU_HAS_RIXI
2146 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2147 select HAVE_ARCH_BITREVERSE
2148 select MIPS_ASID_BITS_VARIABLE
2149 select MIPS_CRC_SUPPORT
2150 select MIPS_SPRAM
2151
2152config TARGET_ISA_REV
2153 int
2154 default 1 if CPU_MIPSR1
2155 default 2 if CPU_MIPSR2
2156 default 5 if CPU_MIPSR5
2157 default 6 if CPU_MIPSR6
2158 default 0
2159 help
2160 Reflects the ISA revision being targeted by the kernel build. This
2161 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2162
2163config EVA
2164 bool
2165
2166config XPA
2167 bool
2168
2169config SYS_SUPPORTS_32BIT_KERNEL
2170 bool
2171config SYS_SUPPORTS_64BIT_KERNEL
2172 bool
2173config CPU_SUPPORTS_32BIT_KERNEL
2174 bool
2175config CPU_SUPPORTS_64BIT_KERNEL
2176 bool
2177config CPU_SUPPORTS_CPUFREQ
2178 bool
2179config CPU_SUPPORTS_ADDRWINCFG
2180 bool
2181config CPU_SUPPORTS_HUGEPAGES
2182 bool
2183 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
2184config MIPS_PGD_C0_CONTEXT
2185 bool
2186 depends on 64BIT
2187 default y if (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
2188
2189#
2190# Set to y for ptrace access to watch registers.
2191#
2192config HARDWARE_WATCHPOINTS
2193 bool
2194 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2195
2196menu "Kernel type"
2197
2198choice
2199 prompt "Kernel code model"
2200 help
2201 You should only select this option if you have a workload that
2202 actually benefits from 64-bit processing or if your machine has
2203 large memory. You will only be presented a single option in this
2204 menu if your system does not support both 32-bit and 64-bit kernels.
2205
2206config 32BIT
2207 bool "32-bit kernel"
2208 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2209 select TRAD_SIGNALS
2210 help
2211 Select this option if you want to build a 32-bit kernel.
2212
2213config 64BIT
2214 bool "64-bit kernel"
2215 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2216 help
2217 Select this option if you want to build a 64-bit kernel.
2218
2219endchoice
2220
2221config MIPS_VA_BITS_48
2222 bool "48 bits virtual memory"
2223 depends on 64BIT
2224 help
2225 Support a maximum at least 48 bits of application virtual
2226 memory. Default is 40 bits or less, depending on the CPU.
2227 For page sizes 16k and above, this option results in a small
2228 memory overhead for page tables. For 4k page size, a fourth
2229 level of page tables is added which imposes both a memory
2230 overhead as well as slower TLB fault handling.
2231
2232 If unsure, say N.
2233
2234choice
2235 prompt "Kernel page size"
2236 default PAGE_SIZE_4KB
2237
2238config PAGE_SIZE_4KB
2239 bool "4kB"
2240 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2241 help
2242 This option select the standard 4kB Linux page size. On some
2243 R3000-family processors this is the only available page size. Using
2244 4kB page size will minimize memory consumption and is therefore
2245 recommended for low memory systems.
2246
2247config PAGE_SIZE_8KB
2248 bool "8kB"
2249 depends on CPU_CAVIUM_OCTEON
2250 depends on !MIPS_VA_BITS_48
2251 help
2252 Using 8kB page size will result in higher performance kernel at
2253 the price of higher memory consumption. This option is available
2254 only on cnMIPS processors. Note that you will need a suitable Linux
2255 distribution to support this.
2256
2257config PAGE_SIZE_16KB
2258 bool "16kB"
2259 depends on !CPU_R3000 && !CPU_TX39XX
2260 help
2261 Using 16kB page size will result in higher performance kernel at
2262 the price of higher memory consumption. This option is available on
2263 all non-R3000 family processors. Note that you will need a suitable
2264 Linux distribution to support this.
2265
2266config PAGE_SIZE_32KB
2267 bool "32kB"
2268 depends on CPU_CAVIUM_OCTEON
2269 depends on !MIPS_VA_BITS_48
2270 help
2271 Using 32kB page size will result in higher performance kernel at
2272 the price of higher memory consumption. This option is available
2273 only on cnMIPS cores. Note that you will need a suitable Linux
2274 distribution to support this.
2275
2276config PAGE_SIZE_64KB
2277 bool "64kB"
2278 depends on !CPU_R3000 && !CPU_TX39XX
2279 help
2280 Using 64kB page size will result in higher performance kernel at
2281 the price of higher memory consumption. This option is available on
2282 all non-R3000 family processor. Not that at the time of this
2283 writing this option is still high experimental.
2284
2285endchoice
2286
2287config FORCE_MAX_ZONEORDER
2288 int "Maximum zone order"
2289 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2290 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2291 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2292 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2293 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2294 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2295 range 0 64
2296 default "11"
2297 help
2298 The kernel memory allocator divides physically contiguous memory
2299 blocks into "zones", where each zone is a power of two number of
2300 pages. This option selects the largest power of two that the kernel
2301 keeps in the memory allocator. If you need to allocate very large
2302 blocks of physically contiguous memory, then you may need to
2303 increase this value.
2304
2305 This config option is actually maximum order plus one. For example,
2306 a value of 11 means that the largest free memory block is 2^10 pages.
2307
2308 The page size is not necessarily 4KB. Keep this in mind
2309 when choosing a value for this option.
2310
2311config BOARD_SCACHE
2312 bool
2313
2314config IP22_CPU_SCACHE
2315 bool
2316 select BOARD_SCACHE
2317
2318#
2319# Support for a MIPS32 / MIPS64 style S-caches
2320#
2321config MIPS_CPU_SCACHE
2322 bool
2323 select BOARD_SCACHE
2324
2325config R5000_CPU_SCACHE
2326 bool
2327 select BOARD_SCACHE
2328
2329config RM7000_CPU_SCACHE
2330 bool
2331 select BOARD_SCACHE
2332
2333config SIBYTE_DMA_PAGEOPS
2334 bool "Use DMA to clear/copy pages"
2335 depends on CPU_SB1
2336 help
2337 Instead of using the CPU to zero and copy pages, use a Data Mover
2338 channel. These DMA channels are otherwise unused by the standard
2339 SiByte Linux port. Seems to give a small performance benefit.
2340
2341config CPU_HAS_PREFETCH
2342 bool
2343
2344config CPU_GENERIC_DUMP_TLB
2345 bool
2346 default y if !(CPU_R3000 || CPU_TX39XX)
2347
2348config MIPS_FP_SUPPORT
2349 bool "Floating Point support" if EXPERT
2350 default y
2351 help
2352 Select y to include support for floating point in the kernel
2353 including initialization of FPU hardware, FP context save & restore
2354 and emulation of an FPU where necessary. Without this support any
2355 userland program attempting to use floating point instructions will
2356 receive a SIGILL.
2357
2358 If you know that your userland will not attempt to use floating point
2359 instructions then you can say n here to shrink the kernel a little.
2360
2361 If unsure, say y.
2362
2363config CPU_R2300_FPU
2364 bool
2365 depends on MIPS_FP_SUPPORT
2366 default y if CPU_R3000 || CPU_TX39XX
2367
2368config CPU_R3K_TLB
2369 bool
2370
2371config CPU_R4K_FPU
2372 bool
2373 depends on MIPS_FP_SUPPORT
2374 default y if !CPU_R2300_FPU
2375
2376config CPU_R4K_CACHE_TLB
2377 bool
2378 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2379
2380config MIPS_MT_SMP
2381 bool "MIPS MT SMP support (1 TC on each available VPE)"
2382 default y
2383 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2384 select CPU_MIPSR2_IRQ_VI
2385 select CPU_MIPSR2_IRQ_EI
2386 select SYNC_R4K
2387 select MIPS_MT
2388 select SMP
2389 select SMP_UP
2390 select SYS_SUPPORTS_SMP
2391 select SYS_SUPPORTS_SCHED_SMT
2392 select MIPS_PERF_SHARED_TC_COUNTERS
2393 help
2394 This is a kernel model which is known as SMVP. This is supported
2395 on cores with the MT ASE and uses the available VPEs to implement
2396 virtual processors which supports SMP. This is equivalent to the
2397 Intel Hyperthreading feature. For further information go to
2398 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2399
2400config MIPS_MT
2401 bool
2402
2403config SCHED_SMT
2404 bool "SMT (multithreading) scheduler support"
2405 depends on SYS_SUPPORTS_SCHED_SMT
2406 default n
2407 help
2408 SMT scheduler support improves the CPU scheduler's decision making
2409 when dealing with MIPS MT enabled cores at a cost of slightly
2410 increased overhead in some places. If unsure say N here.
2411
2412config SYS_SUPPORTS_SCHED_SMT
2413 bool
2414
2415config SYS_SUPPORTS_MULTITHREADING
2416 bool
2417
2418config MIPS_MT_FPAFF
2419 bool "Dynamic FPU affinity for FP-intensive threads"
2420 default y
2421 depends on MIPS_MT_SMP
2422
2423config MIPSR2_TO_R6_EMULATOR
2424 bool "MIPS R2-to-R6 emulator"
2425 depends on CPU_MIPSR6
2426 depends on MIPS_FP_SUPPORT
2427 default y
2428 help
2429 Choose this option if you want to run non-R6 MIPS userland code.
2430 Even if you say 'Y' here, the emulator will still be disabled by
2431 default. You can enable it using the 'mipsr2emu' kernel option.
2432 The only reason this is a build-time option is to save ~14K from the
2433 final kernel image.
2434
2435config SYS_SUPPORTS_VPE_LOADER
2436 bool
2437 depends on SYS_SUPPORTS_MULTITHREADING
2438 help
2439 Indicates that the platform supports the VPE loader, and provides
2440 physical_memsize.
2441
2442config MIPS_VPE_LOADER
2443 bool "VPE loader support."
2444 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2445 select CPU_MIPSR2_IRQ_VI
2446 select CPU_MIPSR2_IRQ_EI
2447 select MIPS_MT
2448 help
2449 Includes a loader for loading an elf relocatable object
2450 onto another VPE and running it.
2451
2452config MIPS_VPE_LOADER_CMP
2453 bool
2454 default "y"
2455 depends on MIPS_VPE_LOADER && MIPS_CMP
2456
2457config MIPS_VPE_LOADER_MT
2458 bool
2459 default "y"
2460 depends on MIPS_VPE_LOADER && !MIPS_CMP
2461
2462config MIPS_VPE_LOADER_TOM
2463 bool "Load VPE program into memory hidden from linux"
2464 depends on MIPS_VPE_LOADER
2465 default y
2466 help
2467 The loader can use memory that is present but has been hidden from
2468 Linux using the kernel command line option "mem=xxMB". It's up to
2469 you to ensure the amount you put in the option and the space your
2470 program requires is less or equal to the amount physically present.
2471
2472config MIPS_VPE_APSP_API
2473 bool "Enable support for AP/SP API (RTLX)"
2474 depends on MIPS_VPE_LOADER
2475
2476config MIPS_VPE_APSP_API_CMP
2477 bool
2478 default "y"
2479 depends on MIPS_VPE_APSP_API && MIPS_CMP
2480
2481config MIPS_VPE_APSP_API_MT
2482 bool
2483 default "y"
2484 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2485
2486config MIPS_CMP
2487 bool "MIPS CMP framework support (DEPRECATED)"
2488 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2489 select SMP
2490 select SYNC_R4K
2491 select SYS_SUPPORTS_SMP
2492 select WEAK_ORDERING
2493 default n
2494 help
2495 Select this if you are using a bootloader which implements the "CMP
2496 framework" protocol (ie. YAMON) and want your kernel to make use of
2497 its ability to start secondary CPUs.
2498
2499 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2500 instead of this.
2501
2502config MIPS_CPS
2503 bool "MIPS Coherent Processing System support"
2504 depends on SYS_SUPPORTS_MIPS_CPS
2505 select MIPS_CM
2506 select MIPS_CPS_PM if HOTPLUG_CPU
2507 select SMP
2508 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2509 select SYS_SUPPORTS_HOTPLUG_CPU
2510 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2511 select SYS_SUPPORTS_SMP
2512 select WEAK_ORDERING
2513 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2514 help
2515 Select this if you wish to run an SMP kernel across multiple cores
2516 within a MIPS Coherent Processing System. When this option is
2517 enabled the kernel will probe for other cores and boot them with
2518 no external assistance. It is safe to enable this when hardware
2519 support is unavailable.
2520
2521config MIPS_CPS_PM
2522 depends on MIPS_CPS
2523 bool
2524
2525config MIPS_CM
2526 bool
2527 select MIPS_CPC
2528
2529config MIPS_CPC
2530 bool
2531
2532config SB1_PASS_2_WORKAROUNDS
2533 bool
2534 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2535 default y
2536
2537config SB1_PASS_2_1_WORKAROUNDS
2538 bool
2539 depends on CPU_SB1 && CPU_SB1_PASS_2
2540 default y
2541
2542choice
2543 prompt "SmartMIPS or microMIPS ASE support"
2544
2545config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2546 bool "None"
2547 help
2548 Select this if you want neither microMIPS nor SmartMIPS support
2549
2550config CPU_HAS_SMARTMIPS
2551 depends on SYS_SUPPORTS_SMARTMIPS
2552 bool "SmartMIPS"
2553 help
2554 SmartMIPS is a extension of the MIPS32 architecture aimed at
2555 increased security at both hardware and software level for
2556 smartcards. Enabling this option will allow proper use of the
2557 SmartMIPS instructions by Linux applications. However a kernel with
2558 this option will not work on a MIPS core without SmartMIPS core. If
2559 you don't know you probably don't have SmartMIPS and should say N
2560 here.
2561
2562config CPU_MICROMIPS
2563 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2564 bool "microMIPS"
2565 help
2566 When this option is enabled the kernel will be built using the
2567 microMIPS ISA
2568
2569endchoice
2570
2571config CPU_HAS_MSA
2572 bool "Support for the MIPS SIMD Architecture"
2573 depends on CPU_SUPPORTS_MSA
2574 depends on MIPS_FP_SUPPORT
2575 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2576 help
2577 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2578 and a set of SIMD instructions to operate on them. When this option
2579 is enabled the kernel will support allocating & switching MSA
2580 vector register contexts. If you know that your kernel will only be
2581 running on CPUs which do not support MSA or that your userland will
2582 not be making use of it then you may wish to say N here to reduce
2583 the size & complexity of your kernel.
2584
2585 If unsure, say Y.
2586
2587config CPU_HAS_WB
2588 bool
2589
2590config XKS01
2591 bool
2592
2593config CPU_HAS_DIEI
2594 depends on !CPU_DIEI_BROKEN
2595 bool
2596
2597config CPU_DIEI_BROKEN
2598 bool
2599
2600config CPU_HAS_RIXI
2601 bool
2602
2603config CPU_NO_LOAD_STORE_LR
2604 bool
2605 help
2606 CPU lacks support for unaligned load and store instructions:
2607 LWL, LWR, SWL, SWR (Load/store word left/right).
2608 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2609 systems).
2610
2611#
2612# Vectored interrupt mode is an R2 feature
2613#
2614config CPU_MIPSR2_IRQ_VI
2615 bool
2616
2617#
2618# Extended interrupt mode is an R2 feature
2619#
2620config CPU_MIPSR2_IRQ_EI
2621 bool
2622
2623config CPU_HAS_SYNC
2624 bool
2625 depends on !CPU_R3000
2626 default y
2627
2628#
2629# CPU non-features
2630#
2631config CPU_DADDI_WORKAROUNDS
2632 bool
2633
2634config CPU_R4000_WORKAROUNDS
2635 bool
2636 select CPU_R4400_WORKAROUNDS
2637
2638config CPU_R4400_WORKAROUNDS
2639 bool
2640
2641config CPU_R4X00_BUGS64
2642 bool
2643 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2644
2645config MIPS_ASID_SHIFT
2646 int
2647 default 6 if CPU_R3000 || CPU_TX39XX
2648 default 0
2649
2650config MIPS_ASID_BITS
2651 int
2652 default 0 if MIPS_ASID_BITS_VARIABLE
2653 default 6 if CPU_R3000 || CPU_TX39XX
2654 default 8
2655
2656config MIPS_ASID_BITS_VARIABLE
2657 bool
2658
2659config MIPS_CRC_SUPPORT
2660 bool
2661
2662# R4600 erratum. Due to the lack of errata information the exact
2663# technical details aren't known. I've experimentally found that disabling
2664# interrupts during indexed I-cache flushes seems to be sufficient to deal
2665# with the issue.
2666config WAR_R4600_V1_INDEX_ICACHEOP
2667 bool
2668
2669# Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2670#
2671# 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2672# Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2673# executed if there is no other dcache activity. If the dcache is
2674# accessed for another instruction immediately preceding when these
2675# cache instructions are executing, it is possible that the dcache
2676# tag match outputs used by these cache instructions will be
2677# incorrect. These cache instructions should be preceded by at least
2678# four instructions that are not any kind of load or store
2679# instruction.
2680#
2681# This is not allowed: lw
2682# nop
2683# nop
2684# nop
2685# cache Hit_Writeback_Invalidate_D
2686#
2687# This is allowed: lw
2688# nop
2689# nop
2690# nop
2691# nop
2692# cache Hit_Writeback_Invalidate_D
2693config WAR_R4600_V1_HIT_CACHEOP
2694 bool
2695
2696# Writeback and invalidate the primary cache dcache before DMA.
2697#
2698# R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2699# Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2700# operate correctly if the internal data cache refill buffer is empty. These
2701# CACHE instructions should be separated from any potential data cache miss
2702# by a load instruction to an uncached address to empty the response buffer."
2703# (Revision 2.0 device errata from IDT available on https://www.idt.com/
2704# in .pdf format.)
2705config WAR_R4600_V2_HIT_CACHEOP
2706 bool
2707
2708# From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2709# the line which this instruction itself exists, the following
2710# operation is not guaranteed."
2711#
2712# Workaround: do two phase flushing for Index_Invalidate_I
2713config WAR_TX49XX_ICACHE_INDEX_INV
2714 bool
2715
2716# The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2717# opposes it being called that) where invalid instructions in the same
2718# I-cache line worth of instructions being fetched may case spurious
2719# exceptions.
2720config WAR_ICACHE_REFILLS
2721 bool
2722
2723# On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2724# may cause ll / sc and lld / scd sequences to execute non-atomically.
2725config WAR_R10000_LLSC
2726 bool
2727
2728# 34K core erratum: "Problems Executing the TLBR Instruction"
2729config WAR_MIPS34K_MISSED_ITLB
2730 bool
2731
2732#
2733# - Highmem only makes sense for the 32-bit kernel.
2734# - The current highmem code will only work properly on physically indexed
2735# caches such as R3000, SB1, R7000 or those that look like they're virtually
2736# indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2737# moment we protect the user and offer the highmem option only on machines
2738# where it's known to be safe. This will not offer highmem on a few systems
2739# such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2740# indexed CPUs but we're playing safe.
2741# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2742# know they might have memory configurations that could make use of highmem
2743# support.
2744#
2745config HIGHMEM
2746 bool "High Memory Support"
2747 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2748 select KMAP_LOCAL
2749
2750config CPU_SUPPORTS_HIGHMEM
2751 bool
2752
2753config SYS_SUPPORTS_HIGHMEM
2754 bool
2755
2756config SYS_SUPPORTS_SMARTMIPS
2757 bool
2758
2759config SYS_SUPPORTS_MICROMIPS
2760 bool
2761
2762config SYS_SUPPORTS_MIPS16
2763 bool
2764 help
2765 This option must be set if a kernel might be executed on a MIPS16-
2766 enabled CPU even if MIPS16 is not actually being used. In other
2767 words, it makes the kernel MIPS16-tolerant.
2768
2769config CPU_SUPPORTS_MSA
2770 bool
2771
2772config ARCH_FLATMEM_ENABLE
2773 def_bool y
2774 depends on !NUMA && !CPU_LOONGSON2EF
2775
2776config ARCH_SPARSEMEM_ENABLE
2777 bool
2778 select SPARSEMEM_STATIC if !SGI_IP27
2779
2780config NUMA
2781 bool "NUMA Support"
2782 depends on SYS_SUPPORTS_NUMA
2783 select SMP
2784 help
2785 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2786 Access). This option improves performance on systems with more
2787 than two nodes; on two node systems it is generally better to
2788 leave it disabled; on single node systems leave this option
2789 disabled.
2790
2791config SYS_SUPPORTS_NUMA
2792 bool
2793
2794config HAVE_SETUP_PER_CPU_AREA
2795 def_bool y
2796 depends on NUMA
2797
2798config NEED_PER_CPU_EMBED_FIRST_CHUNK
2799 def_bool y
2800 depends on NUMA
2801
2802config RELOCATABLE
2803 bool "Relocatable kernel"
2804 depends on SYS_SUPPORTS_RELOCATABLE
2805 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2806 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2807 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2808 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2809 CPU_LOONGSON64
2810 help
2811 This builds a kernel image that retains relocation information
2812 so it can be loaded someplace besides the default 1MB.
2813 The relocations make the kernel binary about 15% larger,
2814 but are discarded at runtime
2815
2816config RELOCATION_TABLE_SIZE
2817 hex "Relocation table size"
2818 depends on RELOCATABLE
2819 range 0x0 0x01000000
2820 default "0x00200000" if CPU_LOONGSON64
2821 default "0x00100000"
2822 help
2823 A table of relocation data will be appended to the kernel binary
2824 and parsed at boot to fix up the relocated kernel.
2825
2826 This option allows the amount of space reserved for the table to be
2827 adjusted, although the default of 1Mb should be ok in most cases.
2828
2829 The build will fail and a valid size suggested if this is too small.
2830
2831 If unsure, leave at the default value.
2832
2833config RANDOMIZE_BASE
2834 bool "Randomize the address of the kernel image"
2835 depends on RELOCATABLE
2836 help
2837 Randomizes the physical and virtual address at which the
2838 kernel image is loaded, as a security feature that
2839 deters exploit attempts relying on knowledge of the location
2840 of kernel internals.
2841
2842 Entropy is generated using any coprocessor 0 registers available.
2843
2844 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2845
2846 If unsure, say N.
2847
2848config RANDOMIZE_BASE_MAX_OFFSET
2849 hex "Maximum kASLR offset" if EXPERT
2850 depends on RANDOMIZE_BASE
2851 range 0x0 0x40000000 if EVA || 64BIT
2852 range 0x0 0x08000000
2853 default "0x01000000"
2854 help
2855 When kASLR is active, this provides the maximum offset that will
2856 be applied to the kernel image. It should be set according to the
2857 amount of physical RAM available in the target system minus
2858 PHYSICAL_START and must be a power of 2.
2859
2860 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2861 EVA or 64-bit. The default is 16Mb.
2862
2863config NODES_SHIFT
2864 int
2865 default "6"
2866 depends on NUMA
2867
2868config HW_PERF_EVENTS
2869 bool "Enable hardware performance counter support for perf events"
2870 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
2871 default y
2872 help
2873 Enable hardware performance counter support for perf events. If
2874 disabled, perf events will use software events only.
2875
2876config DMI
2877 bool "Enable DMI scanning"
2878 depends on MACH_LOONGSON64
2879 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2880 default y
2881 help
2882 Enabled scanning of DMI to identify machine quirks. Say Y
2883 here unless you have verified that your setup is not
2884 affected by entries in the DMI blacklist. Required by PNP
2885 BIOS code.
2886
2887config SMP
2888 bool "Multi-Processing support"
2889 depends on SYS_SUPPORTS_SMP
2890 help
2891 This enables support for systems with more than one CPU. If you have
2892 a system with only one CPU, say N. If you have a system with more
2893 than one CPU, say Y.
2894
2895 If you say N here, the kernel will run on uni- and multiprocessor
2896 machines, but will use only one CPU of a multiprocessor machine. If
2897 you say Y here, the kernel will run on many, but not all,
2898 uniprocessor machines. On a uniprocessor machine, the kernel
2899 will run faster if you say N here.
2900
2901 People using multiprocessor machines who say Y here should also say
2902 Y to "Enhanced Real Time Clock Support", below.
2903
2904 See also the SMP-HOWTO available at
2905 <https://www.tldp.org/docs.html#howto>.
2906
2907 If you don't know what to do here, say N.
2908
2909config HOTPLUG_CPU
2910 bool "Support for hot-pluggable CPUs"
2911 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2912 help
2913 Say Y here to allow turning CPUs off and on. CPUs can be
2914 controlled through /sys/devices/system/cpu.
2915 (Note: power management support will enable this option
2916 automatically on SMP systems. )
2917 Say N if you want to disable CPU hotplug.
2918
2919config SMP_UP
2920 bool
2921
2922config SYS_SUPPORTS_MIPS_CMP
2923 bool
2924
2925config SYS_SUPPORTS_MIPS_CPS
2926 bool
2927
2928config SYS_SUPPORTS_SMP
2929 bool
2930
2931config NR_CPUS_DEFAULT_4
2932 bool
2933
2934config NR_CPUS_DEFAULT_8
2935 bool
2936
2937config NR_CPUS_DEFAULT_16
2938 bool
2939
2940config NR_CPUS_DEFAULT_32
2941 bool
2942
2943config NR_CPUS_DEFAULT_64
2944 bool
2945
2946config NR_CPUS
2947 int "Maximum number of CPUs (2-256)"
2948 range 2 256
2949 depends on SMP
2950 default "4" if NR_CPUS_DEFAULT_4
2951 default "8" if NR_CPUS_DEFAULT_8
2952 default "16" if NR_CPUS_DEFAULT_16
2953 default "32" if NR_CPUS_DEFAULT_32
2954 default "64" if NR_CPUS_DEFAULT_64
2955 help
2956 This allows you to specify the maximum number of CPUs which this
2957 kernel will support. The maximum supported value is 32 for 32-bit
2958 kernel and 64 for 64-bit kernels; the minimum value which makes
2959 sense is 1 for Qemu (useful only for kernel debugging purposes)
2960 and 2 for all others.
2961
2962 This is purely to save memory - each supported CPU adds
2963 approximately eight kilobytes to the kernel image. For best
2964 performance should round up your number of processors to the next
2965 power of two.
2966
2967config MIPS_PERF_SHARED_TC_COUNTERS
2968 bool
2969
2970config MIPS_NR_CPU_NR_MAP_1024
2971 bool
2972
2973config MIPS_NR_CPU_NR_MAP
2974 int
2975 depends on SMP
2976 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2977 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2978
2979#
2980# Timer Interrupt Frequency Configuration
2981#
2982
2983choice
2984 prompt "Timer frequency"
2985 default HZ_250
2986 help
2987 Allows the configuration of the timer frequency.
2988
2989 config HZ_24
2990 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2991
2992 config HZ_48
2993 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2994
2995 config HZ_100
2996 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2997
2998 config HZ_128
2999 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
3000
3001 config HZ_250
3002 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
3003
3004 config HZ_256
3005 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
3006
3007 config HZ_1000
3008 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
3009
3010 config HZ_1024
3011 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
3012
3013endchoice
3014
3015config SYS_SUPPORTS_24HZ
3016 bool
3017
3018config SYS_SUPPORTS_48HZ
3019 bool
3020
3021config SYS_SUPPORTS_100HZ
3022 bool
3023
3024config SYS_SUPPORTS_128HZ
3025 bool
3026
3027config SYS_SUPPORTS_250HZ
3028 bool
3029
3030config SYS_SUPPORTS_256HZ
3031 bool
3032
3033config SYS_SUPPORTS_1000HZ
3034 bool
3035
3036config SYS_SUPPORTS_1024HZ
3037 bool
3038
3039config SYS_SUPPORTS_ARBIT_HZ
3040 bool
3041 default y if !SYS_SUPPORTS_24HZ && \
3042 !SYS_SUPPORTS_48HZ && \
3043 !SYS_SUPPORTS_100HZ && \
3044 !SYS_SUPPORTS_128HZ && \
3045 !SYS_SUPPORTS_250HZ && \
3046 !SYS_SUPPORTS_256HZ && \
3047 !SYS_SUPPORTS_1000HZ && \
3048 !SYS_SUPPORTS_1024HZ
3049
3050config HZ
3051 int
3052 default 24 if HZ_24
3053 default 48 if HZ_48
3054 default 100 if HZ_100
3055 default 128 if HZ_128
3056 default 250 if HZ_250
3057 default 256 if HZ_256
3058 default 1000 if HZ_1000
3059 default 1024 if HZ_1024
3060
3061config SCHED_HRTICK
3062 def_bool HIGH_RES_TIMERS
3063
3064config KEXEC
3065 bool "Kexec system call"
3066 select KEXEC_CORE
3067 help
3068 kexec is a system call that implements the ability to shutdown your
3069 current kernel, and to start another kernel. It is like a reboot
3070 but it is independent of the system firmware. And like a reboot
3071 you can start any kernel with it, not just Linux.
3072
3073 The name comes from the similarity to the exec system call.
3074
3075 It is an ongoing process to be certain the hardware in a machine
3076 is properly shutdown, so do not be surprised if this code does not
3077 initially work for you. As of this writing the exact hardware
3078 interface is strongly in flux, so no good recommendation can be
3079 made.
3080
3081config CRASH_DUMP
3082 bool "Kernel crash dumps"
3083 help
3084 Generate crash dump after being started by kexec.
3085 This should be normally only set in special crash dump kernels
3086 which are loaded in the main kernel with kexec-tools into
3087 a specially reserved region and then later executed after
3088 a crash by kdump/kexec. The crash dump kernel must be compiled
3089 to a memory address not used by the main kernel or firmware using
3090 PHYSICAL_START.
3091
3092config PHYSICAL_START
3093 hex "Physical address where the kernel is loaded"
3094 default "0xffffffff84000000"
3095 depends on CRASH_DUMP
3096 help
3097 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
3098 If you plan to use kernel for capturing the crash dump change
3099 this value to start of the reserved region (the "X" value as
3100 specified in the "crashkernel=YM@XM" command line boot parameter
3101 passed to the panic-ed kernel).
3102
3103config MIPS_O32_FP64_SUPPORT
3104 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
3105 depends on 32BIT || MIPS32_O32
3106 help
3107 When this is enabled, the kernel will support use of 64-bit floating
3108 point registers with binaries using the O32 ABI along with the
3109 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3110 32-bit MIPS systems this support is at the cost of increasing the
3111 size and complexity of the compiled FPU emulator. Thus if you are
3112 running a MIPS32 system and know that none of your userland binaries
3113 will require 64-bit floating point, you may wish to reduce the size
3114 of your kernel & potentially improve FP emulation performance by
3115 saying N here.
3116
3117 Although binutils currently supports use of this flag the details
3118 concerning its effect upon the O32 ABI in userland are still being
3119 worked on. In order to avoid userland becoming dependent upon current
3120 behaviour before the details have been finalised, this option should
3121 be considered experimental and only enabled by those working upon
3122 said details.
3123
3124 If unsure, say N.
3125
3126config USE_OF
3127 bool
3128 select OF
3129 select OF_EARLY_FLATTREE
3130 select IRQ_DOMAIN
3131
3132config UHI_BOOT
3133 bool
3134
3135config BUILTIN_DTB
3136 bool
3137
3138choice
3139 prompt "Kernel appended dtb support" if USE_OF
3140 default MIPS_NO_APPENDED_DTB
3141
3142 config MIPS_NO_APPENDED_DTB
3143 bool "None"
3144 help
3145 Do not enable appended dtb support.
3146
3147 config MIPS_ELF_APPENDED_DTB
3148 bool "vmlinux"
3149 help
3150 With this option, the boot code will look for a device tree binary
3151 DTB) included in the vmlinux ELF section .appended_dtb. By default
3152 it is empty and the DTB can be appended using binutils command
3153 objcopy:
3154
3155 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3156
3157 This is meant as a backward compatibility convenience for those
3158 systems with a bootloader that can't be upgraded to accommodate
3159 the documented boot protocol using a device tree.
3160
3161 config MIPS_RAW_APPENDED_DTB
3162 bool "vmlinux.bin or vmlinuz.bin"
3163 help
3164 With this option, the boot code will look for a device tree binary
3165 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3166 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3167
3168 This is meant as a backward compatibility convenience for those
3169 systems with a bootloader that can't be upgraded to accommodate
3170 the documented boot protocol using a device tree.
3171
3172 Beware that there is very little in terms of protection against
3173 this option being confused by leftover garbage in memory that might
3174 look like a DTB header after a reboot if no actual DTB is appended
3175 to vmlinux.bin. Do not leave this option active in a production kernel
3176 if you don't intend to always append a DTB.
3177endchoice
3178
3179choice
3180 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3181 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3182 !MACH_LOONGSON64 && !MIPS_MALTA && \
3183 !CAVIUM_OCTEON_SOC
3184 default MIPS_CMDLINE_FROM_BOOTLOADER
3185
3186 config MIPS_CMDLINE_FROM_DTB
3187 depends on USE_OF
3188 bool "Dtb kernel arguments if available"
3189
3190 config MIPS_CMDLINE_DTB_EXTEND
3191 depends on USE_OF
3192 bool "Extend dtb kernel arguments with bootloader arguments"
3193
3194 config MIPS_CMDLINE_FROM_BOOTLOADER
3195 bool "Bootloader kernel arguments if available"
3196
3197 config MIPS_CMDLINE_BUILTIN_EXTEND
3198 depends on CMDLINE_BOOL
3199 bool "Extend builtin kernel arguments with bootloader arguments"
3200endchoice
3201
3202endmenu
3203
3204config LOCKDEP_SUPPORT
3205 bool
3206 default y
3207
3208config STACKTRACE_SUPPORT
3209 bool
3210 default y
3211
3212config PGTABLE_LEVELS
3213 int
3214 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3215 default 3 if 64BIT && !PAGE_SIZE_64KB
3216 default 2
3217
3218config MIPS_AUTO_PFN_OFFSET
3219 bool
3220
3221menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3222
3223config PCI_DRIVERS_GENERIC
3224 select PCI_DOMAINS_GENERIC if PCI
3225 bool
3226
3227config PCI_DRIVERS_LEGACY
3228 def_bool !PCI_DRIVERS_GENERIC
3229 select NO_GENERIC_PCI_IOPORT_MAP
3230 select PCI_DOMAINS if PCI
3231
3232#
3233# ISA support is now enabled via select. Too many systems still have the one
3234# or other ISA chip on the board that users don't know about so don't expect
3235# users to choose the right thing ...
3236#
3237config ISA
3238 bool
3239
3240config TC
3241 bool "TURBOchannel support"
3242 depends on MACH_DECSTATION
3243 help
3244 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3245 processors. TURBOchannel programming specifications are available
3246 at:
3247 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3248 and:
3249 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3250 Linux driver support status is documented at:
3251 <http://www.linux-mips.org/wiki/DECstation>
3252
3253config MMU
3254 bool
3255 default y
3256
3257config ARCH_MMAP_RND_BITS_MIN
3258 default 12 if 64BIT
3259 default 8
3260
3261config ARCH_MMAP_RND_BITS_MAX
3262 default 18 if 64BIT
3263 default 15
3264
3265config ARCH_MMAP_RND_COMPAT_BITS_MIN
3266 default 8
3267
3268config ARCH_MMAP_RND_COMPAT_BITS_MAX
3269 default 15
3270
3271config I8253
3272 bool
3273 select CLKSRC_I8253
3274 select CLKEVT_I8253
3275 select MIPS_EXTERNAL_TIMER
3276endmenu
3277
3278config TRAD_SIGNALS
3279 bool
3280
3281config MIPS32_COMPAT
3282 bool
3283
3284config COMPAT
3285 bool
3286
3287config SYSVIPC_COMPAT
3288 bool
3289
3290config MIPS32_O32
3291 bool "Kernel support for o32 binaries"
3292 depends on 64BIT
3293 select ARCH_WANT_OLD_COMPAT_IPC
3294 select COMPAT
3295 select MIPS32_COMPAT
3296 select SYSVIPC_COMPAT if SYSVIPC
3297 help
3298 Select this option if you want to run o32 binaries. These are pure
3299 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3300 existing binaries are in this format.
3301
3302 If unsure, say Y.
3303
3304config MIPS32_N32
3305 bool "Kernel support for n32 binaries"
3306 depends on 64BIT
3307 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3308 select COMPAT
3309 select MIPS32_COMPAT
3310 select SYSVIPC_COMPAT if SYSVIPC
3311 help
3312 Select this option if you want to run n32 binaries. These are
3313 64-bit binaries using 32-bit quantities for addressing and certain
3314 data that would normally be 64-bit. They are used in special
3315 cases.
3316
3317 If unsure, say N.
3318
3319menu "Power management options"
3320
3321config ARCH_HIBERNATION_POSSIBLE
3322 def_bool y
3323 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3324
3325config ARCH_SUSPEND_POSSIBLE
3326 def_bool y
3327 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3328
3329source "kernel/power/Kconfig"
3330
3331endmenu
3332
3333config MIPS_EXTERNAL_TIMER
3334 bool
3335
3336menu "CPU Power Management"
3337
3338if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3339source "drivers/cpufreq/Kconfig"
3340endif
3341
3342source "drivers/cpuidle/Kconfig"
3343
3344endmenu
3345
3346source "drivers/firmware/Kconfig"
3347
3348source "arch/mips/kvm/Kconfig"
3349
3350source "arch/mips/vdso/Kconfig"
1# SPDX-License-Identifier: GPL-2.0
2config MIPS
3 bool
4 default y
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_CPU_FINALIZE_INIT
8 select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000
9 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
10 select ARCH_HAS_FORTIFY_SOURCE
11 select ARCH_HAS_KCOV
12 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
13 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
14 select ARCH_HAS_STRNCPY_FROM_USER
15 select ARCH_HAS_STRNLEN_USER
16 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
17 select ARCH_HAS_UBSAN_SANITIZE_ALL
18 select ARCH_HAS_GCOV_PROFILE_ALL
19 select ARCH_KEEP_MEMBLOCK
20 select ARCH_USE_BUILTIN_BSWAP
21 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
22 select ARCH_USE_MEMTEST
23 select ARCH_USE_QUEUED_RWLOCKS
24 select ARCH_USE_QUEUED_SPINLOCKS
25 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
26 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
27 select ARCH_WANT_IPC_PARSE_VERSION
28 select ARCH_WANT_LD_ORPHAN_WARN
29 select BUILDTIME_TABLE_SORT
30 select CLONE_BACKWARDS
31 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
32 select CPU_PM if CPU_IDLE
33 select GENERIC_ATOMIC64 if !64BIT
34 select GENERIC_CMOS_UPDATE
35 select GENERIC_CPU_AUTOPROBE
36 select GENERIC_GETTIMEOFDAY
37 select GENERIC_IOMAP
38 select GENERIC_IRQ_PROBE
39 select GENERIC_IRQ_SHOW
40 select GENERIC_ISA_DMA if EISA
41 select GENERIC_LIB_ASHLDI3
42 select GENERIC_LIB_ASHRDI3
43 select GENERIC_LIB_CMPDI2
44 select GENERIC_LIB_LSHRDI3
45 select GENERIC_LIB_UCMPDI2
46 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
47 select GENERIC_SMP_IDLE_THREAD
48 select GENERIC_IDLE_POLL_SETUP
49 select GENERIC_TIME_VSYSCALL
50 select GUP_GET_PXX_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
51 select HAS_IOPORT if !NO_IOPORT_MAP || ISA
52 select HAVE_ARCH_COMPILER_H
53 select HAVE_ARCH_JUMP_LABEL
54 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
55 select HAVE_ARCH_MMAP_RND_BITS if MMU
56 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
57 select HAVE_ARCH_SECCOMP_FILTER
58 select HAVE_ARCH_TRACEHOOK
59 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
60 select HAVE_ASM_MODVERSIONS
61 select HAVE_CONTEXT_TRACKING_USER
62 select HAVE_TIF_NOHZ
63 select HAVE_C_RECORDMCOUNT
64 select HAVE_DEBUG_KMEMLEAK
65 select HAVE_DEBUG_STACKOVERFLOW
66 select HAVE_DMA_CONTIGUOUS
67 select HAVE_DYNAMIC_FTRACE
68 select HAVE_EBPF_JIT if !CPU_MICROMIPS
69 select HAVE_EXIT_THREAD
70 select HAVE_FAST_GUP
71 select HAVE_FTRACE_MCOUNT_RECORD
72 select HAVE_FUNCTION_GRAPH_TRACER
73 select HAVE_FUNCTION_TRACER
74 select HAVE_GCC_PLUGINS
75 select HAVE_GENERIC_VDSO
76 select HAVE_IOREMAP_PROT
77 select HAVE_IRQ_EXIT_ON_IRQ_STACK
78 select HAVE_IRQ_TIME_ACCOUNTING
79 select HAVE_KPROBES
80 select HAVE_KRETPROBES
81 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
82 select HAVE_MOD_ARCH_SPECIFIC
83 select HAVE_NMI
84 select HAVE_PERF_EVENTS
85 select HAVE_PERF_REGS
86 select HAVE_PERF_USER_STACK_DUMP
87 select HAVE_REGS_AND_STACK_ACCESS_API
88 select HAVE_RSEQ
89 select HAVE_SPARSE_SYSCALL_NR
90 select HAVE_STACKPROTECTOR
91 select HAVE_SYSCALL_TRACEPOINTS
92 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
93 select IRQ_FORCED_THREADING
94 select ISA if EISA
95 select LOCK_MM_AND_FIND_VMA
96 select MODULES_USE_ELF_REL if MODULES
97 select MODULES_USE_ELF_RELA if MODULES && 64BIT
98 select PERF_USE_VMALLOC
99 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
100 select RTC_LIB
101 select SYSCTL_EXCEPTION_TRACE
102 select TRACE_IRQFLAGS_SUPPORT
103 select ARCH_HAS_ELFCORE_COMPAT
104 select HAVE_ARCH_KCSAN if 64BIT
105
106config MIPS_FIXUP_BIGPHYS_ADDR
107 bool
108
109config MIPS_GENERIC
110 bool
111
112config MACH_INGENIC
113 bool
114 select SYS_SUPPORTS_32BIT_KERNEL
115 select SYS_SUPPORTS_LITTLE_ENDIAN
116 select SYS_SUPPORTS_ZBOOT
117 select DMA_NONCOHERENT
118 select IRQ_MIPS_CPU
119 select PINCTRL
120 select GPIOLIB
121 select COMMON_CLK
122 select GENERIC_IRQ_CHIP
123 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
124 select USE_OF
125 select CPU_SUPPORTS_CPUFREQ
126 select MIPS_EXTERNAL_TIMER
127
128menu "Machine selection"
129
130choice
131 prompt "System type"
132 default MIPS_GENERIC_KERNEL
133
134config MIPS_GENERIC_KERNEL
135 bool "Generic board-agnostic MIPS kernel"
136 select MIPS_GENERIC
137 select BOOT_RAW
138 select BUILTIN_DTB
139 select CEVT_R4K
140 select CLKSRC_MIPS_GIC
141 select COMMON_CLK
142 select CPU_MIPSR2_IRQ_EI
143 select CPU_MIPSR2_IRQ_VI
144 select CSRC_R4K
145 select DMA_NONCOHERENT
146 select HAVE_PCI
147 select IRQ_MIPS_CPU
148 select MIPS_AUTO_PFN_OFFSET
149 select MIPS_CPU_SCACHE
150 select MIPS_GIC
151 select MIPS_L1_CACHE_SHIFT_7
152 select NO_EXCEPT_FILL
153 select PCI_DRIVERS_GENERIC
154 select SMP_UP if SMP
155 select SWAP_IO_SPACE
156 select SYS_HAS_CPU_MIPS32_R1
157 select SYS_HAS_CPU_MIPS32_R2
158 select SYS_HAS_CPU_MIPS32_R5
159 select SYS_HAS_CPU_MIPS32_R6
160 select SYS_HAS_CPU_MIPS64_R1
161 select SYS_HAS_CPU_MIPS64_R2
162 select SYS_HAS_CPU_MIPS64_R5
163 select SYS_HAS_CPU_MIPS64_R6
164 select SYS_SUPPORTS_32BIT_KERNEL
165 select SYS_SUPPORTS_64BIT_KERNEL
166 select SYS_SUPPORTS_BIG_ENDIAN
167 select SYS_SUPPORTS_HIGHMEM
168 select SYS_SUPPORTS_LITTLE_ENDIAN
169 select SYS_SUPPORTS_MICROMIPS
170 select SYS_SUPPORTS_MIPS16
171 select SYS_SUPPORTS_MIPS_CPS
172 select SYS_SUPPORTS_MULTITHREADING
173 select SYS_SUPPORTS_RELOCATABLE
174 select SYS_SUPPORTS_SMARTMIPS
175 select SYS_SUPPORTS_ZBOOT
176 select UHI_BOOT
177 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
178 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
179 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
180 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
181 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
182 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
183 select USE_OF
184 help
185 Select this to build a kernel which aims to support multiple boards,
186 generally using a flattened device tree passed from the bootloader
187 using the boot protocol defined in the UHI (Unified Hosting
188 Interface) specification.
189
190config MIPS_ALCHEMY
191 bool "Alchemy processor based machines"
192 select PHYS_ADDR_T_64BIT
193 select CEVT_R4K
194 select CSRC_R4K
195 select IRQ_MIPS_CPU
196 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
197 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
198 select SYS_HAS_CPU_MIPS32_R1
199 select SYS_SUPPORTS_32BIT_KERNEL
200 select SYS_SUPPORTS_APM_EMULATION
201 select GPIOLIB
202 select SYS_SUPPORTS_ZBOOT
203 select COMMON_CLK
204
205config ATH25
206 bool "Atheros AR231x/AR531x SoC support"
207 select CEVT_R4K
208 select CSRC_R4K
209 select DMA_NONCOHERENT
210 select IRQ_MIPS_CPU
211 select IRQ_DOMAIN
212 select SYS_HAS_CPU_MIPS32_R1
213 select SYS_SUPPORTS_BIG_ENDIAN
214 select SYS_SUPPORTS_32BIT_KERNEL
215 select SYS_HAS_EARLY_PRINTK
216 help
217 Support for Atheros AR231x and Atheros AR531x based boards
218
219config ATH79
220 bool "Atheros AR71XX/AR724X/AR913X based boards"
221 select ARCH_HAS_RESET_CONTROLLER
222 select BOOT_RAW
223 select CEVT_R4K
224 select CSRC_R4K
225 select DMA_NONCOHERENT
226 select GPIOLIB
227 select PINCTRL
228 select COMMON_CLK
229 select IRQ_MIPS_CPU
230 select SYS_HAS_CPU_MIPS32_R2
231 select SYS_HAS_EARLY_PRINTK
232 select SYS_SUPPORTS_32BIT_KERNEL
233 select SYS_SUPPORTS_BIG_ENDIAN
234 select SYS_SUPPORTS_MIPS16
235 select SYS_SUPPORTS_ZBOOT_UART_PROM
236 select USE_OF
237 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
238 help
239 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
240
241config BMIPS_GENERIC
242 bool "Broadcom Generic BMIPS kernel"
243 select ARCH_HAS_RESET_CONTROLLER
244 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
245 select BOOT_RAW
246 select NO_EXCEPT_FILL
247 select USE_OF
248 select CEVT_R4K
249 select CSRC_R4K
250 select SYNC_R4K
251 select COMMON_CLK
252 select BCM6345_L1_IRQ
253 select BCM7038_L1_IRQ
254 select BCM7120_L2_IRQ
255 select BRCMSTB_L2_IRQ
256 select IRQ_MIPS_CPU
257 select DMA_NONCOHERENT
258 select SYS_SUPPORTS_32BIT_KERNEL
259 select SYS_SUPPORTS_LITTLE_ENDIAN
260 select SYS_SUPPORTS_BIG_ENDIAN
261 select SYS_SUPPORTS_HIGHMEM
262 select SYS_HAS_CPU_BMIPS32_3300
263 select SYS_HAS_CPU_BMIPS4350
264 select SYS_HAS_CPU_BMIPS4380
265 select SYS_HAS_CPU_BMIPS5000
266 select SWAP_IO_SPACE
267 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
268 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
269 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
270 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
271 select HARDIRQS_SW_RESEND
272 select HAVE_PCI
273 select PCI_DRIVERS_GENERIC
274 select FW_CFE
275 help
276 Build a generic DT-based kernel image that boots on select
277 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
278 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
279 must be set appropriately for your board.
280
281config BCM47XX
282 bool "Broadcom BCM47XX based boards"
283 select BOOT_RAW
284 select CEVT_R4K
285 select CSRC_R4K
286 select DMA_NONCOHERENT
287 select HAVE_PCI
288 select IRQ_MIPS_CPU
289 select SYS_HAS_CPU_MIPS32_R1
290 select NO_EXCEPT_FILL
291 select SYS_SUPPORTS_32BIT_KERNEL
292 select SYS_SUPPORTS_LITTLE_ENDIAN
293 select SYS_SUPPORTS_MIPS16
294 select SYS_SUPPORTS_ZBOOT
295 select SYS_HAS_EARLY_PRINTK
296 select USE_GENERIC_EARLY_PRINTK_8250
297 select GPIOLIB
298 select LEDS_GPIO_REGISTER
299 select BCM47XX_NVRAM
300 select BCM47XX_SPROM
301 select BCM47XX_SSB if !BCM47XX_BCMA
302 help
303 Support for BCM47XX based boards
304
305config BCM63XX
306 bool "Broadcom BCM63XX based boards"
307 select BOOT_RAW
308 select CEVT_R4K
309 select CSRC_R4K
310 select SYNC_R4K
311 select DMA_NONCOHERENT
312 select IRQ_MIPS_CPU
313 select SYS_SUPPORTS_32BIT_KERNEL
314 select SYS_SUPPORTS_BIG_ENDIAN
315 select SYS_HAS_EARLY_PRINTK
316 select SYS_HAS_CPU_BMIPS32_3300
317 select SYS_HAS_CPU_BMIPS4350
318 select SYS_HAS_CPU_BMIPS4380
319 select SWAP_IO_SPACE
320 select GPIOLIB
321 select MIPS_L1_CACHE_SHIFT_4
322 select HAVE_LEGACY_CLK
323 help
324 Support for BCM63XX based boards
325
326config MIPS_COBALT
327 bool "Cobalt Server"
328 select CEVT_R4K
329 select CSRC_R4K
330 select CEVT_GT641XX
331 select DMA_NONCOHERENT
332 select FORCE_PCI
333 select I8253
334 select I8259
335 select IRQ_MIPS_CPU
336 select IRQ_GT641XX
337 select PCI_GT64XXX_PCI0
338 select SYS_HAS_CPU_NEVADA
339 select SYS_HAS_EARLY_PRINTK
340 select SYS_SUPPORTS_32BIT_KERNEL
341 select SYS_SUPPORTS_64BIT_KERNEL
342 select SYS_SUPPORTS_LITTLE_ENDIAN
343 select USE_GENERIC_EARLY_PRINTK_8250
344
345config MACH_DECSTATION
346 bool "DECstations"
347 select BOOT_ELF32
348 select CEVT_DS1287
349 select CEVT_R4K if CPU_R4X00
350 select CSRC_IOASIC
351 select CSRC_R4K if CPU_R4X00
352 select CPU_DADDI_WORKAROUNDS if 64BIT
353 select CPU_R4000_WORKAROUNDS if 64BIT
354 select CPU_R4400_WORKAROUNDS if 64BIT
355 select DMA_NONCOHERENT
356 select NO_IOPORT_MAP
357 select IRQ_MIPS_CPU
358 select SYS_HAS_CPU_R3000
359 select SYS_HAS_CPU_R4X00
360 select SYS_SUPPORTS_32BIT_KERNEL
361 select SYS_SUPPORTS_64BIT_KERNEL
362 select SYS_SUPPORTS_LITTLE_ENDIAN
363 select SYS_SUPPORTS_128HZ
364 select SYS_SUPPORTS_256HZ
365 select SYS_SUPPORTS_1024HZ
366 select MIPS_L1_CACHE_SHIFT_4
367 help
368 This enables support for DEC's MIPS based workstations. For details
369 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
370 DECstation porting pages on <http://decstation.unix-ag.org/>.
371
372 If you have one of the following DECstation Models you definitely
373 want to choose R4xx0 for the CPU Type:
374
375 DECstation 5000/50
376 DECstation 5000/150
377 DECstation 5000/260
378 DECsystem 5900/260
379
380 otherwise choose R3000.
381
382config MACH_JAZZ
383 bool "Jazz family of machines"
384 select ARC_MEMORY
385 select ARC_PROMLIB
386 select ARCH_MIGHT_HAVE_PC_PARPORT
387 select ARCH_MIGHT_HAVE_PC_SERIO
388 select DMA_OPS
389 select FW_ARC
390 select FW_ARC32
391 select ARCH_MAY_HAVE_PC_FDC
392 select CEVT_R4K
393 select CSRC_R4K
394 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
395 select GENERIC_ISA_DMA
396 select HAVE_PCSPKR_PLATFORM
397 select IRQ_MIPS_CPU
398 select I8253
399 select I8259
400 select ISA
401 select SYS_HAS_CPU_R4X00
402 select SYS_SUPPORTS_32BIT_KERNEL
403 select SYS_SUPPORTS_64BIT_KERNEL
404 select SYS_SUPPORTS_100HZ
405 select SYS_SUPPORTS_LITTLE_ENDIAN
406 help
407 This a family of machines based on the MIPS R4030 chipset which was
408 used by several vendors to build RISC/os and Windows NT workstations.
409 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
410 Olivetti M700-10 workstations.
411
412config MACH_INGENIC_SOC
413 bool "Ingenic SoC based machines"
414 select MIPS_GENERIC
415 select MACH_INGENIC
416 select SYS_SUPPORTS_ZBOOT_UART16550
417 select CPU_SUPPORTS_CPUFREQ
418 select MIPS_EXTERNAL_TIMER
419
420config LANTIQ
421 bool "Lantiq based platforms"
422 select DMA_NONCOHERENT
423 select IRQ_MIPS_CPU
424 select CEVT_R4K
425 select CSRC_R4K
426 select NO_EXCEPT_FILL
427 select SYS_HAS_CPU_MIPS32_R1
428 select SYS_HAS_CPU_MIPS32_R2
429 select SYS_SUPPORTS_BIG_ENDIAN
430 select SYS_SUPPORTS_32BIT_KERNEL
431 select SYS_SUPPORTS_MIPS16
432 select SYS_SUPPORTS_MULTITHREADING
433 select SYS_SUPPORTS_VPE_LOADER
434 select SYS_HAS_EARLY_PRINTK
435 select GPIOLIB
436 select SWAP_IO_SPACE
437 select BOOT_RAW
438 select HAVE_LEGACY_CLK
439 select USE_OF
440 select PINCTRL
441 select PINCTRL_LANTIQ
442 select ARCH_HAS_RESET_CONTROLLER
443 select RESET_CONTROLLER
444
445config MACH_LOONGSON32
446 bool "Loongson 32-bit family of machines"
447 select SYS_SUPPORTS_ZBOOT
448 help
449 This enables support for the Loongson-1 family of machines.
450
451 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
452 the Institute of Computing Technology (ICT), Chinese Academy of
453 Sciences (CAS).
454
455config MACH_LOONGSON2EF
456 bool "Loongson-2E/F family of machines"
457 select SYS_SUPPORTS_ZBOOT
458 help
459 This enables the support of early Loongson-2E/F family of machines.
460
461config MACH_LOONGSON64
462 bool "Loongson 64-bit family of machines"
463 select ARCH_DMA_DEFAULT_COHERENT
464 select ARCH_SPARSEMEM_ENABLE
465 select ARCH_MIGHT_HAVE_PC_PARPORT
466 select ARCH_MIGHT_HAVE_PC_SERIO
467 select GENERIC_ISA_DMA_SUPPORT_BROKEN
468 select BOOT_ELF32
469 select BOARD_SCACHE
470 select CSRC_R4K
471 select CEVT_R4K
472 select FORCE_PCI
473 select ISA
474 select I8259
475 select IRQ_MIPS_CPU
476 select NO_EXCEPT_FILL
477 select NR_CPUS_DEFAULT_64
478 select USE_GENERIC_EARLY_PRINTK_8250
479 select PCI_DRIVERS_GENERIC
480 select SYS_HAS_CPU_LOONGSON64
481 select SYS_HAS_EARLY_PRINTK
482 select SYS_SUPPORTS_SMP
483 select SYS_SUPPORTS_HOTPLUG_CPU
484 select SYS_SUPPORTS_NUMA
485 select SYS_SUPPORTS_64BIT_KERNEL
486 select SYS_SUPPORTS_HIGHMEM
487 select SYS_SUPPORTS_LITTLE_ENDIAN
488 select SYS_SUPPORTS_ZBOOT
489 select SYS_SUPPORTS_RELOCATABLE
490 select ZONE_DMA32
491 select COMMON_CLK
492 select USE_OF
493 select BUILTIN_DTB
494 select PCI_HOST_GENERIC
495 select HAVE_ARCH_NODEDATA_EXTENSION if NUMA
496 help
497 This enables the support of Loongson-2/3 family of machines.
498
499 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
500 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
501 and Loongson-2F which will be removed), developed by the Institute
502 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
503
504config MIPS_MALTA
505 bool "MIPS Malta board"
506 select ARCH_MAY_HAVE_PC_FDC
507 select ARCH_MIGHT_HAVE_PC_PARPORT
508 select ARCH_MIGHT_HAVE_PC_SERIO
509 select BOOT_ELF32
510 select BOOT_RAW
511 select BUILTIN_DTB
512 select CEVT_R4K
513 select CLKSRC_MIPS_GIC
514 select COMMON_CLK
515 select CSRC_R4K
516 select DMA_NONCOHERENT
517 select GENERIC_ISA_DMA
518 select HAVE_PCSPKR_PLATFORM
519 select HAVE_PCI
520 select I8253
521 select I8259
522 select IRQ_MIPS_CPU
523 select MIPS_BONITO64
524 select MIPS_CPU_SCACHE
525 select MIPS_GIC
526 select MIPS_L1_CACHE_SHIFT_6
527 select MIPS_MSC
528 select PCI_GT64XXX_PCI0
529 select SMP_UP if SMP
530 select SWAP_IO_SPACE
531 select SYS_HAS_CPU_MIPS32_R1
532 select SYS_HAS_CPU_MIPS32_R2
533 select SYS_HAS_CPU_MIPS32_R3_5
534 select SYS_HAS_CPU_MIPS32_R5
535 select SYS_HAS_CPU_MIPS32_R6
536 select SYS_HAS_CPU_MIPS64_R1
537 select SYS_HAS_CPU_MIPS64_R2
538 select SYS_HAS_CPU_MIPS64_R6
539 select SYS_HAS_CPU_NEVADA
540 select SYS_HAS_CPU_RM7000
541 select SYS_SUPPORTS_32BIT_KERNEL
542 select SYS_SUPPORTS_64BIT_KERNEL
543 select SYS_SUPPORTS_BIG_ENDIAN
544 select SYS_SUPPORTS_HIGHMEM
545 select SYS_SUPPORTS_LITTLE_ENDIAN
546 select SYS_SUPPORTS_MICROMIPS
547 select SYS_SUPPORTS_MIPS16
548 select SYS_SUPPORTS_MIPS_CPS
549 select SYS_SUPPORTS_MULTITHREADING
550 select SYS_SUPPORTS_RELOCATABLE
551 select SYS_SUPPORTS_SMARTMIPS
552 select SYS_SUPPORTS_VPE_LOADER
553 select SYS_SUPPORTS_ZBOOT
554 select USE_OF
555 select WAR_ICACHE_REFILLS
556 select ZONE_DMA32 if 64BIT
557 help
558 This enables support for the MIPS Technologies Malta evaluation
559 board.
560
561config MACH_PIC32
562 bool "Microchip PIC32 Family"
563 help
564 This enables support for the Microchip PIC32 family of platforms.
565
566 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
567 microcontrollers.
568
569config MACH_NINTENDO64
570 bool "Nintendo 64 console"
571 select CEVT_R4K
572 select CSRC_R4K
573 select SYS_HAS_CPU_R4300
574 select SYS_SUPPORTS_BIG_ENDIAN
575 select SYS_SUPPORTS_ZBOOT
576 select SYS_SUPPORTS_32BIT_KERNEL
577 select SYS_SUPPORTS_64BIT_KERNEL
578 select DMA_NONCOHERENT
579 select IRQ_MIPS_CPU
580
581config RALINK
582 bool "Ralink based machines"
583 select CEVT_R4K
584 select COMMON_CLK
585 select CSRC_R4K
586 select BOOT_RAW
587 select DMA_NONCOHERENT
588 select IRQ_MIPS_CPU
589 select USE_OF
590 select SYS_HAS_CPU_MIPS32_R2
591 select SYS_SUPPORTS_32BIT_KERNEL
592 select SYS_SUPPORTS_LITTLE_ENDIAN
593 select SYS_SUPPORTS_MIPS16
594 select SYS_SUPPORTS_ZBOOT
595 select SYS_HAS_EARLY_PRINTK
596 select ARCH_HAS_RESET_CONTROLLER
597 select RESET_CONTROLLER
598
599config MACH_REALTEK_RTL
600 bool "Realtek RTL838x/RTL839x based machines"
601 select MIPS_GENERIC
602 select DMA_NONCOHERENT
603 select IRQ_MIPS_CPU
604 select CSRC_R4K
605 select CEVT_R4K
606 select SYS_HAS_CPU_MIPS32_R1
607 select SYS_HAS_CPU_MIPS32_R2
608 select SYS_SUPPORTS_BIG_ENDIAN
609 select SYS_SUPPORTS_32BIT_KERNEL
610 select SYS_SUPPORTS_MIPS16
611 select SYS_SUPPORTS_MULTITHREADING
612 select SYS_SUPPORTS_VPE_LOADER
613 select BOOT_RAW
614 select PINCTRL
615 select USE_OF
616
617config SGI_IP22
618 bool "SGI IP22 (Indy/Indigo2)"
619 select ARC_MEMORY
620 select ARC_PROMLIB
621 select FW_ARC
622 select FW_ARC32
623 select ARCH_MIGHT_HAVE_PC_SERIO
624 select BOOT_ELF32
625 select CEVT_R4K
626 select CSRC_R4K
627 select DEFAULT_SGI_PARTITION
628 select DMA_NONCOHERENT
629 select HAVE_EISA
630 select I8253
631 select I8259
632 select IP22_CPU_SCACHE
633 select IRQ_MIPS_CPU
634 select GENERIC_ISA_DMA_SUPPORT_BROKEN
635 select SGI_HAS_I8042
636 select SGI_HAS_INDYDOG
637 select SGI_HAS_HAL2
638 select SGI_HAS_SEEQ
639 select SGI_HAS_WD93
640 select SGI_HAS_ZILOG
641 select SWAP_IO_SPACE
642 select SYS_HAS_CPU_R4X00
643 select SYS_HAS_CPU_R5000
644 select SYS_HAS_EARLY_PRINTK
645 select SYS_SUPPORTS_32BIT_KERNEL
646 select SYS_SUPPORTS_64BIT_KERNEL
647 select SYS_SUPPORTS_BIG_ENDIAN
648 select WAR_R4600_V1_INDEX_ICACHEOP
649 select WAR_R4600_V1_HIT_CACHEOP
650 select WAR_R4600_V2_HIT_CACHEOP
651 select MIPS_L1_CACHE_SHIFT_7
652 help
653 This are the SGI Indy, Challenge S and Indigo2, as well as certain
654 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
655 that runs on these, say Y here.
656
657config SGI_IP27
658 bool "SGI IP27 (Origin200/2000)"
659 select ARCH_HAS_PHYS_TO_DMA
660 select ARCH_SPARSEMEM_ENABLE
661 select FW_ARC
662 select FW_ARC64
663 select ARC_CMDLINE_ONLY
664 select BOOT_ELF64
665 select DEFAULT_SGI_PARTITION
666 select FORCE_PCI
667 select SYS_HAS_EARLY_PRINTK
668 select HAVE_PCI
669 select IRQ_MIPS_CPU
670 select IRQ_DOMAIN_HIERARCHY
671 select NR_CPUS_DEFAULT_64
672 select PCI_DRIVERS_GENERIC
673 select PCI_XTALK_BRIDGE
674 select SYS_HAS_CPU_R10000
675 select SYS_SUPPORTS_64BIT_KERNEL
676 select SYS_SUPPORTS_BIG_ENDIAN
677 select SYS_SUPPORTS_NUMA
678 select SYS_SUPPORTS_SMP
679 select WAR_R10000_LLSC
680 select MIPS_L1_CACHE_SHIFT_7
681 select NUMA
682 select HAVE_ARCH_NODEDATA_EXTENSION
683 help
684 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
685 workstations. To compile a Linux kernel that runs on these, say Y
686 here.
687
688config SGI_IP28
689 bool "SGI IP28 (Indigo2 R10k)"
690 select ARC_MEMORY
691 select ARC_PROMLIB
692 select FW_ARC
693 select FW_ARC64
694 select ARCH_MIGHT_HAVE_PC_SERIO
695 select BOOT_ELF64
696 select CEVT_R4K
697 select CSRC_R4K
698 select DEFAULT_SGI_PARTITION
699 select DMA_NONCOHERENT
700 select GENERIC_ISA_DMA_SUPPORT_BROKEN
701 select IRQ_MIPS_CPU
702 select HAVE_EISA
703 select I8253
704 select I8259
705 select SGI_HAS_I8042
706 select SGI_HAS_INDYDOG
707 select SGI_HAS_HAL2
708 select SGI_HAS_SEEQ
709 select SGI_HAS_WD93
710 select SGI_HAS_ZILOG
711 select SWAP_IO_SPACE
712 select SYS_HAS_CPU_R10000
713 select SYS_HAS_EARLY_PRINTK
714 select SYS_SUPPORTS_64BIT_KERNEL
715 select SYS_SUPPORTS_BIG_ENDIAN
716 select WAR_R10000_LLSC
717 select MIPS_L1_CACHE_SHIFT_7
718 help
719 This is the SGI Indigo2 with R10000 processor. To compile a Linux
720 kernel that runs on these, say Y here.
721
722config SGI_IP30
723 bool "SGI IP30 (Octane/Octane2)"
724 select ARCH_HAS_PHYS_TO_DMA
725 select FW_ARC
726 select FW_ARC64
727 select BOOT_ELF64
728 select CEVT_R4K
729 select CSRC_R4K
730 select FORCE_PCI
731 select SYNC_R4K if SMP
732 select ZONE_DMA32
733 select HAVE_PCI
734 select IRQ_MIPS_CPU
735 select IRQ_DOMAIN_HIERARCHY
736 select PCI_DRIVERS_GENERIC
737 select PCI_XTALK_BRIDGE
738 select SYS_HAS_EARLY_PRINTK
739 select SYS_HAS_CPU_R10000
740 select SYS_SUPPORTS_64BIT_KERNEL
741 select SYS_SUPPORTS_BIG_ENDIAN
742 select SYS_SUPPORTS_SMP
743 select WAR_R10000_LLSC
744 select MIPS_L1_CACHE_SHIFT_7
745 select ARC_MEMORY
746 help
747 These are the SGI Octane and Octane2 graphics workstations. To
748 compile a Linux kernel that runs on these, say Y here.
749
750config SGI_IP32
751 bool "SGI IP32 (O2)"
752 select ARC_MEMORY
753 select ARC_PROMLIB
754 select ARCH_HAS_PHYS_TO_DMA
755 select FW_ARC
756 select FW_ARC32
757 select BOOT_ELF32
758 select CEVT_R4K
759 select CSRC_R4K
760 select DMA_NONCOHERENT
761 select HAVE_PCI
762 select IRQ_MIPS_CPU
763 select R5000_CPU_SCACHE
764 select RM7000_CPU_SCACHE
765 select SYS_HAS_CPU_R5000
766 select SYS_HAS_CPU_R10000 if BROKEN
767 select SYS_HAS_CPU_RM7000
768 select SYS_HAS_CPU_NEVADA
769 select SYS_SUPPORTS_64BIT_KERNEL
770 select SYS_SUPPORTS_BIG_ENDIAN
771 select WAR_ICACHE_REFILLS
772 help
773 If you want this kernel to run on SGI O2 workstation, say Y here.
774
775config SIBYTE_CRHONE
776 bool "Sibyte BCM91125C-CRhone"
777 select BOOT_ELF32
778 select SIBYTE_BCM1125
779 select SWAP_IO_SPACE
780 select SYS_HAS_CPU_SB1
781 select SYS_SUPPORTS_BIG_ENDIAN
782 select SYS_SUPPORTS_HIGHMEM
783 select SYS_SUPPORTS_LITTLE_ENDIAN
784
785config SIBYTE_RHONE
786 bool "Sibyte BCM91125E-Rhone"
787 select BOOT_ELF32
788 select SIBYTE_SB1250
789 select SWAP_IO_SPACE
790 select SYS_HAS_CPU_SB1
791 select SYS_SUPPORTS_BIG_ENDIAN
792 select SYS_SUPPORTS_LITTLE_ENDIAN
793
794config SIBYTE_SWARM
795 bool "Sibyte BCM91250A-SWARM"
796 select BOOT_ELF32
797 select HAVE_PATA_PLATFORM
798 select SIBYTE_SB1250
799 select SWAP_IO_SPACE
800 select SYS_HAS_CPU_SB1
801 select SYS_SUPPORTS_BIG_ENDIAN
802 select SYS_SUPPORTS_HIGHMEM
803 select SYS_SUPPORTS_LITTLE_ENDIAN
804 select ZONE_DMA32 if 64BIT
805 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
806
807config SIBYTE_LITTLESUR
808 bool "Sibyte BCM91250C2-LittleSur"
809 select BOOT_ELF32
810 select HAVE_PATA_PLATFORM
811 select SIBYTE_SB1250
812 select SWAP_IO_SPACE
813 select SYS_HAS_CPU_SB1
814 select SYS_SUPPORTS_BIG_ENDIAN
815 select SYS_SUPPORTS_HIGHMEM
816 select SYS_SUPPORTS_LITTLE_ENDIAN
817 select ZONE_DMA32 if 64BIT
818
819config SIBYTE_SENTOSA
820 bool "Sibyte BCM91250E-Sentosa"
821 select BOOT_ELF32
822 select SIBYTE_SB1250
823 select SWAP_IO_SPACE
824 select SYS_HAS_CPU_SB1
825 select SYS_SUPPORTS_BIG_ENDIAN
826 select SYS_SUPPORTS_LITTLE_ENDIAN
827 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
828
829config SIBYTE_BIGSUR
830 bool "Sibyte BCM91480B-BigSur"
831 select BOOT_ELF32
832 select NR_CPUS_DEFAULT_4
833 select SIBYTE_BCM1x80
834 select SWAP_IO_SPACE
835 select SYS_HAS_CPU_SB1
836 select SYS_SUPPORTS_BIG_ENDIAN
837 select SYS_SUPPORTS_HIGHMEM
838 select SYS_SUPPORTS_LITTLE_ENDIAN
839 select ZONE_DMA32 if 64BIT
840 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
841
842config SNI_RM
843 bool "SNI RM200/300/400"
844 select ARC_MEMORY
845 select ARC_PROMLIB
846 select FW_ARC if CPU_LITTLE_ENDIAN
847 select FW_ARC32 if CPU_LITTLE_ENDIAN
848 select FW_SNIPROM if CPU_BIG_ENDIAN
849 select ARCH_MAY_HAVE_PC_FDC
850 select ARCH_MIGHT_HAVE_PC_PARPORT
851 select ARCH_MIGHT_HAVE_PC_SERIO
852 select BOOT_ELF32
853 select CEVT_R4K
854 select CSRC_R4K
855 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
856 select DMA_NONCOHERENT
857 select GENERIC_ISA_DMA
858 select HAVE_EISA
859 select HAVE_PCSPKR_PLATFORM
860 select HAVE_PCI
861 select IRQ_MIPS_CPU
862 select I8253
863 select I8259
864 select ISA
865 select MIPS_L1_CACHE_SHIFT_6
866 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
867 select SYS_HAS_CPU_R4X00
868 select SYS_HAS_CPU_R5000
869 select SYS_HAS_CPU_R10000
870 select R5000_CPU_SCACHE
871 select SYS_HAS_EARLY_PRINTK
872 select SYS_SUPPORTS_32BIT_KERNEL
873 select SYS_SUPPORTS_64BIT_KERNEL
874 select SYS_SUPPORTS_BIG_ENDIAN
875 select SYS_SUPPORTS_HIGHMEM
876 select SYS_SUPPORTS_LITTLE_ENDIAN
877 select WAR_R4600_V2_HIT_CACHEOP
878 help
879 The SNI RM200/300/400 are MIPS-based machines manufactured by
880 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
881 Technology and now in turn merged with Fujitsu. Say Y here to
882 support this machine type.
883
884config MACH_TX49XX
885 bool "Toshiba TX49 series based machines"
886 select WAR_TX49XX_ICACHE_INDEX_INV
887
888config MIKROTIK_RB532
889 bool "Mikrotik RB532 boards"
890 select CEVT_R4K
891 select CSRC_R4K
892 select DMA_NONCOHERENT
893 select HAVE_PCI
894 select IRQ_MIPS_CPU
895 select SYS_HAS_CPU_MIPS32_R1
896 select SYS_SUPPORTS_32BIT_KERNEL
897 select SYS_SUPPORTS_LITTLE_ENDIAN
898 select SWAP_IO_SPACE
899 select BOOT_RAW
900 select GPIOLIB
901 select MIPS_L1_CACHE_SHIFT_4
902 help
903 Support the Mikrotik(tm) RouterBoard 532 series,
904 based on the IDT RC32434 SoC.
905
906config CAVIUM_OCTEON_SOC
907 bool "Cavium Networks Octeon SoC based boards"
908 select CEVT_R4K
909 select ARCH_HAS_PHYS_TO_DMA
910 select HAVE_RAPIDIO
911 select PHYS_ADDR_T_64BIT
912 select SYS_SUPPORTS_64BIT_KERNEL
913 select SYS_SUPPORTS_BIG_ENDIAN
914 select EDAC_SUPPORT
915 select EDAC_ATOMIC_SCRUB
916 select SYS_SUPPORTS_LITTLE_ENDIAN
917 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
918 select SYS_HAS_EARLY_PRINTK
919 select SYS_HAS_CPU_CAVIUM_OCTEON
920 select HAVE_PCI
921 select HAVE_PLAT_DELAY
922 select HAVE_PLAT_FW_INIT_CMDLINE
923 select HAVE_PLAT_MEMCPY
924 select ZONE_DMA32
925 select GPIOLIB
926 select USE_OF
927 select ARCH_SPARSEMEM_ENABLE
928 select SYS_SUPPORTS_SMP
929 select NR_CPUS_DEFAULT_64
930 select MIPS_NR_CPU_NR_MAP_1024
931 select BUILTIN_DTB
932 select MTD
933 select MTD_COMPLEX_MAPPINGS
934 select SWIOTLB
935 select SYS_SUPPORTS_RELOCATABLE
936 help
937 This option supports all of the Octeon reference boards from Cavium
938 Networks. It builds a kernel that dynamically determines the Octeon
939 CPU type and supports all known board reference implementations.
940 Some of the supported boards are:
941 EBT3000
942 EBH3000
943 EBH3100
944 Thunder
945 Kodama
946 Hikari
947 Say Y here for most Octeon reference boards.
948
949endchoice
950
951source "arch/mips/alchemy/Kconfig"
952source "arch/mips/ath25/Kconfig"
953source "arch/mips/ath79/Kconfig"
954source "arch/mips/bcm47xx/Kconfig"
955source "arch/mips/bcm63xx/Kconfig"
956source "arch/mips/bmips/Kconfig"
957source "arch/mips/generic/Kconfig"
958source "arch/mips/ingenic/Kconfig"
959source "arch/mips/jazz/Kconfig"
960source "arch/mips/lantiq/Kconfig"
961source "arch/mips/pic32/Kconfig"
962source "arch/mips/ralink/Kconfig"
963source "arch/mips/sgi-ip27/Kconfig"
964source "arch/mips/sibyte/Kconfig"
965source "arch/mips/txx9/Kconfig"
966source "arch/mips/cavium-octeon/Kconfig"
967source "arch/mips/loongson2ef/Kconfig"
968source "arch/mips/loongson32/Kconfig"
969source "arch/mips/loongson64/Kconfig"
970
971endmenu
972
973config GENERIC_HWEIGHT
974 bool
975 default y
976
977config GENERIC_CALIBRATE_DELAY
978 bool
979 default y
980
981config SCHED_OMIT_FRAME_POINTER
982 bool
983 default y
984
985#
986# Select some configuration options automatically based on user selections.
987#
988config FW_ARC
989 bool
990
991config ARCH_MAY_HAVE_PC_FDC
992 bool
993
994config BOOT_RAW
995 bool
996
997config CEVT_BCM1480
998 bool
999
1000config CEVT_DS1287
1001 bool
1002
1003config CEVT_GT641XX
1004 bool
1005
1006config CEVT_R4K
1007 bool
1008
1009config CEVT_SB1250
1010 bool
1011
1012config CEVT_TXX9
1013 bool
1014
1015config CSRC_BCM1480
1016 bool
1017
1018config CSRC_IOASIC
1019 bool
1020
1021config CSRC_R4K
1022 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1023 bool
1024
1025config CSRC_SB1250
1026 bool
1027
1028config MIPS_CLOCK_VSYSCALL
1029 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1030
1031config GPIO_TXX9
1032 select GPIOLIB
1033 bool
1034
1035config FW_CFE
1036 bool
1037
1038config ARCH_SUPPORTS_UPROBES
1039 def_bool y
1040
1041config DMA_NONCOHERENT
1042 bool
1043 #
1044 # MIPS allows mixing "slightly different" Cacheability and Coherency
1045 # Attribute bits. It is believed that the uncached access through
1046 # KSEG1 and the implementation specific "uncached accelerated" used
1047 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1048 # significant advantages.
1049 #
1050 select ARCH_HAS_SETUP_DMA_OPS
1051 select ARCH_HAS_DMA_WRITE_COMBINE
1052 select ARCH_HAS_DMA_PREP_COHERENT
1053 select ARCH_HAS_SYNC_DMA_FOR_CPU
1054 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1055 select ARCH_HAS_DMA_SET_UNCACHED
1056 select DMA_NONCOHERENT_MMAP
1057 select NEED_DMA_MAP_STATE
1058
1059config SYS_HAS_EARLY_PRINTK
1060 bool
1061
1062config SYS_SUPPORTS_HOTPLUG_CPU
1063 bool
1064
1065config MIPS_BONITO64
1066 bool
1067
1068config MIPS_MSC
1069 bool
1070
1071config SYNC_R4K
1072 bool
1073
1074config NO_IOPORT_MAP
1075 def_bool n
1076
1077config GENERIC_CSUM
1078 def_bool CPU_NO_LOAD_STORE_LR
1079
1080config GENERIC_ISA_DMA
1081 bool
1082 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1083 select ISA_DMA_API
1084
1085config GENERIC_ISA_DMA_SUPPORT_BROKEN
1086 bool
1087 select GENERIC_ISA_DMA
1088
1089config HAVE_PLAT_DELAY
1090 bool
1091
1092config HAVE_PLAT_FW_INIT_CMDLINE
1093 bool
1094
1095config HAVE_PLAT_MEMCPY
1096 bool
1097
1098config ISA_DMA_API
1099 bool
1100
1101config SYS_SUPPORTS_RELOCATABLE
1102 bool
1103 help
1104 Selected if the platform supports relocating the kernel.
1105 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1106 to allow access to command line and entropy sources.
1107
1108#
1109# Endianness selection. Sufficiently obscure so many users don't know what to
1110# answer,so we try hard to limit the available choices. Also the use of a
1111# choice statement should be more obvious to the user.
1112#
1113choice
1114 prompt "Endianness selection"
1115 help
1116 Some MIPS machines can be configured for either little or big endian
1117 byte order. These modes require different kernels and a different
1118 Linux distribution. In general there is one preferred byteorder for a
1119 particular system but some systems are just as commonly used in the
1120 one or the other endianness.
1121
1122config CPU_BIG_ENDIAN
1123 bool "Big endian"
1124 depends on SYS_SUPPORTS_BIG_ENDIAN
1125
1126config CPU_LITTLE_ENDIAN
1127 bool "Little endian"
1128 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1129
1130endchoice
1131
1132config EXPORT_UASM
1133 bool
1134
1135config SYS_SUPPORTS_APM_EMULATION
1136 bool
1137
1138config SYS_SUPPORTS_BIG_ENDIAN
1139 bool
1140
1141config SYS_SUPPORTS_LITTLE_ENDIAN
1142 bool
1143
1144config MIPS_HUGE_TLB_SUPPORT
1145 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1146
1147config IRQ_TXX9
1148 bool
1149
1150config IRQ_GT641XX
1151 bool
1152
1153config PCI_GT64XXX_PCI0
1154 bool
1155
1156config PCI_XTALK_BRIDGE
1157 bool
1158
1159config NO_EXCEPT_FILL
1160 bool
1161
1162config MIPS_SPRAM
1163 bool
1164
1165config SWAP_IO_SPACE
1166 bool
1167
1168config SGI_HAS_INDYDOG
1169 bool
1170
1171config SGI_HAS_HAL2
1172 bool
1173
1174config SGI_HAS_SEEQ
1175 bool
1176
1177config SGI_HAS_WD93
1178 bool
1179
1180config SGI_HAS_ZILOG
1181 bool
1182
1183config SGI_HAS_I8042
1184 bool
1185
1186config DEFAULT_SGI_PARTITION
1187 bool
1188
1189config FW_ARC32
1190 bool
1191
1192config FW_SNIPROM
1193 bool
1194
1195config BOOT_ELF32
1196 bool
1197
1198config MIPS_L1_CACHE_SHIFT_4
1199 bool
1200
1201config MIPS_L1_CACHE_SHIFT_5
1202 bool
1203
1204config MIPS_L1_CACHE_SHIFT_6
1205 bool
1206
1207config MIPS_L1_CACHE_SHIFT_7
1208 bool
1209
1210config MIPS_L1_CACHE_SHIFT
1211 int
1212 default "7" if MIPS_L1_CACHE_SHIFT_7
1213 default "6" if MIPS_L1_CACHE_SHIFT_6
1214 default "5" if MIPS_L1_CACHE_SHIFT_5
1215 default "4" if MIPS_L1_CACHE_SHIFT_4
1216 default "5"
1217
1218config ARC_CMDLINE_ONLY
1219 bool
1220
1221config ARC_CONSOLE
1222 bool "ARC console support"
1223 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1224
1225config ARC_MEMORY
1226 bool
1227
1228config ARC_PROMLIB
1229 bool
1230
1231config FW_ARC64
1232 bool
1233
1234config BOOT_ELF64
1235 bool
1236
1237menu "CPU selection"
1238
1239choice
1240 prompt "CPU type"
1241 default CPU_R4X00
1242
1243config CPU_LOONGSON64
1244 bool "Loongson 64-bit CPU"
1245 depends on SYS_HAS_CPU_LOONGSON64
1246 select ARCH_HAS_PHYS_TO_DMA
1247 select CPU_MIPSR2
1248 select CPU_HAS_PREFETCH
1249 select CPU_SUPPORTS_64BIT_KERNEL
1250 select CPU_SUPPORTS_HIGHMEM
1251 select CPU_SUPPORTS_HUGEPAGES
1252 select CPU_SUPPORTS_MSA
1253 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1254 select CPU_MIPSR2_IRQ_VI
1255 select DMA_NONCOHERENT
1256 select WEAK_ORDERING
1257 select WEAK_REORDERING_BEYOND_LLSC
1258 select MIPS_ASID_BITS_VARIABLE
1259 select MIPS_PGD_C0_CONTEXT
1260 select MIPS_L1_CACHE_SHIFT_6
1261 select MIPS_FP_SUPPORT
1262 select GPIOLIB
1263 select SWIOTLB
1264 select HAVE_KVM
1265 help
1266 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1267 cores implements the MIPS64R2 instruction set with many extensions,
1268 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1269 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1270 Loongson-2E/2F is not covered here and will be removed in future.
1271
1272config LOONGSON3_ENHANCEMENT
1273 bool "New Loongson-3 CPU Enhancements"
1274 default n
1275 depends on CPU_LOONGSON64
1276 help
1277 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1278 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1279 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1280 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1281 Fast TLB refill support, etc.
1282
1283 This option enable those enhancements which are not probed at run
1284 time. If you want a generic kernel to run on all Loongson 3 machines,
1285 please say 'N' here. If you want a high-performance kernel to run on
1286 new Loongson-3 machines only, please say 'Y' here.
1287
1288config CPU_LOONGSON3_WORKAROUNDS
1289 bool "Loongson-3 LLSC Workarounds"
1290 default y if SMP
1291 depends on CPU_LOONGSON64
1292 help
1293 Loongson-3 processors have the llsc issues which require workarounds.
1294 Without workarounds the system may hang unexpectedly.
1295
1296 Say Y, unless you know what you are doing.
1297
1298config CPU_LOONGSON3_CPUCFG_EMULATION
1299 bool "Emulate the CPUCFG instruction on older Loongson cores"
1300 default y
1301 depends on CPU_LOONGSON64
1302 help
1303 Loongson-3A R4 and newer have the CPUCFG instruction available for
1304 userland to query CPU capabilities, much like CPUID on x86. This
1305 option provides emulation of the instruction on older Loongson
1306 cores, back to Loongson-3A1000.
1307
1308 If unsure, please say Y.
1309
1310config CPU_LOONGSON2E
1311 bool "Loongson 2E"
1312 depends on SYS_HAS_CPU_LOONGSON2E
1313 select CPU_LOONGSON2EF
1314 help
1315 The Loongson 2E processor implements the MIPS III instruction set
1316 with many extensions.
1317
1318 It has an internal FPGA northbridge, which is compatible to
1319 bonito64.
1320
1321config CPU_LOONGSON2F
1322 bool "Loongson 2F"
1323 depends on SYS_HAS_CPU_LOONGSON2F
1324 select CPU_LOONGSON2EF
1325 help
1326 The Loongson 2F processor implements the MIPS III instruction set
1327 with many extensions.
1328
1329 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1330 have a similar programming interface with FPGA northbridge used in
1331 Loongson2E.
1332
1333config CPU_LOONGSON1B
1334 bool "Loongson 1B"
1335 depends on SYS_HAS_CPU_LOONGSON1B
1336 select CPU_LOONGSON32
1337 select LEDS_GPIO_REGISTER
1338 help
1339 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1340 Release 1 instruction set and part of the MIPS32 Release 2
1341 instruction set.
1342
1343config CPU_LOONGSON1C
1344 bool "Loongson 1C"
1345 depends on SYS_HAS_CPU_LOONGSON1C
1346 select CPU_LOONGSON32
1347 select LEDS_GPIO_REGISTER
1348 help
1349 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1350 Release 1 instruction set and part of the MIPS32 Release 2
1351 instruction set.
1352
1353config CPU_MIPS32_R1
1354 bool "MIPS32 Release 1"
1355 depends on SYS_HAS_CPU_MIPS32_R1
1356 select CPU_HAS_PREFETCH
1357 select CPU_SUPPORTS_32BIT_KERNEL
1358 select CPU_SUPPORTS_HIGHMEM
1359 help
1360 Choose this option to build a kernel for release 1 or later of the
1361 MIPS32 architecture. Most modern embedded systems with a 32-bit
1362 MIPS processor are based on a MIPS32 processor. If you know the
1363 specific type of processor in your system, choose those that one
1364 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1365 Release 2 of the MIPS32 architecture is available since several
1366 years so chances are you even have a MIPS32 Release 2 processor
1367 in which case you should choose CPU_MIPS32_R2 instead for better
1368 performance.
1369
1370config CPU_MIPS32_R2
1371 bool "MIPS32 Release 2"
1372 depends on SYS_HAS_CPU_MIPS32_R2
1373 select CPU_HAS_PREFETCH
1374 select CPU_SUPPORTS_32BIT_KERNEL
1375 select CPU_SUPPORTS_HIGHMEM
1376 select CPU_SUPPORTS_MSA
1377 select HAVE_KVM
1378 help
1379 Choose this option to build a kernel for release 2 or later of the
1380 MIPS32 architecture. Most modern embedded systems with a 32-bit
1381 MIPS processor are based on a MIPS32 processor. If you know the
1382 specific type of processor in your system, choose those that one
1383 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1384
1385config CPU_MIPS32_R5
1386 bool "MIPS32 Release 5"
1387 depends on SYS_HAS_CPU_MIPS32_R5
1388 select CPU_HAS_PREFETCH
1389 select CPU_SUPPORTS_32BIT_KERNEL
1390 select CPU_SUPPORTS_HIGHMEM
1391 select CPU_SUPPORTS_MSA
1392 select HAVE_KVM
1393 select MIPS_O32_FP64_SUPPORT
1394 help
1395 Choose this option to build a kernel for release 5 or later of the
1396 MIPS32 architecture. New MIPS processors, starting with the Warrior
1397 family, are based on a MIPS32r5 processor. If you own an older
1398 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1399
1400config CPU_MIPS32_R6
1401 bool "MIPS32 Release 6"
1402 depends on SYS_HAS_CPU_MIPS32_R6
1403 select CPU_HAS_PREFETCH
1404 select CPU_NO_LOAD_STORE_LR
1405 select CPU_SUPPORTS_32BIT_KERNEL
1406 select CPU_SUPPORTS_HIGHMEM
1407 select CPU_SUPPORTS_MSA
1408 select HAVE_KVM
1409 select MIPS_O32_FP64_SUPPORT
1410 help
1411 Choose this option to build a kernel for release 6 or later of the
1412 MIPS32 architecture. New MIPS processors, starting with the Warrior
1413 family, are based on a MIPS32r6 processor. If you own an older
1414 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1415
1416config CPU_MIPS64_R1
1417 bool "MIPS64 Release 1"
1418 depends on SYS_HAS_CPU_MIPS64_R1
1419 select CPU_HAS_PREFETCH
1420 select CPU_SUPPORTS_32BIT_KERNEL
1421 select CPU_SUPPORTS_64BIT_KERNEL
1422 select CPU_SUPPORTS_HIGHMEM
1423 select CPU_SUPPORTS_HUGEPAGES
1424 help
1425 Choose this option to build a kernel for release 1 or later of the
1426 MIPS64 architecture. Many modern embedded systems with a 64-bit
1427 MIPS processor are based on a MIPS64 processor. If you know the
1428 specific type of processor in your system, choose those that one
1429 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1430 Release 2 of the MIPS64 architecture is available since several
1431 years so chances are you even have a MIPS64 Release 2 processor
1432 in which case you should choose CPU_MIPS64_R2 instead for better
1433 performance.
1434
1435config CPU_MIPS64_R2
1436 bool "MIPS64 Release 2"
1437 depends on SYS_HAS_CPU_MIPS64_R2
1438 select CPU_HAS_PREFETCH
1439 select CPU_SUPPORTS_32BIT_KERNEL
1440 select CPU_SUPPORTS_64BIT_KERNEL
1441 select CPU_SUPPORTS_HIGHMEM
1442 select CPU_SUPPORTS_HUGEPAGES
1443 select CPU_SUPPORTS_MSA
1444 select HAVE_KVM
1445 help
1446 Choose this option to build a kernel for release 2 or later of the
1447 MIPS64 architecture. Many modern embedded systems with a 64-bit
1448 MIPS processor are based on a MIPS64 processor. If you know the
1449 specific type of processor in your system, choose those that one
1450 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1451
1452config CPU_MIPS64_R5
1453 bool "MIPS64 Release 5"
1454 depends on SYS_HAS_CPU_MIPS64_R5
1455 select CPU_HAS_PREFETCH
1456 select CPU_SUPPORTS_32BIT_KERNEL
1457 select CPU_SUPPORTS_64BIT_KERNEL
1458 select CPU_SUPPORTS_HIGHMEM
1459 select CPU_SUPPORTS_HUGEPAGES
1460 select CPU_SUPPORTS_MSA
1461 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1462 select HAVE_KVM
1463 help
1464 Choose this option to build a kernel for release 5 or later of the
1465 MIPS64 architecture. This is a intermediate MIPS architecture
1466 release partly implementing release 6 features. Though there is no
1467 any hardware known to be based on this release.
1468
1469config CPU_MIPS64_R6
1470 bool "MIPS64 Release 6"
1471 depends on SYS_HAS_CPU_MIPS64_R6
1472 select CPU_HAS_PREFETCH
1473 select CPU_NO_LOAD_STORE_LR
1474 select CPU_SUPPORTS_32BIT_KERNEL
1475 select CPU_SUPPORTS_64BIT_KERNEL
1476 select CPU_SUPPORTS_HIGHMEM
1477 select CPU_SUPPORTS_HUGEPAGES
1478 select CPU_SUPPORTS_MSA
1479 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1480 select HAVE_KVM
1481 help
1482 Choose this option to build a kernel for release 6 or later of the
1483 MIPS64 architecture. New MIPS processors, starting with the Warrior
1484 family, are based on a MIPS64r6 processor. If you own an older
1485 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1486
1487config CPU_P5600
1488 bool "MIPS Warrior P5600"
1489 depends on SYS_HAS_CPU_P5600
1490 select CPU_HAS_PREFETCH
1491 select CPU_SUPPORTS_32BIT_KERNEL
1492 select CPU_SUPPORTS_HIGHMEM
1493 select CPU_SUPPORTS_MSA
1494 select CPU_SUPPORTS_CPUFREQ
1495 select CPU_MIPSR2_IRQ_VI
1496 select CPU_MIPSR2_IRQ_EI
1497 select HAVE_KVM
1498 select MIPS_O32_FP64_SUPPORT
1499 help
1500 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1501 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1502 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1503 level features like up to six P5600 calculation cores, CM2 with L2
1504 cache, IOCU/IOMMU (though might be unused depending on the system-
1505 specific IP core configuration), GIC, CPC, virtualisation module,
1506 eJTAG and PDtrace.
1507
1508config CPU_R3000
1509 bool "R3000"
1510 depends on SYS_HAS_CPU_R3000
1511 select CPU_HAS_WB
1512 select CPU_R3K_TLB
1513 select CPU_SUPPORTS_32BIT_KERNEL
1514 select CPU_SUPPORTS_HIGHMEM
1515 help
1516 Please make sure to pick the right CPU type. Linux/MIPS is not
1517 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1518 *not* work on R4000 machines and vice versa. However, since most
1519 of the supported machines have an R4000 (or similar) CPU, R4x00
1520 might be a safe bet. If the resulting kernel does not work,
1521 try to recompile with R3000.
1522
1523config CPU_R4300
1524 bool "R4300"
1525 depends on SYS_HAS_CPU_R4300
1526 select CPU_SUPPORTS_32BIT_KERNEL
1527 select CPU_SUPPORTS_64BIT_KERNEL
1528 help
1529 MIPS Technologies R4300-series processors.
1530
1531config CPU_R4X00
1532 bool "R4x00"
1533 depends on SYS_HAS_CPU_R4X00
1534 select CPU_SUPPORTS_32BIT_KERNEL
1535 select CPU_SUPPORTS_64BIT_KERNEL
1536 select CPU_SUPPORTS_HUGEPAGES
1537 help
1538 MIPS Technologies R4000-series processors other than 4300, including
1539 the R4000, R4400, R4600, and 4700.
1540
1541config CPU_TX49XX
1542 bool "R49XX"
1543 depends on SYS_HAS_CPU_TX49XX
1544 select CPU_HAS_PREFETCH
1545 select CPU_SUPPORTS_32BIT_KERNEL
1546 select CPU_SUPPORTS_64BIT_KERNEL
1547 select CPU_SUPPORTS_HUGEPAGES
1548
1549config CPU_R5000
1550 bool "R5000"
1551 depends on SYS_HAS_CPU_R5000
1552 select CPU_SUPPORTS_32BIT_KERNEL
1553 select CPU_SUPPORTS_64BIT_KERNEL
1554 select CPU_SUPPORTS_HUGEPAGES
1555 help
1556 MIPS Technologies R5000-series processors other than the Nevada.
1557
1558config CPU_R5500
1559 bool "R5500"
1560 depends on SYS_HAS_CPU_R5500
1561 select CPU_SUPPORTS_32BIT_KERNEL
1562 select CPU_SUPPORTS_64BIT_KERNEL
1563 select CPU_SUPPORTS_HUGEPAGES
1564 help
1565 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1566 instruction set.
1567
1568config CPU_NEVADA
1569 bool "RM52xx"
1570 depends on SYS_HAS_CPU_NEVADA
1571 select CPU_SUPPORTS_32BIT_KERNEL
1572 select CPU_SUPPORTS_64BIT_KERNEL
1573 select CPU_SUPPORTS_HUGEPAGES
1574 help
1575 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1576
1577config CPU_R10000
1578 bool "R10000"
1579 depends on SYS_HAS_CPU_R10000
1580 select CPU_HAS_PREFETCH
1581 select CPU_SUPPORTS_32BIT_KERNEL
1582 select CPU_SUPPORTS_64BIT_KERNEL
1583 select CPU_SUPPORTS_HIGHMEM
1584 select CPU_SUPPORTS_HUGEPAGES
1585 help
1586 MIPS Technologies R10000-series processors.
1587
1588config CPU_RM7000
1589 bool "RM7000"
1590 depends on SYS_HAS_CPU_RM7000
1591 select CPU_HAS_PREFETCH
1592 select CPU_SUPPORTS_32BIT_KERNEL
1593 select CPU_SUPPORTS_64BIT_KERNEL
1594 select CPU_SUPPORTS_HIGHMEM
1595 select CPU_SUPPORTS_HUGEPAGES
1596
1597config CPU_SB1
1598 bool "SB1"
1599 depends on SYS_HAS_CPU_SB1
1600 select CPU_SUPPORTS_32BIT_KERNEL
1601 select CPU_SUPPORTS_64BIT_KERNEL
1602 select CPU_SUPPORTS_HIGHMEM
1603 select CPU_SUPPORTS_HUGEPAGES
1604 select WEAK_ORDERING
1605
1606config CPU_CAVIUM_OCTEON
1607 bool "Cavium Octeon processor"
1608 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1609 select CPU_HAS_PREFETCH
1610 select CPU_SUPPORTS_64BIT_KERNEL
1611 select WEAK_ORDERING
1612 select CPU_SUPPORTS_HIGHMEM
1613 select CPU_SUPPORTS_HUGEPAGES
1614 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1615 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1616 select MIPS_L1_CACHE_SHIFT_7
1617 select HAVE_KVM
1618 help
1619 The Cavium Octeon processor is a highly integrated chip containing
1620 many ethernet hardware widgets for networking tasks. The processor
1621 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1622 Full details can be found at http://www.caviumnetworks.com.
1623
1624config CPU_BMIPS
1625 bool "Broadcom BMIPS"
1626 depends on SYS_HAS_CPU_BMIPS
1627 select CPU_MIPS32
1628 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1629 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1630 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1631 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1632 select CPU_SUPPORTS_32BIT_KERNEL
1633 select DMA_NONCOHERENT
1634 select IRQ_MIPS_CPU
1635 select SWAP_IO_SPACE
1636 select WEAK_ORDERING
1637 select CPU_SUPPORTS_HIGHMEM
1638 select CPU_HAS_PREFETCH
1639 select CPU_SUPPORTS_CPUFREQ
1640 select MIPS_EXTERNAL_TIMER
1641 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
1642 help
1643 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1644
1645endchoice
1646
1647config CPU_MIPS32_3_5_FEATURES
1648 bool "MIPS32 Release 3.5 Features"
1649 depends on SYS_HAS_CPU_MIPS32_R3_5
1650 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1651 CPU_P5600
1652 help
1653 Choose this option to build a kernel for release 2 or later of the
1654 MIPS32 architecture including features from the 3.5 release such as
1655 support for Enhanced Virtual Addressing (EVA).
1656
1657config CPU_MIPS32_3_5_EVA
1658 bool "Enhanced Virtual Addressing (EVA)"
1659 depends on CPU_MIPS32_3_5_FEATURES
1660 select EVA
1661 default y
1662 help
1663 Choose this option if you want to enable the Enhanced Virtual
1664 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1665 One of its primary benefits is an increase in the maximum size
1666 of lowmem (up to 3GB). If unsure, say 'N' here.
1667
1668config CPU_MIPS32_R5_FEATURES
1669 bool "MIPS32 Release 5 Features"
1670 depends on SYS_HAS_CPU_MIPS32_R5
1671 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1672 help
1673 Choose this option to build a kernel for release 2 or later of the
1674 MIPS32 architecture including features from release 5 such as
1675 support for Extended Physical Addressing (XPA).
1676
1677config CPU_MIPS32_R5_XPA
1678 bool "Extended Physical Addressing (XPA)"
1679 depends on CPU_MIPS32_R5_FEATURES
1680 depends on !EVA
1681 depends on !PAGE_SIZE_4KB
1682 depends on SYS_SUPPORTS_HIGHMEM
1683 select XPA
1684 select HIGHMEM
1685 select PHYS_ADDR_T_64BIT
1686 default n
1687 help
1688 Choose this option if you want to enable the Extended Physical
1689 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1690 benefit is to increase physical addressing equal to or greater
1691 than 40 bits. Note that this has the side effect of turning on
1692 64-bit addressing which in turn makes the PTEs 64-bit in size.
1693 If unsure, say 'N' here.
1694
1695if CPU_LOONGSON2F
1696config CPU_NOP_WORKAROUNDS
1697 bool
1698
1699config CPU_JUMP_WORKAROUNDS
1700 bool
1701
1702config CPU_LOONGSON2F_WORKAROUNDS
1703 bool "Loongson 2F Workarounds"
1704 default y
1705 select CPU_NOP_WORKAROUNDS
1706 select CPU_JUMP_WORKAROUNDS
1707 help
1708 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1709 require workarounds. Without workarounds the system may hang
1710 unexpectedly. For more information please refer to the gas
1711 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1712
1713 Loongson 2F03 and later have fixed these issues and no workarounds
1714 are needed. The workarounds have no significant side effect on them
1715 but may decrease the performance of the system so this option should
1716 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1717 systems.
1718
1719 If unsure, please say Y.
1720endif # CPU_LOONGSON2F
1721
1722config SYS_SUPPORTS_ZBOOT
1723 bool
1724 select HAVE_KERNEL_GZIP
1725 select HAVE_KERNEL_BZIP2
1726 select HAVE_KERNEL_LZ4
1727 select HAVE_KERNEL_LZMA
1728 select HAVE_KERNEL_LZO
1729 select HAVE_KERNEL_XZ
1730 select HAVE_KERNEL_ZSTD
1731
1732config SYS_SUPPORTS_ZBOOT_UART16550
1733 bool
1734 select SYS_SUPPORTS_ZBOOT
1735
1736config SYS_SUPPORTS_ZBOOT_UART_PROM
1737 bool
1738 select SYS_SUPPORTS_ZBOOT
1739
1740config CPU_LOONGSON2EF
1741 bool
1742 select CPU_SUPPORTS_32BIT_KERNEL
1743 select CPU_SUPPORTS_64BIT_KERNEL
1744 select CPU_SUPPORTS_HIGHMEM
1745 select CPU_SUPPORTS_HUGEPAGES
1746
1747config CPU_LOONGSON32
1748 bool
1749 select CPU_MIPS32
1750 select CPU_MIPSR2
1751 select CPU_HAS_PREFETCH
1752 select CPU_SUPPORTS_32BIT_KERNEL
1753 select CPU_SUPPORTS_HIGHMEM
1754 select CPU_SUPPORTS_CPUFREQ
1755
1756config CPU_BMIPS32_3300
1757 select SMP_UP if SMP
1758 bool
1759
1760config CPU_BMIPS4350
1761 bool
1762 select SYS_SUPPORTS_SMP
1763 select SYS_SUPPORTS_HOTPLUG_CPU
1764
1765config CPU_BMIPS4380
1766 bool
1767 select MIPS_L1_CACHE_SHIFT_6
1768 select SYS_SUPPORTS_SMP
1769 select SYS_SUPPORTS_HOTPLUG_CPU
1770 select CPU_HAS_RIXI
1771
1772config CPU_BMIPS5000
1773 bool
1774 select MIPS_CPU_SCACHE
1775 select MIPS_L1_CACHE_SHIFT_7
1776 select SYS_SUPPORTS_SMP
1777 select SYS_SUPPORTS_HOTPLUG_CPU
1778 select CPU_HAS_RIXI
1779
1780config SYS_HAS_CPU_LOONGSON64
1781 bool
1782 select CPU_SUPPORTS_CPUFREQ
1783 select CPU_HAS_RIXI
1784
1785config SYS_HAS_CPU_LOONGSON2E
1786 bool
1787
1788config SYS_HAS_CPU_LOONGSON2F
1789 bool
1790 select CPU_SUPPORTS_CPUFREQ
1791 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1792
1793config SYS_HAS_CPU_LOONGSON1B
1794 bool
1795
1796config SYS_HAS_CPU_LOONGSON1C
1797 bool
1798
1799config SYS_HAS_CPU_MIPS32_R1
1800 bool
1801
1802config SYS_HAS_CPU_MIPS32_R2
1803 bool
1804
1805config SYS_HAS_CPU_MIPS32_R3_5
1806 bool
1807
1808config SYS_HAS_CPU_MIPS32_R5
1809 bool
1810
1811config SYS_HAS_CPU_MIPS32_R6
1812 bool
1813
1814config SYS_HAS_CPU_MIPS64_R1
1815 bool
1816
1817config SYS_HAS_CPU_MIPS64_R2
1818 bool
1819
1820config SYS_HAS_CPU_MIPS64_R5
1821 bool
1822
1823config SYS_HAS_CPU_MIPS64_R6
1824 bool
1825
1826config SYS_HAS_CPU_P5600
1827 bool
1828
1829config SYS_HAS_CPU_R3000
1830 bool
1831
1832config SYS_HAS_CPU_R4300
1833 bool
1834
1835config SYS_HAS_CPU_R4X00
1836 bool
1837
1838config SYS_HAS_CPU_TX49XX
1839 bool
1840
1841config SYS_HAS_CPU_R5000
1842 bool
1843
1844config SYS_HAS_CPU_R5500
1845 bool
1846
1847config SYS_HAS_CPU_NEVADA
1848 bool
1849
1850config SYS_HAS_CPU_R10000
1851 bool
1852
1853config SYS_HAS_CPU_RM7000
1854 bool
1855
1856config SYS_HAS_CPU_SB1
1857 bool
1858
1859config SYS_HAS_CPU_CAVIUM_OCTEON
1860 bool
1861
1862config SYS_HAS_CPU_BMIPS
1863 bool
1864
1865config SYS_HAS_CPU_BMIPS32_3300
1866 bool
1867 select SYS_HAS_CPU_BMIPS
1868
1869config SYS_HAS_CPU_BMIPS4350
1870 bool
1871 select SYS_HAS_CPU_BMIPS
1872
1873config SYS_HAS_CPU_BMIPS4380
1874 bool
1875 select SYS_HAS_CPU_BMIPS
1876
1877config SYS_HAS_CPU_BMIPS5000
1878 bool
1879 select SYS_HAS_CPU_BMIPS
1880
1881#
1882# CPU may reorder R->R, R->W, W->R, W->W
1883# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
1884#
1885config WEAK_ORDERING
1886 bool
1887
1888#
1889# CPU may reorder reads and writes beyond LL/SC
1890# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1891#
1892config WEAK_REORDERING_BEYOND_LLSC
1893 bool
1894endmenu
1895
1896#
1897# These two indicate any level of the MIPS32 and MIPS64 architecture
1898#
1899config CPU_MIPS32
1900 bool
1901 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
1902 CPU_MIPS32_R6 || CPU_P5600
1903
1904config CPU_MIPS64
1905 bool
1906 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
1907 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
1908
1909#
1910# These indicate the revision of the architecture
1911#
1912config CPU_MIPSR1
1913 bool
1914 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1915
1916config CPU_MIPSR2
1917 bool
1918 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1919 select CPU_HAS_RIXI
1920 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1921 select MIPS_SPRAM
1922
1923config CPU_MIPSR5
1924 bool
1925 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
1926 select CPU_HAS_RIXI
1927 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1928 select MIPS_SPRAM
1929
1930config CPU_MIPSR6
1931 bool
1932 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
1933 select CPU_HAS_RIXI
1934 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1935 select HAVE_ARCH_BITREVERSE
1936 select MIPS_ASID_BITS_VARIABLE
1937 select MIPS_CRC_SUPPORT
1938 select MIPS_SPRAM
1939
1940config TARGET_ISA_REV
1941 int
1942 default 1 if CPU_MIPSR1
1943 default 2 if CPU_MIPSR2
1944 default 5 if CPU_MIPSR5
1945 default 6 if CPU_MIPSR6
1946 default 0
1947 help
1948 Reflects the ISA revision being targeted by the kernel build. This
1949 is effectively the Kconfig equivalent of MIPS_ISA_REV.
1950
1951config EVA
1952 bool
1953
1954config XPA
1955 bool
1956
1957config SYS_SUPPORTS_32BIT_KERNEL
1958 bool
1959config SYS_SUPPORTS_64BIT_KERNEL
1960 bool
1961config CPU_SUPPORTS_32BIT_KERNEL
1962 bool
1963config CPU_SUPPORTS_64BIT_KERNEL
1964 bool
1965config CPU_SUPPORTS_CPUFREQ
1966 bool
1967config CPU_SUPPORTS_ADDRWINCFG
1968 bool
1969config CPU_SUPPORTS_HUGEPAGES
1970 bool
1971 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
1972config MIPS_PGD_C0_CONTEXT
1973 bool
1974 depends on 64BIT
1975 default y if (CPU_MIPSR2 || CPU_MIPSR6)
1976
1977#
1978# Set to y for ptrace access to watch registers.
1979#
1980config HARDWARE_WATCHPOINTS
1981 bool
1982 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
1983
1984menu "Kernel type"
1985
1986choice
1987 prompt "Kernel code model"
1988 help
1989 You should only select this option if you have a workload that
1990 actually benefits from 64-bit processing or if your machine has
1991 large memory. You will only be presented a single option in this
1992 menu if your system does not support both 32-bit and 64-bit kernels.
1993
1994config 32BIT
1995 bool "32-bit kernel"
1996 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
1997 select TRAD_SIGNALS
1998 help
1999 Select this option if you want to build a 32-bit kernel.
2000
2001config 64BIT
2002 bool "64-bit kernel"
2003 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2004 help
2005 Select this option if you want to build a 64-bit kernel.
2006
2007endchoice
2008
2009config MIPS_VA_BITS_48
2010 bool "48 bits virtual memory"
2011 depends on 64BIT
2012 help
2013 Support a maximum at least 48 bits of application virtual
2014 memory. Default is 40 bits or less, depending on the CPU.
2015 For page sizes 16k and above, this option results in a small
2016 memory overhead for page tables. For 4k page size, a fourth
2017 level of page tables is added which imposes both a memory
2018 overhead as well as slower TLB fault handling.
2019
2020 If unsure, say N.
2021
2022config ZBOOT_LOAD_ADDRESS
2023 hex "Compressed kernel load address"
2024 default 0xffffffff80400000 if BCM47XX
2025 default 0x0
2026 depends on SYS_SUPPORTS_ZBOOT
2027 help
2028 The address to load compressed kernel, aka vmlinuz.
2029
2030 This is only used if non-zero.
2031
2032choice
2033 prompt "Kernel page size"
2034 default PAGE_SIZE_4KB
2035
2036config PAGE_SIZE_4KB
2037 bool "4kB"
2038 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2039 help
2040 This option select the standard 4kB Linux page size. On some
2041 R3000-family processors this is the only available page size. Using
2042 4kB page size will minimize memory consumption and is therefore
2043 recommended for low memory systems.
2044
2045config PAGE_SIZE_8KB
2046 bool "8kB"
2047 depends on CPU_CAVIUM_OCTEON
2048 depends on !MIPS_VA_BITS_48
2049 help
2050 Using 8kB page size will result in higher performance kernel at
2051 the price of higher memory consumption. This option is available
2052 only on cnMIPS processors. Note that you will need a suitable Linux
2053 distribution to support this.
2054
2055config PAGE_SIZE_16KB
2056 bool "16kB"
2057 depends on !CPU_R3000
2058 help
2059 Using 16kB page size will result in higher performance kernel at
2060 the price of higher memory consumption. This option is available on
2061 all non-R3000 family processors. Note that you will need a suitable
2062 Linux distribution to support this.
2063
2064config PAGE_SIZE_32KB
2065 bool "32kB"
2066 depends on CPU_CAVIUM_OCTEON
2067 depends on !MIPS_VA_BITS_48
2068 help
2069 Using 32kB page size will result in higher performance kernel at
2070 the price of higher memory consumption. This option is available
2071 only on cnMIPS cores. Note that you will need a suitable Linux
2072 distribution to support this.
2073
2074config PAGE_SIZE_64KB
2075 bool "64kB"
2076 depends on !CPU_R3000
2077 help
2078 Using 64kB page size will result in higher performance kernel at
2079 the price of higher memory consumption. This option is available on
2080 all non-R3000 family processor. Not that at the time of this
2081 writing this option is still high experimental.
2082
2083endchoice
2084
2085config ARCH_FORCE_MAX_ORDER
2086 int "Maximum zone order"
2087 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2088 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2089 default "11" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2090 default "10"
2091 help
2092 The kernel memory allocator divides physically contiguous memory
2093 blocks into "zones", where each zone is a power of two number of
2094 pages. This option selects the largest power of two that the kernel
2095 keeps in the memory allocator. If you need to allocate very large
2096 blocks of physically contiguous memory, then you may need to
2097 increase this value.
2098
2099 The page size is not necessarily 4KB. Keep this in mind
2100 when choosing a value for this option.
2101
2102config BOARD_SCACHE
2103 bool
2104
2105config IP22_CPU_SCACHE
2106 bool
2107 select BOARD_SCACHE
2108
2109#
2110# Support for a MIPS32 / MIPS64 style S-caches
2111#
2112config MIPS_CPU_SCACHE
2113 bool
2114 select BOARD_SCACHE
2115
2116config R5000_CPU_SCACHE
2117 bool
2118 select BOARD_SCACHE
2119
2120config RM7000_CPU_SCACHE
2121 bool
2122 select BOARD_SCACHE
2123
2124config SIBYTE_DMA_PAGEOPS
2125 bool "Use DMA to clear/copy pages"
2126 depends on CPU_SB1
2127 help
2128 Instead of using the CPU to zero and copy pages, use a Data Mover
2129 channel. These DMA channels are otherwise unused by the standard
2130 SiByte Linux port. Seems to give a small performance benefit.
2131
2132config CPU_HAS_PREFETCH
2133 bool
2134
2135config CPU_GENERIC_DUMP_TLB
2136 bool
2137 default y if !CPU_R3000
2138
2139config MIPS_FP_SUPPORT
2140 bool "Floating Point support" if EXPERT
2141 default y
2142 help
2143 Select y to include support for floating point in the kernel
2144 including initialization of FPU hardware, FP context save & restore
2145 and emulation of an FPU where necessary. Without this support any
2146 userland program attempting to use floating point instructions will
2147 receive a SIGILL.
2148
2149 If you know that your userland will not attempt to use floating point
2150 instructions then you can say n here to shrink the kernel a little.
2151
2152 If unsure, say y.
2153
2154config CPU_R2300_FPU
2155 bool
2156 depends on MIPS_FP_SUPPORT
2157 default y if CPU_R3000
2158
2159config CPU_R3K_TLB
2160 bool
2161
2162config CPU_R4K_FPU
2163 bool
2164 depends on MIPS_FP_SUPPORT
2165 default y if !CPU_R2300_FPU
2166
2167config CPU_R4K_CACHE_TLB
2168 bool
2169 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2170
2171config MIPS_MT_SMP
2172 bool "MIPS MT SMP support (1 TC on each available VPE)"
2173 default y
2174 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2175 select CPU_MIPSR2_IRQ_VI
2176 select CPU_MIPSR2_IRQ_EI
2177 select SYNC_R4K
2178 select MIPS_MT
2179 select SMP
2180 select SMP_UP
2181 select SYS_SUPPORTS_SMP
2182 select SYS_SUPPORTS_SCHED_SMT
2183 select MIPS_PERF_SHARED_TC_COUNTERS
2184 help
2185 This is a kernel model which is known as SMVP. This is supported
2186 on cores with the MT ASE and uses the available VPEs to implement
2187 virtual processors which supports SMP. This is equivalent to the
2188 Intel Hyperthreading feature. For further information go to
2189 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2190
2191config MIPS_MT
2192 bool
2193
2194config SCHED_SMT
2195 bool "SMT (multithreading) scheduler support"
2196 depends on SYS_SUPPORTS_SCHED_SMT
2197 default n
2198 help
2199 SMT scheduler support improves the CPU scheduler's decision making
2200 when dealing with MIPS MT enabled cores at a cost of slightly
2201 increased overhead in some places. If unsure say N here.
2202
2203config SYS_SUPPORTS_SCHED_SMT
2204 bool
2205
2206config SYS_SUPPORTS_MULTITHREADING
2207 bool
2208
2209config MIPS_MT_FPAFF
2210 bool "Dynamic FPU affinity for FP-intensive threads"
2211 default y
2212 depends on MIPS_MT_SMP
2213
2214config MIPSR2_TO_R6_EMULATOR
2215 bool "MIPS R2-to-R6 emulator"
2216 depends on CPU_MIPSR6
2217 depends on MIPS_FP_SUPPORT
2218 default y
2219 help
2220 Choose this option if you want to run non-R6 MIPS userland code.
2221 Even if you say 'Y' here, the emulator will still be disabled by
2222 default. You can enable it using the 'mipsr2emu' kernel option.
2223 The only reason this is a build-time option is to save ~14K from the
2224 final kernel image.
2225
2226config SYS_SUPPORTS_VPE_LOADER
2227 bool
2228 depends on SYS_SUPPORTS_MULTITHREADING
2229 help
2230 Indicates that the platform supports the VPE loader, and provides
2231 physical_memsize.
2232
2233config MIPS_VPE_LOADER
2234 bool "VPE loader support."
2235 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2236 select CPU_MIPSR2_IRQ_VI
2237 select CPU_MIPSR2_IRQ_EI
2238 select MIPS_MT
2239 help
2240 Includes a loader for loading an elf relocatable object
2241 onto another VPE and running it.
2242
2243config MIPS_VPE_LOADER_MT
2244 bool
2245 default "y"
2246 depends on MIPS_VPE_LOADER
2247
2248config MIPS_VPE_LOADER_TOM
2249 bool "Load VPE program into memory hidden from linux"
2250 depends on MIPS_VPE_LOADER
2251 default y
2252 help
2253 The loader can use memory that is present but has been hidden from
2254 Linux using the kernel command line option "mem=xxMB". It's up to
2255 you to ensure the amount you put in the option and the space your
2256 program requires is less or equal to the amount physically present.
2257
2258config MIPS_VPE_APSP_API
2259 bool "Enable support for AP/SP API (RTLX)"
2260 depends on MIPS_VPE_LOADER
2261
2262config MIPS_VPE_APSP_API_MT
2263 bool
2264 default "y"
2265 depends on MIPS_VPE_APSP_API
2266
2267config MIPS_CPS
2268 bool "MIPS Coherent Processing System support"
2269 depends on SYS_SUPPORTS_MIPS_CPS
2270 select MIPS_CM
2271 select MIPS_CPS_PM if HOTPLUG_CPU
2272 select SMP
2273 select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU
2274 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2275 select SYS_SUPPORTS_HOTPLUG_CPU
2276 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2277 select SYS_SUPPORTS_SMP
2278 select WEAK_ORDERING
2279 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2280 help
2281 Select this if you wish to run an SMP kernel across multiple cores
2282 within a MIPS Coherent Processing System. When this option is
2283 enabled the kernel will probe for other cores and boot them with
2284 no external assistance. It is safe to enable this when hardware
2285 support is unavailable.
2286
2287config MIPS_CPS_PM
2288 depends on MIPS_CPS
2289 bool
2290
2291config MIPS_CM
2292 bool
2293 select MIPS_CPC
2294
2295config MIPS_CPC
2296 bool
2297
2298config SB1_PASS_2_WORKAROUNDS
2299 bool
2300 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2301 default y
2302
2303config SB1_PASS_2_1_WORKAROUNDS
2304 bool
2305 depends on CPU_SB1 && CPU_SB1_PASS_2
2306 default y
2307
2308choice
2309 prompt "SmartMIPS or microMIPS ASE support"
2310
2311config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2312 bool "None"
2313 help
2314 Select this if you want neither microMIPS nor SmartMIPS support
2315
2316config CPU_HAS_SMARTMIPS
2317 depends on SYS_SUPPORTS_SMARTMIPS
2318 bool "SmartMIPS"
2319 help
2320 SmartMIPS is a extension of the MIPS32 architecture aimed at
2321 increased security at both hardware and software level for
2322 smartcards. Enabling this option will allow proper use of the
2323 SmartMIPS instructions by Linux applications. However a kernel with
2324 this option will not work on a MIPS core without SmartMIPS core. If
2325 you don't know you probably don't have SmartMIPS and should say N
2326 here.
2327
2328config CPU_MICROMIPS
2329 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2330 bool "microMIPS"
2331 help
2332 When this option is enabled the kernel will be built using the
2333 microMIPS ISA
2334
2335endchoice
2336
2337config CPU_HAS_MSA
2338 bool "Support for the MIPS SIMD Architecture"
2339 depends on CPU_SUPPORTS_MSA
2340 depends on MIPS_FP_SUPPORT
2341 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2342 help
2343 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2344 and a set of SIMD instructions to operate on them. When this option
2345 is enabled the kernel will support allocating & switching MSA
2346 vector register contexts. If you know that your kernel will only be
2347 running on CPUs which do not support MSA or that your userland will
2348 not be making use of it then you may wish to say N here to reduce
2349 the size & complexity of your kernel.
2350
2351 If unsure, say Y.
2352
2353config CPU_HAS_WB
2354 bool
2355
2356config XKS01
2357 bool
2358
2359config CPU_HAS_DIEI
2360 depends on !CPU_DIEI_BROKEN
2361 bool
2362
2363config CPU_DIEI_BROKEN
2364 bool
2365
2366config CPU_HAS_RIXI
2367 bool
2368
2369config CPU_NO_LOAD_STORE_LR
2370 bool
2371 help
2372 CPU lacks support for unaligned load and store instructions:
2373 LWL, LWR, SWL, SWR (Load/store word left/right).
2374 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2375 systems).
2376
2377#
2378# Vectored interrupt mode is an R2 feature
2379#
2380config CPU_MIPSR2_IRQ_VI
2381 bool
2382
2383#
2384# Extended interrupt mode is an R2 feature
2385#
2386config CPU_MIPSR2_IRQ_EI
2387 bool
2388
2389config CPU_HAS_SYNC
2390 bool
2391 depends on !CPU_R3000
2392 default y
2393
2394#
2395# CPU non-features
2396#
2397
2398# Work around the "daddi" and "daddiu" CPU errata:
2399#
2400# - The `daddi' instruction fails to trap on overflow.
2401# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2402# erratum #23
2403#
2404# - The `daddiu' instruction can produce an incorrect result.
2405# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2406# erratum #41
2407# "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2408# #15
2409# "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
2410# "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
2411config CPU_DADDI_WORKAROUNDS
2412 bool
2413
2414# Work around certain R4000 CPU errata (as implemented by GCC):
2415#
2416# - A double-word or a variable shift may give an incorrect result
2417# if executed immediately after starting an integer division:
2418# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2419# erratum #28
2420# "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2421# #19
2422#
2423# - A double-word or a variable shift may give an incorrect result
2424# if executed while an integer multiplication is in progress:
2425# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2426# errata #16 & #28
2427#
2428# - An integer division may give an incorrect result if started in
2429# a delay slot of a taken branch or a jump:
2430# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2431# erratum #52
2432config CPU_R4000_WORKAROUNDS
2433 bool
2434 select CPU_R4400_WORKAROUNDS
2435
2436# Work around certain R4400 CPU errata (as implemented by GCC):
2437#
2438# - A double-word or a variable shift may give an incorrect result
2439# if executed immediately after starting an integer division:
2440# "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
2441# "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
2442config CPU_R4400_WORKAROUNDS
2443 bool
2444
2445config CPU_R4X00_BUGS64
2446 bool
2447 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2448
2449config MIPS_ASID_SHIFT
2450 int
2451 default 6 if CPU_R3000
2452 default 0
2453
2454config MIPS_ASID_BITS
2455 int
2456 default 0 if MIPS_ASID_BITS_VARIABLE
2457 default 6 if CPU_R3000
2458 default 8
2459
2460config MIPS_ASID_BITS_VARIABLE
2461 bool
2462
2463config MIPS_CRC_SUPPORT
2464 bool
2465
2466# R4600 erratum. Due to the lack of errata information the exact
2467# technical details aren't known. I've experimentally found that disabling
2468# interrupts during indexed I-cache flushes seems to be sufficient to deal
2469# with the issue.
2470config WAR_R4600_V1_INDEX_ICACHEOP
2471 bool
2472
2473# Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2474#
2475# 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2476# Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2477# executed if there is no other dcache activity. If the dcache is
2478# accessed for another instruction immediately preceding when these
2479# cache instructions are executing, it is possible that the dcache
2480# tag match outputs used by these cache instructions will be
2481# incorrect. These cache instructions should be preceded by at least
2482# four instructions that are not any kind of load or store
2483# instruction.
2484#
2485# This is not allowed: lw
2486# nop
2487# nop
2488# nop
2489# cache Hit_Writeback_Invalidate_D
2490#
2491# This is allowed: lw
2492# nop
2493# nop
2494# nop
2495# nop
2496# cache Hit_Writeback_Invalidate_D
2497config WAR_R4600_V1_HIT_CACHEOP
2498 bool
2499
2500# Writeback and invalidate the primary cache dcache before DMA.
2501#
2502# R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2503# Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2504# operate correctly if the internal data cache refill buffer is empty. These
2505# CACHE instructions should be separated from any potential data cache miss
2506# by a load instruction to an uncached address to empty the response buffer."
2507# (Revision 2.0 device errata from IDT available on https://www.idt.com/
2508# in .pdf format.)
2509config WAR_R4600_V2_HIT_CACHEOP
2510 bool
2511
2512# From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2513# the line which this instruction itself exists, the following
2514# operation is not guaranteed."
2515#
2516# Workaround: do two phase flushing for Index_Invalidate_I
2517config WAR_TX49XX_ICACHE_INDEX_INV
2518 bool
2519
2520# The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2521# opposes it being called that) where invalid instructions in the same
2522# I-cache line worth of instructions being fetched may case spurious
2523# exceptions.
2524config WAR_ICACHE_REFILLS
2525 bool
2526
2527# On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2528# may cause ll / sc and lld / scd sequences to execute non-atomically.
2529config WAR_R10000_LLSC
2530 bool
2531
2532# 34K core erratum: "Problems Executing the TLBR Instruction"
2533config WAR_MIPS34K_MISSED_ITLB
2534 bool
2535
2536#
2537# - Highmem only makes sense for the 32-bit kernel.
2538# - The current highmem code will only work properly on physically indexed
2539# caches such as R3000, SB1, R7000 or those that look like they're virtually
2540# indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2541# moment we protect the user and offer the highmem option only on machines
2542# where it's known to be safe. This will not offer highmem on a few systems
2543# such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2544# indexed CPUs but we're playing safe.
2545# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2546# know they might have memory configurations that could make use of highmem
2547# support.
2548#
2549config HIGHMEM
2550 bool "High Memory Support"
2551 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2552 select KMAP_LOCAL
2553
2554config CPU_SUPPORTS_HIGHMEM
2555 bool
2556
2557config SYS_SUPPORTS_HIGHMEM
2558 bool
2559
2560config SYS_SUPPORTS_SMARTMIPS
2561 bool
2562
2563config SYS_SUPPORTS_MICROMIPS
2564 bool
2565
2566config SYS_SUPPORTS_MIPS16
2567 bool
2568 help
2569 This option must be set if a kernel might be executed on a MIPS16-
2570 enabled CPU even if MIPS16 is not actually being used. In other
2571 words, it makes the kernel MIPS16-tolerant.
2572
2573config CPU_SUPPORTS_MSA
2574 bool
2575
2576config ARCH_FLATMEM_ENABLE
2577 def_bool y
2578 depends on !NUMA && !CPU_LOONGSON2EF
2579
2580config ARCH_SPARSEMEM_ENABLE
2581 bool
2582
2583config NUMA
2584 bool "NUMA Support"
2585 depends on SYS_SUPPORTS_NUMA
2586 select SMP
2587 select HAVE_SETUP_PER_CPU_AREA
2588 select NEED_PER_CPU_EMBED_FIRST_CHUNK
2589 help
2590 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2591 Access). This option improves performance on systems with more
2592 than two nodes; on two node systems it is generally better to
2593 leave it disabled; on single node systems leave this option
2594 disabled.
2595
2596config SYS_SUPPORTS_NUMA
2597 bool
2598
2599config HAVE_ARCH_NODEDATA_EXTENSION
2600 bool
2601
2602config RELOCATABLE
2603 bool "Relocatable kernel"
2604 depends on SYS_SUPPORTS_RELOCATABLE
2605 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2606 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2607 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2608 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2609 CPU_LOONGSON64
2610 help
2611 This builds a kernel image that retains relocation information
2612 so it can be loaded someplace besides the default 1MB.
2613 The relocations make the kernel binary about 15% larger,
2614 but are discarded at runtime
2615
2616config RELOCATION_TABLE_SIZE
2617 hex "Relocation table size"
2618 depends on RELOCATABLE
2619 range 0x0 0x01000000
2620 default "0x00200000" if CPU_LOONGSON64
2621 default "0x00100000"
2622 help
2623 A table of relocation data will be appended to the kernel binary
2624 and parsed at boot to fix up the relocated kernel.
2625
2626 This option allows the amount of space reserved for the table to be
2627 adjusted, although the default of 1Mb should be ok in most cases.
2628
2629 The build will fail and a valid size suggested if this is too small.
2630
2631 If unsure, leave at the default value.
2632
2633config RANDOMIZE_BASE
2634 bool "Randomize the address of the kernel image"
2635 depends on RELOCATABLE
2636 help
2637 Randomizes the physical and virtual address at which the
2638 kernel image is loaded, as a security feature that
2639 deters exploit attempts relying on knowledge of the location
2640 of kernel internals.
2641
2642 Entropy is generated using any coprocessor 0 registers available.
2643
2644 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2645
2646 If unsure, say N.
2647
2648config RANDOMIZE_BASE_MAX_OFFSET
2649 hex "Maximum kASLR offset" if EXPERT
2650 depends on RANDOMIZE_BASE
2651 range 0x0 0x40000000 if EVA || 64BIT
2652 range 0x0 0x08000000
2653 default "0x01000000"
2654 help
2655 When kASLR is active, this provides the maximum offset that will
2656 be applied to the kernel image. It should be set according to the
2657 amount of physical RAM available in the target system minus
2658 PHYSICAL_START and must be a power of 2.
2659
2660 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2661 EVA or 64-bit. The default is 16Mb.
2662
2663config NODES_SHIFT
2664 int
2665 default "6"
2666 depends on NUMA
2667
2668config HW_PERF_EVENTS
2669 bool "Enable hardware performance counter support for perf events"
2670 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
2671 default y
2672 help
2673 Enable hardware performance counter support for perf events. If
2674 disabled, perf events will use software events only.
2675
2676config DMI
2677 bool "Enable DMI scanning"
2678 depends on MACH_LOONGSON64
2679 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2680 default y
2681 help
2682 Enabled scanning of DMI to identify machine quirks. Say Y
2683 here unless you have verified that your setup is not
2684 affected by entries in the DMI blacklist. Required by PNP
2685 BIOS code.
2686
2687config SMP
2688 bool "Multi-Processing support"
2689 depends on SYS_SUPPORTS_SMP
2690 help
2691 This enables support for systems with more than one CPU. If you have
2692 a system with only one CPU, say N. If you have a system with more
2693 than one CPU, say Y.
2694
2695 If you say N here, the kernel will run on uni- and multiprocessor
2696 machines, but will use only one CPU of a multiprocessor machine. If
2697 you say Y here, the kernel will run on many, but not all,
2698 uniprocessor machines. On a uniprocessor machine, the kernel
2699 will run faster if you say N here.
2700
2701 People using multiprocessor machines who say Y here should also say
2702 Y to "Enhanced Real Time Clock Support", below.
2703
2704 See also the SMP-HOWTO available at
2705 <https://www.tldp.org/docs.html#howto>.
2706
2707 If you don't know what to do here, say N.
2708
2709config HOTPLUG_CPU
2710 bool "Support for hot-pluggable CPUs"
2711 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2712 help
2713 Say Y here to allow turning CPUs off and on. CPUs can be
2714 controlled through /sys/devices/system/cpu.
2715 (Note: power management support will enable this option
2716 automatically on SMP systems. )
2717 Say N if you want to disable CPU hotplug.
2718
2719config SMP_UP
2720 bool
2721
2722config SYS_SUPPORTS_MIPS_CPS
2723 bool
2724
2725config SYS_SUPPORTS_SMP
2726 bool
2727
2728config NR_CPUS_DEFAULT_4
2729 bool
2730
2731config NR_CPUS_DEFAULT_8
2732 bool
2733
2734config NR_CPUS_DEFAULT_16
2735 bool
2736
2737config NR_CPUS_DEFAULT_32
2738 bool
2739
2740config NR_CPUS_DEFAULT_64
2741 bool
2742
2743config NR_CPUS
2744 int "Maximum number of CPUs (2-256)"
2745 range 2 256
2746 depends on SMP
2747 default "4" if NR_CPUS_DEFAULT_4
2748 default "8" if NR_CPUS_DEFAULT_8
2749 default "16" if NR_CPUS_DEFAULT_16
2750 default "32" if NR_CPUS_DEFAULT_32
2751 default "64" if NR_CPUS_DEFAULT_64
2752 help
2753 This allows you to specify the maximum number of CPUs which this
2754 kernel will support. The maximum supported value is 32 for 32-bit
2755 kernel and 64 for 64-bit kernels; the minimum value which makes
2756 sense is 1 for Qemu (useful only for kernel debugging purposes)
2757 and 2 for all others.
2758
2759 This is purely to save memory - each supported CPU adds
2760 approximately eight kilobytes to the kernel image. For best
2761 performance should round up your number of processors to the next
2762 power of two.
2763
2764config MIPS_PERF_SHARED_TC_COUNTERS
2765 bool
2766
2767config MIPS_NR_CPU_NR_MAP_1024
2768 bool
2769
2770config MIPS_NR_CPU_NR_MAP
2771 int
2772 depends on SMP
2773 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2774 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2775
2776#
2777# Timer Interrupt Frequency Configuration
2778#
2779
2780choice
2781 prompt "Timer frequency"
2782 default HZ_250
2783 help
2784 Allows the configuration of the timer frequency.
2785
2786 config HZ_24
2787 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2788
2789 config HZ_48
2790 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2791
2792 config HZ_100
2793 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2794
2795 config HZ_128
2796 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2797
2798 config HZ_250
2799 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2800
2801 config HZ_256
2802 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2803
2804 config HZ_1000
2805 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2806
2807 config HZ_1024
2808 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2809
2810endchoice
2811
2812config SYS_SUPPORTS_24HZ
2813 bool
2814
2815config SYS_SUPPORTS_48HZ
2816 bool
2817
2818config SYS_SUPPORTS_100HZ
2819 bool
2820
2821config SYS_SUPPORTS_128HZ
2822 bool
2823
2824config SYS_SUPPORTS_250HZ
2825 bool
2826
2827config SYS_SUPPORTS_256HZ
2828 bool
2829
2830config SYS_SUPPORTS_1000HZ
2831 bool
2832
2833config SYS_SUPPORTS_1024HZ
2834 bool
2835
2836config SYS_SUPPORTS_ARBIT_HZ
2837 bool
2838 default y if !SYS_SUPPORTS_24HZ && \
2839 !SYS_SUPPORTS_48HZ && \
2840 !SYS_SUPPORTS_100HZ && \
2841 !SYS_SUPPORTS_128HZ && \
2842 !SYS_SUPPORTS_250HZ && \
2843 !SYS_SUPPORTS_256HZ && \
2844 !SYS_SUPPORTS_1000HZ && \
2845 !SYS_SUPPORTS_1024HZ
2846
2847config HZ
2848 int
2849 default 24 if HZ_24
2850 default 48 if HZ_48
2851 default 100 if HZ_100
2852 default 128 if HZ_128
2853 default 250 if HZ_250
2854 default 256 if HZ_256
2855 default 1000 if HZ_1000
2856 default 1024 if HZ_1024
2857
2858config SCHED_HRTICK
2859 def_bool HIGH_RES_TIMERS
2860
2861config ARCH_SUPPORTS_KEXEC
2862 def_bool y
2863
2864config ARCH_SUPPORTS_CRASH_DUMP
2865 def_bool y
2866
2867config PHYSICAL_START
2868 hex "Physical address where the kernel is loaded"
2869 default "0xffffffff84000000"
2870 depends on CRASH_DUMP
2871 help
2872 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
2873 If you plan to use kernel for capturing the crash dump change
2874 this value to start of the reserved region (the "X" value as
2875 specified in the "crashkernel=YM@XM" command line boot parameter
2876 passed to the panic-ed kernel).
2877
2878config MIPS_O32_FP64_SUPPORT
2879 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
2880 depends on 32BIT || MIPS32_O32
2881 help
2882 When this is enabled, the kernel will support use of 64-bit floating
2883 point registers with binaries using the O32 ABI along with the
2884 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2885 32-bit MIPS systems this support is at the cost of increasing the
2886 size and complexity of the compiled FPU emulator. Thus if you are
2887 running a MIPS32 system and know that none of your userland binaries
2888 will require 64-bit floating point, you may wish to reduce the size
2889 of your kernel & potentially improve FP emulation performance by
2890 saying N here.
2891
2892 Although binutils currently supports use of this flag the details
2893 concerning its effect upon the O32 ABI in userland are still being
2894 worked on. In order to avoid userland becoming dependent upon current
2895 behaviour before the details have been finalised, this option should
2896 be considered experimental and only enabled by those working upon
2897 said details.
2898
2899 If unsure, say N.
2900
2901config USE_OF
2902 bool
2903 select OF
2904 select OF_EARLY_FLATTREE
2905 select IRQ_DOMAIN
2906
2907config UHI_BOOT
2908 bool
2909
2910config BUILTIN_DTB
2911 bool
2912
2913choice
2914 prompt "Kernel appended dtb support" if USE_OF
2915 default MIPS_NO_APPENDED_DTB
2916
2917 config MIPS_NO_APPENDED_DTB
2918 bool "None"
2919 help
2920 Do not enable appended dtb support.
2921
2922 config MIPS_ELF_APPENDED_DTB
2923 bool "vmlinux"
2924 help
2925 With this option, the boot code will look for a device tree binary
2926 DTB) included in the vmlinux ELF section .appended_dtb. By default
2927 it is empty and the DTB can be appended using binutils command
2928 objcopy:
2929
2930 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
2931
2932 This is meant as a backward compatibility convenience for those
2933 systems with a bootloader that can't be upgraded to accommodate
2934 the documented boot protocol using a device tree.
2935
2936 config MIPS_RAW_APPENDED_DTB
2937 bool "vmlinux.bin or vmlinuz.bin"
2938 help
2939 With this option, the boot code will look for a device tree binary
2940 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
2941 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
2942
2943 This is meant as a backward compatibility convenience for those
2944 systems with a bootloader that can't be upgraded to accommodate
2945 the documented boot protocol using a device tree.
2946
2947 Beware that there is very little in terms of protection against
2948 this option being confused by leftover garbage in memory that might
2949 look like a DTB header after a reboot if no actual DTB is appended
2950 to vmlinux.bin. Do not leave this option active in a production kernel
2951 if you don't intend to always append a DTB.
2952endchoice
2953
2954choice
2955 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
2956 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
2957 !MACH_LOONGSON64 && !MIPS_MALTA && \
2958 !CAVIUM_OCTEON_SOC
2959 default MIPS_CMDLINE_FROM_BOOTLOADER
2960
2961 config MIPS_CMDLINE_FROM_DTB
2962 depends on USE_OF
2963 bool "Dtb kernel arguments if available"
2964
2965 config MIPS_CMDLINE_DTB_EXTEND
2966 depends on USE_OF
2967 bool "Extend dtb kernel arguments with bootloader arguments"
2968
2969 config MIPS_CMDLINE_FROM_BOOTLOADER
2970 bool "Bootloader kernel arguments if available"
2971
2972 config MIPS_CMDLINE_BUILTIN_EXTEND
2973 depends on CMDLINE_BOOL
2974 bool "Extend builtin kernel arguments with bootloader arguments"
2975endchoice
2976
2977endmenu
2978
2979config LOCKDEP_SUPPORT
2980 bool
2981 default y
2982
2983config STACKTRACE_SUPPORT
2984 bool
2985 default y
2986
2987config PGTABLE_LEVELS
2988 int
2989 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
2990 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
2991 default 2
2992
2993config MIPS_AUTO_PFN_OFFSET
2994 bool
2995
2996menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
2997
2998config PCI_DRIVERS_GENERIC
2999 select PCI_DOMAINS_GENERIC if PCI
3000 bool
3001
3002config PCI_DRIVERS_LEGACY
3003 def_bool !PCI_DRIVERS_GENERIC
3004 select NO_GENERIC_PCI_IOPORT_MAP
3005 select PCI_DOMAINS if PCI
3006
3007#
3008# ISA support is now enabled via select. Too many systems still have the one
3009# or other ISA chip on the board that users don't know about so don't expect
3010# users to choose the right thing ...
3011#
3012config ISA
3013 bool
3014
3015config TC
3016 bool "TURBOchannel support"
3017 depends on MACH_DECSTATION
3018 help
3019 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3020 processors. TURBOchannel programming specifications are available
3021 at:
3022 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3023 and:
3024 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3025 Linux driver support status is documented at:
3026 <http://www.linux-mips.org/wiki/DECstation>
3027
3028config MMU
3029 bool
3030 default y
3031
3032config ARCH_MMAP_RND_BITS_MIN
3033 default 12 if 64BIT
3034 default 8
3035
3036config ARCH_MMAP_RND_BITS_MAX
3037 default 18 if 64BIT
3038 default 15
3039
3040config ARCH_MMAP_RND_COMPAT_BITS_MIN
3041 default 8
3042
3043config ARCH_MMAP_RND_COMPAT_BITS_MAX
3044 default 15
3045
3046config I8253
3047 bool
3048 select CLKSRC_I8253
3049 select CLKEVT_I8253
3050 select MIPS_EXTERNAL_TIMER
3051endmenu
3052
3053config TRAD_SIGNALS
3054 bool
3055
3056config MIPS32_COMPAT
3057 bool
3058
3059config COMPAT
3060 bool
3061
3062config MIPS32_O32
3063 bool "Kernel support for o32 binaries"
3064 depends on 64BIT
3065 select ARCH_WANT_OLD_COMPAT_IPC
3066 select COMPAT
3067 select MIPS32_COMPAT
3068 help
3069 Select this option if you want to run o32 binaries. These are pure
3070 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3071 existing binaries are in this format.
3072
3073 If unsure, say Y.
3074
3075config MIPS32_N32
3076 bool "Kernel support for n32 binaries"
3077 depends on 64BIT
3078 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3079 select COMPAT
3080 select MIPS32_COMPAT
3081 help
3082 Select this option if you want to run n32 binaries. These are
3083 64-bit binaries using 32-bit quantities for addressing and certain
3084 data that would normally be 64-bit. They are used in special
3085 cases.
3086
3087 If unsure, say N.
3088
3089config CC_HAS_MNO_BRANCH_LIKELY
3090 def_bool y
3091 depends on $(cc-option,-mno-branch-likely)
3092
3093# https://github.com/llvm/llvm-project/issues/61045
3094config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH
3095 def_bool y if CC_IS_CLANG
3096
3097menu "Power management options"
3098
3099config ARCH_HIBERNATION_POSSIBLE
3100 def_bool y
3101 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3102
3103config ARCH_SUSPEND_POSSIBLE
3104 def_bool y
3105 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3106
3107source "kernel/power/Kconfig"
3108
3109endmenu
3110
3111config MIPS_EXTERNAL_TIMER
3112 bool
3113
3114menu "CPU Power Management"
3115
3116if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3117source "drivers/cpufreq/Kconfig"
3118endif # CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3119
3120source "drivers/cpuidle/Kconfig"
3121
3122endmenu
3123
3124source "arch/mips/kvm/Kconfig"
3125
3126source "arch/mips/vdso/Kconfig"