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1/*
2 * Copyright © 2013 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24#ifndef _INTEL_DSI_H
25#define _INTEL_DSI_H
26
27#include <drm/drm_crtc.h>
28#include <drm/drm_mipi_dsi.h>
29
30#include "intel_display_types.h"
31
32#define INTEL_DSI_VIDEO_MODE 0
33#define INTEL_DSI_COMMAND_MODE 1
34
35/* Dual Link support */
36#define DSI_DUAL_LINK_NONE 0
37#define DSI_DUAL_LINK_FRONT_BACK 1
38#define DSI_DUAL_LINK_PIXEL_ALT 2
39
40struct intel_dsi_host;
41
42struct intel_dsi {
43 struct intel_encoder base;
44
45 struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS];
46 intel_wakeref_t io_wakeref[I915_MAX_PORTS];
47
48 /* GPIO Desc for panel and backlight control */
49 struct gpio_desc *gpio_panel;
50 struct gpio_desc *gpio_backlight;
51
52 struct intel_connector *attached_connector;
53
54 /* bit mask of ports (vlv dsi) or phys (icl dsi) being driven */
55 union {
56 u16 ports; /* VLV DSI */
57 u16 phys; /* ICL DSI */
58 };
59
60 /* if true, use HS mode, otherwise LP */
61 bool hs;
62
63 /* virtual channel */
64 int channel;
65
66 /* Video mode or command mode */
67 u16 operation_mode;
68
69 /* number of DSI lanes */
70 unsigned int lane_count;
71
72 /* i2c bus associated with the slave device */
73 int i2c_bus_num;
74
75 /*
76 * video mode pixel format
77 *
78 * XXX: consolidate on .format in struct mipi_dsi_device.
79 */
80 enum mipi_dsi_pixel_format pixel_format;
81
82 /* video mode format for MIPI_VIDEO_MODE_FORMAT register */
83 u32 video_mode_format;
84
85 /* eot for MIPI_EOT_DISABLE register */
86 u8 eotp_pkt;
87 u8 clock_stop;
88
89 u8 escape_clk_div;
90 u8 dual_link;
91
92 u16 dcs_backlight_ports;
93 u16 dcs_cabc_ports;
94
95 /* RGB or BGR */
96 bool bgr_enabled;
97
98 u8 pixel_overlap;
99 u32 port_bits;
100 u32 bw_timer;
101 u32 dphy_reg;
102
103 /* data lanes dphy timing */
104 u32 dphy_data_lane_reg;
105 u32 video_frmt_cfg_bits;
106 u16 lp_byte_clk;
107
108 /* timeouts in byte clocks */
109 u16 hs_tx_timeout;
110 u16 lp_rx_timeout;
111 u16 turn_arnd_val;
112 u16 rst_timer_val;
113 u16 hs_to_lp_count;
114 u16 clk_lp_to_hs_count;
115 u16 clk_hs_to_lp_count;
116
117 u16 init_count;
118 u32 pclk;
119 u16 burst_mode_ratio;
120
121 /* all delays in ms */
122 u16 backlight_off_delay;
123 u16 backlight_on_delay;
124 u16 panel_on_delay;
125 u16 panel_off_delay;
126 u16 panel_pwr_cycle_delay;
127 ktime_t panel_power_off_time;
128};
129
130struct intel_dsi_host {
131 struct mipi_dsi_host base;
132 struct intel_dsi *intel_dsi;
133 enum port port;
134
135 /* our little hack */
136 struct mipi_dsi_device *device;
137};
138
139static inline struct intel_dsi_host *to_intel_dsi_host(struct mipi_dsi_host *h)
140{
141 return container_of(h, struct intel_dsi_host, base);
142}
143
144#define for_each_dsi_port(__port, __ports_mask) \
145 for_each_port_masked(__port, __ports_mask)
146#define for_each_dsi_phy(__phy, __phys_mask) \
147 for_each_phy_masked(__phy, __phys_mask)
148
149static inline struct intel_dsi *enc_to_intel_dsi(struct intel_encoder *encoder)
150{
151 return container_of(&encoder->base, struct intel_dsi, base.base);
152}
153
154static inline bool is_vid_mode(struct intel_dsi *intel_dsi)
155{
156 return intel_dsi->operation_mode == INTEL_DSI_VIDEO_MODE;
157}
158
159static inline bool is_cmd_mode(struct intel_dsi *intel_dsi)
160{
161 return intel_dsi->operation_mode == INTEL_DSI_COMMAND_MODE;
162}
163
164static inline u16 intel_dsi_encoder_ports(struct intel_encoder *encoder)
165{
166 return enc_to_intel_dsi(encoder)->ports;
167}
168
169/* icl_dsi.c */
170void icl_dsi_init(struct drm_i915_private *dev_priv);
171void icl_dsi_frame_update(struct intel_crtc_state *crtc_state);
172
173/* intel_dsi.c */
174int intel_dsi_bitrate(const struct intel_dsi *intel_dsi);
175int intel_dsi_tlpx_ns(const struct intel_dsi *intel_dsi);
176enum drm_panel_orientation
177intel_dsi_get_panel_orientation(struct intel_connector *connector);
178
179/* vlv_dsi.c */
180void vlv_dsi_wait_for_fifo_empty(struct intel_dsi *intel_dsi, enum port port);
181enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt);
182int intel_dsi_get_modes(struct drm_connector *connector);
183enum drm_mode_status intel_dsi_mode_valid(struct drm_connector *connector,
184 struct drm_display_mode *mode);
185struct intel_dsi_host *intel_dsi_host_init(struct intel_dsi *intel_dsi,
186 const struct mipi_dsi_host_ops *funcs,
187 enum port port);
188void vlv_dsi_init(struct drm_i915_private *dev_priv);
189
190/* vlv_dsi_pll.c */
191int vlv_dsi_pll_compute(struct intel_encoder *encoder,
192 struct intel_crtc_state *config);
193void vlv_dsi_pll_enable(struct intel_encoder *encoder,
194 const struct intel_crtc_state *config);
195void vlv_dsi_pll_disable(struct intel_encoder *encoder);
196u32 vlv_dsi_get_pclk(struct intel_encoder *encoder,
197 struct intel_crtc_state *config);
198void vlv_dsi_reset_clocks(struct intel_encoder *encoder, enum port port);
199
200bool bxt_dsi_pll_is_enabled(struct drm_i915_private *dev_priv);
201int bxt_dsi_pll_compute(struct intel_encoder *encoder,
202 struct intel_crtc_state *config);
203void bxt_dsi_pll_enable(struct intel_encoder *encoder,
204 const struct intel_crtc_state *config);
205void bxt_dsi_pll_disable(struct intel_encoder *encoder);
206u32 bxt_dsi_get_pclk(struct intel_encoder *encoder,
207 struct intel_crtc_state *config);
208void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port);
209
210/* intel_dsi_vbt.c */
211bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id);
212void intel_dsi_vbt_gpio_init(struct intel_dsi *intel_dsi, bool panel_is_on);
213void intel_dsi_vbt_gpio_cleanup(struct intel_dsi *intel_dsi);
214void intel_dsi_vbt_exec_sequence(struct intel_dsi *intel_dsi,
215 enum mipi_seq seq_id);
216void intel_dsi_msleep(struct intel_dsi *intel_dsi, int msec);
217void intel_dsi_log_params(struct intel_dsi *intel_dsi);
218
219#endif /* _INTEL_DSI_H */
1/*
2 * Copyright © 2013 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24#ifndef _INTEL_DSI_H
25#define _INTEL_DSI_H
26
27#include <drm/drm_crtc.h>
28#include <drm/drm_mipi_dsi.h>
29
30#include "intel_display_types.h"
31
32#define INTEL_DSI_VIDEO_MODE 0
33#define INTEL_DSI_COMMAND_MODE 1
34
35/* Dual Link support */
36#define DSI_DUAL_LINK_NONE 0
37#define DSI_DUAL_LINK_FRONT_BACK 1
38#define DSI_DUAL_LINK_PIXEL_ALT 2
39
40struct intel_dsi_host;
41
42struct intel_dsi {
43 struct intel_encoder base;
44
45 struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS];
46 intel_wakeref_t io_wakeref[I915_MAX_PORTS];
47
48 /* GPIO Desc for panel and backlight control */
49 struct gpio_desc *gpio_panel;
50 struct gpio_desc *gpio_backlight;
51
52 struct intel_connector *attached_connector;
53
54 /* bit mask of ports (vlv dsi) or phys (icl dsi) being driven */
55 union {
56 u16 ports; /* VLV DSI */
57 u16 phys; /* ICL DSI */
58 };
59
60 /* if true, use HS mode, otherwise LP */
61 bool hs;
62
63 /* virtual channel */
64 int channel;
65
66 /* Video mode or command mode */
67 u16 operation_mode;
68
69 /* number of DSI lanes */
70 unsigned int lane_count;
71
72 /* i2c bus associated with the slave device */
73 int i2c_bus_num;
74
75 /*
76 * video mode pixel format
77 *
78 * XXX: consolidate on .format in struct mipi_dsi_device.
79 */
80 enum mipi_dsi_pixel_format pixel_format;
81
82 /* NON_BURST_SYNC_PULSE, NON_BURST_SYNC_EVENTS, or BURST_MODE */
83 int video_mode;
84
85 /* eot for MIPI_EOT_DISABLE register */
86 u8 eotp_pkt;
87 u8 clock_stop;
88
89 u8 escape_clk_div;
90 u8 dual_link;
91
92 /* RGB or BGR */
93 bool bgr_enabled;
94
95 u8 pixel_overlap;
96 u32 port_bits;
97 u32 bw_timer;
98 u32 dphy_reg;
99
100 /* data lanes dphy timing */
101 u32 dphy_data_lane_reg;
102 u32 video_frmt_cfg_bits;
103 u16 lp_byte_clk;
104
105 /* timeouts in byte clocks */
106 u16 hs_tx_timeout;
107 u16 lp_rx_timeout;
108 u16 turn_arnd_val;
109 u16 rst_timer_val;
110 u16 hs_to_lp_count;
111 u16 clk_lp_to_hs_count;
112 u16 clk_hs_to_lp_count;
113
114 u16 init_count;
115 u32 pclk;
116 u16 burst_mode_ratio;
117
118 /* all delays in ms */
119 u16 backlight_off_delay;
120 u16 backlight_on_delay;
121 u16 panel_on_delay;
122 u16 panel_off_delay;
123 u16 panel_pwr_cycle_delay;
124 ktime_t panel_power_off_time;
125};
126
127struct intel_dsi_host {
128 struct mipi_dsi_host base;
129 struct intel_dsi *intel_dsi;
130 enum port port;
131
132 /* our little hack */
133 struct mipi_dsi_device *device;
134};
135
136static inline struct intel_dsi_host *to_intel_dsi_host(struct mipi_dsi_host *h)
137{
138 return container_of(h, struct intel_dsi_host, base);
139}
140
141#define for_each_dsi_port(__port, __ports_mask) \
142 for_each_port_masked(__port, __ports_mask)
143#define for_each_dsi_phy(__phy, __phys_mask) \
144 for_each_phy_masked(__phy, __phys_mask)
145
146static inline struct intel_dsi *enc_to_intel_dsi(struct intel_encoder *encoder)
147{
148 return container_of(&encoder->base, struct intel_dsi, base.base);
149}
150
151static inline bool is_vid_mode(struct intel_dsi *intel_dsi)
152{
153 return intel_dsi->operation_mode == INTEL_DSI_VIDEO_MODE;
154}
155
156static inline bool is_cmd_mode(struct intel_dsi *intel_dsi)
157{
158 return intel_dsi->operation_mode == INTEL_DSI_COMMAND_MODE;
159}
160
161static inline u16 intel_dsi_encoder_ports(struct intel_encoder *encoder)
162{
163 return enc_to_intel_dsi(encoder)->ports;
164}
165
166int intel_dsi_bitrate(const struct intel_dsi *intel_dsi);
167int intel_dsi_tlpx_ns(const struct intel_dsi *intel_dsi);
168enum drm_panel_orientation
169intel_dsi_get_panel_orientation(struct intel_connector *connector);
170int intel_dsi_get_modes(struct drm_connector *connector);
171enum drm_mode_status intel_dsi_mode_valid(struct drm_connector *connector,
172 struct drm_display_mode *mode);
173struct intel_dsi_host *intel_dsi_host_init(struct intel_dsi *intel_dsi,
174 const struct mipi_dsi_host_ops *funcs,
175 enum port port);
176
177#endif /* _INTEL_DSI_H */