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1/*
2 * Copyright © 2006 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28#include <drm/drm_dp_helper.h>
29
30#include "display/intel_display.h"
31#include "display/intel_display_types.h"
32#include "display/intel_gmbus.h"
33
34#include "i915_drv.h"
35
36#define _INTEL_BIOS_PRIVATE
37#include "intel_vbt_defs.h"
38
39/**
40 * DOC: Video BIOS Table (VBT)
41 *
42 * The Video BIOS Table, or VBT, provides platform and board specific
43 * configuration information to the driver that is not discoverable or available
44 * through other means. The configuration is mostly related to display
45 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
46 * the PCI ROM.
47 *
48 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
49 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
50 * contain the actual configuration information. The VBT Header, and thus the
51 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
52 * BDB Header. The data blocks are concatenated after the BDB Header. The data
53 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
54 * data. (Block 53, the MIPI Sequence Block is an exception.)
55 *
56 * The driver parses the VBT during load. The relevant information is stored in
57 * driver private data for ease of use, and the actual VBT is not read after
58 * that.
59 */
60
61/* Wrapper for VBT child device config */
62struct intel_bios_encoder_data {
63 struct drm_i915_private *i915;
64
65 struct child_device_config child;
66 struct dsc_compression_parameters_entry *dsc;
67 struct list_head node;
68};
69
70#define SLAVE_ADDR1 0x70
71#define SLAVE_ADDR2 0x72
72
73/* Get BDB block size given a pointer to Block ID. */
74static u32 _get_blocksize(const u8 *block_base)
75{
76 /* The MIPI Sequence Block v3+ has a separate size field. */
77 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
78 return *((const u32 *)(block_base + 4));
79 else
80 return *((const u16 *)(block_base + 1));
81}
82
83/* Get BDB block size give a pointer to data after Block ID and Block Size. */
84static u32 get_blocksize(const void *block_data)
85{
86 return _get_blocksize(block_data - 3);
87}
88
89static const void *
90find_section(const void *_bdb, enum bdb_block_id section_id)
91{
92 const struct bdb_header *bdb = _bdb;
93 const u8 *base = _bdb;
94 int index = 0;
95 u32 total, current_size;
96 enum bdb_block_id current_id;
97
98 /* skip to first section */
99 index += bdb->header_size;
100 total = bdb->bdb_size;
101
102 /* walk the sections looking for section_id */
103 while (index + 3 < total) {
104 current_id = *(base + index);
105 current_size = _get_blocksize(base + index);
106 index += 3;
107
108 if (index + current_size > total)
109 return NULL;
110
111 if (current_id == section_id)
112 return base + index;
113
114 index += current_size;
115 }
116
117 return NULL;
118}
119
120static void
121fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
122 const struct lvds_dvo_timing *dvo_timing)
123{
124 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
125 dvo_timing->hactive_lo;
126 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
127 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
128 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
129 ((dvo_timing->hsync_pulse_width_hi << 8) |
130 dvo_timing->hsync_pulse_width_lo);
131 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
132 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
133
134 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
135 dvo_timing->vactive_lo;
136 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
137 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
138 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
139 ((dvo_timing->vsync_pulse_width_hi << 4) |
140 dvo_timing->vsync_pulse_width_lo);
141 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
142 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
143 panel_fixed_mode->clock = dvo_timing->clock * 10;
144 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
145
146 if (dvo_timing->hsync_positive)
147 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
148 else
149 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
150
151 if (dvo_timing->vsync_positive)
152 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
153 else
154 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
155
156 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
157 dvo_timing->himage_lo;
158 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
159 dvo_timing->vimage_lo;
160
161 /* Some VBTs have bogus h/vtotal values */
162 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
163 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
164 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
165 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
166
167 drm_mode_set_name(panel_fixed_mode);
168}
169
170static const struct lvds_dvo_timing *
171get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
172 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
173 int index)
174{
175 /*
176 * the size of fp_timing varies on the different platform.
177 * So calculate the DVO timing relative offset in LVDS data
178 * entry to get the DVO timing entry
179 */
180
181 int lfp_data_size =
182 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
183 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
184 int dvo_timing_offset =
185 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
186 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
187 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
188
189 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
190}
191
192/* get lvds_fp_timing entry
193 * this function may return NULL if the corresponding entry is invalid
194 */
195static const struct lvds_fp_timing *
196get_lvds_fp_timing(const struct bdb_header *bdb,
197 const struct bdb_lvds_lfp_data *data,
198 const struct bdb_lvds_lfp_data_ptrs *ptrs,
199 int index)
200{
201 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
202 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
203 size_t ofs;
204
205 if (index >= ARRAY_SIZE(ptrs->ptr))
206 return NULL;
207 ofs = ptrs->ptr[index].fp_timing_offset;
208 if (ofs < data_ofs ||
209 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
210 return NULL;
211 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
212}
213
214/* Parse general panel options */
215static void
216parse_panel_options(struct drm_i915_private *i915,
217 const struct bdb_header *bdb)
218{
219 const struct bdb_lvds_options *lvds_options;
220 int panel_type;
221 int drrs_mode;
222 int ret;
223
224 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
225 if (!lvds_options)
226 return;
227
228 i915->vbt.lvds_dither = lvds_options->pixel_dither;
229
230 ret = intel_opregion_get_panel_type(i915);
231 if (ret >= 0) {
232 drm_WARN_ON(&i915->drm, ret > 0xf);
233 panel_type = ret;
234 drm_dbg_kms(&i915->drm, "Panel type: %d (OpRegion)\n",
235 panel_type);
236 } else {
237 if (lvds_options->panel_type > 0xf) {
238 drm_dbg_kms(&i915->drm,
239 "Invalid VBT panel type 0x%x\n",
240 lvds_options->panel_type);
241 return;
242 }
243 panel_type = lvds_options->panel_type;
244 drm_dbg_kms(&i915->drm, "Panel type: %d (VBT)\n",
245 panel_type);
246 }
247
248 i915->vbt.panel_type = panel_type;
249
250 drrs_mode = (lvds_options->dps_panel_type_bits
251 >> (panel_type * 2)) & MODE_MASK;
252 /*
253 * VBT has static DRRS = 0 and seamless DRRS = 2.
254 * The below piece of code is required to adjust vbt.drrs_type
255 * to match the enum drrs_support_type.
256 */
257 switch (drrs_mode) {
258 case 0:
259 i915->vbt.drrs_type = STATIC_DRRS_SUPPORT;
260 drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n");
261 break;
262 case 2:
263 i915->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
264 drm_dbg_kms(&i915->drm,
265 "DRRS supported mode is seamless\n");
266 break;
267 default:
268 i915->vbt.drrs_type = DRRS_NOT_SUPPORTED;
269 drm_dbg_kms(&i915->drm,
270 "DRRS not supported (VBT input)\n");
271 break;
272 }
273}
274
275/* Try to find integrated panel timing data */
276static void
277parse_lfp_panel_dtd(struct drm_i915_private *i915,
278 const struct bdb_header *bdb)
279{
280 const struct bdb_lvds_lfp_data *lvds_lfp_data;
281 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
282 const struct lvds_dvo_timing *panel_dvo_timing;
283 const struct lvds_fp_timing *fp_timing;
284 struct drm_display_mode *panel_fixed_mode;
285 int panel_type = i915->vbt.panel_type;
286
287 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
288 if (!lvds_lfp_data)
289 return;
290
291 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
292 if (!lvds_lfp_data_ptrs)
293 return;
294
295 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
296 lvds_lfp_data_ptrs,
297 panel_type);
298
299 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
300 if (!panel_fixed_mode)
301 return;
302
303 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
304
305 i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
306
307 drm_dbg_kms(&i915->drm,
308 "Found panel mode in BIOS VBT legacy lfp table:\n");
309 drm_mode_debug_printmodeline(panel_fixed_mode);
310
311 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
312 lvds_lfp_data_ptrs,
313 panel_type);
314 if (fp_timing) {
315 /* check the resolution, just to be sure */
316 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
317 fp_timing->y_res == panel_fixed_mode->vdisplay) {
318 i915->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
319 drm_dbg_kms(&i915->drm,
320 "VBT initial LVDS value %x\n",
321 i915->vbt.bios_lvds_val);
322 }
323 }
324}
325
326static void
327parse_generic_dtd(struct drm_i915_private *i915,
328 const struct bdb_header *bdb)
329{
330 const struct bdb_generic_dtd *generic_dtd;
331 const struct generic_dtd_entry *dtd;
332 struct drm_display_mode *panel_fixed_mode;
333 int num_dtd;
334
335 generic_dtd = find_section(bdb, BDB_GENERIC_DTD);
336 if (!generic_dtd)
337 return;
338
339 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
340 drm_err(&i915->drm, "GDTD size %u is too small.\n",
341 generic_dtd->gdtd_size);
342 return;
343 } else if (generic_dtd->gdtd_size !=
344 sizeof(struct generic_dtd_entry)) {
345 drm_err(&i915->drm, "Unexpected GDTD size %u\n",
346 generic_dtd->gdtd_size);
347 /* DTD has unknown fields, but keep going */
348 }
349
350 num_dtd = (get_blocksize(generic_dtd) -
351 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
352 if (i915->vbt.panel_type >= num_dtd) {
353 drm_err(&i915->drm,
354 "Panel type %d not found in table of %d DTD's\n",
355 i915->vbt.panel_type, num_dtd);
356 return;
357 }
358
359 dtd = &generic_dtd->dtd[i915->vbt.panel_type];
360
361 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
362 if (!panel_fixed_mode)
363 return;
364
365 panel_fixed_mode->hdisplay = dtd->hactive;
366 panel_fixed_mode->hsync_start =
367 panel_fixed_mode->hdisplay + dtd->hfront_porch;
368 panel_fixed_mode->hsync_end =
369 panel_fixed_mode->hsync_start + dtd->hsync;
370 panel_fixed_mode->htotal =
371 panel_fixed_mode->hdisplay + dtd->hblank;
372
373 panel_fixed_mode->vdisplay = dtd->vactive;
374 panel_fixed_mode->vsync_start =
375 panel_fixed_mode->vdisplay + dtd->vfront_porch;
376 panel_fixed_mode->vsync_end =
377 panel_fixed_mode->vsync_start + dtd->vsync;
378 panel_fixed_mode->vtotal =
379 panel_fixed_mode->vdisplay + dtd->vblank;
380
381 panel_fixed_mode->clock = dtd->pixel_clock;
382 panel_fixed_mode->width_mm = dtd->width_mm;
383 panel_fixed_mode->height_mm = dtd->height_mm;
384
385 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
386 drm_mode_set_name(panel_fixed_mode);
387
388 if (dtd->hsync_positive_polarity)
389 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
390 else
391 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
392
393 if (dtd->vsync_positive_polarity)
394 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
395 else
396 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
397
398 drm_dbg_kms(&i915->drm,
399 "Found panel mode in BIOS VBT generic dtd table:\n");
400 drm_mode_debug_printmodeline(panel_fixed_mode);
401
402 i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
403}
404
405static void
406parse_panel_dtd(struct drm_i915_private *i915,
407 const struct bdb_header *bdb)
408{
409 /*
410 * Older VBTs provided provided DTD information for internal displays
411 * through the "LFP panel DTD" block (42). As of VBT revision 229,
412 * that block is now deprecated and DTD information should be provided
413 * via a newer "generic DTD" block (58). Just to be safe, we'll
414 * try the new generic DTD block first on VBT >= 229, but still fall
415 * back to trying the old LFP block if that fails.
416 */
417 if (bdb->version >= 229)
418 parse_generic_dtd(i915, bdb);
419 if (!i915->vbt.lfp_lvds_vbt_mode)
420 parse_lfp_panel_dtd(i915, bdb);
421}
422
423static void
424parse_lfp_backlight(struct drm_i915_private *i915,
425 const struct bdb_header *bdb)
426{
427 const struct bdb_lfp_backlight_data *backlight_data;
428 const struct lfp_backlight_data_entry *entry;
429 int panel_type = i915->vbt.panel_type;
430 u16 level;
431
432 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
433 if (!backlight_data)
434 return;
435
436 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
437 drm_dbg_kms(&i915->drm,
438 "Unsupported backlight data entry size %u\n",
439 backlight_data->entry_size);
440 return;
441 }
442
443 entry = &backlight_data->data[panel_type];
444
445 i915->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
446 if (!i915->vbt.backlight.present) {
447 drm_dbg_kms(&i915->drm,
448 "PWM backlight not present in VBT (type %u)\n",
449 entry->type);
450 return;
451 }
452
453 i915->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
454 if (bdb->version >= 191) {
455 size_t exp_size;
456
457 if (bdb->version >= 236)
458 exp_size = sizeof(struct bdb_lfp_backlight_data);
459 else if (bdb->version >= 234)
460 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234;
461 else
462 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191;
463
464 if (get_blocksize(backlight_data) >= exp_size) {
465 const struct lfp_backlight_control_method *method;
466
467 method = &backlight_data->backlight_control[panel_type];
468 i915->vbt.backlight.type = method->type;
469 i915->vbt.backlight.controller = method->controller;
470 }
471 }
472
473 i915->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
474 i915->vbt.backlight.active_low_pwm = entry->active_low_pwm;
475
476 if (bdb->version >= 234) {
477 u16 min_level;
478 bool scale;
479
480 level = backlight_data->brightness_level[panel_type].level;
481 min_level = backlight_data->brightness_min_level[panel_type].level;
482
483 if (bdb->version >= 236)
484 scale = backlight_data->brightness_precision_bits[panel_type] == 16;
485 else
486 scale = level > 255;
487
488 if (scale)
489 min_level = min_level / 255;
490
491 if (min_level > 255) {
492 drm_warn(&i915->drm, "Brightness min level > 255\n");
493 level = 255;
494 }
495 i915->vbt.backlight.min_brightness = min_level;
496 } else {
497 level = backlight_data->level[panel_type];
498 i915->vbt.backlight.min_brightness = entry->min_brightness;
499 }
500
501 drm_dbg_kms(&i915->drm,
502 "VBT backlight PWM modulation frequency %u Hz, "
503 "active %s, min brightness %u, level %u, controller %u\n",
504 i915->vbt.backlight.pwm_freq_hz,
505 i915->vbt.backlight.active_low_pwm ? "low" : "high",
506 i915->vbt.backlight.min_brightness,
507 level,
508 i915->vbt.backlight.controller);
509}
510
511/* Try to find sdvo panel data */
512static void
513parse_sdvo_panel_data(struct drm_i915_private *i915,
514 const struct bdb_header *bdb)
515{
516 const struct bdb_sdvo_panel_dtds *dtds;
517 struct drm_display_mode *panel_fixed_mode;
518 int index;
519
520 index = i915->params.vbt_sdvo_panel_type;
521 if (index == -2) {
522 drm_dbg_kms(&i915->drm,
523 "Ignore SDVO panel mode from BIOS VBT tables.\n");
524 return;
525 }
526
527 if (index == -1) {
528 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
529
530 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
531 if (!sdvo_lvds_options)
532 return;
533
534 index = sdvo_lvds_options->panel_type;
535 }
536
537 dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS);
538 if (!dtds)
539 return;
540
541 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
542 if (!panel_fixed_mode)
543 return;
544
545 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]);
546
547 i915->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
548
549 drm_dbg_kms(&i915->drm,
550 "Found SDVO panel mode in BIOS VBT tables:\n");
551 drm_mode_debug_printmodeline(panel_fixed_mode);
552}
553
554static int intel_bios_ssc_frequency(struct drm_i915_private *i915,
555 bool alternate)
556{
557 switch (DISPLAY_VER(i915)) {
558 case 2:
559 return alternate ? 66667 : 48000;
560 case 3:
561 case 4:
562 return alternate ? 100000 : 96000;
563 default:
564 return alternate ? 100000 : 120000;
565 }
566}
567
568static void
569parse_general_features(struct drm_i915_private *i915,
570 const struct bdb_header *bdb)
571{
572 const struct bdb_general_features *general;
573
574 general = find_section(bdb, BDB_GENERAL_FEATURES);
575 if (!general)
576 return;
577
578 i915->vbt.int_tv_support = general->int_tv_support;
579 /* int_crt_support can't be trusted on earlier platforms */
580 if (bdb->version >= 155 &&
581 (HAS_DDI(i915) || IS_VALLEYVIEW(i915)))
582 i915->vbt.int_crt_support = general->int_crt_support;
583 i915->vbt.lvds_use_ssc = general->enable_ssc;
584 i915->vbt.lvds_ssc_freq =
585 intel_bios_ssc_frequency(i915, general->ssc_freq);
586 i915->vbt.display_clock_mode = general->display_clock_mode;
587 i915->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
588 if (bdb->version >= 181) {
589 i915->vbt.orientation = general->rotate_180 ?
590 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
591 DRM_MODE_PANEL_ORIENTATION_NORMAL;
592 } else {
593 i915->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
594 }
595 drm_dbg_kms(&i915->drm,
596 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
597 i915->vbt.int_tv_support,
598 i915->vbt.int_crt_support,
599 i915->vbt.lvds_use_ssc,
600 i915->vbt.lvds_ssc_freq,
601 i915->vbt.display_clock_mode,
602 i915->vbt.fdi_rx_polarity_inverted);
603}
604
605static const struct child_device_config *
606child_device_ptr(const struct bdb_general_definitions *defs, int i)
607{
608 return (const void *) &defs->devices[i * defs->child_dev_size];
609}
610
611static void
612parse_sdvo_device_mapping(struct drm_i915_private *i915)
613{
614 struct sdvo_device_mapping *mapping;
615 const struct intel_bios_encoder_data *devdata;
616 const struct child_device_config *child;
617 int count = 0;
618
619 /*
620 * Only parse SDVO mappings on gens that could have SDVO. This isn't
621 * accurate and doesn't have to be, as long as it's not too strict.
622 */
623 if (!IS_DISPLAY_VER(i915, 3, 7)) {
624 drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n");
625 return;
626 }
627
628 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
629 child = &devdata->child;
630
631 if (child->slave_addr != SLAVE_ADDR1 &&
632 child->slave_addr != SLAVE_ADDR2) {
633 /*
634 * If the slave address is neither 0x70 nor 0x72,
635 * it is not a SDVO device. Skip it.
636 */
637 continue;
638 }
639 if (child->dvo_port != DEVICE_PORT_DVOB &&
640 child->dvo_port != DEVICE_PORT_DVOC) {
641 /* skip the incorrect SDVO port */
642 drm_dbg_kms(&i915->drm,
643 "Incorrect SDVO port. Skip it\n");
644 continue;
645 }
646 drm_dbg_kms(&i915->drm,
647 "the SDVO device with slave addr %2x is found on"
648 " %s port\n",
649 child->slave_addr,
650 (child->dvo_port == DEVICE_PORT_DVOB) ?
651 "SDVOB" : "SDVOC");
652 mapping = &i915->vbt.sdvo_mappings[child->dvo_port - 1];
653 if (!mapping->initialized) {
654 mapping->dvo_port = child->dvo_port;
655 mapping->slave_addr = child->slave_addr;
656 mapping->dvo_wiring = child->dvo_wiring;
657 mapping->ddc_pin = child->ddc_pin;
658 mapping->i2c_pin = child->i2c_pin;
659 mapping->initialized = 1;
660 drm_dbg_kms(&i915->drm,
661 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
662 mapping->dvo_port, mapping->slave_addr,
663 mapping->dvo_wiring, mapping->ddc_pin,
664 mapping->i2c_pin);
665 } else {
666 drm_dbg_kms(&i915->drm,
667 "Maybe one SDVO port is shared by "
668 "two SDVO device.\n");
669 }
670 if (child->slave2_addr) {
671 /* Maybe this is a SDVO device with multiple inputs */
672 /* And the mapping info is not added */
673 drm_dbg_kms(&i915->drm,
674 "there exists the slave2_addr. Maybe this"
675 " is a SDVO device with multiple inputs.\n");
676 }
677 count++;
678 }
679
680 if (!count) {
681 /* No SDVO device info is found */
682 drm_dbg_kms(&i915->drm,
683 "No SDVO device info is found in VBT\n");
684 }
685}
686
687static void
688parse_driver_features(struct drm_i915_private *i915,
689 const struct bdb_header *bdb)
690{
691 const struct bdb_driver_features *driver;
692
693 driver = find_section(bdb, BDB_DRIVER_FEATURES);
694 if (!driver)
695 return;
696
697 if (DISPLAY_VER(i915) >= 5) {
698 /*
699 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
700 * to mean "eDP". The VBT spec doesn't agree with that
701 * interpretation, but real world VBTs seem to.
702 */
703 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
704 i915->vbt.int_lvds_support = 0;
705 } else {
706 /*
707 * FIXME it's not clear which BDB version has the LVDS config
708 * bits defined. Revision history in the VBT spec says:
709 * "0.92 | Add two definitions for VBT value of LVDS Active
710 * Config (00b and 11b values defined) | 06/13/2005"
711 * but does not the specify the BDB version.
712 *
713 * So far version 134 (on i945gm) is the oldest VBT observed
714 * in the wild with the bits correctly populated. Version
715 * 108 (on i85x) does not have the bits correctly populated.
716 */
717 if (bdb->version >= 134 &&
718 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
719 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
720 i915->vbt.int_lvds_support = 0;
721 }
722
723 if (bdb->version < 228) {
724 drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n",
725 driver->drrs_enabled);
726 /*
727 * If DRRS is not supported, drrs_type has to be set to 0.
728 * This is because, VBT is configured in such a way that
729 * static DRRS is 0 and DRRS not supported is represented by
730 * driver->drrs_enabled=false
731 */
732 if (!driver->drrs_enabled)
733 i915->vbt.drrs_type = DRRS_NOT_SUPPORTED;
734
735 i915->vbt.psr.enable = driver->psr_enabled;
736 }
737}
738
739static void
740parse_power_conservation_features(struct drm_i915_private *i915,
741 const struct bdb_header *bdb)
742{
743 const struct bdb_lfp_power *power;
744 u8 panel_type = i915->vbt.panel_type;
745
746 if (bdb->version < 228)
747 return;
748
749 power = find_section(bdb, BDB_LFP_POWER);
750 if (!power)
751 return;
752
753 i915->vbt.psr.enable = power->psr & BIT(panel_type);
754
755 /*
756 * If DRRS is not supported, drrs_type has to be set to 0.
757 * This is because, VBT is configured in such a way that
758 * static DRRS is 0 and DRRS not supported is represented by
759 * power->drrs & BIT(panel_type)=false
760 */
761 if (!(power->drrs & BIT(panel_type)))
762 i915->vbt.drrs_type = DRRS_NOT_SUPPORTED;
763
764 if (bdb->version >= 232)
765 i915->vbt.edp.hobl = power->hobl & BIT(panel_type);
766}
767
768static void
769parse_edp(struct drm_i915_private *i915, const struct bdb_header *bdb)
770{
771 const struct bdb_edp *edp;
772 const struct edp_power_seq *edp_pps;
773 const struct edp_fast_link_params *edp_link_params;
774 int panel_type = i915->vbt.panel_type;
775
776 edp = find_section(bdb, BDB_EDP);
777 if (!edp)
778 return;
779
780 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
781 case EDP_18BPP:
782 i915->vbt.edp.bpp = 18;
783 break;
784 case EDP_24BPP:
785 i915->vbt.edp.bpp = 24;
786 break;
787 case EDP_30BPP:
788 i915->vbt.edp.bpp = 30;
789 break;
790 }
791
792 /* Get the eDP sequencing and link info */
793 edp_pps = &edp->power_seqs[panel_type];
794 edp_link_params = &edp->fast_link_params[panel_type];
795
796 i915->vbt.edp.pps = *edp_pps;
797
798 switch (edp_link_params->rate) {
799 case EDP_RATE_1_62:
800 i915->vbt.edp.rate = DP_LINK_BW_1_62;
801 break;
802 case EDP_RATE_2_7:
803 i915->vbt.edp.rate = DP_LINK_BW_2_7;
804 break;
805 default:
806 drm_dbg_kms(&i915->drm,
807 "VBT has unknown eDP link rate value %u\n",
808 edp_link_params->rate);
809 break;
810 }
811
812 switch (edp_link_params->lanes) {
813 case EDP_LANE_1:
814 i915->vbt.edp.lanes = 1;
815 break;
816 case EDP_LANE_2:
817 i915->vbt.edp.lanes = 2;
818 break;
819 case EDP_LANE_4:
820 i915->vbt.edp.lanes = 4;
821 break;
822 default:
823 drm_dbg_kms(&i915->drm,
824 "VBT has unknown eDP lane count value %u\n",
825 edp_link_params->lanes);
826 break;
827 }
828
829 switch (edp_link_params->preemphasis) {
830 case EDP_PREEMPHASIS_NONE:
831 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
832 break;
833 case EDP_PREEMPHASIS_3_5dB:
834 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
835 break;
836 case EDP_PREEMPHASIS_6dB:
837 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
838 break;
839 case EDP_PREEMPHASIS_9_5dB:
840 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
841 break;
842 default:
843 drm_dbg_kms(&i915->drm,
844 "VBT has unknown eDP pre-emphasis value %u\n",
845 edp_link_params->preemphasis);
846 break;
847 }
848
849 switch (edp_link_params->vswing) {
850 case EDP_VSWING_0_4V:
851 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
852 break;
853 case EDP_VSWING_0_6V:
854 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
855 break;
856 case EDP_VSWING_0_8V:
857 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
858 break;
859 case EDP_VSWING_1_2V:
860 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
861 break;
862 default:
863 drm_dbg_kms(&i915->drm,
864 "VBT has unknown eDP voltage swing value %u\n",
865 edp_link_params->vswing);
866 break;
867 }
868
869 if (bdb->version >= 173) {
870 u8 vswing;
871
872 /* Don't read from VBT if module parameter has valid value*/
873 if (i915->params.edp_vswing) {
874 i915->vbt.edp.low_vswing =
875 i915->params.edp_vswing == 1;
876 } else {
877 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
878 i915->vbt.edp.low_vswing = vswing == 0;
879 }
880 }
881}
882
883static void
884parse_psr(struct drm_i915_private *i915, const struct bdb_header *bdb)
885{
886 const struct bdb_psr *psr;
887 const struct psr_table *psr_table;
888 int panel_type = i915->vbt.panel_type;
889
890 psr = find_section(bdb, BDB_PSR);
891 if (!psr) {
892 drm_dbg_kms(&i915->drm, "No PSR BDB found.\n");
893 return;
894 }
895
896 psr_table = &psr->psr_table[panel_type];
897
898 i915->vbt.psr.full_link = psr_table->full_link;
899 i915->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
900
901 /* Allowed VBT values goes from 0 to 15 */
902 i915->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
903 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
904
905 switch (psr_table->lines_to_wait) {
906 case 0:
907 i915->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
908 break;
909 case 1:
910 i915->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
911 break;
912 case 2:
913 i915->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
914 break;
915 case 3:
916 i915->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
917 break;
918 default:
919 drm_dbg_kms(&i915->drm,
920 "VBT has unknown PSR lines to wait %u\n",
921 psr_table->lines_to_wait);
922 break;
923 }
924
925 /*
926 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
927 * Old decimal value is wake up time in multiples of 100 us.
928 */
929 if (bdb->version >= 205 &&
930 (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) {
931 switch (psr_table->tp1_wakeup_time) {
932 case 0:
933 i915->vbt.psr.tp1_wakeup_time_us = 500;
934 break;
935 case 1:
936 i915->vbt.psr.tp1_wakeup_time_us = 100;
937 break;
938 case 3:
939 i915->vbt.psr.tp1_wakeup_time_us = 0;
940 break;
941 default:
942 drm_dbg_kms(&i915->drm,
943 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
944 psr_table->tp1_wakeup_time);
945 fallthrough;
946 case 2:
947 i915->vbt.psr.tp1_wakeup_time_us = 2500;
948 break;
949 }
950
951 switch (psr_table->tp2_tp3_wakeup_time) {
952 case 0:
953 i915->vbt.psr.tp2_tp3_wakeup_time_us = 500;
954 break;
955 case 1:
956 i915->vbt.psr.tp2_tp3_wakeup_time_us = 100;
957 break;
958 case 3:
959 i915->vbt.psr.tp2_tp3_wakeup_time_us = 0;
960 break;
961 default:
962 drm_dbg_kms(&i915->drm,
963 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
964 psr_table->tp2_tp3_wakeup_time);
965 fallthrough;
966 case 2:
967 i915->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
968 break;
969 }
970 } else {
971 i915->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
972 i915->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
973 }
974
975 if (bdb->version >= 226) {
976 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
977
978 wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
979 switch (wakeup_time) {
980 case 0:
981 wakeup_time = 500;
982 break;
983 case 1:
984 wakeup_time = 100;
985 break;
986 case 3:
987 wakeup_time = 50;
988 break;
989 default:
990 case 2:
991 wakeup_time = 2500;
992 break;
993 }
994 i915->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
995 } else {
996 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */
997 i915->vbt.psr.psr2_tp2_tp3_wakeup_time_us = i915->vbt.psr.tp2_tp3_wakeup_time_us;
998 }
999}
1000
1001static void parse_dsi_backlight_ports(struct drm_i915_private *i915,
1002 u16 version, enum port port)
1003{
1004 if (!i915->vbt.dsi.config->dual_link || version < 197) {
1005 i915->vbt.dsi.bl_ports = BIT(port);
1006 if (i915->vbt.dsi.config->cabc_supported)
1007 i915->vbt.dsi.cabc_ports = BIT(port);
1008
1009 return;
1010 }
1011
1012 switch (i915->vbt.dsi.config->dl_dcs_backlight_ports) {
1013 case DL_DCS_PORT_A:
1014 i915->vbt.dsi.bl_ports = BIT(PORT_A);
1015 break;
1016 case DL_DCS_PORT_C:
1017 i915->vbt.dsi.bl_ports = BIT(PORT_C);
1018 break;
1019 default:
1020 case DL_DCS_PORT_A_AND_C:
1021 i915->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C);
1022 break;
1023 }
1024
1025 if (!i915->vbt.dsi.config->cabc_supported)
1026 return;
1027
1028 switch (i915->vbt.dsi.config->dl_dcs_cabc_ports) {
1029 case DL_DCS_PORT_A:
1030 i915->vbt.dsi.cabc_ports = BIT(PORT_A);
1031 break;
1032 case DL_DCS_PORT_C:
1033 i915->vbt.dsi.cabc_ports = BIT(PORT_C);
1034 break;
1035 default:
1036 case DL_DCS_PORT_A_AND_C:
1037 i915->vbt.dsi.cabc_ports =
1038 BIT(PORT_A) | BIT(PORT_C);
1039 break;
1040 }
1041}
1042
1043static void
1044parse_mipi_config(struct drm_i915_private *i915,
1045 const struct bdb_header *bdb)
1046{
1047 const struct bdb_mipi_config *start;
1048 const struct mipi_config *config;
1049 const struct mipi_pps_data *pps;
1050 int panel_type = i915->vbt.panel_type;
1051 enum port port;
1052
1053 /* parse MIPI blocks only if LFP type is MIPI */
1054 if (!intel_bios_is_dsi_present(i915, &port))
1055 return;
1056
1057 /* Initialize this to undefined indicating no generic MIPI support */
1058 i915->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1059
1060 /* Block #40 is already parsed and panel_fixed_mode is
1061 * stored in i915->lfp_lvds_vbt_mode
1062 * resuse this when needed
1063 */
1064
1065 /* Parse #52 for panel index used from panel_type already
1066 * parsed
1067 */
1068 start = find_section(bdb, BDB_MIPI_CONFIG);
1069 if (!start) {
1070 drm_dbg_kms(&i915->drm, "No MIPI config BDB found");
1071 return;
1072 }
1073
1074 drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n",
1075 panel_type);
1076
1077 /*
1078 * get hold of the correct configuration block and pps data as per
1079 * the panel_type as index
1080 */
1081 config = &start->config[panel_type];
1082 pps = &start->pps[panel_type];
1083
1084 /* store as of now full data. Trim when we realise all is not needed */
1085 i915->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1086 if (!i915->vbt.dsi.config)
1087 return;
1088
1089 i915->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1090 if (!i915->vbt.dsi.pps) {
1091 kfree(i915->vbt.dsi.config);
1092 return;
1093 }
1094
1095 parse_dsi_backlight_ports(i915, bdb->version, port);
1096
1097 /* FIXME is the 90 vs. 270 correct? */
1098 switch (config->rotation) {
1099 case ENABLE_ROTATION_0:
1100 /*
1101 * Most (all?) VBTs claim 0 degrees despite having
1102 * an upside down panel, thus we do not trust this.
1103 */
1104 i915->vbt.dsi.orientation =
1105 DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1106 break;
1107 case ENABLE_ROTATION_90:
1108 i915->vbt.dsi.orientation =
1109 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1110 break;
1111 case ENABLE_ROTATION_180:
1112 i915->vbt.dsi.orientation =
1113 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1114 break;
1115 case ENABLE_ROTATION_270:
1116 i915->vbt.dsi.orientation =
1117 DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1118 break;
1119 }
1120
1121 /* We have mandatory mipi config blocks. Initialize as generic panel */
1122 i915->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1123}
1124
1125/* Find the sequence block and size for the given panel. */
1126static const u8 *
1127find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
1128 u16 panel_id, u32 *seq_size)
1129{
1130 u32 total = get_blocksize(sequence);
1131 const u8 *data = &sequence->data[0];
1132 u8 current_id;
1133 u32 current_size;
1134 int header_size = sequence->version >= 3 ? 5 : 3;
1135 int index = 0;
1136 int i;
1137
1138 /* skip new block size */
1139 if (sequence->version >= 3)
1140 data += 4;
1141
1142 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1143 if (index + header_size > total) {
1144 DRM_ERROR("Invalid sequence block (header)\n");
1145 return NULL;
1146 }
1147
1148 current_id = *(data + index);
1149 if (sequence->version >= 3)
1150 current_size = *((const u32 *)(data + index + 1));
1151 else
1152 current_size = *((const u16 *)(data + index + 1));
1153
1154 index += header_size;
1155
1156 if (index + current_size > total) {
1157 DRM_ERROR("Invalid sequence block\n");
1158 return NULL;
1159 }
1160
1161 if (current_id == panel_id) {
1162 *seq_size = current_size;
1163 return data + index;
1164 }
1165
1166 index += current_size;
1167 }
1168
1169 DRM_ERROR("Sequence block detected but no valid configuration\n");
1170
1171 return NULL;
1172}
1173
1174static int goto_next_sequence(const u8 *data, int index, int total)
1175{
1176 u16 len;
1177
1178 /* Skip Sequence Byte. */
1179 for (index = index + 1; index < total; index += len) {
1180 u8 operation_byte = *(data + index);
1181 index++;
1182
1183 switch (operation_byte) {
1184 case MIPI_SEQ_ELEM_END:
1185 return index;
1186 case MIPI_SEQ_ELEM_SEND_PKT:
1187 if (index + 4 > total)
1188 return 0;
1189
1190 len = *((const u16 *)(data + index + 2)) + 4;
1191 break;
1192 case MIPI_SEQ_ELEM_DELAY:
1193 len = 4;
1194 break;
1195 case MIPI_SEQ_ELEM_GPIO:
1196 len = 2;
1197 break;
1198 case MIPI_SEQ_ELEM_I2C:
1199 if (index + 7 > total)
1200 return 0;
1201 len = *(data + index + 6) + 7;
1202 break;
1203 default:
1204 DRM_ERROR("Unknown operation byte\n");
1205 return 0;
1206 }
1207 }
1208
1209 return 0;
1210}
1211
1212static int goto_next_sequence_v3(const u8 *data, int index, int total)
1213{
1214 int seq_end;
1215 u16 len;
1216 u32 size_of_sequence;
1217
1218 /*
1219 * Could skip sequence based on Size of Sequence alone, but also do some
1220 * checking on the structure.
1221 */
1222 if (total < 5) {
1223 DRM_ERROR("Too small sequence size\n");
1224 return 0;
1225 }
1226
1227 /* Skip Sequence Byte. */
1228 index++;
1229
1230 /*
1231 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1232 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1233 * byte.
1234 */
1235 size_of_sequence = *((const u32 *)(data + index));
1236 index += 4;
1237
1238 seq_end = index + size_of_sequence;
1239 if (seq_end > total) {
1240 DRM_ERROR("Invalid sequence size\n");
1241 return 0;
1242 }
1243
1244 for (; index < total; index += len) {
1245 u8 operation_byte = *(data + index);
1246 index++;
1247
1248 if (operation_byte == MIPI_SEQ_ELEM_END) {
1249 if (index != seq_end) {
1250 DRM_ERROR("Invalid element structure\n");
1251 return 0;
1252 }
1253 return index;
1254 }
1255
1256 len = *(data + index);
1257 index++;
1258
1259 /*
1260 * FIXME: Would be nice to check elements like for v1/v2 in
1261 * goto_next_sequence() above.
1262 */
1263 switch (operation_byte) {
1264 case MIPI_SEQ_ELEM_SEND_PKT:
1265 case MIPI_SEQ_ELEM_DELAY:
1266 case MIPI_SEQ_ELEM_GPIO:
1267 case MIPI_SEQ_ELEM_I2C:
1268 case MIPI_SEQ_ELEM_SPI:
1269 case MIPI_SEQ_ELEM_PMIC:
1270 break;
1271 default:
1272 DRM_ERROR("Unknown operation byte %u\n",
1273 operation_byte);
1274 break;
1275 }
1276 }
1277
1278 return 0;
1279}
1280
1281/*
1282 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1283 * skip all delay + gpio operands and stop at the first DSI packet op.
1284 */
1285static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915)
1286{
1287 const u8 *data = i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1288 int index, len;
1289
1290 if (drm_WARN_ON(&i915->drm,
1291 !data || i915->vbt.dsi.seq_version != 1))
1292 return 0;
1293
1294 /* index = 1 to skip sequence byte */
1295 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1296 switch (data[index]) {
1297 case MIPI_SEQ_ELEM_SEND_PKT:
1298 return index == 1 ? 0 : index;
1299 case MIPI_SEQ_ELEM_DELAY:
1300 len = 5; /* 1 byte for operand + uint32 */
1301 break;
1302 case MIPI_SEQ_ELEM_GPIO:
1303 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1304 break;
1305 default:
1306 return 0;
1307 }
1308 }
1309
1310 return 0;
1311}
1312
1313/*
1314 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1315 * The deassert must be done before calling intel_dsi_device_ready, so for
1316 * these devices we split the init OTP sequence into a deassert sequence and
1317 * the actual init OTP part.
1318 */
1319static void fixup_mipi_sequences(struct drm_i915_private *i915)
1320{
1321 u8 *init_otp;
1322 int len;
1323
1324 /* Limit this to VLV for now. */
1325 if (!IS_VALLEYVIEW(i915))
1326 return;
1327
1328 /* Limit this to v1 vid-mode sequences */
1329 if (i915->vbt.dsi.config->is_cmd_mode ||
1330 i915->vbt.dsi.seq_version != 1)
1331 return;
1332
1333 /* Only do this if there are otp and assert seqs and no deassert seq */
1334 if (!i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1335 !i915->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1336 i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1337 return;
1338
1339 /* The deassert-sequence ends at the first DSI packet */
1340 len = get_init_otp_deassert_fragment_len(i915);
1341 if (!len)
1342 return;
1343
1344 drm_dbg_kms(&i915->drm,
1345 "Using init OTP fragment to deassert reset\n");
1346
1347 /* Copy the fragment, update seq byte and terminate it */
1348 init_otp = (u8 *)i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1349 i915->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1350 if (!i915->vbt.dsi.deassert_seq)
1351 return;
1352 i915->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1353 i915->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1354 /* Use the copy for deassert */
1355 i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1356 i915->vbt.dsi.deassert_seq;
1357 /* Replace the last byte of the fragment with init OTP seq byte */
1358 init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1359 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1360 i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1361}
1362
1363static void
1364parse_mipi_sequence(struct drm_i915_private *i915,
1365 const struct bdb_header *bdb)
1366{
1367 int panel_type = i915->vbt.panel_type;
1368 const struct bdb_mipi_sequence *sequence;
1369 const u8 *seq_data;
1370 u32 seq_size;
1371 u8 *data;
1372 int index = 0;
1373
1374 /* Only our generic panel driver uses the sequence block. */
1375 if (i915->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
1376 return;
1377
1378 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
1379 if (!sequence) {
1380 drm_dbg_kms(&i915->drm,
1381 "No MIPI Sequence found, parsing complete\n");
1382 return;
1383 }
1384
1385 /* Fail gracefully for forward incompatible sequence block. */
1386 if (sequence->version >= 4) {
1387 drm_err(&i915->drm,
1388 "Unable to parse MIPI Sequence Block v%u\n",
1389 sequence->version);
1390 return;
1391 }
1392
1393 drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n",
1394 sequence->version);
1395
1396 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
1397 if (!seq_data)
1398 return;
1399
1400 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
1401 if (!data)
1402 return;
1403
1404 /* Parse the sequences, store pointers to each sequence. */
1405 for (;;) {
1406 u8 seq_id = *(data + index);
1407 if (seq_id == MIPI_SEQ_END)
1408 break;
1409
1410 if (seq_id >= MIPI_SEQ_MAX) {
1411 drm_err(&i915->drm, "Unknown sequence %u\n",
1412 seq_id);
1413 goto err;
1414 }
1415
1416 /* Log about presence of sequences we won't run. */
1417 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
1418 drm_dbg_kms(&i915->drm,
1419 "Unsupported sequence %u\n", seq_id);
1420
1421 i915->vbt.dsi.sequence[seq_id] = data + index;
1422
1423 if (sequence->version >= 3)
1424 index = goto_next_sequence_v3(data, index, seq_size);
1425 else
1426 index = goto_next_sequence(data, index, seq_size);
1427 if (!index) {
1428 drm_err(&i915->drm, "Invalid sequence %u\n",
1429 seq_id);
1430 goto err;
1431 }
1432 }
1433
1434 i915->vbt.dsi.data = data;
1435 i915->vbt.dsi.size = seq_size;
1436 i915->vbt.dsi.seq_version = sequence->version;
1437
1438 fixup_mipi_sequences(i915);
1439
1440 drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n");
1441 return;
1442
1443err:
1444 kfree(data);
1445 memset(i915->vbt.dsi.sequence, 0, sizeof(i915->vbt.dsi.sequence));
1446}
1447
1448static void
1449parse_compression_parameters(struct drm_i915_private *i915,
1450 const struct bdb_header *bdb)
1451{
1452 const struct bdb_compression_parameters *params;
1453 struct intel_bios_encoder_data *devdata;
1454 const struct child_device_config *child;
1455 u16 block_size;
1456 int index;
1457
1458 if (bdb->version < 198)
1459 return;
1460
1461 params = find_section(bdb, BDB_COMPRESSION_PARAMETERS);
1462 if (params) {
1463 /* Sanity checks */
1464 if (params->entry_size != sizeof(params->data[0])) {
1465 drm_dbg_kms(&i915->drm,
1466 "VBT: unsupported compression param entry size\n");
1467 return;
1468 }
1469
1470 block_size = get_blocksize(params);
1471 if (block_size < sizeof(*params)) {
1472 drm_dbg_kms(&i915->drm,
1473 "VBT: expected 16 compression param entries\n");
1474 return;
1475 }
1476 }
1477
1478 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
1479 child = &devdata->child;
1480
1481 if (!child->compression_enable)
1482 continue;
1483
1484 if (!params) {
1485 drm_dbg_kms(&i915->drm,
1486 "VBT: compression params not available\n");
1487 continue;
1488 }
1489
1490 if (child->compression_method_cps) {
1491 drm_dbg_kms(&i915->drm,
1492 "VBT: CPS compression not supported\n");
1493 continue;
1494 }
1495
1496 index = child->compression_structure_index;
1497
1498 devdata->dsc = kmemdup(¶ms->data[index],
1499 sizeof(*devdata->dsc), GFP_KERNEL);
1500 }
1501}
1502
1503static u8 translate_iboost(u8 val)
1504{
1505 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1506
1507 if (val >= ARRAY_SIZE(mapping)) {
1508 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1509 return 0;
1510 }
1511 return mapping[val];
1512}
1513
1514static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
1515{
1516 const struct ddi_vbt_port_info *info;
1517 enum port port;
1518
1519 if (!ddc_pin)
1520 return PORT_NONE;
1521
1522 for_each_port(port) {
1523 info = &i915->vbt.ddi_port_info[port];
1524
1525 if (info->devdata && ddc_pin == info->alternate_ddc_pin)
1526 return port;
1527 }
1528
1529 return PORT_NONE;
1530}
1531
1532static void sanitize_ddc_pin(struct drm_i915_private *i915,
1533 enum port port)
1534{
1535 struct ddi_vbt_port_info *info = &i915->vbt.ddi_port_info[port];
1536 struct child_device_config *child;
1537 enum port p;
1538
1539 p = get_port_by_ddc_pin(i915, info->alternate_ddc_pin);
1540 if (p == PORT_NONE)
1541 return;
1542
1543 drm_dbg_kms(&i915->drm,
1544 "port %c trying to use the same DDC pin (0x%x) as port %c, "
1545 "disabling port %c DVI/HDMI support\n",
1546 port_name(port), info->alternate_ddc_pin,
1547 port_name(p), port_name(p));
1548
1549 /*
1550 * If we have multiple ports supposedly sharing the pin, then dvi/hdmi
1551 * couldn't exist on the shared port. Otherwise they share the same ddc
1552 * pin and system couldn't communicate with them separately.
1553 *
1554 * Give inverse child device order the priority, last one wins. Yes,
1555 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
1556 * port A and port E with the same AUX ch and we must pick port E :(
1557 */
1558 info = &i915->vbt.ddi_port_info[p];
1559 child = &info->devdata->child;
1560
1561 child->device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
1562 child->device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
1563
1564 info->alternate_ddc_pin = 0;
1565}
1566
1567static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
1568{
1569 const struct ddi_vbt_port_info *info;
1570 enum port port;
1571
1572 if (!aux_ch)
1573 return PORT_NONE;
1574
1575 for_each_port(port) {
1576 info = &i915->vbt.ddi_port_info[port];
1577
1578 if (info->devdata && aux_ch == info->alternate_aux_channel)
1579 return port;
1580 }
1581
1582 return PORT_NONE;
1583}
1584
1585static void sanitize_aux_ch(struct drm_i915_private *i915,
1586 enum port port)
1587{
1588 struct ddi_vbt_port_info *info = &i915->vbt.ddi_port_info[port];
1589 struct child_device_config *child;
1590 enum port p;
1591
1592 p = get_port_by_aux_ch(i915, info->alternate_aux_channel);
1593 if (p == PORT_NONE)
1594 return;
1595
1596 drm_dbg_kms(&i915->drm,
1597 "port %c trying to use the same AUX CH (0x%x) as port %c, "
1598 "disabling port %c DP support\n",
1599 port_name(port), info->alternate_aux_channel,
1600 port_name(p), port_name(p));
1601
1602 /*
1603 * If we have multiple ports supposedly sharing the aux channel, then DP
1604 * couldn't exist on the shared port. Otherwise they share the same aux
1605 * channel and system couldn't communicate with them separately.
1606 *
1607 * Give inverse child device order the priority, last one wins. Yes,
1608 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
1609 * port A and port E with the same AUX ch and we must pick port E :(
1610 */
1611 info = &i915->vbt.ddi_port_info[p];
1612 child = &info->devdata->child;
1613
1614 child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1615 info->alternate_aux_channel = 0;
1616}
1617
1618static const u8 cnp_ddc_pin_map[] = {
1619 [0] = 0, /* N/A */
1620 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
1621 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
1622 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
1623 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
1624};
1625
1626static const u8 icp_ddc_pin_map[] = {
1627 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1628 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1629 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
1630 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
1631 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
1632 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
1633 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
1634 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
1635 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
1636};
1637
1638static const u8 rkl_pch_tgp_ddc_pin_map[] = {
1639 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1640 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1641 [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP,
1642 [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP,
1643};
1644
1645static const u8 adls_ddc_pin_map[] = {
1646 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1647 [ADLS_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
1648 [ADLS_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
1649 [ADLS_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
1650 [ADLS_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
1651};
1652
1653static const u8 gen9bc_tgp_ddc_pin_map[] = {
1654 [DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1655 [DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP,
1656 [DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP,
1657};
1658
1659static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
1660{
1661 const u8 *ddc_pin_map;
1662 int n_entries;
1663
1664 if (IS_ALDERLAKE_S(i915)) {
1665 ddc_pin_map = adls_ddc_pin_map;
1666 n_entries = ARRAY_SIZE(adls_ddc_pin_map);
1667 } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
1668 return vbt_pin;
1669 } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
1670 ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
1671 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
1672 } else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) {
1673 ddc_pin_map = gen9bc_tgp_ddc_pin_map;
1674 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
1675 } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
1676 ddc_pin_map = icp_ddc_pin_map;
1677 n_entries = ARRAY_SIZE(icp_ddc_pin_map);
1678 } else if (HAS_PCH_CNP(i915)) {
1679 ddc_pin_map = cnp_ddc_pin_map;
1680 n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
1681 } else {
1682 /* Assuming direct map */
1683 return vbt_pin;
1684 }
1685
1686 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
1687 return ddc_pin_map[vbt_pin];
1688
1689 drm_dbg_kms(&i915->drm,
1690 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
1691 vbt_pin);
1692 return 0;
1693}
1694
1695static enum port __dvo_port_to_port(int n_ports, int n_dvo,
1696 const int port_mapping[][3], u8 dvo_port)
1697{
1698 enum port port;
1699 int i;
1700
1701 for (port = PORT_A; port < n_ports; port++) {
1702 for (i = 0; i < n_dvo; i++) {
1703 if (port_mapping[port][i] == -1)
1704 break;
1705
1706 if (dvo_port == port_mapping[port][i])
1707 return port;
1708 }
1709 }
1710
1711 return PORT_NONE;
1712}
1713
1714static enum port dvo_port_to_port(struct drm_i915_private *i915,
1715 u8 dvo_port)
1716{
1717 /*
1718 * Each DDI port can have more than one value on the "DVO Port" field,
1719 * so look for all the possible values for each port.
1720 */
1721 static const int port_mapping[][3] = {
1722 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1723 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1724 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1725 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1726 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
1727 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
1728 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
1729 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
1730 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
1731 };
1732 /*
1733 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
1734 * map to DDI A,B,TC1,TC2 respectively.
1735 */
1736 static const int rkl_port_mapping[][3] = {
1737 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1738 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1739 [PORT_C] = { -1 },
1740 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1741 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1742 };
1743 /*
1744 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E,
1745 * PORT_F and PORT_G, we need to map that to correct VBT sections.
1746 */
1747 static const int adls_port_mapping[][3] = {
1748 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1749 [PORT_B] = { -1 },
1750 [PORT_C] = { -1 },
1751 [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1752 [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1753 [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1754 [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
1755 };
1756 static const int xelpd_port_mapping[][3] = {
1757 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1758 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1759 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1760 [PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1761 [PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
1762 [PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
1763 [PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
1764 [PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
1765 [PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
1766 };
1767
1768 if (DISPLAY_VER(i915) == 13)
1769 return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping),
1770 ARRAY_SIZE(xelpd_port_mapping[0]),
1771 xelpd_port_mapping,
1772 dvo_port);
1773 else if (IS_ALDERLAKE_S(i915))
1774 return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping),
1775 ARRAY_SIZE(adls_port_mapping[0]),
1776 adls_port_mapping,
1777 dvo_port);
1778 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
1779 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
1780 ARRAY_SIZE(rkl_port_mapping[0]),
1781 rkl_port_mapping,
1782 dvo_port);
1783 else
1784 return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
1785 ARRAY_SIZE(port_mapping[0]),
1786 port_mapping,
1787 dvo_port);
1788}
1789
1790static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate)
1791{
1792 switch (vbt_max_link_rate) {
1793 default:
1794 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF:
1795 return 0;
1796 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20:
1797 return 2000000;
1798 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5:
1799 return 1350000;
1800 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10:
1801 return 1000000;
1802 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3:
1803 return 810000;
1804 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2:
1805 return 540000;
1806 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR:
1807 return 270000;
1808 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR:
1809 return 162000;
1810 }
1811}
1812
1813static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
1814{
1815 switch (vbt_max_link_rate) {
1816 default:
1817 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3:
1818 return 810000;
1819 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2:
1820 return 540000;
1821 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR:
1822 return 270000;
1823 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR:
1824 return 162000;
1825 }
1826}
1827
1828static void sanitize_device_type(struct intel_bios_encoder_data *devdata,
1829 enum port port)
1830{
1831 struct drm_i915_private *i915 = devdata->i915;
1832 bool is_hdmi;
1833
1834 if (port != PORT_A || DISPLAY_VER(i915) >= 12)
1835 return;
1836
1837 if (!(devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING))
1838 return;
1839
1840 is_hdmi = !(devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT);
1841
1842 drm_dbg_kms(&i915->drm, "VBT claims port A supports DVI%s, ignoring\n",
1843 is_hdmi ? "/HDMI" : "");
1844
1845 devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
1846 devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
1847}
1848
1849static bool
1850intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata)
1851{
1852 return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1853}
1854
1855bool
1856intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata)
1857{
1858 return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1859}
1860
1861bool
1862intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata)
1863{
1864 return intel_bios_encoder_supports_dvi(devdata) &&
1865 (devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1866}
1867
1868bool
1869intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata)
1870{
1871 return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1872}
1873
1874static bool
1875intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata)
1876{
1877 return intel_bios_encoder_supports_dp(devdata) &&
1878 devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR;
1879}
1880
1881static bool is_port_valid(struct drm_i915_private *i915, enum port port)
1882{
1883 /*
1884 * On some ICL/CNL SKUs port F is not present, but broken VBTs mark
1885 * the port as present. Only try to initialize port F for the
1886 * SKUs that may actually have it.
1887 */
1888 if (port == PORT_F && (IS_ICELAKE(i915) || IS_CANNONLAKE(i915)))
1889 return IS_ICL_WITH_PORT_F(i915) || IS_CNL_WITH_PORT_F(i915);
1890
1891 return true;
1892}
1893
1894static void parse_ddi_port(struct drm_i915_private *i915,
1895 struct intel_bios_encoder_data *devdata)
1896{
1897 const struct child_device_config *child = &devdata->child;
1898 struct ddi_vbt_port_info *info;
1899 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt, supports_typec_usb, supports_tbt;
1900 int dp_boost_level, hdmi_boost_level;
1901 enum port port;
1902
1903 port = dvo_port_to_port(i915, child->dvo_port);
1904 if (port == PORT_NONE)
1905 return;
1906
1907 if (!is_port_valid(i915, port)) {
1908 drm_dbg_kms(&i915->drm,
1909 "VBT reports port %c as supported, but that can't be true: skipping\n",
1910 port_name(port));
1911 return;
1912 }
1913
1914 info = &i915->vbt.ddi_port_info[port];
1915
1916 if (info->devdata) {
1917 drm_dbg_kms(&i915->drm,
1918 "More than one child device for port %c in VBT, using the first.\n",
1919 port_name(port));
1920 return;
1921 }
1922
1923 sanitize_device_type(devdata, port);
1924
1925 is_dvi = intel_bios_encoder_supports_dvi(devdata);
1926 is_dp = intel_bios_encoder_supports_dp(devdata);
1927 is_crt = intel_bios_encoder_supports_crt(devdata);
1928 is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
1929 is_edp = intel_bios_encoder_supports_edp(devdata);
1930
1931 supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata);
1932 supports_tbt = intel_bios_encoder_supports_tbt(devdata);
1933
1934 drm_dbg_kms(&i915->drm,
1935 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
1936 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp,
1937 HAS_LSPCON(i915) && child->lspcon,
1938 supports_typec_usb, supports_tbt,
1939 devdata->dsc != NULL);
1940
1941 if (is_dvi) {
1942 u8 ddc_pin;
1943
1944 ddc_pin = map_ddc_pin(i915, child->ddc_pin);
1945 if (intel_gmbus_is_valid_pin(i915, ddc_pin)) {
1946 info->alternate_ddc_pin = ddc_pin;
1947 sanitize_ddc_pin(i915, port);
1948 } else {
1949 drm_dbg_kms(&i915->drm,
1950 "Port %c has invalid DDC pin %d, "
1951 "sticking to defaults\n",
1952 port_name(port), ddc_pin);
1953 }
1954 }
1955
1956 if (is_dp) {
1957 info->alternate_aux_channel = child->aux_channel;
1958
1959 sanitize_aux_ch(i915, port);
1960 }
1961
1962 if (i915->vbt.version >= 158) {
1963 /* The VBT HDMI level shift values match the table we have. */
1964 u8 hdmi_level_shift = child->hdmi_level_shifter_value;
1965 drm_dbg_kms(&i915->drm,
1966 "Port %c VBT HDMI level shift: %d\n",
1967 port_name(port),
1968 hdmi_level_shift);
1969 info->hdmi_level_shift = hdmi_level_shift;
1970 info->hdmi_level_shift_set = true;
1971 }
1972
1973 if (i915->vbt.version >= 204) {
1974 int max_tmds_clock;
1975
1976 switch (child->hdmi_max_data_rate) {
1977 default:
1978 MISSING_CASE(child->hdmi_max_data_rate);
1979 fallthrough;
1980 case HDMI_MAX_DATA_RATE_PLATFORM:
1981 max_tmds_clock = 0;
1982 break;
1983 case HDMI_MAX_DATA_RATE_297:
1984 max_tmds_clock = 297000;
1985 break;
1986 case HDMI_MAX_DATA_RATE_165:
1987 max_tmds_clock = 165000;
1988 break;
1989 }
1990
1991 if (max_tmds_clock)
1992 drm_dbg_kms(&i915->drm,
1993 "Port %c VBT HDMI max TMDS clock: %d kHz\n",
1994 port_name(port), max_tmds_clock);
1995 info->max_tmds_clock = max_tmds_clock;
1996 }
1997
1998 /* I_boost config for SKL and above */
1999 dp_boost_level = intel_bios_encoder_dp_boost_level(devdata);
2000 if (dp_boost_level)
2001 drm_dbg_kms(&i915->drm,
2002 "Port %c VBT (e)DP boost level: %d\n",
2003 port_name(port), dp_boost_level);
2004
2005 hdmi_boost_level = intel_bios_encoder_hdmi_boost_level(devdata);
2006 if (hdmi_boost_level)
2007 drm_dbg_kms(&i915->drm,
2008 "Port %c VBT HDMI boost level: %d\n",
2009 port_name(port), hdmi_boost_level);
2010
2011 /* DP max link rate for CNL+ */
2012 if (i915->vbt.version >= 216) {
2013 if (i915->vbt.version >= 230)
2014 info->dp_max_link_rate = parse_bdb_230_dp_max_link_rate(child->dp_max_link_rate);
2015 else
2016 info->dp_max_link_rate = parse_bdb_216_dp_max_link_rate(child->dp_max_link_rate);
2017
2018 drm_dbg_kms(&i915->drm,
2019 "Port %c VBT DP max link rate: %d\n",
2020 port_name(port), info->dp_max_link_rate);
2021 }
2022
2023 info->devdata = devdata;
2024}
2025
2026static void parse_ddi_ports(struct drm_i915_private *i915)
2027{
2028 struct intel_bios_encoder_data *devdata;
2029
2030 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
2031 return;
2032
2033 if (i915->vbt.version < 155)
2034 return;
2035
2036 list_for_each_entry(devdata, &i915->vbt.display_devices, node)
2037 parse_ddi_port(i915, devdata);
2038}
2039
2040static void
2041parse_general_definitions(struct drm_i915_private *i915,
2042 const struct bdb_header *bdb)
2043{
2044 const struct bdb_general_definitions *defs;
2045 struct intel_bios_encoder_data *devdata;
2046 const struct child_device_config *child;
2047 int i, child_device_num;
2048 u8 expected_size;
2049 u16 block_size;
2050 int bus_pin;
2051
2052 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
2053 if (!defs) {
2054 drm_dbg_kms(&i915->drm,
2055 "No general definition block is found, no devices defined.\n");
2056 return;
2057 }
2058
2059 block_size = get_blocksize(defs);
2060 if (block_size < sizeof(*defs)) {
2061 drm_dbg_kms(&i915->drm,
2062 "General definitions block too small (%u)\n",
2063 block_size);
2064 return;
2065 }
2066
2067 bus_pin = defs->crt_ddc_gmbus_pin;
2068 drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
2069 if (intel_gmbus_is_valid_pin(i915, bus_pin))
2070 i915->vbt.crt_ddc_pin = bus_pin;
2071
2072 if (bdb->version < 106) {
2073 expected_size = 22;
2074 } else if (bdb->version < 111) {
2075 expected_size = 27;
2076 } else if (bdb->version < 195) {
2077 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
2078 } else if (bdb->version == 195) {
2079 expected_size = 37;
2080 } else if (bdb->version <= 215) {
2081 expected_size = 38;
2082 } else if (bdb->version <= 237) {
2083 expected_size = 39;
2084 } else {
2085 expected_size = sizeof(*child);
2086 BUILD_BUG_ON(sizeof(*child) < 39);
2087 drm_dbg(&i915->drm,
2088 "Expected child device config size for VBT version %u not known; assuming %u\n",
2089 bdb->version, expected_size);
2090 }
2091
2092 /* Flag an error for unexpected size, but continue anyway. */
2093 if (defs->child_dev_size != expected_size)
2094 drm_err(&i915->drm,
2095 "Unexpected child device config size %u (expected %u for VBT version %u)\n",
2096 defs->child_dev_size, expected_size, bdb->version);
2097
2098 /* The legacy sized child device config is the minimum we need. */
2099 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
2100 drm_dbg_kms(&i915->drm,
2101 "Child device config size %u is too small.\n",
2102 defs->child_dev_size);
2103 return;
2104 }
2105
2106 /* get the number of child device */
2107 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
2108
2109 for (i = 0; i < child_device_num; i++) {
2110 child = child_device_ptr(defs, i);
2111 if (!child->device_type)
2112 continue;
2113
2114 drm_dbg_kms(&i915->drm,
2115 "Found VBT child device with type 0x%x\n",
2116 child->device_type);
2117
2118 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2119 if (!devdata)
2120 break;
2121
2122 devdata->i915 = i915;
2123
2124 /*
2125 * Copy as much as we know (sizeof) and is available
2126 * (child_dev_size) of the child device config. Accessing the
2127 * data must depend on VBT version.
2128 */
2129 memcpy(&devdata->child, child,
2130 min_t(size_t, defs->child_dev_size, sizeof(*child)));
2131
2132 list_add_tail(&devdata->node, &i915->vbt.display_devices);
2133 }
2134
2135 if (list_empty(&i915->vbt.display_devices))
2136 drm_dbg_kms(&i915->drm,
2137 "no child dev is parsed from VBT\n");
2138}
2139
2140/* Common defaults which may be overridden by VBT. */
2141static void
2142init_vbt_defaults(struct drm_i915_private *i915)
2143{
2144 i915->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
2145
2146 /* Default to having backlight */
2147 i915->vbt.backlight.present = true;
2148
2149 /* LFP panel data */
2150 i915->vbt.lvds_dither = 1;
2151
2152 /* SDVO panel data */
2153 i915->vbt.sdvo_lvds_vbt_mode = NULL;
2154
2155 /* general features */
2156 i915->vbt.int_tv_support = 1;
2157 i915->vbt.int_crt_support = 1;
2158
2159 /* driver features */
2160 i915->vbt.int_lvds_support = 1;
2161
2162 /* Default to using SSC */
2163 i915->vbt.lvds_use_ssc = 1;
2164 /*
2165 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
2166 * clock for LVDS.
2167 */
2168 i915->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915,
2169 !HAS_PCH_SPLIT(i915));
2170 drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n",
2171 i915->vbt.lvds_ssc_freq);
2172}
2173
2174/* Defaults to initialize only if there is no VBT. */
2175static void
2176init_vbt_missing_defaults(struct drm_i915_private *i915)
2177{
2178 enum port port;
2179 int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) |
2180 BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F);
2181
2182 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
2183 return;
2184
2185 for_each_port_masked(port, ports) {
2186 struct intel_bios_encoder_data *devdata;
2187 struct child_device_config *child;
2188 enum phy phy = intel_port_to_phy(i915, port);
2189
2190 /*
2191 * VBT has the TypeC mode (native,TBT/USB) and we don't want
2192 * to detect it.
2193 */
2194 if (intel_phy_is_tc(i915, phy))
2195 continue;
2196
2197 /* Create fake child device config */
2198 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2199 if (!devdata)
2200 break;
2201
2202 devdata->i915 = i915;
2203 child = &devdata->child;
2204
2205 if (port == PORT_F)
2206 child->dvo_port = DVO_PORT_HDMIF;
2207 else if (port == PORT_E)
2208 child->dvo_port = DVO_PORT_HDMIE;
2209 else
2210 child->dvo_port = DVO_PORT_HDMIA + port;
2211
2212 if (port != PORT_A && port != PORT_E)
2213 child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING;
2214
2215 if (port != PORT_E)
2216 child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2217
2218 if (port == PORT_A)
2219 child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR;
2220
2221 list_add_tail(&devdata->node, &i915->vbt.display_devices);
2222
2223 drm_dbg_kms(&i915->drm,
2224 "Generating default VBT child device with type 0x04%x on port %c\n",
2225 child->device_type, port_name(port));
2226 }
2227
2228 /* Bypass some minimum baseline VBT version checks */
2229 i915->vbt.version = 155;
2230}
2231
2232static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2233{
2234 const void *_vbt = vbt;
2235
2236 return _vbt + vbt->bdb_offset;
2237}
2238
2239/**
2240 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2241 * @buf: pointer to a buffer to validate
2242 * @size: size of the buffer
2243 *
2244 * Returns true on valid VBT.
2245 */
2246bool intel_bios_is_valid_vbt(const void *buf, size_t size)
2247{
2248 const struct vbt_header *vbt = buf;
2249 const struct bdb_header *bdb;
2250
2251 if (!vbt)
2252 return false;
2253
2254 if (sizeof(struct vbt_header) > size) {
2255 DRM_DEBUG_DRIVER("VBT header incomplete\n");
2256 return false;
2257 }
2258
2259 if (memcmp(vbt->signature, "$VBT", 4)) {
2260 DRM_DEBUG_DRIVER("VBT invalid signature\n");
2261 return false;
2262 }
2263
2264 if (vbt->vbt_size > size) {
2265 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n");
2266 return false;
2267 }
2268
2269 size = vbt->vbt_size;
2270
2271 if (range_overflows_t(size_t,
2272 vbt->bdb_offset,
2273 sizeof(struct bdb_header),
2274 size)) {
2275 DRM_DEBUG_DRIVER("BDB header incomplete\n");
2276 return false;
2277 }
2278
2279 bdb = get_bdb_header(vbt);
2280 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
2281 DRM_DEBUG_DRIVER("BDB incomplete\n");
2282 return false;
2283 }
2284
2285 return vbt;
2286}
2287
2288static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)
2289{
2290 struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
2291 void __iomem *p = NULL, *oprom;
2292 struct vbt_header *vbt;
2293 u16 vbt_size;
2294 size_t i, size;
2295
2296 oprom = pci_map_rom(pdev, &size);
2297 if (!oprom)
2298 return NULL;
2299
2300 /* Scour memory looking for the VBT signature. */
2301 for (i = 0; i + 4 < size; i += 4) {
2302 if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
2303 continue;
2304
2305 p = oprom + i;
2306 size -= i;
2307 break;
2308 }
2309
2310 if (!p)
2311 goto err_unmap_oprom;
2312
2313 if (sizeof(struct vbt_header) > size) {
2314 drm_dbg(&i915->drm, "VBT header incomplete\n");
2315 goto err_unmap_oprom;
2316 }
2317
2318 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
2319 if (vbt_size > size) {
2320 drm_dbg(&i915->drm,
2321 "VBT incomplete (vbt_size overflows)\n");
2322 goto err_unmap_oprom;
2323 }
2324
2325 /* The rest will be validated by intel_bios_is_valid_vbt() */
2326 vbt = kmalloc(vbt_size, GFP_KERNEL);
2327 if (!vbt)
2328 goto err_unmap_oprom;
2329
2330 memcpy_fromio(vbt, p, vbt_size);
2331
2332 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
2333 goto err_free_vbt;
2334
2335 pci_unmap_rom(pdev, oprom);
2336
2337 return vbt;
2338
2339err_free_vbt:
2340 kfree(vbt);
2341err_unmap_oprom:
2342 pci_unmap_rom(pdev, oprom);
2343
2344 return NULL;
2345}
2346
2347/**
2348 * intel_bios_init - find VBT and initialize settings from the BIOS
2349 * @i915: i915 device instance
2350 *
2351 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
2352 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
2353 * initialize some defaults if the VBT is not present at all.
2354 */
2355void intel_bios_init(struct drm_i915_private *i915)
2356{
2357 const struct vbt_header *vbt = i915->opregion.vbt;
2358 struct vbt_header *oprom_vbt = NULL;
2359 const struct bdb_header *bdb;
2360
2361 INIT_LIST_HEAD(&i915->vbt.display_devices);
2362
2363 if (!HAS_DISPLAY(i915)) {
2364 drm_dbg_kms(&i915->drm,
2365 "Skipping VBT init due to disabled display.\n");
2366 return;
2367 }
2368
2369 init_vbt_defaults(i915);
2370
2371 /* If the OpRegion does not have VBT, look in PCI ROM. */
2372 if (!vbt) {
2373 oprom_vbt = oprom_get_vbt(i915);
2374 if (!oprom_vbt)
2375 goto out;
2376
2377 vbt = oprom_vbt;
2378
2379 drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n");
2380 }
2381
2382 bdb = get_bdb_header(vbt);
2383 i915->vbt.version = bdb->version;
2384
2385 drm_dbg_kms(&i915->drm,
2386 "VBT signature \"%.*s\", BDB version %d\n",
2387 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
2388
2389 /* Grab useful general definitions */
2390 parse_general_features(i915, bdb);
2391 parse_general_definitions(i915, bdb);
2392 parse_panel_options(i915, bdb);
2393 parse_panel_dtd(i915, bdb);
2394 parse_lfp_backlight(i915, bdb);
2395 parse_sdvo_panel_data(i915, bdb);
2396 parse_driver_features(i915, bdb);
2397 parse_power_conservation_features(i915, bdb);
2398 parse_edp(i915, bdb);
2399 parse_psr(i915, bdb);
2400 parse_mipi_config(i915, bdb);
2401 parse_mipi_sequence(i915, bdb);
2402
2403 /* Depends on child device list */
2404 parse_compression_parameters(i915, bdb);
2405
2406out:
2407 if (!vbt) {
2408 drm_info(&i915->drm,
2409 "Failed to find VBIOS tables (VBT)\n");
2410 init_vbt_missing_defaults(i915);
2411 }
2412
2413 /* Further processing on pre-parsed or generated child device data */
2414 parse_sdvo_device_mapping(i915);
2415 parse_ddi_ports(i915);
2416
2417 kfree(oprom_vbt);
2418}
2419
2420/**
2421 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
2422 * @i915: i915 device instance
2423 */
2424void intel_bios_driver_remove(struct drm_i915_private *i915)
2425{
2426 struct intel_bios_encoder_data *devdata, *n;
2427
2428 list_for_each_entry_safe(devdata, n, &i915->vbt.display_devices, node) {
2429 list_del(&devdata->node);
2430 kfree(devdata->dsc);
2431 kfree(devdata);
2432 }
2433
2434 kfree(i915->vbt.sdvo_lvds_vbt_mode);
2435 i915->vbt.sdvo_lvds_vbt_mode = NULL;
2436 kfree(i915->vbt.lfp_lvds_vbt_mode);
2437 i915->vbt.lfp_lvds_vbt_mode = NULL;
2438 kfree(i915->vbt.dsi.data);
2439 i915->vbt.dsi.data = NULL;
2440 kfree(i915->vbt.dsi.pps);
2441 i915->vbt.dsi.pps = NULL;
2442 kfree(i915->vbt.dsi.config);
2443 i915->vbt.dsi.config = NULL;
2444 kfree(i915->vbt.dsi.deassert_seq);
2445 i915->vbt.dsi.deassert_seq = NULL;
2446}
2447
2448/**
2449 * intel_bios_is_tv_present - is integrated TV present in VBT
2450 * @i915: i915 device instance
2451 *
2452 * Return true if TV is present. If no child devices were parsed from VBT,
2453 * assume TV is present.
2454 */
2455bool intel_bios_is_tv_present(struct drm_i915_private *i915)
2456{
2457 const struct intel_bios_encoder_data *devdata;
2458 const struct child_device_config *child;
2459
2460 if (!i915->vbt.int_tv_support)
2461 return false;
2462
2463 if (list_empty(&i915->vbt.display_devices))
2464 return true;
2465
2466 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2467 child = &devdata->child;
2468
2469 /*
2470 * If the device type is not TV, continue.
2471 */
2472 switch (child->device_type) {
2473 case DEVICE_TYPE_INT_TV:
2474 case DEVICE_TYPE_TV:
2475 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
2476 break;
2477 default:
2478 continue;
2479 }
2480 /* Only when the addin_offset is non-zero, it is regarded
2481 * as present.
2482 */
2483 if (child->addin_offset)
2484 return true;
2485 }
2486
2487 return false;
2488}
2489
2490/**
2491 * intel_bios_is_lvds_present - is LVDS present in VBT
2492 * @i915: i915 device instance
2493 * @i2c_pin: i2c pin for LVDS if present
2494 *
2495 * Return true if LVDS is present. If no child devices were parsed from VBT,
2496 * assume LVDS is present.
2497 */
2498bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin)
2499{
2500 const struct intel_bios_encoder_data *devdata;
2501 const struct child_device_config *child;
2502
2503 if (list_empty(&i915->vbt.display_devices))
2504 return true;
2505
2506 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2507 child = &devdata->child;
2508
2509 /* If the device type is not LFP, continue.
2510 * We have to check both the new identifiers as well as the
2511 * old for compatibility with some BIOSes.
2512 */
2513 if (child->device_type != DEVICE_TYPE_INT_LFP &&
2514 child->device_type != DEVICE_TYPE_LFP)
2515 continue;
2516
2517 if (intel_gmbus_is_valid_pin(i915, child->i2c_pin))
2518 *i2c_pin = child->i2c_pin;
2519
2520 /* However, we cannot trust the BIOS writers to populate
2521 * the VBT correctly. Since LVDS requires additional
2522 * information from AIM blocks, a non-zero addin offset is
2523 * a good indicator that the LVDS is actually present.
2524 */
2525 if (child->addin_offset)
2526 return true;
2527
2528 /* But even then some BIOS writers perform some black magic
2529 * and instantiate the device without reference to any
2530 * additional data. Trust that if the VBT was written into
2531 * the OpRegion then they have validated the LVDS's existence.
2532 */
2533 if (i915->opregion.vbt)
2534 return true;
2535 }
2536
2537 return false;
2538}
2539
2540/**
2541 * intel_bios_is_port_present - is the specified digital port present
2542 * @i915: i915 device instance
2543 * @port: port to check
2544 *
2545 * Return true if the device in %port is present.
2546 */
2547bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port)
2548{
2549 const struct intel_bios_encoder_data *devdata;
2550 const struct child_device_config *child;
2551 static const struct {
2552 u16 dp, hdmi;
2553 } port_mapping[] = {
2554 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2555 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2556 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2557 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2558 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2559 };
2560
2561 if (HAS_DDI(i915)) {
2562 const struct ddi_vbt_port_info *port_info =
2563 &i915->vbt.ddi_port_info[port];
2564
2565 return port_info->devdata;
2566 }
2567
2568 /* FIXME maybe deal with port A as well? */
2569 if (drm_WARN_ON(&i915->drm,
2570 port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
2571 return false;
2572
2573 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2574 child = &devdata->child;
2575
2576 if ((child->dvo_port == port_mapping[port].dp ||
2577 child->dvo_port == port_mapping[port].hdmi) &&
2578 (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING |
2579 DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
2580 return true;
2581 }
2582
2583 return false;
2584}
2585
2586/**
2587 * intel_bios_is_port_edp - is the device in given port eDP
2588 * @i915: i915 device instance
2589 * @port: port to check
2590 *
2591 * Return true if the device in %port is eDP.
2592 */
2593bool intel_bios_is_port_edp(struct drm_i915_private *i915, enum port port)
2594{
2595 const struct intel_bios_encoder_data *devdata;
2596 const struct child_device_config *child;
2597 static const short port_mapping[] = {
2598 [PORT_B] = DVO_PORT_DPB,
2599 [PORT_C] = DVO_PORT_DPC,
2600 [PORT_D] = DVO_PORT_DPD,
2601 [PORT_E] = DVO_PORT_DPE,
2602 [PORT_F] = DVO_PORT_DPF,
2603 };
2604
2605 if (HAS_DDI(i915)) {
2606 const struct intel_bios_encoder_data *devdata;
2607
2608 devdata = intel_bios_encoder_data_lookup(i915, port);
2609
2610 return devdata && intel_bios_encoder_supports_edp(devdata);
2611 }
2612
2613 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2614 child = &devdata->child;
2615
2616 if (child->dvo_port == port_mapping[port] &&
2617 (child->device_type & DEVICE_TYPE_eDP_BITS) ==
2618 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
2619 return true;
2620 }
2621
2622 return false;
2623}
2624
2625static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
2626 enum port port)
2627{
2628 static const struct {
2629 u16 dp, hdmi;
2630 } port_mapping[] = {
2631 /*
2632 * Buggy VBTs may declare DP ports as having
2633 * HDMI type dvo_port :( So let's check both.
2634 */
2635 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2636 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2637 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2638 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2639 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2640 };
2641
2642 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
2643 return false;
2644
2645 if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
2646 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
2647 return false;
2648
2649 if (child->dvo_port == port_mapping[port].dp)
2650 return true;
2651
2652 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
2653 if (child->dvo_port == port_mapping[port].hdmi &&
2654 child->aux_channel != 0)
2655 return true;
2656
2657 return false;
2658}
2659
2660bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *i915,
2661 enum port port)
2662{
2663 const struct intel_bios_encoder_data *devdata;
2664
2665 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2666 if (child_dev_is_dp_dual_mode(&devdata->child, port))
2667 return true;
2668 }
2669
2670 return false;
2671}
2672
2673/**
2674 * intel_bios_is_dsi_present - is DSI present in VBT
2675 * @i915: i915 device instance
2676 * @port: port for DSI if present
2677 *
2678 * Return true if DSI is present, and return the port in %port.
2679 */
2680bool intel_bios_is_dsi_present(struct drm_i915_private *i915,
2681 enum port *port)
2682{
2683 const struct intel_bios_encoder_data *devdata;
2684 const struct child_device_config *child;
2685 u8 dvo_port;
2686
2687 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2688 child = &devdata->child;
2689
2690 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2691 continue;
2692
2693 dvo_port = child->dvo_port;
2694
2695 if (dvo_port == DVO_PORT_MIPIA ||
2696 (dvo_port == DVO_PORT_MIPIB && DISPLAY_VER(i915) >= 11) ||
2697 (dvo_port == DVO_PORT_MIPIC && DISPLAY_VER(i915) < 11)) {
2698 if (port)
2699 *port = dvo_port - DVO_PORT_MIPIA;
2700 return true;
2701 } else if (dvo_port == DVO_PORT_MIPIB ||
2702 dvo_port == DVO_PORT_MIPIC ||
2703 dvo_port == DVO_PORT_MIPID) {
2704 drm_dbg_kms(&i915->drm,
2705 "VBT has unsupported DSI port %c\n",
2706 port_name(dvo_port - DVO_PORT_MIPIA));
2707 }
2708 }
2709
2710 return false;
2711}
2712
2713static void fill_dsc(struct intel_crtc_state *crtc_state,
2714 struct dsc_compression_parameters_entry *dsc,
2715 int dsc_max_bpc)
2716{
2717 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
2718 int bpc = 8;
2719
2720 vdsc_cfg->dsc_version_major = dsc->version_major;
2721 vdsc_cfg->dsc_version_minor = dsc->version_minor;
2722
2723 if (dsc->support_12bpc && dsc_max_bpc >= 12)
2724 bpc = 12;
2725 else if (dsc->support_10bpc && dsc_max_bpc >= 10)
2726 bpc = 10;
2727 else if (dsc->support_8bpc && dsc_max_bpc >= 8)
2728 bpc = 8;
2729 else
2730 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n",
2731 dsc_max_bpc);
2732
2733 crtc_state->pipe_bpp = bpc * 3;
2734
2735 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp,
2736 VBT_DSC_MAX_BPP(dsc->max_bpp));
2737
2738 /*
2739 * FIXME: This is ugly, and slice count should take DSC engine
2740 * throughput etc. into account.
2741 *
2742 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
2743 */
2744 if (dsc->slices_per_line & BIT(2)) {
2745 crtc_state->dsc.slice_count = 4;
2746 } else if (dsc->slices_per_line & BIT(1)) {
2747 crtc_state->dsc.slice_count = 2;
2748 } else {
2749 /* FIXME */
2750 if (!(dsc->slices_per_line & BIT(0)))
2751 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n");
2752
2753 crtc_state->dsc.slice_count = 1;
2754 }
2755
2756 if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
2757 crtc_state->dsc.slice_count != 0)
2758 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n",
2759 crtc_state->hw.adjusted_mode.crtc_hdisplay,
2760 crtc_state->dsc.slice_count);
2761
2762 /*
2763 * The VBT rc_buffer_block_size and rc_buffer_size definitions
2764 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63.
2765 */
2766 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size,
2767 dsc->rc_buffer_size);
2768
2769 /* FIXME: DSI spec says bpc + 1 for this one */
2770 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
2771
2772 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
2773
2774 vdsc_cfg->slice_height = dsc->slice_height;
2775}
2776
2777/* FIXME: initially DSI specific */
2778bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
2779 struct intel_crtc_state *crtc_state,
2780 int dsc_max_bpc)
2781{
2782 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2783 const struct intel_bios_encoder_data *devdata;
2784 const struct child_device_config *child;
2785
2786 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2787 child = &devdata->child;
2788
2789 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2790 continue;
2791
2792 if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) {
2793 if (!devdata->dsc)
2794 return false;
2795
2796 if (crtc_state)
2797 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
2798
2799 return true;
2800 }
2801 }
2802
2803 return false;
2804}
2805
2806/**
2807 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
2808 * @i915: i915 device instance
2809 * @port: port to check
2810 *
2811 * Return true if HPD should be inverted for %port.
2812 */
2813bool
2814intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
2815 enum port port)
2816{
2817 const struct intel_bios_encoder_data *devdata =
2818 i915->vbt.ddi_port_info[port].devdata;
2819
2820 if (drm_WARN_ON_ONCE(&i915->drm,
2821 !IS_GEMINILAKE(i915) && !IS_BROXTON(i915)))
2822 return false;
2823
2824 return devdata && devdata->child.hpd_invert;
2825}
2826
2827/**
2828 * intel_bios_is_lspcon_present - if LSPCON is attached on %port
2829 * @i915: i915 device instance
2830 * @port: port to check
2831 *
2832 * Return true if LSPCON is present on this port
2833 */
2834bool
2835intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
2836 enum port port)
2837{
2838 const struct intel_bios_encoder_data *devdata =
2839 i915->vbt.ddi_port_info[port].devdata;
2840
2841 return HAS_LSPCON(i915) && devdata && devdata->child.lspcon;
2842}
2843
2844/**
2845 * intel_bios_is_lane_reversal_needed - if lane reversal needed on port
2846 * @i915: i915 device instance
2847 * @port: port to check
2848 *
2849 * Return true if port requires lane reversal
2850 */
2851bool
2852intel_bios_is_lane_reversal_needed(const struct drm_i915_private *i915,
2853 enum port port)
2854{
2855 const struct intel_bios_encoder_data *devdata =
2856 i915->vbt.ddi_port_info[port].devdata;
2857
2858 return devdata && devdata->child.lane_reversal;
2859}
2860
2861enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
2862 enum port port)
2863{
2864 const struct ddi_vbt_port_info *info =
2865 &i915->vbt.ddi_port_info[port];
2866 enum aux_ch aux_ch;
2867
2868 if (!info->alternate_aux_channel) {
2869 aux_ch = (enum aux_ch)port;
2870
2871 drm_dbg_kms(&i915->drm,
2872 "using AUX %c for port %c (platform default)\n",
2873 aux_ch_name(aux_ch), port_name(port));
2874 return aux_ch;
2875 }
2876
2877 /*
2878 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
2879 * map to DDI A,B,TC1,TC2 respectively.
2880 *
2881 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
2882 * map to DDI A,TC1,TC2,TC3,TC4 respectively.
2883 */
2884 switch (info->alternate_aux_channel) {
2885 case DP_AUX_A:
2886 aux_ch = AUX_CH_A;
2887 break;
2888 case DP_AUX_B:
2889 if (IS_ALDERLAKE_S(i915))
2890 aux_ch = AUX_CH_USBC1;
2891 else
2892 aux_ch = AUX_CH_B;
2893 break;
2894 case DP_AUX_C:
2895 if (IS_ALDERLAKE_S(i915))
2896 aux_ch = AUX_CH_USBC2;
2897 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
2898 aux_ch = AUX_CH_USBC1;
2899 else
2900 aux_ch = AUX_CH_C;
2901 break;
2902 case DP_AUX_D:
2903 if (DISPLAY_VER(i915) == 13)
2904 aux_ch = AUX_CH_D_XELPD;
2905 else if (IS_ALDERLAKE_S(i915))
2906 aux_ch = AUX_CH_USBC3;
2907 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
2908 aux_ch = AUX_CH_USBC2;
2909 else
2910 aux_ch = AUX_CH_D;
2911 break;
2912 case DP_AUX_E:
2913 if (DISPLAY_VER(i915) == 13)
2914 aux_ch = AUX_CH_E_XELPD;
2915 else if (IS_ALDERLAKE_S(i915))
2916 aux_ch = AUX_CH_USBC4;
2917 else
2918 aux_ch = AUX_CH_E;
2919 break;
2920 case DP_AUX_F:
2921 if (DISPLAY_VER(i915) == 13)
2922 aux_ch = AUX_CH_USBC1;
2923 else
2924 aux_ch = AUX_CH_F;
2925 break;
2926 case DP_AUX_G:
2927 if (DISPLAY_VER(i915) == 13)
2928 aux_ch = AUX_CH_USBC2;
2929 else
2930 aux_ch = AUX_CH_G;
2931 break;
2932 case DP_AUX_H:
2933 if (DISPLAY_VER(i915) == 13)
2934 aux_ch = AUX_CH_USBC3;
2935 else
2936 aux_ch = AUX_CH_H;
2937 break;
2938 case DP_AUX_I:
2939 if (DISPLAY_VER(i915) == 13)
2940 aux_ch = AUX_CH_USBC4;
2941 else
2942 aux_ch = AUX_CH_I;
2943 break;
2944 default:
2945 MISSING_CASE(info->alternate_aux_channel);
2946 aux_ch = AUX_CH_A;
2947 break;
2948 }
2949
2950 drm_dbg_kms(&i915->drm, "using AUX %c for port %c (VBT)\n",
2951 aux_ch_name(aux_ch), port_name(port));
2952
2953 return aux_ch;
2954}
2955
2956int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
2957{
2958 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2959
2960 return i915->vbt.ddi_port_info[encoder->port].max_tmds_clock;
2961}
2962
2963int intel_bios_hdmi_level_shift(struct intel_encoder *encoder)
2964{
2965 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2966 const struct ddi_vbt_port_info *info =
2967 &i915->vbt.ddi_port_info[encoder->port];
2968
2969 return info->hdmi_level_shift_set ? info->hdmi_level_shift : -1;
2970}
2971
2972int intel_bios_encoder_dp_boost_level(const struct intel_bios_encoder_data *devdata)
2973{
2974 if (!devdata || devdata->i915->vbt.version < 196 || !devdata->child.iboost)
2975 return 0;
2976
2977 return translate_iboost(devdata->child.dp_iboost_level);
2978}
2979
2980int intel_bios_encoder_hdmi_boost_level(const struct intel_bios_encoder_data *devdata)
2981{
2982 if (!devdata || devdata->i915->vbt.version < 196 || !devdata->child.iboost)
2983 return 0;
2984
2985 return translate_iboost(devdata->child.hdmi_iboost_level);
2986}
2987
2988int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
2989{
2990 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2991
2992 return i915->vbt.ddi_port_info[encoder->port].dp_max_link_rate;
2993}
2994
2995int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
2996{
2997 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2998
2999 return i915->vbt.ddi_port_info[encoder->port].alternate_ddc_pin;
3000}
3001
3002bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata)
3003{
3004 return devdata->i915->vbt.version >= 195 && devdata->child.dp_usb_type_c;
3005}
3006
3007bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata)
3008{
3009 return devdata->i915->vbt.version >= 209 && devdata->child.tbt;
3010}
3011
3012const struct intel_bios_encoder_data *
3013intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port)
3014{
3015 return i915->vbt.ddi_port_info[port].devdata;
3016}
1/*
2 * Copyright © 2006 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28#include <drm/drm_edid.h>
29#include <drm/display/drm_dp_helper.h>
30#include <drm/display/drm_dsc_helper.h>
31
32#include "display/intel_display.h"
33#include "display/intel_display_types.h"
34#include "display/intel_gmbus.h"
35
36#include "i915_drv.h"
37#include "i915_reg.h"
38
39#define _INTEL_BIOS_PRIVATE
40#include "intel_vbt_defs.h"
41
42/**
43 * DOC: Video BIOS Table (VBT)
44 *
45 * The Video BIOS Table, or VBT, provides platform and board specific
46 * configuration information to the driver that is not discoverable or available
47 * through other means. The configuration is mostly related to display
48 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
49 * the PCI ROM.
50 *
51 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
52 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
53 * contain the actual configuration information. The VBT Header, and thus the
54 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
55 * BDB Header. The data blocks are concatenated after the BDB Header. The data
56 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
57 * data. (Block 53, the MIPI Sequence Block is an exception.)
58 *
59 * The driver parses the VBT during load. The relevant information is stored in
60 * driver private data for ease of use, and the actual VBT is not read after
61 * that.
62 */
63
64/* Wrapper for VBT child device config */
65struct intel_bios_encoder_data {
66 struct drm_i915_private *i915;
67
68 struct child_device_config child;
69 struct dsc_compression_parameters_entry *dsc;
70 struct list_head node;
71};
72
73#define SLAVE_ADDR1 0x70
74#define SLAVE_ADDR2 0x72
75
76/* Get BDB block size given a pointer to Block ID. */
77static u32 _get_blocksize(const u8 *block_base)
78{
79 /* The MIPI Sequence Block v3+ has a separate size field. */
80 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
81 return *((const u32 *)(block_base + 4));
82 else
83 return *((const u16 *)(block_base + 1));
84}
85
86/* Get BDB block size give a pointer to data after Block ID and Block Size. */
87static u32 get_blocksize(const void *block_data)
88{
89 return _get_blocksize(block_data - 3);
90}
91
92static const void *
93find_raw_section(const void *_bdb, enum bdb_block_id section_id)
94{
95 const struct bdb_header *bdb = _bdb;
96 const u8 *base = _bdb;
97 int index = 0;
98 u32 total, current_size;
99 enum bdb_block_id current_id;
100
101 /* skip to first section */
102 index += bdb->header_size;
103 total = bdb->bdb_size;
104
105 /* walk the sections looking for section_id */
106 while (index + 3 < total) {
107 current_id = *(base + index);
108 current_size = _get_blocksize(base + index);
109 index += 3;
110
111 if (index + current_size > total)
112 return NULL;
113
114 if (current_id == section_id)
115 return base + index;
116
117 index += current_size;
118 }
119
120 return NULL;
121}
122
123/*
124 * Offset from the start of BDB to the start of the
125 * block data (just past the block header).
126 */
127static u32 raw_block_offset(const void *bdb, enum bdb_block_id section_id)
128{
129 const void *block;
130
131 block = find_raw_section(bdb, section_id);
132 if (!block)
133 return 0;
134
135 return block - bdb;
136}
137
138struct bdb_block_entry {
139 struct list_head node;
140 enum bdb_block_id section_id;
141 u8 data[];
142};
143
144static const void *
145find_section(struct drm_i915_private *i915,
146 enum bdb_block_id section_id)
147{
148 struct bdb_block_entry *entry;
149
150 list_for_each_entry(entry, &i915->display.vbt.bdb_blocks, node) {
151 if (entry->section_id == section_id)
152 return entry->data + 3;
153 }
154
155 return NULL;
156}
157
158static const struct {
159 enum bdb_block_id section_id;
160 size_t min_size;
161} bdb_blocks[] = {
162 { .section_id = BDB_GENERAL_FEATURES,
163 .min_size = sizeof(struct bdb_general_features), },
164 { .section_id = BDB_GENERAL_DEFINITIONS,
165 .min_size = sizeof(struct bdb_general_definitions), },
166 { .section_id = BDB_PSR,
167 .min_size = sizeof(struct bdb_psr), },
168 { .section_id = BDB_DRIVER_FEATURES,
169 .min_size = sizeof(struct bdb_driver_features), },
170 { .section_id = BDB_SDVO_LVDS_OPTIONS,
171 .min_size = sizeof(struct bdb_sdvo_lvds_options), },
172 { .section_id = BDB_SDVO_PANEL_DTDS,
173 .min_size = sizeof(struct bdb_sdvo_panel_dtds), },
174 { .section_id = BDB_EDP,
175 .min_size = sizeof(struct bdb_edp), },
176 { .section_id = BDB_LVDS_OPTIONS,
177 .min_size = sizeof(struct bdb_lvds_options), },
178 /*
179 * BDB_LVDS_LFP_DATA depends on BDB_LVDS_LFP_DATA_PTRS,
180 * so keep the two ordered.
181 */
182 { .section_id = BDB_LVDS_LFP_DATA_PTRS,
183 .min_size = sizeof(struct bdb_lvds_lfp_data_ptrs), },
184 { .section_id = BDB_LVDS_LFP_DATA,
185 .min_size = 0, /* special case */ },
186 { .section_id = BDB_LVDS_BACKLIGHT,
187 .min_size = sizeof(struct bdb_lfp_backlight_data), },
188 { .section_id = BDB_LFP_POWER,
189 .min_size = sizeof(struct bdb_lfp_power), },
190 { .section_id = BDB_MIPI_CONFIG,
191 .min_size = sizeof(struct bdb_mipi_config), },
192 { .section_id = BDB_MIPI_SEQUENCE,
193 .min_size = sizeof(struct bdb_mipi_sequence) },
194 { .section_id = BDB_COMPRESSION_PARAMETERS,
195 .min_size = sizeof(struct bdb_compression_parameters), },
196 { .section_id = BDB_GENERIC_DTD,
197 .min_size = sizeof(struct bdb_generic_dtd), },
198};
199
200static size_t lfp_data_min_size(struct drm_i915_private *i915)
201{
202 const struct bdb_lvds_lfp_data_ptrs *ptrs;
203 size_t size;
204
205 ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
206 if (!ptrs)
207 return 0;
208
209 size = sizeof(struct bdb_lvds_lfp_data);
210 if (ptrs->panel_name.table_size)
211 size = max(size, ptrs->panel_name.offset +
212 sizeof(struct bdb_lvds_lfp_data_tail));
213
214 return size;
215}
216
217static bool validate_lfp_data_ptrs(const void *bdb,
218 const struct bdb_lvds_lfp_data_ptrs *ptrs)
219{
220 int fp_timing_size, dvo_timing_size, panel_pnp_id_size, panel_name_size;
221 int data_block_size, lfp_data_size;
222 const void *data_block;
223 int i;
224
225 data_block = find_raw_section(bdb, BDB_LVDS_LFP_DATA);
226 if (!data_block)
227 return false;
228
229 data_block_size = get_blocksize(data_block);
230 if (data_block_size == 0)
231 return false;
232
233 /* always 3 indicating the presence of fp_timing+dvo_timing+panel_pnp_id */
234 if (ptrs->lvds_entries != 3)
235 return false;
236
237 fp_timing_size = ptrs->ptr[0].fp_timing.table_size;
238 dvo_timing_size = ptrs->ptr[0].dvo_timing.table_size;
239 panel_pnp_id_size = ptrs->ptr[0].panel_pnp_id.table_size;
240 panel_name_size = ptrs->panel_name.table_size;
241
242 /* fp_timing has variable size */
243 if (fp_timing_size < 32 ||
244 dvo_timing_size != sizeof(struct lvds_dvo_timing) ||
245 panel_pnp_id_size != sizeof(struct lvds_pnp_id))
246 return false;
247
248 /* panel_name is not present in old VBTs */
249 if (panel_name_size != 0 &&
250 panel_name_size != sizeof(struct lvds_lfp_panel_name))
251 return false;
252
253 lfp_data_size = ptrs->ptr[1].fp_timing.offset - ptrs->ptr[0].fp_timing.offset;
254 if (16 * lfp_data_size > data_block_size)
255 return false;
256
257 /* make sure the table entries have uniform size */
258 for (i = 1; i < 16; i++) {
259 if (ptrs->ptr[i].fp_timing.table_size != fp_timing_size ||
260 ptrs->ptr[i].dvo_timing.table_size != dvo_timing_size ||
261 ptrs->ptr[i].panel_pnp_id.table_size != panel_pnp_id_size)
262 return false;
263
264 if (ptrs->ptr[i].fp_timing.offset - ptrs->ptr[i-1].fp_timing.offset != lfp_data_size ||
265 ptrs->ptr[i].dvo_timing.offset - ptrs->ptr[i-1].dvo_timing.offset != lfp_data_size ||
266 ptrs->ptr[i].panel_pnp_id.offset - ptrs->ptr[i-1].panel_pnp_id.offset != lfp_data_size)
267 return false;
268 }
269
270 /*
271 * Except for vlv/chv machines all real VBTs seem to have 6
272 * unaccounted bytes in the fp_timing table. And it doesn't
273 * appear to be a really intentional hole as the fp_timing
274 * 0xffff terminator is always within those 6 missing bytes.
275 */
276 if (fp_timing_size + 6 + dvo_timing_size + panel_pnp_id_size == lfp_data_size)
277 fp_timing_size += 6;
278
279 if (fp_timing_size + dvo_timing_size + panel_pnp_id_size != lfp_data_size)
280 return false;
281
282 if (ptrs->ptr[0].fp_timing.offset + fp_timing_size != ptrs->ptr[0].dvo_timing.offset ||
283 ptrs->ptr[0].dvo_timing.offset + dvo_timing_size != ptrs->ptr[0].panel_pnp_id.offset ||
284 ptrs->ptr[0].panel_pnp_id.offset + panel_pnp_id_size != lfp_data_size)
285 return false;
286
287 /* make sure the tables fit inside the data block */
288 for (i = 0; i < 16; i++) {
289 if (ptrs->ptr[i].fp_timing.offset + fp_timing_size > data_block_size ||
290 ptrs->ptr[i].dvo_timing.offset + dvo_timing_size > data_block_size ||
291 ptrs->ptr[i].panel_pnp_id.offset + panel_pnp_id_size > data_block_size)
292 return false;
293 }
294
295 if (ptrs->panel_name.offset + 16 * panel_name_size > data_block_size)
296 return false;
297
298 /* make sure fp_timing terminators are present at expected locations */
299 for (i = 0; i < 16; i++) {
300 const u16 *t = data_block + ptrs->ptr[i].fp_timing.offset +
301 fp_timing_size - 2;
302
303 if (*t != 0xffff)
304 return false;
305 }
306
307 return true;
308}
309
310/* make the data table offsets relative to the data block */
311static bool fixup_lfp_data_ptrs(const void *bdb, void *ptrs_block)
312{
313 struct bdb_lvds_lfp_data_ptrs *ptrs = ptrs_block;
314 u32 offset;
315 int i;
316
317 offset = raw_block_offset(bdb, BDB_LVDS_LFP_DATA);
318
319 for (i = 0; i < 16; i++) {
320 if (ptrs->ptr[i].fp_timing.offset < offset ||
321 ptrs->ptr[i].dvo_timing.offset < offset ||
322 ptrs->ptr[i].panel_pnp_id.offset < offset)
323 return false;
324
325 ptrs->ptr[i].fp_timing.offset -= offset;
326 ptrs->ptr[i].dvo_timing.offset -= offset;
327 ptrs->ptr[i].panel_pnp_id.offset -= offset;
328 }
329
330 if (ptrs->panel_name.table_size) {
331 if (ptrs->panel_name.offset < offset)
332 return false;
333
334 ptrs->panel_name.offset -= offset;
335 }
336
337 return validate_lfp_data_ptrs(bdb, ptrs);
338}
339
340static int make_lfp_data_ptr(struct lvds_lfp_data_ptr_table *table,
341 int table_size, int total_size)
342{
343 if (total_size < table_size)
344 return total_size;
345
346 table->table_size = table_size;
347 table->offset = total_size - table_size;
348
349 return total_size - table_size;
350}
351
352static void next_lfp_data_ptr(struct lvds_lfp_data_ptr_table *next,
353 const struct lvds_lfp_data_ptr_table *prev,
354 int size)
355{
356 next->table_size = prev->table_size;
357 next->offset = prev->offset + size;
358}
359
360static void *generate_lfp_data_ptrs(struct drm_i915_private *i915,
361 const void *bdb)
362{
363 int i, size, table_size, block_size, offset, fp_timing_size;
364 struct bdb_lvds_lfp_data_ptrs *ptrs;
365 const void *block;
366 void *ptrs_block;
367
368 /*
369 * The hardcoded fp_timing_size is only valid for
370 * modernish VBTs. All older VBTs definitely should
371 * include block 41 and thus we don't need to
372 * generate one.
373 */
374 if (i915->display.vbt.version < 155)
375 return NULL;
376
377 fp_timing_size = 38;
378
379 block = find_raw_section(bdb, BDB_LVDS_LFP_DATA);
380 if (!block)
381 return NULL;
382
383 drm_dbg_kms(&i915->drm, "Generating LFP data table pointers\n");
384
385 block_size = get_blocksize(block);
386
387 size = fp_timing_size + sizeof(struct lvds_dvo_timing) +
388 sizeof(struct lvds_pnp_id);
389 if (size * 16 > block_size)
390 return NULL;
391
392 ptrs_block = kzalloc(sizeof(*ptrs) + 3, GFP_KERNEL);
393 if (!ptrs_block)
394 return NULL;
395
396 *(u8 *)(ptrs_block + 0) = BDB_LVDS_LFP_DATA_PTRS;
397 *(u16 *)(ptrs_block + 1) = sizeof(*ptrs);
398 ptrs = ptrs_block + 3;
399
400 table_size = sizeof(struct lvds_pnp_id);
401 size = make_lfp_data_ptr(&ptrs->ptr[0].panel_pnp_id, table_size, size);
402
403 table_size = sizeof(struct lvds_dvo_timing);
404 size = make_lfp_data_ptr(&ptrs->ptr[0].dvo_timing, table_size, size);
405
406 table_size = fp_timing_size;
407 size = make_lfp_data_ptr(&ptrs->ptr[0].fp_timing, table_size, size);
408
409 if (ptrs->ptr[0].fp_timing.table_size)
410 ptrs->lvds_entries++;
411 if (ptrs->ptr[0].dvo_timing.table_size)
412 ptrs->lvds_entries++;
413 if (ptrs->ptr[0].panel_pnp_id.table_size)
414 ptrs->lvds_entries++;
415
416 if (size != 0 || ptrs->lvds_entries != 3) {
417 kfree(ptrs_block);
418 return NULL;
419 }
420
421 size = fp_timing_size + sizeof(struct lvds_dvo_timing) +
422 sizeof(struct lvds_pnp_id);
423 for (i = 1; i < 16; i++) {
424 next_lfp_data_ptr(&ptrs->ptr[i].fp_timing, &ptrs->ptr[i-1].fp_timing, size);
425 next_lfp_data_ptr(&ptrs->ptr[i].dvo_timing, &ptrs->ptr[i-1].dvo_timing, size);
426 next_lfp_data_ptr(&ptrs->ptr[i].panel_pnp_id, &ptrs->ptr[i-1].panel_pnp_id, size);
427 }
428
429 table_size = sizeof(struct lvds_lfp_panel_name);
430
431 if (16 * (size + table_size) <= block_size) {
432 ptrs->panel_name.table_size = table_size;
433 ptrs->panel_name.offset = size * 16;
434 }
435
436 offset = block - bdb;
437
438 for (i = 0; i < 16; i++) {
439 ptrs->ptr[i].fp_timing.offset += offset;
440 ptrs->ptr[i].dvo_timing.offset += offset;
441 ptrs->ptr[i].panel_pnp_id.offset += offset;
442 }
443
444 if (ptrs->panel_name.table_size)
445 ptrs->panel_name.offset += offset;
446
447 return ptrs_block;
448}
449
450static void
451init_bdb_block(struct drm_i915_private *i915,
452 const void *bdb, enum bdb_block_id section_id,
453 size_t min_size)
454{
455 struct bdb_block_entry *entry;
456 void *temp_block = NULL;
457 const void *block;
458 size_t block_size;
459
460 block = find_raw_section(bdb, section_id);
461
462 /* Modern VBTs lack the LFP data table pointers block, make one up */
463 if (!block && section_id == BDB_LVDS_LFP_DATA_PTRS) {
464 temp_block = generate_lfp_data_ptrs(i915, bdb);
465 if (temp_block)
466 block = temp_block + 3;
467 }
468 if (!block)
469 return;
470
471 drm_WARN(&i915->drm, min_size == 0,
472 "Block %d min_size is zero\n", section_id);
473
474 block_size = get_blocksize(block);
475
476 /*
477 * Version number and new block size are considered
478 * part of the header for MIPI sequenece block v3+.
479 */
480 if (section_id == BDB_MIPI_SEQUENCE && *(const u8 *)block >= 3)
481 block_size += 5;
482
483 entry = kzalloc(struct_size(entry, data, max(min_size, block_size) + 3),
484 GFP_KERNEL);
485 if (!entry) {
486 kfree(temp_block);
487 return;
488 }
489
490 entry->section_id = section_id;
491 memcpy(entry->data, block - 3, block_size + 3);
492
493 kfree(temp_block);
494
495 drm_dbg_kms(&i915->drm, "Found BDB block %d (size %zu, min size %zu)\n",
496 section_id, block_size, min_size);
497
498 if (section_id == BDB_LVDS_LFP_DATA_PTRS &&
499 !fixup_lfp_data_ptrs(bdb, entry->data + 3)) {
500 drm_err(&i915->drm, "VBT has malformed LFP data table pointers\n");
501 kfree(entry);
502 return;
503 }
504
505 list_add_tail(&entry->node, &i915->display.vbt.bdb_blocks);
506}
507
508static void init_bdb_blocks(struct drm_i915_private *i915,
509 const void *bdb)
510{
511 int i;
512
513 for (i = 0; i < ARRAY_SIZE(bdb_blocks); i++) {
514 enum bdb_block_id section_id = bdb_blocks[i].section_id;
515 size_t min_size = bdb_blocks[i].min_size;
516
517 if (section_id == BDB_LVDS_LFP_DATA)
518 min_size = lfp_data_min_size(i915);
519
520 init_bdb_block(i915, bdb, section_id, min_size);
521 }
522}
523
524static void
525fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
526 const struct lvds_dvo_timing *dvo_timing)
527{
528 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
529 dvo_timing->hactive_lo;
530 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
531 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
532 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
533 ((dvo_timing->hsync_pulse_width_hi << 8) |
534 dvo_timing->hsync_pulse_width_lo);
535 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
536 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
537
538 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
539 dvo_timing->vactive_lo;
540 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
541 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
542 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
543 ((dvo_timing->vsync_pulse_width_hi << 4) |
544 dvo_timing->vsync_pulse_width_lo);
545 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
546 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
547 panel_fixed_mode->clock = dvo_timing->clock * 10;
548 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
549
550 if (dvo_timing->hsync_positive)
551 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
552 else
553 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
554
555 if (dvo_timing->vsync_positive)
556 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
557 else
558 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
559
560 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
561 dvo_timing->himage_lo;
562 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
563 dvo_timing->vimage_lo;
564
565 /* Some VBTs have bogus h/vtotal values */
566 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
567 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
568 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
569 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
570
571 drm_mode_set_name(panel_fixed_mode);
572}
573
574static const struct lvds_dvo_timing *
575get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *data,
576 const struct bdb_lvds_lfp_data_ptrs *ptrs,
577 int index)
578{
579 return (const void *)data + ptrs->ptr[index].dvo_timing.offset;
580}
581
582static const struct lvds_fp_timing *
583get_lvds_fp_timing(const struct bdb_lvds_lfp_data *data,
584 const struct bdb_lvds_lfp_data_ptrs *ptrs,
585 int index)
586{
587 return (const void *)data + ptrs->ptr[index].fp_timing.offset;
588}
589
590static const struct lvds_pnp_id *
591get_lvds_pnp_id(const struct bdb_lvds_lfp_data *data,
592 const struct bdb_lvds_lfp_data_ptrs *ptrs,
593 int index)
594{
595 return (const void *)data + ptrs->ptr[index].panel_pnp_id.offset;
596}
597
598static const struct bdb_lvds_lfp_data_tail *
599get_lfp_data_tail(const struct bdb_lvds_lfp_data *data,
600 const struct bdb_lvds_lfp_data_ptrs *ptrs)
601{
602 if (ptrs->panel_name.table_size)
603 return (const void *)data + ptrs->panel_name.offset;
604 else
605 return NULL;
606}
607
608static void dump_pnp_id(struct drm_i915_private *i915,
609 const struct lvds_pnp_id *pnp_id,
610 const char *name)
611{
612 u16 mfg_name = be16_to_cpu((__force __be16)pnp_id->mfg_name);
613 char vend[4];
614
615 drm_dbg_kms(&i915->drm, "%s PNPID mfg: %s (0x%x), prod: %u, serial: %u, week: %d, year: %d\n",
616 name, drm_edid_decode_mfg_id(mfg_name, vend),
617 pnp_id->mfg_name, pnp_id->product_code, pnp_id->serial,
618 pnp_id->mfg_week, pnp_id->mfg_year + 1990);
619}
620
621static int opregion_get_panel_type(struct drm_i915_private *i915,
622 const struct intel_bios_encoder_data *devdata,
623 const struct edid *edid)
624{
625 return intel_opregion_get_panel_type(i915);
626}
627
628static int vbt_get_panel_type(struct drm_i915_private *i915,
629 const struct intel_bios_encoder_data *devdata,
630 const struct edid *edid)
631{
632 const struct bdb_lvds_options *lvds_options;
633
634 lvds_options = find_section(i915, BDB_LVDS_OPTIONS);
635 if (!lvds_options)
636 return -1;
637
638 if (lvds_options->panel_type > 0xf &&
639 lvds_options->panel_type != 0xff) {
640 drm_dbg_kms(&i915->drm, "Invalid VBT panel type 0x%x\n",
641 lvds_options->panel_type);
642 return -1;
643 }
644
645 if (devdata && devdata->child.handle == DEVICE_HANDLE_LFP2)
646 return lvds_options->panel_type2;
647
648 drm_WARN_ON(&i915->drm, devdata && devdata->child.handle != DEVICE_HANDLE_LFP1);
649
650 return lvds_options->panel_type;
651}
652
653static int pnpid_get_panel_type(struct drm_i915_private *i915,
654 const struct intel_bios_encoder_data *devdata,
655 const struct edid *edid)
656{
657 const struct bdb_lvds_lfp_data *data;
658 const struct bdb_lvds_lfp_data_ptrs *ptrs;
659 const struct lvds_pnp_id *edid_id;
660 struct lvds_pnp_id edid_id_nodate;
661 int i, best = -1;
662
663 if (!edid)
664 return -1;
665
666 edid_id = (const void *)&edid->mfg_id[0];
667
668 edid_id_nodate = *edid_id;
669 edid_id_nodate.mfg_week = 0;
670 edid_id_nodate.mfg_year = 0;
671
672 dump_pnp_id(i915, edid_id, "EDID");
673
674 ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
675 if (!ptrs)
676 return -1;
677
678 data = find_section(i915, BDB_LVDS_LFP_DATA);
679 if (!data)
680 return -1;
681
682 for (i = 0; i < 16; i++) {
683 const struct lvds_pnp_id *vbt_id =
684 get_lvds_pnp_id(data, ptrs, i);
685
686 /* full match? */
687 if (!memcmp(vbt_id, edid_id, sizeof(*vbt_id)))
688 return i;
689
690 /*
691 * Accept a match w/o date if no full match is found,
692 * and the VBT entry does not specify a date.
693 */
694 if (best < 0 &&
695 !memcmp(vbt_id, &edid_id_nodate, sizeof(*vbt_id)))
696 best = i;
697 }
698
699 return best;
700}
701
702static int fallback_get_panel_type(struct drm_i915_private *i915,
703 const struct intel_bios_encoder_data *devdata,
704 const struct edid *edid)
705{
706 return 0;
707}
708
709enum panel_type {
710 PANEL_TYPE_OPREGION,
711 PANEL_TYPE_VBT,
712 PANEL_TYPE_PNPID,
713 PANEL_TYPE_FALLBACK,
714};
715
716static int get_panel_type(struct drm_i915_private *i915,
717 const struct intel_bios_encoder_data *devdata,
718 const struct edid *edid)
719{
720 struct {
721 const char *name;
722 int (*get_panel_type)(struct drm_i915_private *i915,
723 const struct intel_bios_encoder_data *devdata,
724 const struct edid *edid);
725 int panel_type;
726 } panel_types[] = {
727 [PANEL_TYPE_OPREGION] = {
728 .name = "OpRegion",
729 .get_panel_type = opregion_get_panel_type,
730 },
731 [PANEL_TYPE_VBT] = {
732 .name = "VBT",
733 .get_panel_type = vbt_get_panel_type,
734 },
735 [PANEL_TYPE_PNPID] = {
736 .name = "PNPID",
737 .get_panel_type = pnpid_get_panel_type,
738 },
739 [PANEL_TYPE_FALLBACK] = {
740 .name = "fallback",
741 .get_panel_type = fallback_get_panel_type,
742 },
743 };
744 int i;
745
746 for (i = 0; i < ARRAY_SIZE(panel_types); i++) {
747 panel_types[i].panel_type = panel_types[i].get_panel_type(i915, devdata, edid);
748
749 drm_WARN_ON(&i915->drm, panel_types[i].panel_type > 0xf &&
750 panel_types[i].panel_type != 0xff);
751
752 if (panel_types[i].panel_type >= 0)
753 drm_dbg_kms(&i915->drm, "Panel type (%s): %d\n",
754 panel_types[i].name, panel_types[i].panel_type);
755 }
756
757 if (panel_types[PANEL_TYPE_OPREGION].panel_type >= 0)
758 i = PANEL_TYPE_OPREGION;
759 else if (panel_types[PANEL_TYPE_VBT].panel_type == 0xff &&
760 panel_types[PANEL_TYPE_PNPID].panel_type >= 0)
761 i = PANEL_TYPE_PNPID;
762 else if (panel_types[PANEL_TYPE_VBT].panel_type != 0xff &&
763 panel_types[PANEL_TYPE_VBT].panel_type >= 0)
764 i = PANEL_TYPE_VBT;
765 else
766 i = PANEL_TYPE_FALLBACK;
767
768 drm_dbg_kms(&i915->drm, "Selected panel type (%s): %d\n",
769 panel_types[i].name, panel_types[i].panel_type);
770
771 return panel_types[i].panel_type;
772}
773
774static unsigned int panel_bits(unsigned int value, int panel_type, int num_bits)
775{
776 return (value >> (panel_type * num_bits)) & (BIT(num_bits) - 1);
777}
778
779static bool panel_bool(unsigned int value, int panel_type)
780{
781 return panel_bits(value, panel_type, 1);
782}
783
784/* Parse general panel options */
785static void
786parse_panel_options(struct drm_i915_private *i915,
787 struct intel_panel *panel)
788{
789 const struct bdb_lvds_options *lvds_options;
790 int panel_type = panel->vbt.panel_type;
791 int drrs_mode;
792
793 lvds_options = find_section(i915, BDB_LVDS_OPTIONS);
794 if (!lvds_options)
795 return;
796
797 panel->vbt.lvds_dither = lvds_options->pixel_dither;
798
799 /*
800 * Empirical evidence indicates the block size can be
801 * either 4,14,16,24+ bytes. For older VBTs no clear
802 * relationship between the block size vs. BDB version.
803 */
804 if (get_blocksize(lvds_options) < 16)
805 return;
806
807 drrs_mode = panel_bits(lvds_options->dps_panel_type_bits,
808 panel_type, 2);
809 /*
810 * VBT has static DRRS = 0 and seamless DRRS = 2.
811 * The below piece of code is required to adjust vbt.drrs_type
812 * to match the enum drrs_support_type.
813 */
814 switch (drrs_mode) {
815 case 0:
816 panel->vbt.drrs_type = DRRS_TYPE_STATIC;
817 drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n");
818 break;
819 case 2:
820 panel->vbt.drrs_type = DRRS_TYPE_SEAMLESS;
821 drm_dbg_kms(&i915->drm,
822 "DRRS supported mode is seamless\n");
823 break;
824 default:
825 panel->vbt.drrs_type = DRRS_TYPE_NONE;
826 drm_dbg_kms(&i915->drm,
827 "DRRS not supported (VBT input)\n");
828 break;
829 }
830}
831
832static void
833parse_lfp_panel_dtd(struct drm_i915_private *i915,
834 struct intel_panel *panel,
835 const struct bdb_lvds_lfp_data *lvds_lfp_data,
836 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs)
837{
838 const struct lvds_dvo_timing *panel_dvo_timing;
839 const struct lvds_fp_timing *fp_timing;
840 struct drm_display_mode *panel_fixed_mode;
841 int panel_type = panel->vbt.panel_type;
842
843 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
844 lvds_lfp_data_ptrs,
845 panel_type);
846
847 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
848 if (!panel_fixed_mode)
849 return;
850
851 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
852
853 panel->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
854
855 drm_dbg_kms(&i915->drm,
856 "Found panel mode in BIOS VBT legacy lfp table: " DRM_MODE_FMT "\n",
857 DRM_MODE_ARG(panel_fixed_mode));
858
859 fp_timing = get_lvds_fp_timing(lvds_lfp_data,
860 lvds_lfp_data_ptrs,
861 panel_type);
862
863 /* check the resolution, just to be sure */
864 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
865 fp_timing->y_res == panel_fixed_mode->vdisplay) {
866 panel->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
867 drm_dbg_kms(&i915->drm,
868 "VBT initial LVDS value %x\n",
869 panel->vbt.bios_lvds_val);
870 }
871}
872
873static void
874parse_lfp_data(struct drm_i915_private *i915,
875 struct intel_panel *panel)
876{
877 const struct bdb_lvds_lfp_data *data;
878 const struct bdb_lvds_lfp_data_tail *tail;
879 const struct bdb_lvds_lfp_data_ptrs *ptrs;
880 const struct lvds_pnp_id *pnp_id;
881 int panel_type = panel->vbt.panel_type;
882
883 ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
884 if (!ptrs)
885 return;
886
887 data = find_section(i915, BDB_LVDS_LFP_DATA);
888 if (!data)
889 return;
890
891 if (!panel->vbt.lfp_lvds_vbt_mode)
892 parse_lfp_panel_dtd(i915, panel, data, ptrs);
893
894 pnp_id = get_lvds_pnp_id(data, ptrs, panel_type);
895 dump_pnp_id(i915, pnp_id, "Panel");
896
897 tail = get_lfp_data_tail(data, ptrs);
898 if (!tail)
899 return;
900
901 drm_dbg_kms(&i915->drm, "Panel name: %.*s\n",
902 (int)sizeof(tail->panel_name[0].name),
903 tail->panel_name[panel_type].name);
904
905 if (i915->display.vbt.version >= 188) {
906 panel->vbt.seamless_drrs_min_refresh_rate =
907 tail->seamless_drrs_min_refresh_rate[panel_type];
908 drm_dbg_kms(&i915->drm,
909 "Seamless DRRS min refresh rate: %d Hz\n",
910 panel->vbt.seamless_drrs_min_refresh_rate);
911 }
912}
913
914static void
915parse_generic_dtd(struct drm_i915_private *i915,
916 struct intel_panel *panel)
917{
918 const struct bdb_generic_dtd *generic_dtd;
919 const struct generic_dtd_entry *dtd;
920 struct drm_display_mode *panel_fixed_mode;
921 int num_dtd;
922
923 /*
924 * Older VBTs provided DTD information for internal displays through
925 * the "LFP panel tables" block (42). As of VBT revision 229 the
926 * DTD information should be provided via a newer "generic DTD"
927 * block (58). Just to be safe, we'll try the new generic DTD block
928 * first on VBT >= 229, but still fall back to trying the old LFP
929 * block if that fails.
930 */
931 if (i915->display.vbt.version < 229)
932 return;
933
934 generic_dtd = find_section(i915, BDB_GENERIC_DTD);
935 if (!generic_dtd)
936 return;
937
938 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
939 drm_err(&i915->drm, "GDTD size %u is too small.\n",
940 generic_dtd->gdtd_size);
941 return;
942 } else if (generic_dtd->gdtd_size !=
943 sizeof(struct generic_dtd_entry)) {
944 drm_err(&i915->drm, "Unexpected GDTD size %u\n",
945 generic_dtd->gdtd_size);
946 /* DTD has unknown fields, but keep going */
947 }
948
949 num_dtd = (get_blocksize(generic_dtd) -
950 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
951 if (panel->vbt.panel_type >= num_dtd) {
952 drm_err(&i915->drm,
953 "Panel type %d not found in table of %d DTD's\n",
954 panel->vbt.panel_type, num_dtd);
955 return;
956 }
957
958 dtd = &generic_dtd->dtd[panel->vbt.panel_type];
959
960 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
961 if (!panel_fixed_mode)
962 return;
963
964 panel_fixed_mode->hdisplay = dtd->hactive;
965 panel_fixed_mode->hsync_start =
966 panel_fixed_mode->hdisplay + dtd->hfront_porch;
967 panel_fixed_mode->hsync_end =
968 panel_fixed_mode->hsync_start + dtd->hsync;
969 panel_fixed_mode->htotal =
970 panel_fixed_mode->hdisplay + dtd->hblank;
971
972 panel_fixed_mode->vdisplay = dtd->vactive;
973 panel_fixed_mode->vsync_start =
974 panel_fixed_mode->vdisplay + dtd->vfront_porch;
975 panel_fixed_mode->vsync_end =
976 panel_fixed_mode->vsync_start + dtd->vsync;
977 panel_fixed_mode->vtotal =
978 panel_fixed_mode->vdisplay + dtd->vblank;
979
980 panel_fixed_mode->clock = dtd->pixel_clock;
981 panel_fixed_mode->width_mm = dtd->width_mm;
982 panel_fixed_mode->height_mm = dtd->height_mm;
983
984 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
985 drm_mode_set_name(panel_fixed_mode);
986
987 if (dtd->hsync_positive_polarity)
988 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
989 else
990 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
991
992 if (dtd->vsync_positive_polarity)
993 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
994 else
995 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
996
997 drm_dbg_kms(&i915->drm,
998 "Found panel mode in BIOS VBT generic dtd table: " DRM_MODE_FMT "\n",
999 DRM_MODE_ARG(panel_fixed_mode));
1000
1001 panel->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
1002}
1003
1004static void
1005parse_lfp_backlight(struct drm_i915_private *i915,
1006 struct intel_panel *panel)
1007{
1008 const struct bdb_lfp_backlight_data *backlight_data;
1009 const struct lfp_backlight_data_entry *entry;
1010 int panel_type = panel->vbt.panel_type;
1011 u16 level;
1012
1013 backlight_data = find_section(i915, BDB_LVDS_BACKLIGHT);
1014 if (!backlight_data)
1015 return;
1016
1017 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
1018 drm_dbg_kms(&i915->drm,
1019 "Unsupported backlight data entry size %u\n",
1020 backlight_data->entry_size);
1021 return;
1022 }
1023
1024 entry = &backlight_data->data[panel_type];
1025
1026 panel->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
1027 if (!panel->vbt.backlight.present) {
1028 drm_dbg_kms(&i915->drm,
1029 "PWM backlight not present in VBT (type %u)\n",
1030 entry->type);
1031 return;
1032 }
1033
1034 panel->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
1035 if (i915->display.vbt.version >= 191) {
1036 size_t exp_size;
1037
1038 if (i915->display.vbt.version >= 236)
1039 exp_size = sizeof(struct bdb_lfp_backlight_data);
1040 else if (i915->display.vbt.version >= 234)
1041 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234;
1042 else
1043 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191;
1044
1045 if (get_blocksize(backlight_data) >= exp_size) {
1046 const struct lfp_backlight_control_method *method;
1047
1048 method = &backlight_data->backlight_control[panel_type];
1049 panel->vbt.backlight.type = method->type;
1050 panel->vbt.backlight.controller = method->controller;
1051 }
1052 }
1053
1054 panel->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
1055 panel->vbt.backlight.active_low_pwm = entry->active_low_pwm;
1056
1057 if (i915->display.vbt.version >= 234) {
1058 u16 min_level;
1059 bool scale;
1060
1061 level = backlight_data->brightness_level[panel_type].level;
1062 min_level = backlight_data->brightness_min_level[panel_type].level;
1063
1064 if (i915->display.vbt.version >= 236)
1065 scale = backlight_data->brightness_precision_bits[panel_type] == 16;
1066 else
1067 scale = level > 255;
1068
1069 if (scale)
1070 min_level = min_level / 255;
1071
1072 if (min_level > 255) {
1073 drm_warn(&i915->drm, "Brightness min level > 255\n");
1074 level = 255;
1075 }
1076 panel->vbt.backlight.min_brightness = min_level;
1077
1078 panel->vbt.backlight.brightness_precision_bits =
1079 backlight_data->brightness_precision_bits[panel_type];
1080 } else {
1081 level = backlight_data->level[panel_type];
1082 panel->vbt.backlight.min_brightness = entry->min_brightness;
1083 }
1084
1085 drm_dbg_kms(&i915->drm,
1086 "VBT backlight PWM modulation frequency %u Hz, "
1087 "active %s, min brightness %u, level %u, controller %u\n",
1088 panel->vbt.backlight.pwm_freq_hz,
1089 panel->vbt.backlight.active_low_pwm ? "low" : "high",
1090 panel->vbt.backlight.min_brightness,
1091 level,
1092 panel->vbt.backlight.controller);
1093}
1094
1095/* Try to find sdvo panel data */
1096static void
1097parse_sdvo_panel_data(struct drm_i915_private *i915,
1098 struct intel_panel *panel)
1099{
1100 const struct bdb_sdvo_panel_dtds *dtds;
1101 struct drm_display_mode *panel_fixed_mode;
1102 int index;
1103
1104 index = i915->params.vbt_sdvo_panel_type;
1105 if (index == -2) {
1106 drm_dbg_kms(&i915->drm,
1107 "Ignore SDVO panel mode from BIOS VBT tables.\n");
1108 return;
1109 }
1110
1111 if (index == -1) {
1112 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
1113
1114 sdvo_lvds_options = find_section(i915, BDB_SDVO_LVDS_OPTIONS);
1115 if (!sdvo_lvds_options)
1116 return;
1117
1118 index = sdvo_lvds_options->panel_type;
1119 }
1120
1121 dtds = find_section(i915, BDB_SDVO_PANEL_DTDS);
1122 if (!dtds)
1123 return;
1124
1125 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
1126 if (!panel_fixed_mode)
1127 return;
1128
1129 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]);
1130
1131 panel->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
1132
1133 drm_dbg_kms(&i915->drm,
1134 "Found SDVO panel mode in BIOS VBT tables: " DRM_MODE_FMT "\n",
1135 DRM_MODE_ARG(panel_fixed_mode));
1136}
1137
1138static int intel_bios_ssc_frequency(struct drm_i915_private *i915,
1139 bool alternate)
1140{
1141 switch (DISPLAY_VER(i915)) {
1142 case 2:
1143 return alternate ? 66667 : 48000;
1144 case 3:
1145 case 4:
1146 return alternate ? 100000 : 96000;
1147 default:
1148 return alternate ? 100000 : 120000;
1149 }
1150}
1151
1152static void
1153parse_general_features(struct drm_i915_private *i915)
1154{
1155 const struct bdb_general_features *general;
1156
1157 general = find_section(i915, BDB_GENERAL_FEATURES);
1158 if (!general)
1159 return;
1160
1161 i915->display.vbt.int_tv_support = general->int_tv_support;
1162 /* int_crt_support can't be trusted on earlier platforms */
1163 if (i915->display.vbt.version >= 155 &&
1164 (HAS_DDI(i915) || IS_VALLEYVIEW(i915)))
1165 i915->display.vbt.int_crt_support = general->int_crt_support;
1166 i915->display.vbt.lvds_use_ssc = general->enable_ssc;
1167 i915->display.vbt.lvds_ssc_freq =
1168 intel_bios_ssc_frequency(i915, general->ssc_freq);
1169 i915->display.vbt.display_clock_mode = general->display_clock_mode;
1170 i915->display.vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
1171 if (i915->display.vbt.version >= 181) {
1172 i915->display.vbt.orientation = general->rotate_180 ?
1173 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
1174 DRM_MODE_PANEL_ORIENTATION_NORMAL;
1175 } else {
1176 i915->display.vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1177 }
1178
1179 if (i915->display.vbt.version >= 249 && general->afc_startup_config) {
1180 i915->display.vbt.override_afc_startup = true;
1181 i915->display.vbt.override_afc_startup_val = general->afc_startup_config == 0x1 ? 0x0 : 0x7;
1182 }
1183
1184 drm_dbg_kms(&i915->drm,
1185 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
1186 i915->display.vbt.int_tv_support,
1187 i915->display.vbt.int_crt_support,
1188 i915->display.vbt.lvds_use_ssc,
1189 i915->display.vbt.lvds_ssc_freq,
1190 i915->display.vbt.display_clock_mode,
1191 i915->display.vbt.fdi_rx_polarity_inverted);
1192}
1193
1194static const struct child_device_config *
1195child_device_ptr(const struct bdb_general_definitions *defs, int i)
1196{
1197 return (const void *) &defs->devices[i * defs->child_dev_size];
1198}
1199
1200static void
1201parse_sdvo_device_mapping(struct drm_i915_private *i915)
1202{
1203 struct sdvo_device_mapping *mapping;
1204 const struct intel_bios_encoder_data *devdata;
1205 const struct child_device_config *child;
1206 int count = 0;
1207
1208 /*
1209 * Only parse SDVO mappings on gens that could have SDVO. This isn't
1210 * accurate and doesn't have to be, as long as it's not too strict.
1211 */
1212 if (!IS_DISPLAY_VER(i915, 3, 7)) {
1213 drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n");
1214 return;
1215 }
1216
1217 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
1218 child = &devdata->child;
1219
1220 if (child->slave_addr != SLAVE_ADDR1 &&
1221 child->slave_addr != SLAVE_ADDR2) {
1222 /*
1223 * If the slave address is neither 0x70 nor 0x72,
1224 * it is not a SDVO device. Skip it.
1225 */
1226 continue;
1227 }
1228 if (child->dvo_port != DEVICE_PORT_DVOB &&
1229 child->dvo_port != DEVICE_PORT_DVOC) {
1230 /* skip the incorrect SDVO port */
1231 drm_dbg_kms(&i915->drm,
1232 "Incorrect SDVO port. Skip it\n");
1233 continue;
1234 }
1235 drm_dbg_kms(&i915->drm,
1236 "the SDVO device with slave addr %2x is found on"
1237 " %s port\n",
1238 child->slave_addr,
1239 (child->dvo_port == DEVICE_PORT_DVOB) ?
1240 "SDVOB" : "SDVOC");
1241 mapping = &i915->display.vbt.sdvo_mappings[child->dvo_port - 1];
1242 if (!mapping->initialized) {
1243 mapping->dvo_port = child->dvo_port;
1244 mapping->slave_addr = child->slave_addr;
1245 mapping->dvo_wiring = child->dvo_wiring;
1246 mapping->ddc_pin = child->ddc_pin;
1247 mapping->i2c_pin = child->i2c_pin;
1248 mapping->initialized = 1;
1249 drm_dbg_kms(&i915->drm,
1250 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
1251 mapping->dvo_port, mapping->slave_addr,
1252 mapping->dvo_wiring, mapping->ddc_pin,
1253 mapping->i2c_pin);
1254 } else {
1255 drm_dbg_kms(&i915->drm,
1256 "Maybe one SDVO port is shared by "
1257 "two SDVO device.\n");
1258 }
1259 if (child->slave2_addr) {
1260 /* Maybe this is a SDVO device with multiple inputs */
1261 /* And the mapping info is not added */
1262 drm_dbg_kms(&i915->drm,
1263 "there exists the slave2_addr. Maybe this"
1264 " is a SDVO device with multiple inputs.\n");
1265 }
1266 count++;
1267 }
1268
1269 if (!count) {
1270 /* No SDVO device info is found */
1271 drm_dbg_kms(&i915->drm,
1272 "No SDVO device info is found in VBT\n");
1273 }
1274}
1275
1276static void
1277parse_driver_features(struct drm_i915_private *i915)
1278{
1279 const struct bdb_driver_features *driver;
1280
1281 driver = find_section(i915, BDB_DRIVER_FEATURES);
1282 if (!driver)
1283 return;
1284
1285 if (DISPLAY_VER(i915) >= 5) {
1286 /*
1287 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
1288 * to mean "eDP". The VBT spec doesn't agree with that
1289 * interpretation, but real world VBTs seem to.
1290 */
1291 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
1292 i915->display.vbt.int_lvds_support = 0;
1293 } else {
1294 /*
1295 * FIXME it's not clear which BDB version has the LVDS config
1296 * bits defined. Revision history in the VBT spec says:
1297 * "0.92 | Add two definitions for VBT value of LVDS Active
1298 * Config (00b and 11b values defined) | 06/13/2005"
1299 * but does not the specify the BDB version.
1300 *
1301 * So far version 134 (on i945gm) is the oldest VBT observed
1302 * in the wild with the bits correctly populated. Version
1303 * 108 (on i85x) does not have the bits correctly populated.
1304 */
1305 if (i915->display.vbt.version >= 134 &&
1306 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
1307 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
1308 i915->display.vbt.int_lvds_support = 0;
1309 }
1310}
1311
1312static void
1313parse_panel_driver_features(struct drm_i915_private *i915,
1314 struct intel_panel *panel)
1315{
1316 const struct bdb_driver_features *driver;
1317
1318 driver = find_section(i915, BDB_DRIVER_FEATURES);
1319 if (!driver)
1320 return;
1321
1322 if (i915->display.vbt.version < 228) {
1323 drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n",
1324 driver->drrs_enabled);
1325 /*
1326 * If DRRS is not supported, drrs_type has to be set to 0.
1327 * This is because, VBT is configured in such a way that
1328 * static DRRS is 0 and DRRS not supported is represented by
1329 * driver->drrs_enabled=false
1330 */
1331 if (!driver->drrs_enabled && panel->vbt.drrs_type != DRRS_TYPE_NONE) {
1332 /*
1333 * FIXME Should DMRRS perhaps be treated as seamless
1334 * but without the automatic downclocking?
1335 */
1336 if (driver->dmrrs_enabled)
1337 panel->vbt.drrs_type = DRRS_TYPE_STATIC;
1338 else
1339 panel->vbt.drrs_type = DRRS_TYPE_NONE;
1340 }
1341
1342 panel->vbt.psr.enable = driver->psr_enabled;
1343 }
1344}
1345
1346static void
1347parse_power_conservation_features(struct drm_i915_private *i915,
1348 struct intel_panel *panel)
1349{
1350 const struct bdb_lfp_power *power;
1351 u8 panel_type = panel->vbt.panel_type;
1352
1353 panel->vbt.vrr = true; /* matches Windows behaviour */
1354
1355 if (i915->display.vbt.version < 228)
1356 return;
1357
1358 power = find_section(i915, BDB_LFP_POWER);
1359 if (!power)
1360 return;
1361
1362 panel->vbt.psr.enable = panel_bool(power->psr, panel_type);
1363
1364 /*
1365 * If DRRS is not supported, drrs_type has to be set to 0.
1366 * This is because, VBT is configured in such a way that
1367 * static DRRS is 0 and DRRS not supported is represented by
1368 * power->drrs & BIT(panel_type)=false
1369 */
1370 if (!panel_bool(power->drrs, panel_type) && panel->vbt.drrs_type != DRRS_TYPE_NONE) {
1371 /*
1372 * FIXME Should DMRRS perhaps be treated as seamless
1373 * but without the automatic downclocking?
1374 */
1375 if (panel_bool(power->dmrrs, panel_type))
1376 panel->vbt.drrs_type = DRRS_TYPE_STATIC;
1377 else
1378 panel->vbt.drrs_type = DRRS_TYPE_NONE;
1379 }
1380
1381 if (i915->display.vbt.version >= 232)
1382 panel->vbt.edp.hobl = panel_bool(power->hobl, panel_type);
1383
1384 if (i915->display.vbt.version >= 233)
1385 panel->vbt.vrr = panel_bool(power->vrr_feature_enabled,
1386 panel_type);
1387}
1388
1389static void
1390parse_edp(struct drm_i915_private *i915,
1391 struct intel_panel *panel)
1392{
1393 const struct bdb_edp *edp;
1394 const struct edp_power_seq *edp_pps;
1395 const struct edp_fast_link_params *edp_link_params;
1396 int panel_type = panel->vbt.panel_type;
1397
1398 edp = find_section(i915, BDB_EDP);
1399 if (!edp)
1400 return;
1401
1402 switch (panel_bits(edp->color_depth, panel_type, 2)) {
1403 case EDP_18BPP:
1404 panel->vbt.edp.bpp = 18;
1405 break;
1406 case EDP_24BPP:
1407 panel->vbt.edp.bpp = 24;
1408 break;
1409 case EDP_30BPP:
1410 panel->vbt.edp.bpp = 30;
1411 break;
1412 }
1413
1414 /* Get the eDP sequencing and link info */
1415 edp_pps = &edp->power_seqs[panel_type];
1416 edp_link_params = &edp->fast_link_params[panel_type];
1417
1418 panel->vbt.edp.pps = *edp_pps;
1419
1420 if (i915->display.vbt.version >= 224) {
1421 panel->vbt.edp.rate =
1422 edp->edp_fast_link_training_rate[panel_type] * 20;
1423 } else {
1424 switch (edp_link_params->rate) {
1425 case EDP_RATE_1_62:
1426 panel->vbt.edp.rate = 162000;
1427 break;
1428 case EDP_RATE_2_7:
1429 panel->vbt.edp.rate = 270000;
1430 break;
1431 case EDP_RATE_5_4:
1432 panel->vbt.edp.rate = 540000;
1433 break;
1434 default:
1435 drm_dbg_kms(&i915->drm,
1436 "VBT has unknown eDP link rate value %u\n",
1437 edp_link_params->rate);
1438 break;
1439 }
1440 }
1441
1442 switch (edp_link_params->lanes) {
1443 case EDP_LANE_1:
1444 panel->vbt.edp.lanes = 1;
1445 break;
1446 case EDP_LANE_2:
1447 panel->vbt.edp.lanes = 2;
1448 break;
1449 case EDP_LANE_4:
1450 panel->vbt.edp.lanes = 4;
1451 break;
1452 default:
1453 drm_dbg_kms(&i915->drm,
1454 "VBT has unknown eDP lane count value %u\n",
1455 edp_link_params->lanes);
1456 break;
1457 }
1458
1459 switch (edp_link_params->preemphasis) {
1460 case EDP_PREEMPHASIS_NONE:
1461 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
1462 break;
1463 case EDP_PREEMPHASIS_3_5dB:
1464 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
1465 break;
1466 case EDP_PREEMPHASIS_6dB:
1467 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
1468 break;
1469 case EDP_PREEMPHASIS_9_5dB:
1470 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
1471 break;
1472 default:
1473 drm_dbg_kms(&i915->drm,
1474 "VBT has unknown eDP pre-emphasis value %u\n",
1475 edp_link_params->preemphasis);
1476 break;
1477 }
1478
1479 switch (edp_link_params->vswing) {
1480 case EDP_VSWING_0_4V:
1481 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
1482 break;
1483 case EDP_VSWING_0_6V:
1484 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
1485 break;
1486 case EDP_VSWING_0_8V:
1487 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
1488 break;
1489 case EDP_VSWING_1_2V:
1490 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
1491 break;
1492 default:
1493 drm_dbg_kms(&i915->drm,
1494 "VBT has unknown eDP voltage swing value %u\n",
1495 edp_link_params->vswing);
1496 break;
1497 }
1498
1499 if (i915->display.vbt.version >= 173) {
1500 u8 vswing;
1501
1502 /* Don't read from VBT if module parameter has valid value*/
1503 if (i915->params.edp_vswing) {
1504 panel->vbt.edp.low_vswing =
1505 i915->params.edp_vswing == 1;
1506 } else {
1507 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
1508 panel->vbt.edp.low_vswing = vswing == 0;
1509 }
1510 }
1511
1512 panel->vbt.edp.drrs_msa_timing_delay =
1513 panel_bits(edp->sdrrs_msa_timing_delay, panel_type, 2);
1514
1515 if (i915->display.vbt.version >= 244)
1516 panel->vbt.edp.max_link_rate =
1517 edp->edp_max_port_link_rate[panel_type] * 20;
1518}
1519
1520static void
1521parse_psr(struct drm_i915_private *i915,
1522 struct intel_panel *panel)
1523{
1524 const struct bdb_psr *psr;
1525 const struct psr_table *psr_table;
1526 int panel_type = panel->vbt.panel_type;
1527
1528 psr = find_section(i915, BDB_PSR);
1529 if (!psr) {
1530 drm_dbg_kms(&i915->drm, "No PSR BDB found.\n");
1531 return;
1532 }
1533
1534 psr_table = &psr->psr_table[panel_type];
1535
1536 panel->vbt.psr.full_link = psr_table->full_link;
1537 panel->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
1538
1539 /* Allowed VBT values goes from 0 to 15 */
1540 panel->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
1541 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
1542
1543 /*
1544 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
1545 * Old decimal value is wake up time in multiples of 100 us.
1546 */
1547 if (i915->display.vbt.version >= 205 &&
1548 (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) {
1549 switch (psr_table->tp1_wakeup_time) {
1550 case 0:
1551 panel->vbt.psr.tp1_wakeup_time_us = 500;
1552 break;
1553 case 1:
1554 panel->vbt.psr.tp1_wakeup_time_us = 100;
1555 break;
1556 case 3:
1557 panel->vbt.psr.tp1_wakeup_time_us = 0;
1558 break;
1559 default:
1560 drm_dbg_kms(&i915->drm,
1561 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1562 psr_table->tp1_wakeup_time);
1563 fallthrough;
1564 case 2:
1565 panel->vbt.psr.tp1_wakeup_time_us = 2500;
1566 break;
1567 }
1568
1569 switch (psr_table->tp2_tp3_wakeup_time) {
1570 case 0:
1571 panel->vbt.psr.tp2_tp3_wakeup_time_us = 500;
1572 break;
1573 case 1:
1574 panel->vbt.psr.tp2_tp3_wakeup_time_us = 100;
1575 break;
1576 case 3:
1577 panel->vbt.psr.tp2_tp3_wakeup_time_us = 0;
1578 break;
1579 default:
1580 drm_dbg_kms(&i915->drm,
1581 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1582 psr_table->tp2_tp3_wakeup_time);
1583 fallthrough;
1584 case 2:
1585 panel->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
1586 break;
1587 }
1588 } else {
1589 panel->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
1590 panel->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
1591 }
1592
1593 if (i915->display.vbt.version >= 226) {
1594 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
1595
1596 wakeup_time = panel_bits(wakeup_time, panel_type, 2);
1597 switch (wakeup_time) {
1598 case 0:
1599 wakeup_time = 500;
1600 break;
1601 case 1:
1602 wakeup_time = 100;
1603 break;
1604 case 3:
1605 wakeup_time = 50;
1606 break;
1607 default:
1608 case 2:
1609 wakeup_time = 2500;
1610 break;
1611 }
1612 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
1613 } else {
1614 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */
1615 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = panel->vbt.psr.tp2_tp3_wakeup_time_us;
1616 }
1617}
1618
1619static void parse_dsi_backlight_ports(struct drm_i915_private *i915,
1620 struct intel_panel *panel,
1621 enum port port)
1622{
1623 enum port port_bc = DISPLAY_VER(i915) >= 11 ? PORT_B : PORT_C;
1624
1625 if (!panel->vbt.dsi.config->dual_link || i915->display.vbt.version < 197) {
1626 panel->vbt.dsi.bl_ports = BIT(port);
1627 if (panel->vbt.dsi.config->cabc_supported)
1628 panel->vbt.dsi.cabc_ports = BIT(port);
1629
1630 return;
1631 }
1632
1633 switch (panel->vbt.dsi.config->dl_dcs_backlight_ports) {
1634 case DL_DCS_PORT_A:
1635 panel->vbt.dsi.bl_ports = BIT(PORT_A);
1636 break;
1637 case DL_DCS_PORT_C:
1638 panel->vbt.dsi.bl_ports = BIT(port_bc);
1639 break;
1640 default:
1641 case DL_DCS_PORT_A_AND_C:
1642 panel->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(port_bc);
1643 break;
1644 }
1645
1646 if (!panel->vbt.dsi.config->cabc_supported)
1647 return;
1648
1649 switch (panel->vbt.dsi.config->dl_dcs_cabc_ports) {
1650 case DL_DCS_PORT_A:
1651 panel->vbt.dsi.cabc_ports = BIT(PORT_A);
1652 break;
1653 case DL_DCS_PORT_C:
1654 panel->vbt.dsi.cabc_ports = BIT(port_bc);
1655 break;
1656 default:
1657 case DL_DCS_PORT_A_AND_C:
1658 panel->vbt.dsi.cabc_ports =
1659 BIT(PORT_A) | BIT(port_bc);
1660 break;
1661 }
1662}
1663
1664static void
1665parse_mipi_config(struct drm_i915_private *i915,
1666 struct intel_panel *panel)
1667{
1668 const struct bdb_mipi_config *start;
1669 const struct mipi_config *config;
1670 const struct mipi_pps_data *pps;
1671 int panel_type = panel->vbt.panel_type;
1672 enum port port;
1673
1674 /* parse MIPI blocks only if LFP type is MIPI */
1675 if (!intel_bios_is_dsi_present(i915, &port))
1676 return;
1677
1678 /* Initialize this to undefined indicating no generic MIPI support */
1679 panel->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1680
1681 /* Block #40 is already parsed and panel_fixed_mode is
1682 * stored in i915->lfp_lvds_vbt_mode
1683 * resuse this when needed
1684 */
1685
1686 /* Parse #52 for panel index used from panel_type already
1687 * parsed
1688 */
1689 start = find_section(i915, BDB_MIPI_CONFIG);
1690 if (!start) {
1691 drm_dbg_kms(&i915->drm, "No MIPI config BDB found");
1692 return;
1693 }
1694
1695 drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n",
1696 panel_type);
1697
1698 /*
1699 * get hold of the correct configuration block and pps data as per
1700 * the panel_type as index
1701 */
1702 config = &start->config[panel_type];
1703 pps = &start->pps[panel_type];
1704
1705 /* store as of now full data. Trim when we realise all is not needed */
1706 panel->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1707 if (!panel->vbt.dsi.config)
1708 return;
1709
1710 panel->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1711 if (!panel->vbt.dsi.pps) {
1712 kfree(panel->vbt.dsi.config);
1713 return;
1714 }
1715
1716 parse_dsi_backlight_ports(i915, panel, port);
1717
1718 /* FIXME is the 90 vs. 270 correct? */
1719 switch (config->rotation) {
1720 case ENABLE_ROTATION_0:
1721 /*
1722 * Most (all?) VBTs claim 0 degrees despite having
1723 * an upside down panel, thus we do not trust this.
1724 */
1725 panel->vbt.dsi.orientation =
1726 DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1727 break;
1728 case ENABLE_ROTATION_90:
1729 panel->vbt.dsi.orientation =
1730 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1731 break;
1732 case ENABLE_ROTATION_180:
1733 panel->vbt.dsi.orientation =
1734 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1735 break;
1736 case ENABLE_ROTATION_270:
1737 panel->vbt.dsi.orientation =
1738 DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1739 break;
1740 }
1741
1742 /* We have mandatory mipi config blocks. Initialize as generic panel */
1743 panel->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1744}
1745
1746/* Find the sequence block and size for the given panel. */
1747static const u8 *
1748find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
1749 u16 panel_id, u32 *seq_size)
1750{
1751 u32 total = get_blocksize(sequence);
1752 const u8 *data = &sequence->data[0];
1753 u8 current_id;
1754 u32 current_size;
1755 int header_size = sequence->version >= 3 ? 5 : 3;
1756 int index = 0;
1757 int i;
1758
1759 /* skip new block size */
1760 if (sequence->version >= 3)
1761 data += 4;
1762
1763 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1764 if (index + header_size > total) {
1765 DRM_ERROR("Invalid sequence block (header)\n");
1766 return NULL;
1767 }
1768
1769 current_id = *(data + index);
1770 if (sequence->version >= 3)
1771 current_size = *((const u32 *)(data + index + 1));
1772 else
1773 current_size = *((const u16 *)(data + index + 1));
1774
1775 index += header_size;
1776
1777 if (index + current_size > total) {
1778 DRM_ERROR("Invalid sequence block\n");
1779 return NULL;
1780 }
1781
1782 if (current_id == panel_id) {
1783 *seq_size = current_size;
1784 return data + index;
1785 }
1786
1787 index += current_size;
1788 }
1789
1790 DRM_ERROR("Sequence block detected but no valid configuration\n");
1791
1792 return NULL;
1793}
1794
1795static int goto_next_sequence(const u8 *data, int index, int total)
1796{
1797 u16 len;
1798
1799 /* Skip Sequence Byte. */
1800 for (index = index + 1; index < total; index += len) {
1801 u8 operation_byte = *(data + index);
1802 index++;
1803
1804 switch (operation_byte) {
1805 case MIPI_SEQ_ELEM_END:
1806 return index;
1807 case MIPI_SEQ_ELEM_SEND_PKT:
1808 if (index + 4 > total)
1809 return 0;
1810
1811 len = *((const u16 *)(data + index + 2)) + 4;
1812 break;
1813 case MIPI_SEQ_ELEM_DELAY:
1814 len = 4;
1815 break;
1816 case MIPI_SEQ_ELEM_GPIO:
1817 len = 2;
1818 break;
1819 case MIPI_SEQ_ELEM_I2C:
1820 if (index + 7 > total)
1821 return 0;
1822 len = *(data + index + 6) + 7;
1823 break;
1824 default:
1825 DRM_ERROR("Unknown operation byte\n");
1826 return 0;
1827 }
1828 }
1829
1830 return 0;
1831}
1832
1833static int goto_next_sequence_v3(const u8 *data, int index, int total)
1834{
1835 int seq_end;
1836 u16 len;
1837 u32 size_of_sequence;
1838
1839 /*
1840 * Could skip sequence based on Size of Sequence alone, but also do some
1841 * checking on the structure.
1842 */
1843 if (total < 5) {
1844 DRM_ERROR("Too small sequence size\n");
1845 return 0;
1846 }
1847
1848 /* Skip Sequence Byte. */
1849 index++;
1850
1851 /*
1852 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1853 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1854 * byte.
1855 */
1856 size_of_sequence = *((const u32 *)(data + index));
1857 index += 4;
1858
1859 seq_end = index + size_of_sequence;
1860 if (seq_end > total) {
1861 DRM_ERROR("Invalid sequence size\n");
1862 return 0;
1863 }
1864
1865 for (; index < total; index += len) {
1866 u8 operation_byte = *(data + index);
1867 index++;
1868
1869 if (operation_byte == MIPI_SEQ_ELEM_END) {
1870 if (index != seq_end) {
1871 DRM_ERROR("Invalid element structure\n");
1872 return 0;
1873 }
1874 return index;
1875 }
1876
1877 len = *(data + index);
1878 index++;
1879
1880 /*
1881 * FIXME: Would be nice to check elements like for v1/v2 in
1882 * goto_next_sequence() above.
1883 */
1884 switch (operation_byte) {
1885 case MIPI_SEQ_ELEM_SEND_PKT:
1886 case MIPI_SEQ_ELEM_DELAY:
1887 case MIPI_SEQ_ELEM_GPIO:
1888 case MIPI_SEQ_ELEM_I2C:
1889 case MIPI_SEQ_ELEM_SPI:
1890 case MIPI_SEQ_ELEM_PMIC:
1891 break;
1892 default:
1893 DRM_ERROR("Unknown operation byte %u\n",
1894 operation_byte);
1895 break;
1896 }
1897 }
1898
1899 return 0;
1900}
1901
1902/*
1903 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1904 * skip all delay + gpio operands and stop at the first DSI packet op.
1905 */
1906static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915,
1907 struct intel_panel *panel)
1908{
1909 const u8 *data = panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1910 int index, len;
1911
1912 if (drm_WARN_ON(&i915->drm,
1913 !data || panel->vbt.dsi.seq_version != 1))
1914 return 0;
1915
1916 /* index = 1 to skip sequence byte */
1917 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1918 switch (data[index]) {
1919 case MIPI_SEQ_ELEM_SEND_PKT:
1920 return index == 1 ? 0 : index;
1921 case MIPI_SEQ_ELEM_DELAY:
1922 len = 5; /* 1 byte for operand + uint32 */
1923 break;
1924 case MIPI_SEQ_ELEM_GPIO:
1925 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1926 break;
1927 default:
1928 return 0;
1929 }
1930 }
1931
1932 return 0;
1933}
1934
1935/*
1936 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1937 * The deassert must be done before calling intel_dsi_device_ready, so for
1938 * these devices we split the init OTP sequence into a deassert sequence and
1939 * the actual init OTP part.
1940 */
1941static void fixup_mipi_sequences(struct drm_i915_private *i915,
1942 struct intel_panel *panel)
1943{
1944 u8 *init_otp;
1945 int len;
1946
1947 /* Limit this to VLV for now. */
1948 if (!IS_VALLEYVIEW(i915))
1949 return;
1950
1951 /* Limit this to v1 vid-mode sequences */
1952 if (panel->vbt.dsi.config->is_cmd_mode ||
1953 panel->vbt.dsi.seq_version != 1)
1954 return;
1955
1956 /* Only do this if there are otp and assert seqs and no deassert seq */
1957 if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1958 !panel->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1959 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1960 return;
1961
1962 /* The deassert-sequence ends at the first DSI packet */
1963 len = get_init_otp_deassert_fragment_len(i915, panel);
1964 if (!len)
1965 return;
1966
1967 drm_dbg_kms(&i915->drm,
1968 "Using init OTP fragment to deassert reset\n");
1969
1970 /* Copy the fragment, update seq byte and terminate it */
1971 init_otp = (u8 *)panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1972 panel->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1973 if (!panel->vbt.dsi.deassert_seq)
1974 return;
1975 panel->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1976 panel->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1977 /* Use the copy for deassert */
1978 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1979 panel->vbt.dsi.deassert_seq;
1980 /* Replace the last byte of the fragment with init OTP seq byte */
1981 init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1982 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1983 panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1984}
1985
1986static void
1987parse_mipi_sequence(struct drm_i915_private *i915,
1988 struct intel_panel *panel)
1989{
1990 int panel_type = panel->vbt.panel_type;
1991 const struct bdb_mipi_sequence *sequence;
1992 const u8 *seq_data;
1993 u32 seq_size;
1994 u8 *data;
1995 int index = 0;
1996
1997 /* Only our generic panel driver uses the sequence block. */
1998 if (panel->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
1999 return;
2000
2001 sequence = find_section(i915, BDB_MIPI_SEQUENCE);
2002 if (!sequence) {
2003 drm_dbg_kms(&i915->drm,
2004 "No MIPI Sequence found, parsing complete\n");
2005 return;
2006 }
2007
2008 /* Fail gracefully for forward incompatible sequence block. */
2009 if (sequence->version >= 4) {
2010 drm_err(&i915->drm,
2011 "Unable to parse MIPI Sequence Block v%u\n",
2012 sequence->version);
2013 return;
2014 }
2015
2016 drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n",
2017 sequence->version);
2018
2019 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
2020 if (!seq_data)
2021 return;
2022
2023 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
2024 if (!data)
2025 return;
2026
2027 /* Parse the sequences, store pointers to each sequence. */
2028 for (;;) {
2029 u8 seq_id = *(data + index);
2030 if (seq_id == MIPI_SEQ_END)
2031 break;
2032
2033 if (seq_id >= MIPI_SEQ_MAX) {
2034 drm_err(&i915->drm, "Unknown sequence %u\n",
2035 seq_id);
2036 goto err;
2037 }
2038
2039 /* Log about presence of sequences we won't run. */
2040 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
2041 drm_dbg_kms(&i915->drm,
2042 "Unsupported sequence %u\n", seq_id);
2043
2044 panel->vbt.dsi.sequence[seq_id] = data + index;
2045
2046 if (sequence->version >= 3)
2047 index = goto_next_sequence_v3(data, index, seq_size);
2048 else
2049 index = goto_next_sequence(data, index, seq_size);
2050 if (!index) {
2051 drm_err(&i915->drm, "Invalid sequence %u\n",
2052 seq_id);
2053 goto err;
2054 }
2055 }
2056
2057 panel->vbt.dsi.data = data;
2058 panel->vbt.dsi.size = seq_size;
2059 panel->vbt.dsi.seq_version = sequence->version;
2060
2061 fixup_mipi_sequences(i915, panel);
2062
2063 drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n");
2064 return;
2065
2066err:
2067 kfree(data);
2068 memset(panel->vbt.dsi.sequence, 0, sizeof(panel->vbt.dsi.sequence));
2069}
2070
2071static void
2072parse_compression_parameters(struct drm_i915_private *i915)
2073{
2074 const struct bdb_compression_parameters *params;
2075 struct intel_bios_encoder_data *devdata;
2076 const struct child_device_config *child;
2077 u16 block_size;
2078 int index;
2079
2080 if (i915->display.vbt.version < 198)
2081 return;
2082
2083 params = find_section(i915, BDB_COMPRESSION_PARAMETERS);
2084 if (params) {
2085 /* Sanity checks */
2086 if (params->entry_size != sizeof(params->data[0])) {
2087 drm_dbg_kms(&i915->drm,
2088 "VBT: unsupported compression param entry size\n");
2089 return;
2090 }
2091
2092 block_size = get_blocksize(params);
2093 if (block_size < sizeof(*params)) {
2094 drm_dbg_kms(&i915->drm,
2095 "VBT: expected 16 compression param entries\n");
2096 return;
2097 }
2098 }
2099
2100 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
2101 child = &devdata->child;
2102
2103 if (!child->compression_enable)
2104 continue;
2105
2106 if (!params) {
2107 drm_dbg_kms(&i915->drm,
2108 "VBT: compression params not available\n");
2109 continue;
2110 }
2111
2112 if (child->compression_method_cps) {
2113 drm_dbg_kms(&i915->drm,
2114 "VBT: CPS compression not supported\n");
2115 continue;
2116 }
2117
2118 index = child->compression_structure_index;
2119
2120 devdata->dsc = kmemdup(¶ms->data[index],
2121 sizeof(*devdata->dsc), GFP_KERNEL);
2122 }
2123}
2124
2125static u8 translate_iboost(u8 val)
2126{
2127 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
2128
2129 if (val >= ARRAY_SIZE(mapping)) {
2130 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
2131 return 0;
2132 }
2133 return mapping[val];
2134}
2135
2136static const u8 cnp_ddc_pin_map[] = {
2137 [0] = 0, /* N/A */
2138 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
2139 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
2140 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
2141 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
2142};
2143
2144static const u8 icp_ddc_pin_map[] = {
2145 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
2146 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
2147 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
2148 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
2149 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
2150 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
2151 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
2152 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
2153 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
2154};
2155
2156static const u8 rkl_pch_tgp_ddc_pin_map[] = {
2157 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
2158 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
2159 [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP,
2160 [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP,
2161};
2162
2163static const u8 adls_ddc_pin_map[] = {
2164 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
2165 [ADLS_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
2166 [ADLS_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
2167 [ADLS_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
2168 [ADLS_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
2169};
2170
2171static const u8 gen9bc_tgp_ddc_pin_map[] = {
2172 [DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
2173 [DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP,
2174 [DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP,
2175};
2176
2177static const u8 adlp_ddc_pin_map[] = {
2178 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
2179 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
2180 [ADLP_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
2181 [ADLP_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
2182 [ADLP_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
2183 [ADLP_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
2184};
2185
2186static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
2187{
2188 const u8 *ddc_pin_map;
2189 int n_entries;
2190
2191 if (HAS_PCH_MTP(i915) || IS_ALDERLAKE_P(i915)) {
2192 ddc_pin_map = adlp_ddc_pin_map;
2193 n_entries = ARRAY_SIZE(adlp_ddc_pin_map);
2194 } else if (IS_ALDERLAKE_S(i915)) {
2195 ddc_pin_map = adls_ddc_pin_map;
2196 n_entries = ARRAY_SIZE(adls_ddc_pin_map);
2197 } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
2198 return vbt_pin;
2199 } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
2200 ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
2201 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
2202 } else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) {
2203 ddc_pin_map = gen9bc_tgp_ddc_pin_map;
2204 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
2205 } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
2206 ddc_pin_map = icp_ddc_pin_map;
2207 n_entries = ARRAY_SIZE(icp_ddc_pin_map);
2208 } else if (HAS_PCH_CNP(i915)) {
2209 ddc_pin_map = cnp_ddc_pin_map;
2210 n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
2211 } else {
2212 /* Assuming direct map */
2213 return vbt_pin;
2214 }
2215
2216 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
2217 return ddc_pin_map[vbt_pin];
2218
2219 drm_dbg_kms(&i915->drm,
2220 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
2221 vbt_pin);
2222 return 0;
2223}
2224
2225static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
2226{
2227 const struct intel_bios_encoder_data *devdata;
2228 enum port port;
2229
2230 if (!ddc_pin)
2231 return PORT_NONE;
2232
2233 for_each_port(port) {
2234 devdata = i915->display.vbt.ports[port];
2235
2236 if (devdata && ddc_pin == devdata->child.ddc_pin)
2237 return port;
2238 }
2239
2240 return PORT_NONE;
2241}
2242
2243static void sanitize_ddc_pin(struct intel_bios_encoder_data *devdata,
2244 enum port port)
2245{
2246 struct drm_i915_private *i915 = devdata->i915;
2247 struct child_device_config *child;
2248 u8 mapped_ddc_pin;
2249 enum port p;
2250
2251 if (!devdata->child.ddc_pin)
2252 return;
2253
2254 mapped_ddc_pin = map_ddc_pin(i915, devdata->child.ddc_pin);
2255 if (!intel_gmbus_is_valid_pin(i915, mapped_ddc_pin)) {
2256 drm_dbg_kms(&i915->drm,
2257 "Port %c has invalid DDC pin %d, "
2258 "sticking to defaults\n",
2259 port_name(port), mapped_ddc_pin);
2260 devdata->child.ddc_pin = 0;
2261 return;
2262 }
2263
2264 p = get_port_by_ddc_pin(i915, devdata->child.ddc_pin);
2265 if (p == PORT_NONE)
2266 return;
2267
2268 drm_dbg_kms(&i915->drm,
2269 "port %c trying to use the same DDC pin (0x%x) as port %c, "
2270 "disabling port %c DVI/HDMI support\n",
2271 port_name(port), mapped_ddc_pin,
2272 port_name(p), port_name(p));
2273
2274 /*
2275 * If we have multiple ports supposedly sharing the pin, then dvi/hdmi
2276 * couldn't exist on the shared port. Otherwise they share the same ddc
2277 * pin and system couldn't communicate with them separately.
2278 *
2279 * Give inverse child device order the priority, last one wins. Yes,
2280 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
2281 * port A and port E with the same AUX ch and we must pick port E :(
2282 */
2283 child = &i915->display.vbt.ports[p]->child;
2284
2285 child->device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
2286 child->device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
2287
2288 child->ddc_pin = 0;
2289}
2290
2291static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
2292{
2293 const struct intel_bios_encoder_data *devdata;
2294 enum port port;
2295
2296 if (!aux_ch)
2297 return PORT_NONE;
2298
2299 for_each_port(port) {
2300 devdata = i915->display.vbt.ports[port];
2301
2302 if (devdata && aux_ch == devdata->child.aux_channel)
2303 return port;
2304 }
2305
2306 return PORT_NONE;
2307}
2308
2309static void sanitize_aux_ch(struct intel_bios_encoder_data *devdata,
2310 enum port port)
2311{
2312 struct drm_i915_private *i915 = devdata->i915;
2313 struct child_device_config *child;
2314 enum port p;
2315
2316 p = get_port_by_aux_ch(i915, devdata->child.aux_channel);
2317 if (p == PORT_NONE)
2318 return;
2319
2320 drm_dbg_kms(&i915->drm,
2321 "port %c trying to use the same AUX CH (0x%x) as port %c, "
2322 "disabling port %c DP support\n",
2323 port_name(port), devdata->child.aux_channel,
2324 port_name(p), port_name(p));
2325
2326 /*
2327 * If we have multiple ports supposedly sharing the aux channel, then DP
2328 * couldn't exist on the shared port. Otherwise they share the same aux
2329 * channel and system couldn't communicate with them separately.
2330 *
2331 * Give inverse child device order the priority, last one wins. Yes,
2332 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
2333 * port A and port E with the same AUX ch and we must pick port E :(
2334 */
2335 child = &i915->display.vbt.ports[p]->child;
2336
2337 child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2338 child->aux_channel = 0;
2339}
2340
2341static u8 dvo_port_type(u8 dvo_port)
2342{
2343 switch (dvo_port) {
2344 case DVO_PORT_HDMIA:
2345 case DVO_PORT_HDMIB:
2346 case DVO_PORT_HDMIC:
2347 case DVO_PORT_HDMID:
2348 case DVO_PORT_HDMIE:
2349 case DVO_PORT_HDMIF:
2350 case DVO_PORT_HDMIG:
2351 case DVO_PORT_HDMIH:
2352 case DVO_PORT_HDMII:
2353 return DVO_PORT_HDMIA;
2354 case DVO_PORT_DPA:
2355 case DVO_PORT_DPB:
2356 case DVO_PORT_DPC:
2357 case DVO_PORT_DPD:
2358 case DVO_PORT_DPE:
2359 case DVO_PORT_DPF:
2360 case DVO_PORT_DPG:
2361 case DVO_PORT_DPH:
2362 case DVO_PORT_DPI:
2363 return DVO_PORT_DPA;
2364 case DVO_PORT_MIPIA:
2365 case DVO_PORT_MIPIB:
2366 case DVO_PORT_MIPIC:
2367 case DVO_PORT_MIPID:
2368 return DVO_PORT_MIPIA;
2369 default:
2370 return dvo_port;
2371 }
2372}
2373
2374static enum port __dvo_port_to_port(int n_ports, int n_dvo,
2375 const int port_mapping[][3], u8 dvo_port)
2376{
2377 enum port port;
2378 int i;
2379
2380 for (port = PORT_A; port < n_ports; port++) {
2381 for (i = 0; i < n_dvo; i++) {
2382 if (port_mapping[port][i] == -1)
2383 break;
2384
2385 if (dvo_port == port_mapping[port][i])
2386 return port;
2387 }
2388 }
2389
2390 return PORT_NONE;
2391}
2392
2393static enum port dvo_port_to_port(struct drm_i915_private *i915,
2394 u8 dvo_port)
2395{
2396 /*
2397 * Each DDI port can have more than one value on the "DVO Port" field,
2398 * so look for all the possible values for each port.
2399 */
2400 static const int port_mapping[][3] = {
2401 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2402 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2403 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2404 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2405 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
2406 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2407 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2408 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2409 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2410 };
2411 /*
2412 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
2413 * map to DDI A,B,TC1,TC2 respectively.
2414 */
2415 static const int rkl_port_mapping[][3] = {
2416 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2417 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2418 [PORT_C] = { -1 },
2419 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2420 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2421 };
2422 /*
2423 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E,
2424 * PORT_F and PORT_G, we need to map that to correct VBT sections.
2425 */
2426 static const int adls_port_mapping[][3] = {
2427 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2428 [PORT_B] = { -1 },
2429 [PORT_C] = { -1 },
2430 [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2431 [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2432 [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2433 [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2434 };
2435 static const int xelpd_port_mapping[][3] = {
2436 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2437 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2438 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2439 [PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2440 [PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2441 [PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2442 [PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2443 [PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2444 [PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2445 };
2446
2447 if (DISPLAY_VER(i915) >= 13)
2448 return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping),
2449 ARRAY_SIZE(xelpd_port_mapping[0]),
2450 xelpd_port_mapping,
2451 dvo_port);
2452 else if (IS_ALDERLAKE_S(i915))
2453 return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping),
2454 ARRAY_SIZE(adls_port_mapping[0]),
2455 adls_port_mapping,
2456 dvo_port);
2457 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
2458 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
2459 ARRAY_SIZE(rkl_port_mapping[0]),
2460 rkl_port_mapping,
2461 dvo_port);
2462 else
2463 return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
2464 ARRAY_SIZE(port_mapping[0]),
2465 port_mapping,
2466 dvo_port);
2467}
2468
2469static enum port
2470dsi_dvo_port_to_port(struct drm_i915_private *i915, u8 dvo_port)
2471{
2472 switch (dvo_port) {
2473 case DVO_PORT_MIPIA:
2474 return PORT_A;
2475 case DVO_PORT_MIPIC:
2476 if (DISPLAY_VER(i915) >= 11)
2477 return PORT_B;
2478 else
2479 return PORT_C;
2480 default:
2481 return PORT_NONE;
2482 }
2483}
2484
2485static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate)
2486{
2487 switch (vbt_max_link_rate) {
2488 default:
2489 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF:
2490 return 0;
2491 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20:
2492 return 2000000;
2493 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5:
2494 return 1350000;
2495 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10:
2496 return 1000000;
2497 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3:
2498 return 810000;
2499 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2:
2500 return 540000;
2501 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR:
2502 return 270000;
2503 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR:
2504 return 162000;
2505 }
2506}
2507
2508static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
2509{
2510 switch (vbt_max_link_rate) {
2511 default:
2512 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3:
2513 return 810000;
2514 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2:
2515 return 540000;
2516 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR:
2517 return 270000;
2518 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR:
2519 return 162000;
2520 }
2521}
2522
2523static int _intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata)
2524{
2525 if (!devdata || devdata->i915->display.vbt.version < 216)
2526 return 0;
2527
2528 if (devdata->i915->display.vbt.version >= 230)
2529 return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate);
2530 else
2531 return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate);
2532}
2533
2534static int _intel_bios_dp_max_lane_count(const struct intel_bios_encoder_data *devdata)
2535{
2536 if (!devdata || devdata->i915->display.vbt.version < 244)
2537 return 0;
2538
2539 return devdata->child.dp_max_lane_count + 1;
2540}
2541
2542static void sanitize_device_type(struct intel_bios_encoder_data *devdata,
2543 enum port port)
2544{
2545 struct drm_i915_private *i915 = devdata->i915;
2546 bool is_hdmi;
2547
2548 if (port != PORT_A || DISPLAY_VER(i915) >= 12)
2549 return;
2550
2551 if (!intel_bios_encoder_supports_dvi(devdata))
2552 return;
2553
2554 is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2555
2556 drm_dbg_kms(&i915->drm, "VBT claims port A supports DVI%s, ignoring\n",
2557 is_hdmi ? "/HDMI" : "");
2558
2559 devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
2560 devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
2561}
2562
2563static bool
2564intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata)
2565{
2566 return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
2567}
2568
2569bool
2570intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata)
2571{
2572 return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
2573}
2574
2575bool
2576intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata)
2577{
2578 return intel_bios_encoder_supports_dvi(devdata) &&
2579 (devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
2580}
2581
2582bool
2583intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata)
2584{
2585 return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2586}
2587
2588static bool
2589intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata)
2590{
2591 return intel_bios_encoder_supports_dp(devdata) &&
2592 devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR;
2593}
2594
2595static int _intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata)
2596{
2597 if (!devdata || devdata->i915->display.vbt.version < 158)
2598 return -1;
2599
2600 return devdata->child.hdmi_level_shifter_value;
2601}
2602
2603static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devdata)
2604{
2605 if (!devdata || devdata->i915->display.vbt.version < 204)
2606 return 0;
2607
2608 switch (devdata->child.hdmi_max_data_rate) {
2609 default:
2610 MISSING_CASE(devdata->child.hdmi_max_data_rate);
2611 fallthrough;
2612 case HDMI_MAX_DATA_RATE_PLATFORM:
2613 return 0;
2614 case HDMI_MAX_DATA_RATE_594:
2615 return 594000;
2616 case HDMI_MAX_DATA_RATE_340:
2617 return 340000;
2618 case HDMI_MAX_DATA_RATE_300:
2619 return 300000;
2620 case HDMI_MAX_DATA_RATE_297:
2621 return 297000;
2622 case HDMI_MAX_DATA_RATE_165:
2623 return 165000;
2624 }
2625}
2626
2627static bool is_port_valid(struct drm_i915_private *i915, enum port port)
2628{
2629 /*
2630 * On some ICL SKUs port F is not present, but broken VBTs mark
2631 * the port as present. Only try to initialize port F for the
2632 * SKUs that may actually have it.
2633 */
2634 if (port == PORT_F && IS_ICELAKE(i915))
2635 return IS_ICL_WITH_PORT_F(i915);
2636
2637 return true;
2638}
2639
2640static void print_ddi_port(const struct intel_bios_encoder_data *devdata,
2641 enum port port)
2642{
2643 struct drm_i915_private *i915 = devdata->i915;
2644 const struct child_device_config *child = &devdata->child;
2645 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt, supports_typec_usb, supports_tbt;
2646 int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
2647
2648 is_dvi = intel_bios_encoder_supports_dvi(devdata);
2649 is_dp = intel_bios_encoder_supports_dp(devdata);
2650 is_crt = intel_bios_encoder_supports_crt(devdata);
2651 is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2652 is_edp = intel_bios_encoder_supports_edp(devdata);
2653
2654 supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata);
2655 supports_tbt = intel_bios_encoder_supports_tbt(devdata);
2656
2657 drm_dbg_kms(&i915->drm,
2658 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
2659 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp,
2660 HAS_LSPCON(i915) && child->lspcon,
2661 supports_typec_usb, supports_tbt,
2662 devdata->dsc != NULL);
2663
2664 hdmi_level_shift = _intel_bios_hdmi_level_shift(devdata);
2665 if (hdmi_level_shift >= 0) {
2666 drm_dbg_kms(&i915->drm,
2667 "Port %c VBT HDMI level shift: %d\n",
2668 port_name(port), hdmi_level_shift);
2669 }
2670
2671 max_tmds_clock = _intel_bios_max_tmds_clock(devdata);
2672 if (max_tmds_clock)
2673 drm_dbg_kms(&i915->drm,
2674 "Port %c VBT HDMI max TMDS clock: %d kHz\n",
2675 port_name(port), max_tmds_clock);
2676
2677 /* I_boost config for SKL and above */
2678 dp_boost_level = intel_bios_encoder_dp_boost_level(devdata);
2679 if (dp_boost_level)
2680 drm_dbg_kms(&i915->drm,
2681 "Port %c VBT (e)DP boost level: %d\n",
2682 port_name(port), dp_boost_level);
2683
2684 hdmi_boost_level = intel_bios_encoder_hdmi_boost_level(devdata);
2685 if (hdmi_boost_level)
2686 drm_dbg_kms(&i915->drm,
2687 "Port %c VBT HDMI boost level: %d\n",
2688 port_name(port), hdmi_boost_level);
2689
2690 dp_max_link_rate = _intel_bios_dp_max_link_rate(devdata);
2691 if (dp_max_link_rate)
2692 drm_dbg_kms(&i915->drm,
2693 "Port %c VBT DP max link rate: %d\n",
2694 port_name(port), dp_max_link_rate);
2695
2696 /*
2697 * FIXME need to implement support for VBT
2698 * vswing/preemph tables should this ever trigger.
2699 */
2700 drm_WARN(&i915->drm, child->use_vbt_vswing,
2701 "Port %c asks to use VBT vswing/preemph tables\n",
2702 port_name(port));
2703}
2704
2705static void parse_ddi_port(struct intel_bios_encoder_data *devdata)
2706{
2707 struct drm_i915_private *i915 = devdata->i915;
2708 const struct child_device_config *child = &devdata->child;
2709 enum port port;
2710
2711 port = dvo_port_to_port(i915, child->dvo_port);
2712 if (port == PORT_NONE)
2713 return;
2714
2715 if (!is_port_valid(i915, port)) {
2716 drm_dbg_kms(&i915->drm,
2717 "VBT reports port %c as supported, but that can't be true: skipping\n",
2718 port_name(port));
2719 return;
2720 }
2721
2722 if (i915->display.vbt.ports[port]) {
2723 drm_dbg_kms(&i915->drm,
2724 "More than one child device for port %c in VBT, using the first.\n",
2725 port_name(port));
2726 return;
2727 }
2728
2729 sanitize_device_type(devdata, port);
2730
2731 if (intel_bios_encoder_supports_dvi(devdata))
2732 sanitize_ddc_pin(devdata, port);
2733
2734 if (intel_bios_encoder_supports_dp(devdata))
2735 sanitize_aux_ch(devdata, port);
2736
2737 i915->display.vbt.ports[port] = devdata;
2738}
2739
2740static bool has_ddi_port_info(struct drm_i915_private *i915)
2741{
2742 return DISPLAY_VER(i915) >= 5 || IS_G4X(i915);
2743}
2744
2745static void parse_ddi_ports(struct drm_i915_private *i915)
2746{
2747 struct intel_bios_encoder_data *devdata;
2748 enum port port;
2749
2750 if (!has_ddi_port_info(i915))
2751 return;
2752
2753 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node)
2754 parse_ddi_port(devdata);
2755
2756 for_each_port(port) {
2757 if (i915->display.vbt.ports[port])
2758 print_ddi_port(i915->display.vbt.ports[port], port);
2759 }
2760}
2761
2762static void
2763parse_general_definitions(struct drm_i915_private *i915)
2764{
2765 const struct bdb_general_definitions *defs;
2766 struct intel_bios_encoder_data *devdata;
2767 const struct child_device_config *child;
2768 int i, child_device_num;
2769 u8 expected_size;
2770 u16 block_size;
2771 int bus_pin;
2772
2773 defs = find_section(i915, BDB_GENERAL_DEFINITIONS);
2774 if (!defs) {
2775 drm_dbg_kms(&i915->drm,
2776 "No general definition block is found, no devices defined.\n");
2777 return;
2778 }
2779
2780 block_size = get_blocksize(defs);
2781 if (block_size < sizeof(*defs)) {
2782 drm_dbg_kms(&i915->drm,
2783 "General definitions block too small (%u)\n",
2784 block_size);
2785 return;
2786 }
2787
2788 bus_pin = defs->crt_ddc_gmbus_pin;
2789 drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
2790 if (intel_gmbus_is_valid_pin(i915, bus_pin))
2791 i915->display.vbt.crt_ddc_pin = bus_pin;
2792
2793 if (i915->display.vbt.version < 106) {
2794 expected_size = 22;
2795 } else if (i915->display.vbt.version < 111) {
2796 expected_size = 27;
2797 } else if (i915->display.vbt.version < 195) {
2798 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
2799 } else if (i915->display.vbt.version == 195) {
2800 expected_size = 37;
2801 } else if (i915->display.vbt.version <= 215) {
2802 expected_size = 38;
2803 } else if (i915->display.vbt.version <= 237) {
2804 expected_size = 39;
2805 } else {
2806 expected_size = sizeof(*child);
2807 BUILD_BUG_ON(sizeof(*child) < 39);
2808 drm_dbg(&i915->drm,
2809 "Expected child device config size for VBT version %u not known; assuming %u\n",
2810 i915->display.vbt.version, expected_size);
2811 }
2812
2813 /* Flag an error for unexpected size, but continue anyway. */
2814 if (defs->child_dev_size != expected_size)
2815 drm_err(&i915->drm,
2816 "Unexpected child device config size %u (expected %u for VBT version %u)\n",
2817 defs->child_dev_size, expected_size, i915->display.vbt.version);
2818
2819 /* The legacy sized child device config is the minimum we need. */
2820 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
2821 drm_dbg_kms(&i915->drm,
2822 "Child device config size %u is too small.\n",
2823 defs->child_dev_size);
2824 return;
2825 }
2826
2827 /* get the number of child device */
2828 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
2829
2830 for (i = 0; i < child_device_num; i++) {
2831 child = child_device_ptr(defs, i);
2832 if (!child->device_type)
2833 continue;
2834
2835 drm_dbg_kms(&i915->drm,
2836 "Found VBT child device with type 0x%x\n",
2837 child->device_type);
2838
2839 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2840 if (!devdata)
2841 break;
2842
2843 devdata->i915 = i915;
2844
2845 /*
2846 * Copy as much as we know (sizeof) and is available
2847 * (child_dev_size) of the child device config. Accessing the
2848 * data must depend on VBT version.
2849 */
2850 memcpy(&devdata->child, child,
2851 min_t(size_t, defs->child_dev_size, sizeof(*child)));
2852
2853 list_add_tail(&devdata->node, &i915->display.vbt.display_devices);
2854 }
2855
2856 if (list_empty(&i915->display.vbt.display_devices))
2857 drm_dbg_kms(&i915->drm,
2858 "no child dev is parsed from VBT\n");
2859}
2860
2861/* Common defaults which may be overridden by VBT. */
2862static void
2863init_vbt_defaults(struct drm_i915_private *i915)
2864{
2865 i915->display.vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
2866
2867 /* general features */
2868 i915->display.vbt.int_tv_support = 1;
2869 i915->display.vbt.int_crt_support = 1;
2870
2871 /* driver features */
2872 i915->display.vbt.int_lvds_support = 1;
2873
2874 /* Default to using SSC */
2875 i915->display.vbt.lvds_use_ssc = 1;
2876 /*
2877 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
2878 * clock for LVDS.
2879 */
2880 i915->display.vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915,
2881 !HAS_PCH_SPLIT(i915));
2882 drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n",
2883 i915->display.vbt.lvds_ssc_freq);
2884}
2885
2886/* Common defaults which may be overridden by VBT. */
2887static void
2888init_vbt_panel_defaults(struct intel_panel *panel)
2889{
2890 /* Default to having backlight */
2891 panel->vbt.backlight.present = true;
2892
2893 /* LFP panel data */
2894 panel->vbt.lvds_dither = true;
2895}
2896
2897/* Defaults to initialize only if there is no VBT. */
2898static void
2899init_vbt_missing_defaults(struct drm_i915_private *i915)
2900{
2901 enum port port;
2902 int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) |
2903 BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F);
2904
2905 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
2906 return;
2907
2908 for_each_port_masked(port, ports) {
2909 struct intel_bios_encoder_data *devdata;
2910 struct child_device_config *child;
2911 enum phy phy = intel_port_to_phy(i915, port);
2912
2913 /*
2914 * VBT has the TypeC mode (native,TBT/USB) and we don't want
2915 * to detect it.
2916 */
2917 if (intel_phy_is_tc(i915, phy))
2918 continue;
2919
2920 /* Create fake child device config */
2921 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2922 if (!devdata)
2923 break;
2924
2925 devdata->i915 = i915;
2926 child = &devdata->child;
2927
2928 if (port == PORT_F)
2929 child->dvo_port = DVO_PORT_HDMIF;
2930 else if (port == PORT_E)
2931 child->dvo_port = DVO_PORT_HDMIE;
2932 else
2933 child->dvo_port = DVO_PORT_HDMIA + port;
2934
2935 if (port != PORT_A && port != PORT_E)
2936 child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING;
2937
2938 if (port != PORT_E)
2939 child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2940
2941 if (port == PORT_A)
2942 child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR;
2943
2944 list_add_tail(&devdata->node, &i915->display.vbt.display_devices);
2945
2946 drm_dbg_kms(&i915->drm,
2947 "Generating default VBT child device with type 0x04%x on port %c\n",
2948 child->device_type, port_name(port));
2949 }
2950
2951 /* Bypass some minimum baseline VBT version checks */
2952 i915->display.vbt.version = 155;
2953}
2954
2955static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2956{
2957 const void *_vbt = vbt;
2958
2959 return _vbt + vbt->bdb_offset;
2960}
2961
2962/**
2963 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2964 * @buf: pointer to a buffer to validate
2965 * @size: size of the buffer
2966 *
2967 * Returns true on valid VBT.
2968 */
2969bool intel_bios_is_valid_vbt(const void *buf, size_t size)
2970{
2971 const struct vbt_header *vbt = buf;
2972 const struct bdb_header *bdb;
2973
2974 if (!vbt)
2975 return false;
2976
2977 if (sizeof(struct vbt_header) > size) {
2978 DRM_DEBUG_DRIVER("VBT header incomplete\n");
2979 return false;
2980 }
2981
2982 if (memcmp(vbt->signature, "$VBT", 4)) {
2983 DRM_DEBUG_DRIVER("VBT invalid signature\n");
2984 return false;
2985 }
2986
2987 if (vbt->vbt_size > size) {
2988 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n");
2989 return false;
2990 }
2991
2992 size = vbt->vbt_size;
2993
2994 if (range_overflows_t(size_t,
2995 vbt->bdb_offset,
2996 sizeof(struct bdb_header),
2997 size)) {
2998 DRM_DEBUG_DRIVER("BDB header incomplete\n");
2999 return false;
3000 }
3001
3002 bdb = get_bdb_header(vbt);
3003 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
3004 DRM_DEBUG_DRIVER("BDB incomplete\n");
3005 return false;
3006 }
3007
3008 return vbt;
3009}
3010
3011static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915)
3012{
3013 u32 count, data, found, store = 0;
3014 u32 static_region, oprom_offset;
3015 u32 oprom_size = 0x200000;
3016 u16 vbt_size;
3017 u32 *vbt;
3018
3019 static_region = intel_uncore_read(&i915->uncore, SPI_STATIC_REGIONS);
3020 static_region &= OPTIONROM_SPI_REGIONID_MASK;
3021 intel_uncore_write(&i915->uncore, PRIMARY_SPI_REGIONID, static_region);
3022
3023 oprom_offset = intel_uncore_read(&i915->uncore, OROM_OFFSET);
3024 oprom_offset &= OROM_OFFSET_MASK;
3025
3026 for (count = 0; count < oprom_size; count += 4) {
3027 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, oprom_offset + count);
3028 data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER);
3029
3030 if (data == *((const u32 *)"$VBT")) {
3031 found = oprom_offset + count;
3032 break;
3033 }
3034 }
3035
3036 if (count >= oprom_size)
3037 goto err_not_found;
3038
3039 /* Get VBT size and allocate space for the VBT */
3040 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, found +
3041 offsetof(struct vbt_header, vbt_size));
3042 vbt_size = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER);
3043 vbt_size &= 0xffff;
3044
3045 vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL);
3046 if (!vbt)
3047 goto err_not_found;
3048
3049 for (count = 0; count < vbt_size; count += 4) {
3050 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, found + count);
3051 data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER);
3052 *(vbt + store++) = data;
3053 }
3054
3055 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
3056 goto err_free_vbt;
3057
3058 drm_dbg_kms(&i915->drm, "Found valid VBT in SPI flash\n");
3059
3060 return (struct vbt_header *)vbt;
3061
3062err_free_vbt:
3063 kfree(vbt);
3064err_not_found:
3065 return NULL;
3066}
3067
3068static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)
3069{
3070 struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
3071 void __iomem *p = NULL, *oprom;
3072 struct vbt_header *vbt;
3073 u16 vbt_size;
3074 size_t i, size;
3075
3076 oprom = pci_map_rom(pdev, &size);
3077 if (!oprom)
3078 return NULL;
3079
3080 /* Scour memory looking for the VBT signature. */
3081 for (i = 0; i + 4 < size; i += 4) {
3082 if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
3083 continue;
3084
3085 p = oprom + i;
3086 size -= i;
3087 break;
3088 }
3089
3090 if (!p)
3091 goto err_unmap_oprom;
3092
3093 if (sizeof(struct vbt_header) > size) {
3094 drm_dbg(&i915->drm, "VBT header incomplete\n");
3095 goto err_unmap_oprom;
3096 }
3097
3098 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
3099 if (vbt_size > size) {
3100 drm_dbg(&i915->drm,
3101 "VBT incomplete (vbt_size overflows)\n");
3102 goto err_unmap_oprom;
3103 }
3104
3105 /* The rest will be validated by intel_bios_is_valid_vbt() */
3106 vbt = kmalloc(vbt_size, GFP_KERNEL);
3107 if (!vbt)
3108 goto err_unmap_oprom;
3109
3110 memcpy_fromio(vbt, p, vbt_size);
3111
3112 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
3113 goto err_free_vbt;
3114
3115 pci_unmap_rom(pdev, oprom);
3116
3117 drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n");
3118
3119 return vbt;
3120
3121err_free_vbt:
3122 kfree(vbt);
3123err_unmap_oprom:
3124 pci_unmap_rom(pdev, oprom);
3125
3126 return NULL;
3127}
3128
3129/**
3130 * intel_bios_init - find VBT and initialize settings from the BIOS
3131 * @i915: i915 device instance
3132 *
3133 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
3134 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
3135 * initialize some defaults if the VBT is not present at all.
3136 */
3137void intel_bios_init(struct drm_i915_private *i915)
3138{
3139 const struct vbt_header *vbt = i915->display.opregion.vbt;
3140 struct vbt_header *oprom_vbt = NULL;
3141 const struct bdb_header *bdb;
3142
3143 INIT_LIST_HEAD(&i915->display.vbt.display_devices);
3144 INIT_LIST_HEAD(&i915->display.vbt.bdb_blocks);
3145
3146 if (!HAS_DISPLAY(i915)) {
3147 drm_dbg_kms(&i915->drm,
3148 "Skipping VBT init due to disabled display.\n");
3149 return;
3150 }
3151
3152 init_vbt_defaults(i915);
3153
3154 /*
3155 * If the OpRegion does not have VBT, look in SPI flash through MMIO or
3156 * PCI mapping
3157 */
3158 if (!vbt && IS_DGFX(i915)) {
3159 oprom_vbt = spi_oprom_get_vbt(i915);
3160 vbt = oprom_vbt;
3161 }
3162
3163 if (!vbt) {
3164 oprom_vbt = oprom_get_vbt(i915);
3165 vbt = oprom_vbt;
3166 }
3167
3168 if (!vbt)
3169 goto out;
3170
3171 bdb = get_bdb_header(vbt);
3172 i915->display.vbt.version = bdb->version;
3173
3174 drm_dbg_kms(&i915->drm,
3175 "VBT signature \"%.*s\", BDB version %d\n",
3176 (int)sizeof(vbt->signature), vbt->signature, i915->display.vbt.version);
3177
3178 init_bdb_blocks(i915, bdb);
3179
3180 /* Grab useful general definitions */
3181 parse_general_features(i915);
3182 parse_general_definitions(i915);
3183 parse_driver_features(i915);
3184
3185 /* Depends on child device list */
3186 parse_compression_parameters(i915);
3187
3188out:
3189 if (!vbt) {
3190 drm_info(&i915->drm,
3191 "Failed to find VBIOS tables (VBT)\n");
3192 init_vbt_missing_defaults(i915);
3193 }
3194
3195 /* Further processing on pre-parsed or generated child device data */
3196 parse_sdvo_device_mapping(i915);
3197 parse_ddi_ports(i915);
3198
3199 kfree(oprom_vbt);
3200}
3201
3202void intel_bios_init_panel(struct drm_i915_private *i915,
3203 struct intel_panel *panel,
3204 const struct intel_bios_encoder_data *devdata,
3205 const struct edid *edid)
3206{
3207 init_vbt_panel_defaults(panel);
3208
3209 panel->vbt.panel_type = get_panel_type(i915, devdata, edid);
3210
3211 parse_panel_options(i915, panel);
3212 parse_generic_dtd(i915, panel);
3213 parse_lfp_data(i915, panel);
3214 parse_lfp_backlight(i915, panel);
3215 parse_sdvo_panel_data(i915, panel);
3216 parse_panel_driver_features(i915, panel);
3217 parse_power_conservation_features(i915, panel);
3218 parse_edp(i915, panel);
3219 parse_psr(i915, panel);
3220 parse_mipi_config(i915, panel);
3221 parse_mipi_sequence(i915, panel);
3222}
3223
3224/**
3225 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
3226 * @i915: i915 device instance
3227 */
3228void intel_bios_driver_remove(struct drm_i915_private *i915)
3229{
3230 struct intel_bios_encoder_data *devdata, *nd;
3231 struct bdb_block_entry *entry, *ne;
3232
3233 list_for_each_entry_safe(devdata, nd, &i915->display.vbt.display_devices, node) {
3234 list_del(&devdata->node);
3235 kfree(devdata->dsc);
3236 kfree(devdata);
3237 }
3238
3239 list_for_each_entry_safe(entry, ne, &i915->display.vbt.bdb_blocks, node) {
3240 list_del(&entry->node);
3241 kfree(entry);
3242 }
3243}
3244
3245void intel_bios_fini_panel(struct intel_panel *panel)
3246{
3247 kfree(panel->vbt.sdvo_lvds_vbt_mode);
3248 panel->vbt.sdvo_lvds_vbt_mode = NULL;
3249 kfree(panel->vbt.lfp_lvds_vbt_mode);
3250 panel->vbt.lfp_lvds_vbt_mode = NULL;
3251 kfree(panel->vbt.dsi.data);
3252 panel->vbt.dsi.data = NULL;
3253 kfree(panel->vbt.dsi.pps);
3254 panel->vbt.dsi.pps = NULL;
3255 kfree(panel->vbt.dsi.config);
3256 panel->vbt.dsi.config = NULL;
3257 kfree(panel->vbt.dsi.deassert_seq);
3258 panel->vbt.dsi.deassert_seq = NULL;
3259}
3260
3261/**
3262 * intel_bios_is_tv_present - is integrated TV present in VBT
3263 * @i915: i915 device instance
3264 *
3265 * Return true if TV is present. If no child devices were parsed from VBT,
3266 * assume TV is present.
3267 */
3268bool intel_bios_is_tv_present(struct drm_i915_private *i915)
3269{
3270 const struct intel_bios_encoder_data *devdata;
3271 const struct child_device_config *child;
3272
3273 if (!i915->display.vbt.int_tv_support)
3274 return false;
3275
3276 if (list_empty(&i915->display.vbt.display_devices))
3277 return true;
3278
3279 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3280 child = &devdata->child;
3281
3282 /*
3283 * If the device type is not TV, continue.
3284 */
3285 switch (child->device_type) {
3286 case DEVICE_TYPE_INT_TV:
3287 case DEVICE_TYPE_TV:
3288 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
3289 break;
3290 default:
3291 continue;
3292 }
3293 /* Only when the addin_offset is non-zero, it is regarded
3294 * as present.
3295 */
3296 if (child->addin_offset)
3297 return true;
3298 }
3299
3300 return false;
3301}
3302
3303/**
3304 * intel_bios_is_lvds_present - is LVDS present in VBT
3305 * @i915: i915 device instance
3306 * @i2c_pin: i2c pin for LVDS if present
3307 *
3308 * Return true if LVDS is present. If no child devices were parsed from VBT,
3309 * assume LVDS is present.
3310 */
3311bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin)
3312{
3313 const struct intel_bios_encoder_data *devdata;
3314 const struct child_device_config *child;
3315
3316 if (list_empty(&i915->display.vbt.display_devices))
3317 return true;
3318
3319 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3320 child = &devdata->child;
3321
3322 /* If the device type is not LFP, continue.
3323 * We have to check both the new identifiers as well as the
3324 * old for compatibility with some BIOSes.
3325 */
3326 if (child->device_type != DEVICE_TYPE_INT_LFP &&
3327 child->device_type != DEVICE_TYPE_LFP)
3328 continue;
3329
3330 if (intel_gmbus_is_valid_pin(i915, child->i2c_pin))
3331 *i2c_pin = child->i2c_pin;
3332
3333 /* However, we cannot trust the BIOS writers to populate
3334 * the VBT correctly. Since LVDS requires additional
3335 * information from AIM blocks, a non-zero addin offset is
3336 * a good indicator that the LVDS is actually present.
3337 */
3338 if (child->addin_offset)
3339 return true;
3340
3341 /* But even then some BIOS writers perform some black magic
3342 * and instantiate the device without reference to any
3343 * additional data. Trust that if the VBT was written into
3344 * the OpRegion then they have validated the LVDS's existence.
3345 */
3346 if (i915->display.opregion.vbt)
3347 return true;
3348 }
3349
3350 return false;
3351}
3352
3353/**
3354 * intel_bios_is_port_present - is the specified digital port present
3355 * @i915: i915 device instance
3356 * @port: port to check
3357 *
3358 * Return true if the device in %port is present.
3359 */
3360bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port)
3361{
3362 if (WARN_ON(!has_ddi_port_info(i915)))
3363 return true;
3364
3365 return i915->display.vbt.ports[port];
3366}
3367
3368/**
3369 * intel_bios_is_port_edp - is the device in given port eDP
3370 * @i915: i915 device instance
3371 * @port: port to check
3372 *
3373 * Return true if the device in %port is eDP.
3374 */
3375bool intel_bios_is_port_edp(struct drm_i915_private *i915, enum port port)
3376{
3377 const struct intel_bios_encoder_data *devdata =
3378 intel_bios_encoder_data_lookup(i915, port);
3379
3380 return devdata && intel_bios_encoder_supports_edp(devdata);
3381}
3382
3383static bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata)
3384{
3385 const struct child_device_config *child = &devdata->child;
3386
3387 if (!intel_bios_encoder_supports_dp(devdata) ||
3388 !intel_bios_encoder_supports_hdmi(devdata))
3389 return false;
3390
3391 if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA)
3392 return true;
3393
3394 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
3395 if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA &&
3396 child->aux_channel != 0)
3397 return true;
3398
3399 return false;
3400}
3401
3402bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *i915,
3403 enum port port)
3404{
3405 const struct intel_bios_encoder_data *devdata =
3406 intel_bios_encoder_data_lookup(i915, port);
3407
3408 return devdata && intel_bios_encoder_supports_dp_dual_mode(devdata);
3409}
3410
3411/**
3412 * intel_bios_is_dsi_present - is DSI present in VBT
3413 * @i915: i915 device instance
3414 * @port: port for DSI if present
3415 *
3416 * Return true if DSI is present, and return the port in %port.
3417 */
3418bool intel_bios_is_dsi_present(struct drm_i915_private *i915,
3419 enum port *port)
3420{
3421 const struct intel_bios_encoder_data *devdata;
3422 const struct child_device_config *child;
3423 u8 dvo_port;
3424
3425 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3426 child = &devdata->child;
3427
3428 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3429 continue;
3430
3431 dvo_port = child->dvo_port;
3432
3433 if (dsi_dvo_port_to_port(i915, dvo_port) == PORT_NONE) {
3434 drm_dbg_kms(&i915->drm,
3435 "VBT has unsupported DSI port %c\n",
3436 port_name(dvo_port - DVO_PORT_MIPIA));
3437 continue;
3438 }
3439
3440 if (port)
3441 *port = dsi_dvo_port_to_port(i915, dvo_port);
3442 return true;
3443 }
3444
3445 return false;
3446}
3447
3448static void fill_dsc(struct intel_crtc_state *crtc_state,
3449 struct dsc_compression_parameters_entry *dsc,
3450 int dsc_max_bpc)
3451{
3452 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
3453 int bpc = 8;
3454
3455 vdsc_cfg->dsc_version_major = dsc->version_major;
3456 vdsc_cfg->dsc_version_minor = dsc->version_minor;
3457
3458 if (dsc->support_12bpc && dsc_max_bpc >= 12)
3459 bpc = 12;
3460 else if (dsc->support_10bpc && dsc_max_bpc >= 10)
3461 bpc = 10;
3462 else if (dsc->support_8bpc && dsc_max_bpc >= 8)
3463 bpc = 8;
3464 else
3465 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n",
3466 dsc_max_bpc);
3467
3468 crtc_state->pipe_bpp = bpc * 3;
3469
3470 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp,
3471 VBT_DSC_MAX_BPP(dsc->max_bpp));
3472
3473 /*
3474 * FIXME: This is ugly, and slice count should take DSC engine
3475 * throughput etc. into account.
3476 *
3477 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
3478 */
3479 if (dsc->slices_per_line & BIT(2)) {
3480 crtc_state->dsc.slice_count = 4;
3481 } else if (dsc->slices_per_line & BIT(1)) {
3482 crtc_state->dsc.slice_count = 2;
3483 } else {
3484 /* FIXME */
3485 if (!(dsc->slices_per_line & BIT(0)))
3486 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n");
3487
3488 crtc_state->dsc.slice_count = 1;
3489 }
3490
3491 if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
3492 crtc_state->dsc.slice_count != 0)
3493 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n",
3494 crtc_state->hw.adjusted_mode.crtc_hdisplay,
3495 crtc_state->dsc.slice_count);
3496
3497 /*
3498 * The VBT rc_buffer_block_size and rc_buffer_size definitions
3499 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63.
3500 */
3501 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size,
3502 dsc->rc_buffer_size);
3503
3504 /* FIXME: DSI spec says bpc + 1 for this one */
3505 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
3506
3507 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
3508
3509 vdsc_cfg->slice_height = dsc->slice_height;
3510}
3511
3512/* FIXME: initially DSI specific */
3513bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
3514 struct intel_crtc_state *crtc_state,
3515 int dsc_max_bpc)
3516{
3517 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3518 const struct intel_bios_encoder_data *devdata;
3519 const struct child_device_config *child;
3520
3521 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3522 child = &devdata->child;
3523
3524 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3525 continue;
3526
3527 if (dsi_dvo_port_to_port(i915, child->dvo_port) == encoder->port) {
3528 if (!devdata->dsc)
3529 return false;
3530
3531 if (crtc_state)
3532 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
3533
3534 return true;
3535 }
3536 }
3537
3538 return false;
3539}
3540
3541/**
3542 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
3543 * @i915: i915 device instance
3544 * @port: port to check
3545 *
3546 * Return true if HPD should be inverted for %port.
3547 */
3548bool
3549intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
3550 enum port port)
3551{
3552 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[port];
3553
3554 if (drm_WARN_ON_ONCE(&i915->drm,
3555 !IS_GEMINILAKE(i915) && !IS_BROXTON(i915)))
3556 return false;
3557
3558 return devdata && devdata->child.hpd_invert;
3559}
3560
3561/**
3562 * intel_bios_is_lspcon_present - if LSPCON is attached on %port
3563 * @i915: i915 device instance
3564 * @port: port to check
3565 *
3566 * Return true if LSPCON is present on this port
3567 */
3568bool
3569intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
3570 enum port port)
3571{
3572 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[port];
3573
3574 return HAS_LSPCON(i915) && devdata && devdata->child.lspcon;
3575}
3576
3577/**
3578 * intel_bios_is_lane_reversal_needed - if lane reversal needed on port
3579 * @i915: i915 device instance
3580 * @port: port to check
3581 *
3582 * Return true if port requires lane reversal
3583 */
3584bool
3585intel_bios_is_lane_reversal_needed(const struct drm_i915_private *i915,
3586 enum port port)
3587{
3588 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[port];
3589
3590 return devdata && devdata->child.lane_reversal;
3591}
3592
3593enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
3594 enum port port)
3595{
3596 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[port];
3597 enum aux_ch aux_ch;
3598
3599 if (!devdata || !devdata->child.aux_channel) {
3600 aux_ch = (enum aux_ch)port;
3601
3602 drm_dbg_kms(&i915->drm,
3603 "using AUX %c for port %c (platform default)\n",
3604 aux_ch_name(aux_ch), port_name(port));
3605 return aux_ch;
3606 }
3607
3608 /*
3609 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
3610 * map to DDI A,B,TC1,TC2 respectively.
3611 *
3612 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
3613 * map to DDI A,TC1,TC2,TC3,TC4 respectively.
3614 */
3615 switch (devdata->child.aux_channel) {
3616 case DP_AUX_A:
3617 aux_ch = AUX_CH_A;
3618 break;
3619 case DP_AUX_B:
3620 if (IS_ALDERLAKE_S(i915))
3621 aux_ch = AUX_CH_USBC1;
3622 else
3623 aux_ch = AUX_CH_B;
3624 break;
3625 case DP_AUX_C:
3626 if (IS_ALDERLAKE_S(i915))
3627 aux_ch = AUX_CH_USBC2;
3628 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
3629 aux_ch = AUX_CH_USBC1;
3630 else
3631 aux_ch = AUX_CH_C;
3632 break;
3633 case DP_AUX_D:
3634 if (DISPLAY_VER(i915) >= 13)
3635 aux_ch = AUX_CH_D_XELPD;
3636 else if (IS_ALDERLAKE_S(i915))
3637 aux_ch = AUX_CH_USBC3;
3638 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
3639 aux_ch = AUX_CH_USBC2;
3640 else
3641 aux_ch = AUX_CH_D;
3642 break;
3643 case DP_AUX_E:
3644 if (DISPLAY_VER(i915) >= 13)
3645 aux_ch = AUX_CH_E_XELPD;
3646 else if (IS_ALDERLAKE_S(i915))
3647 aux_ch = AUX_CH_USBC4;
3648 else
3649 aux_ch = AUX_CH_E;
3650 break;
3651 case DP_AUX_F:
3652 if (DISPLAY_VER(i915) >= 13)
3653 aux_ch = AUX_CH_USBC1;
3654 else
3655 aux_ch = AUX_CH_F;
3656 break;
3657 case DP_AUX_G:
3658 if (DISPLAY_VER(i915) >= 13)
3659 aux_ch = AUX_CH_USBC2;
3660 else
3661 aux_ch = AUX_CH_G;
3662 break;
3663 case DP_AUX_H:
3664 if (DISPLAY_VER(i915) >= 13)
3665 aux_ch = AUX_CH_USBC3;
3666 else
3667 aux_ch = AUX_CH_H;
3668 break;
3669 case DP_AUX_I:
3670 if (DISPLAY_VER(i915) >= 13)
3671 aux_ch = AUX_CH_USBC4;
3672 else
3673 aux_ch = AUX_CH_I;
3674 break;
3675 default:
3676 MISSING_CASE(devdata->child.aux_channel);
3677 aux_ch = AUX_CH_A;
3678 break;
3679 }
3680
3681 drm_dbg_kms(&i915->drm, "using AUX %c for port %c (VBT)\n",
3682 aux_ch_name(aux_ch), port_name(port));
3683
3684 return aux_ch;
3685}
3686
3687int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
3688{
3689 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3690 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[encoder->port];
3691
3692 return _intel_bios_max_tmds_clock(devdata);
3693}
3694
3695/* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */
3696int intel_bios_hdmi_level_shift(struct intel_encoder *encoder)
3697{
3698 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3699 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[encoder->port];
3700
3701 return _intel_bios_hdmi_level_shift(devdata);
3702}
3703
3704int intel_bios_encoder_dp_boost_level(const struct intel_bios_encoder_data *devdata)
3705{
3706 if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost)
3707 return 0;
3708
3709 return translate_iboost(devdata->child.dp_iboost_level);
3710}
3711
3712int intel_bios_encoder_hdmi_boost_level(const struct intel_bios_encoder_data *devdata)
3713{
3714 if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost)
3715 return 0;
3716
3717 return translate_iboost(devdata->child.hdmi_iboost_level);
3718}
3719
3720int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
3721{
3722 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3723 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[encoder->port];
3724
3725 return _intel_bios_dp_max_link_rate(devdata);
3726}
3727
3728int intel_bios_dp_max_lane_count(struct intel_encoder *encoder)
3729{
3730 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3731 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[encoder->port];
3732
3733 return _intel_bios_dp_max_lane_count(devdata);
3734}
3735
3736int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
3737{
3738 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3739 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[encoder->port];
3740
3741 if (!devdata || !devdata->child.ddc_pin)
3742 return 0;
3743
3744 return map_ddc_pin(i915, devdata->child.ddc_pin);
3745}
3746
3747bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata)
3748{
3749 return devdata->i915->display.vbt.version >= 195 && devdata->child.dp_usb_type_c;
3750}
3751
3752bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata)
3753{
3754 return devdata->i915->display.vbt.version >= 209 && devdata->child.tbt;
3755}
3756
3757const struct intel_bios_encoder_data *
3758intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port)
3759{
3760 return i915->display.vbt.ports[port];
3761}