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1/*
2 * Device Tree Source for Sierra Wireless WP8548 Module
3 *
4 * Copyright (C) 2016 BayLibre, SAS.
5 * Author : Neil Armstrong <narmstrong@baylibre.com>
6 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 * a) This file is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of the
15 * License, or (at your option) any later version.
16 *
17 * This file is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * Or, alternatively,
23 *
24 * b) Permission is hereby granted, free of charge, to any person
25 * obtaining a copy of this software and associated documentation
26 * files (the "Software"), to deal in the Software without
27 * restriction, including without limitation the rights to use,
28 * copy, modify, merge, publish, distribute, sublicense, and/or
29 * sell copies of the Software, and to permit persons to whom the
30 * Software is furnished to do so, subject to the following
31 * conditions:
32 *
33 * The above copyright notice and this permission notice shall be
34 * included in all copies or substantial portions of the Software.
35 *
36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43 * OTHER DEALINGS IN THE SOFTWARE.
44 */
45
46#include "qcom-mdm9615.dtsi"
47
48/ {
49 model = "Sierra Wireless WP8548 Module";
50 compatible = "swir,wp8548", "qcom,mdm9615";
51
52 memory {
53 device_type = "memory";
54 reg = <0x48000000 0x7F00000>;
55 };
56};
57
58&msmgpio {
59 pinctrl-0 = <&reset_out_pins>;
60 pinctrl-names = "default";
61
62 gsbi3_pins: gsbi3_pins {
63 mux {
64 pins = "gpio8", "gpio9", "gpio10", "gpio11";
65 function = "gsbi3";
66 drive-strength = <8>;
67 bias-disable;
68 };
69 };
70
71 gsbi4_pins: gsbi4_pins {
72 mux {
73 pins = "gpio12", "gpio13", "gpio14", "gpio15";
74 function = "gsbi4";
75 drive-strength = <8>;
76 bias-disable;
77 };
78 };
79
80 gsbi5_i2c_pins: gsbi5_i2c_pins {
81 pin16 {
82 pins = "gpio16";
83 function = "gsbi5_i2c";
84 drive-strength = <8>;
85 bias-disable;
86 };
87
88 pin17 {
89 pins = "gpio17";
90 function = "gsbi5_i2c";
91 drive-strength = <2>;
92 bias-disable;
93 };
94 };
95
96 gsbi5_uart_pins: gsbi5_uart_pins {
97 mux {
98 pins = "gpio18", "gpio19";
99 function = "gsbi5_uart";
100 drive-strength = <8>;
101 bias-disable;
102 };
103 };
104
105 reset_out_pins: reset_out_pins {
106 pins {
107 pins = "gpio66";
108 function = "gpio";
109 drive-strength = <2>;
110 bias-pull-up;
111 output-high;
112 };
113 };
114};
115
116&pmicgpio {
117 usb_vbus_5v_pins: usb_vbus_5v_pins {
118 pins = "gpio4";
119 function = "normal";
120 output-high;
121 bias-disable;
122 qcom,drive-strength = <1>;
123 power-source = <2>;
124 };
125};
126
127&gsbi3 {
128 status = "okay";
129 qcom,mode = <GSBI_PROT_SPI>;
130};
131
132&gsbi3_spi {
133 status = "okay";
134 pinctrl-0 = <&gsbi3_pins>;
135 pinctrl-names = "default";
136 assigned-clocks = <&gcc GSBI3_QUP_CLK>;
137 assigned-clock-rates = <24000000>;
138};
139
140&gsbi4 {
141 status = "okay";
142 qcom,mode = <GSBI_PROT_UART_W_FC>;
143};
144
145&gsbi4_serial {
146 status = "okay";
147 pinctrl-0 = <&gsbi4_pins>;
148 pinctrl-names = "default";
149};
150
151&gsbi5 {
152 status = "okay";
153 qcom,mode = <GSBI_PROT_I2C_UART>;
154};
155
156&gsbi5_i2c {
157 status = "okay";
158 clock-frequency = <200000>;
159 pinctrl-0 = <&gsbi5_i2c_pins>;
160 pinctrl-names = "default";
161};
162
163&gsbi5_serial {
164 status = "okay";
165 pinctrl-0 = <&gsbi5_uart_pins>;
166 pinctrl-names = "default";
167};
168
169&sdcc1 {
170 status = "okay";
171};
1// SPDX-License-Identifier: GPL-2.0+ OR MIT
2/*
3 * Device Tree Source for Sierra Wireless WP8548 Module
4 *
5 * Copyright (C) 2016 BayLibre, SAS.
6 * Author : Neil Armstrong <narmstrong@baylibre.com>
7 */
8
9#include "qcom-mdm9615.dtsi"
10
11/ {
12 model = "Sierra Wireless WP8548 Module";
13 compatible = "swir,wp8548", "qcom,mdm9615";
14
15 memory@48000000 {
16 device_type = "memory";
17 reg = <0x48000000 0x7F00000>;
18 };
19};
20
21&msmgpio {
22 pinctrl-0 = <&reset_out_pins>;
23 pinctrl-names = "default";
24
25 gsbi3_pins: gsbi3-state {
26 gsbi3-pins {
27 pins = "gpio8", "gpio9", "gpio10", "gpio11";
28 function = "gsbi3";
29 drive-strength = <8>;
30 bias-disable;
31 };
32 };
33
34 gsbi4_pins: gsbi4-state {
35 gsbi4-pins {
36 pins = "gpio12", "gpio13", "gpio14", "gpio15";
37 function = "gsbi4";
38 drive-strength = <8>;
39 bias-disable;
40 };
41 };
42
43 gsbi5_i2c_pins: gsbi5-i2c-state {
44 sda-pins {
45 pins = "gpio16";
46 function = "gsbi5_i2c";
47 drive-strength = <8>;
48 bias-disable;
49 };
50
51 scl-pins {
52 pins = "gpio17";
53 function = "gsbi5_i2c";
54 drive-strength = <2>;
55 bias-disable;
56 };
57 };
58
59 gsbi5_uart_pins: gsbi5-uart-state {
60 gsbi5-uart-pins {
61 pins = "gpio18", "gpio19";
62 function = "gsbi5_uart";
63 drive-strength = <8>;
64 bias-disable;
65 };
66 };
67
68 reset_out_pins: reset-out-state {
69 reset-out-pins {
70 pins = "gpio66";
71 function = "gpio";
72 drive-strength = <2>;
73 bias-pull-up;
74 output-high;
75 };
76 };
77};
78
79&pmicgpio {
80 usb_vbus_5v_pins: usb-vbus-5v-state {
81 pins = "gpio4";
82 function = "normal";
83 output-high;
84 bias-disable;
85 qcom,drive-strength = <1>;
86 power-source = <2>;
87 };
88};
89
90&gsbi3 {
91 status = "okay";
92 qcom,mode = <GSBI_PROT_SPI>;
93};
94
95&gsbi3_spi {
96 status = "okay";
97 pinctrl-0 = <&gsbi3_pins>;
98 pinctrl-names = "default";
99 assigned-clocks = <&gcc GSBI3_QUP_CLK>;
100 assigned-clock-rates = <24000000>;
101};
102
103&gsbi4 {
104 status = "okay";
105 qcom,mode = <GSBI_PROT_UART_W_FC>;
106};
107
108&gsbi4_serial {
109 status = "okay";
110 pinctrl-0 = <&gsbi4_pins>;
111 pinctrl-names = "default";
112};
113
114&gsbi5 {
115 status = "okay";
116 qcom,mode = <GSBI_PROT_I2C_UART>;
117};
118
119&gsbi5_i2c {
120 status = "okay";
121 clock-frequency = <200000>;
122 pinctrl-0 = <&gsbi5_i2c_pins>;
123 pinctrl-names = "default";
124};
125
126&gsbi5_serial {
127 status = "okay";
128 pinctrl-0 = <&gsbi5_uart_pins>;
129 pinctrl-names = "default";
130};
131
132&sdcc1 {
133 status = "okay";
134};