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1/*
2 * Copyright (C) 2007 Ben Skeggs.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 */
26
27#ifndef __NOUVEAU_DMA_H__
28#define __NOUVEAU_DMA_H__
29
30#include "nouveau_bo.h"
31#include "nouveau_chan.h"
32
33int nouveau_dma_wait(struct nouveau_channel *, int slots, int size);
34void nv50_dma_push(struct nouveau_channel *, u64 addr, int length);
35
36/*
37 * There's a hw race condition where you can't jump to your PUT offset,
38 * to avoid this we jump to offset + SKIPS and fill the difference with
39 * NOPs.
40 *
41 * xf86-video-nv configures the DMA fetch size to 32 bytes, and uses
42 * a SKIPS value of 8. Lets assume that the race condition is to do
43 * with writing into the fetch area, we configure a fetch size of 128
44 * bytes so we need a larger SKIPS value.
45 */
46#define NOUVEAU_DMA_SKIPS (128 / 4)
47
48/* Object handles - for stuff that's doesn't use handle == oclass. */
49enum {
50 NvDmaFB = 0x80000002,
51 NvDmaTT = 0x80000003,
52 NvNotify0 = 0x80000006,
53 NvSema = 0x8000000f,
54 NvEvoSema0 = 0x80000010,
55 NvEvoSema1 = 0x80000011,
56};
57
58static __must_check inline int
59RING_SPACE(struct nouveau_channel *chan, int size)
60{
61 int ret;
62
63 ret = nouveau_dma_wait(chan, 1, size);
64 if (ret)
65 return ret;
66
67 chan->dma.free -= size;
68 return 0;
69}
70
71static inline void
72OUT_RING(struct nouveau_channel *chan, int data)
73{
74 nouveau_bo_wr32(chan->push.buffer, chan->dma.cur++, data);
75}
76
77#define WRITE_PUT(val) do { \
78 mb(); \
79 nouveau_bo_rd32(chan->push.buffer, 0); \
80 nvif_wr32(&chan->user, chan->user_put, ((val) << 2) + chan->push.addr);\
81} while (0)
82
83static inline void
84FIRE_RING(struct nouveau_channel *chan)
85{
86 if (chan->dma.cur == chan->dma.put)
87 return;
88 chan->accel_done = true;
89
90 if (chan->dma.ib_max) {
91 nv50_dma_push(chan, chan->push.addr + (chan->dma.put << 2),
92 (chan->dma.cur - chan->dma.put) << 2);
93 } else {
94 WRITE_PUT(chan->dma.cur);
95 }
96
97 chan->dma.put = chan->dma.cur;
98}
99
100static inline void
101WIND_RING(struct nouveau_channel *chan)
102{
103 chan->dma.cur = chan->dma.put;
104}
105
106/* NV_SW object class */
107#define NV_SW_DMA_VBLSEM 0x0000018c
108#define NV_SW_VBLSEM_OFFSET 0x00000400
109#define NV_SW_VBLSEM_RELEASE_VALUE 0x00000404
110#define NV_SW_VBLSEM_RELEASE 0x00000408
111#define NV_SW_PAGE_FLIP 0x00000500
112
113#endif
1/*
2 * Copyright (C) 2007 Ben Skeggs.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 */
26
27#ifndef __NOUVEAU_DMA_H__
28#define __NOUVEAU_DMA_H__
29
30#include "nouveau_bo.h"
31#include "nouveau_chan.h"
32
33int nouveau_dma_wait(struct nouveau_channel *, int slots, int size);
34void nv50_dma_push(struct nouveau_channel *, u64 addr, u32 length,
35 bool no_prefetch);
36
37/*
38 * There's a hw race condition where you can't jump to your PUT offset,
39 * to avoid this we jump to offset + SKIPS and fill the difference with
40 * NOPs.
41 *
42 * xf86-video-nv configures the DMA fetch size to 32 bytes, and uses
43 * a SKIPS value of 8. Lets assume that the race condition is to do
44 * with writing into the fetch area, we configure a fetch size of 128
45 * bytes so we need a larger SKIPS value.
46 */
47#define NOUVEAU_DMA_SKIPS (128 / 4)
48
49/* Maximum push buffer size. */
50#define NV50_DMA_PUSH_MAX_LENGTH 0x7fffff
51
52/* Maximum IBs per ring. */
53#define NV50_DMA_IB_MAX ((0x02000 / 8) - 1)
54
55/* Object handles - for stuff that's doesn't use handle == oclass. */
56enum {
57 NvDmaFB = 0x80000002,
58 NvDmaTT = 0x80000003,
59 NvNotify0 = 0x80000006,
60 NvSema = 0x8000000f,
61 NvEvoSema0 = 0x80000010,
62 NvEvoSema1 = 0x80000011,
63};
64
65static __must_check inline int
66RING_SPACE(struct nouveau_channel *chan, int size)
67{
68 int ret;
69
70 ret = nouveau_dma_wait(chan, 1, size);
71 if (ret)
72 return ret;
73
74 chan->dma.free -= size;
75 return 0;
76}
77
78static inline void
79OUT_RING(struct nouveau_channel *chan, int data)
80{
81 nouveau_bo_wr32(chan->push.buffer, chan->dma.cur++, data);
82}
83
84#define WRITE_PUT(val) do { \
85 mb(); \
86 nouveau_bo_rd32(chan->push.buffer, 0); \
87 nvif_wr32(&chan->user, chan->user_put, ((val) << 2) + chan->push.addr);\
88} while (0)
89
90static inline void
91FIRE_RING(struct nouveau_channel *chan)
92{
93 if (chan->dma.cur == chan->dma.put)
94 return;
95 chan->accel_done = true;
96
97 if (chan->dma.ib_max) {
98 nv50_dma_push(chan, chan->push.addr + (chan->dma.put << 2),
99 (chan->dma.cur - chan->dma.put) << 2, false);
100 } else {
101 WRITE_PUT(chan->dma.cur);
102 }
103
104 chan->dma.put = chan->dma.cur;
105}
106
107static inline void
108WIND_RING(struct nouveau_channel *chan)
109{
110 chan->dma.cur = chan->dma.put;
111}
112
113/* NV_SW object class */
114#define NV_SW_DMA_VBLSEM 0x0000018c
115#define NV_SW_VBLSEM_OFFSET 0x00000400
116#define NV_SW_VBLSEM_RELEASE_VALUE 0x00000404
117#define NV_SW_VBLSEM_RELEASE 0x00000408
118#define NV_SW_PAGE_FLIP 0x00000500
119
120#endif