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1/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright © 2020 Intel Corporation
4 */
5
6#ifndef _INTEL_DPLL_H_
7#define _INTEL_DPLL_H_
8
9#include <linux/types.h>
10
11struct dpll;
12struct drm_i915_private;
13struct intel_crtc;
14struct intel_crtc_state;
15enum pipe;
16
17void intel_dpll_init_clock_hook(struct drm_i915_private *dev_priv);
18int vlv_calc_dpll_params(int refclk, struct dpll *clock);
19int pnv_calc_dpll_params(int refclk, struct dpll *clock);
20int i9xx_calc_dpll_params(int refclk, struct dpll *clock);
21void vlv_compute_dpll(struct intel_crtc *crtc,
22 struct intel_crtc_state *pipe_config);
23void chv_compute_dpll(struct intel_crtc *crtc,
24 struct intel_crtc_state *pipe_config);
25
26int vlv_force_pll_on(struct drm_i915_private *dev_priv, enum pipe pipe,
27 const struct dpll *dpll);
28void vlv_force_pll_off(struct drm_i915_private *dev_priv, enum pipe pipe);
29void i9xx_enable_pll(struct intel_crtc *crtc,
30 const struct intel_crtc_state *crtc_state);
31void vlv_enable_pll(struct intel_crtc *crtc,
32 const struct intel_crtc_state *pipe_config);
33void chv_enable_pll(struct intel_crtc *crtc,
34 const struct intel_crtc_state *pipe_config);
35void vlv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe);
36void chv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe);
37void i9xx_disable_pll(const struct intel_crtc_state *crtc_state);
38void vlv_prepare_pll(struct intel_crtc *crtc,
39 const struct intel_crtc_state *pipe_config);
40void chv_prepare_pll(struct intel_crtc *crtc,
41 const struct intel_crtc_state *pipe_config);
42bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state,
43 struct dpll *best_clock);
44int chv_calc_dpll_params(int refclk, struct dpll *pll_clock);
45
46#endif
1/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright © 2020 Intel Corporation
4 */
5
6#ifndef _INTEL_DPLL_H_
7#define _INTEL_DPLL_H_
8
9#include <linux/types.h>
10
11struct dpll;
12struct drm_i915_private;
13struct intel_atomic_state;
14struct intel_crtc;
15struct intel_crtc_state;
16struct intel_dpll_hw_state;
17enum pipe;
18
19void intel_dpll_init_clock_hook(struct drm_i915_private *dev_priv);
20int intel_dpll_crtc_compute_clock(struct intel_atomic_state *state,
21 struct intel_crtc *crtc);
22int intel_dpll_crtc_get_shared_dpll(struct intel_atomic_state *state,
23 struct intel_crtc *crtc);
24int i9xx_calc_dpll_params(int refclk, struct dpll *clock);
25u32 i9xx_dpll_compute_fp(const struct dpll *dpll);
26void i9xx_dpll_get_hw_state(struct intel_crtc *crtc,
27 struct intel_dpll_hw_state *dpll_hw_state);
28void vlv_compute_dpll(struct intel_crtc_state *crtc_state);
29void chv_compute_dpll(struct intel_crtc_state *crtc_state);
30
31int vlv_force_pll_on(struct drm_i915_private *dev_priv, enum pipe pipe,
32 const struct dpll *dpll);
33void vlv_force_pll_off(struct drm_i915_private *dev_priv, enum pipe pipe);
34
35void chv_enable_pll(const struct intel_crtc_state *crtc_state);
36void chv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe);
37void vlv_enable_pll(const struct intel_crtc_state *crtc_state);
38void vlv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe);
39void i9xx_enable_pll(const struct intel_crtc_state *crtc_state);
40void i9xx_disable_pll(const struct intel_crtc_state *crtc_state);
41bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state,
42 struct dpll *best_clock);
43int chv_calc_dpll_params(int refclk, struct dpll *pll_clock);
44
45void i9xx_crtc_clock_get(struct intel_crtc_state *crtc_state);
46void vlv_crtc_clock_get(struct intel_crtc_state *crtc_state);
47void chv_crtc_clock_get(struct intel_crtc_state *crtc_state);
48
49void assert_pll_enabled(struct drm_i915_private *i915, enum pipe pipe);
50void assert_pll_disabled(struct drm_i915_private *i915, enum pipe pipe);
51
52#endif