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1// SPDX-License-Identifier: MIT
2/* Copyright 2021 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: David Nieto
23 * Roy Sun
24 */
25
26#include <linux/debugfs.h>
27#include <linux/list.h>
28#include <linux/module.h>
29#include <linux/uaccess.h>
30#include <linux/reboot.h>
31#include <linux/syscalls.h>
32
33#include <drm/amdgpu_drm.h>
34#include <drm/drm_debugfs.h>
35
36#include "amdgpu.h"
37#include "amdgpu_vm.h"
38#include "amdgpu_gem.h"
39#include "amdgpu_ctx.h"
40#include "amdgpu_fdinfo.h"
41
42
43static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = {
44 [AMDGPU_HW_IP_GFX] = "gfx",
45 [AMDGPU_HW_IP_COMPUTE] = "compute",
46 [AMDGPU_HW_IP_DMA] = "dma",
47 [AMDGPU_HW_IP_UVD] = "dec",
48 [AMDGPU_HW_IP_VCE] = "enc",
49 [AMDGPU_HW_IP_UVD_ENC] = "enc_1",
50 [AMDGPU_HW_IP_VCN_DEC] = "dec",
51 [AMDGPU_HW_IP_VCN_ENC] = "enc",
52 [AMDGPU_HW_IP_VCN_JPEG] = "jpeg",
53};
54
55void amdgpu_show_fdinfo(struct seq_file *m, struct file *f)
56{
57 struct amdgpu_fpriv *fpriv;
58 uint32_t bus, dev, fn, i, domain;
59 uint64_t vram_mem = 0, gtt_mem = 0, cpu_mem = 0;
60 struct drm_file *file = f->private_data;
61 struct amdgpu_device *adev = drm_to_adev(file->minor->dev);
62 struct amdgpu_bo *root;
63 int ret;
64
65 ret = amdgpu_file_to_fpriv(f, &fpriv);
66 if (ret)
67 return;
68 bus = adev->pdev->bus->number;
69 domain = pci_domain_nr(adev->pdev->bus);
70 dev = PCI_SLOT(adev->pdev->devfn);
71 fn = PCI_FUNC(adev->pdev->devfn);
72
73 root = amdgpu_bo_ref(fpriv->vm.root.bo);
74 if (!root)
75 return;
76
77 ret = amdgpu_bo_reserve(root, false);
78 if (ret) {
79 DRM_ERROR("Fail to reserve bo\n");
80 return;
81 }
82 amdgpu_vm_get_memory(&fpriv->vm, &vram_mem, >t_mem, &cpu_mem);
83 amdgpu_bo_unreserve(root);
84 amdgpu_bo_unref(&root);
85
86 seq_printf(m, "pdev:\t%04x:%02x:%02x.%d\npasid:\t%u\n", domain, bus,
87 dev, fn, fpriv->vm.pasid);
88 seq_printf(m, "vram mem:\t%llu kB\n", vram_mem/1024UL);
89 seq_printf(m, "gtt mem:\t%llu kB\n", gtt_mem/1024UL);
90 seq_printf(m, "cpu mem:\t%llu kB\n", cpu_mem/1024UL);
91 for (i = 0; i < AMDGPU_HW_IP_NUM; i++) {
92 uint32_t count = amdgpu_ctx_num_entities[i];
93 int idx = 0;
94 uint64_t total = 0, min = 0;
95 uint32_t perc, frac;
96
97 for (idx = 0; idx < count; idx++) {
98 total = amdgpu_ctx_mgr_fence_usage(&fpriv->ctx_mgr,
99 i, idx, &min);
100 if ((total == 0) || (min == 0))
101 continue;
102
103 perc = div64_u64(10000 * total, min);
104 frac = perc % 100;
105
106 seq_printf(m, "%s%d:\t%d.%d%%\n",
107 amdgpu_ip_name[i],
108 idx, perc/100, frac);
109 }
110 }
111}
1// SPDX-License-Identifier: MIT
2/* Copyright 2021 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: David Nieto
23 * Roy Sun
24 */
25
26#include <linux/debugfs.h>
27#include <linux/list.h>
28#include <linux/module.h>
29#include <linux/uaccess.h>
30#include <linux/reboot.h>
31#include <linux/syscalls.h>
32
33#include <drm/amdgpu_drm.h>
34#include <drm/drm_debugfs.h>
35#include <drm/drm_drv.h>
36#include <drm/drm_file.h>
37
38#include "amdgpu.h"
39#include "amdgpu_vm.h"
40#include "amdgpu_gem.h"
41#include "amdgpu_ctx.h"
42#include "amdgpu_fdinfo.h"
43
44
45static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = {
46 [AMDGPU_HW_IP_GFX] = "gfx",
47 [AMDGPU_HW_IP_COMPUTE] = "compute",
48 [AMDGPU_HW_IP_DMA] = "dma",
49 [AMDGPU_HW_IP_UVD] = "dec",
50 [AMDGPU_HW_IP_VCE] = "enc",
51 [AMDGPU_HW_IP_UVD_ENC] = "enc_1",
52 [AMDGPU_HW_IP_VCN_DEC] = "dec",
53 [AMDGPU_HW_IP_VCN_ENC] = "enc",
54 [AMDGPU_HW_IP_VCN_JPEG] = "jpeg",
55 [AMDGPU_HW_IP_VPE] = "vpe",
56};
57
58void amdgpu_show_fdinfo(struct drm_printer *p, struct drm_file *file)
59{
60 struct amdgpu_fpriv *fpriv = file->driver_priv;
61 struct amdgpu_vm *vm = &fpriv->vm;
62
63 struct amdgpu_mem_stats stats[__AMDGPU_PL_LAST + 1] = { };
64 ktime_t usage[AMDGPU_HW_IP_NUM];
65 const char *pl_name[] = {
66 [TTM_PL_VRAM] = "vram",
67 [TTM_PL_TT] = "gtt",
68 [TTM_PL_SYSTEM] = "cpu",
69 [AMDGPU_PL_GDS] = "gds",
70 [AMDGPU_PL_GWS] = "gws",
71 [AMDGPU_PL_OA] = "oa",
72 [AMDGPU_PL_DOORBELL] = "doorbell",
73 };
74 unsigned int hw_ip, i;
75 int ret;
76
77 ret = amdgpu_bo_reserve(vm->root.bo, false);
78 if (ret)
79 return;
80
81 amdgpu_vm_get_memory(vm, stats, ARRAY_SIZE(stats));
82 amdgpu_bo_unreserve(vm->root.bo);
83
84 amdgpu_ctx_mgr_usage(&fpriv->ctx_mgr, usage);
85
86 /*
87 * ******************************************************************
88 * For text output format description please see drm-usage-stats.rst!
89 * ******************************************************************
90 */
91
92 drm_printf(p, "pasid:\t%u\n", fpriv->vm.pasid);
93
94 for (i = 0; i < ARRAY_SIZE(pl_name); i++) {
95 if (!pl_name[i])
96 continue;
97
98 drm_print_memory_stats(p,
99 &stats[i].drm,
100 DRM_GEM_OBJECT_RESIDENT |
101 DRM_GEM_OBJECT_PURGEABLE,
102 pl_name[i]);
103 }
104
105 /* Legacy amdgpu keys, alias to drm-resident-memory-: */
106 drm_printf(p, "drm-memory-vram:\t%llu KiB\n",
107 stats[TTM_PL_VRAM].drm.resident/1024UL);
108 drm_printf(p, "drm-memory-gtt: \t%llu KiB\n",
109 stats[TTM_PL_TT].drm.resident/1024UL);
110 drm_printf(p, "drm-memory-cpu: \t%llu KiB\n",
111 stats[TTM_PL_SYSTEM].drm.resident/1024UL);
112
113 /* Amdgpu specific memory accounting keys: */
114 drm_printf(p, "amd-evicted-vram:\t%llu KiB\n",
115 stats[TTM_PL_VRAM].evicted/1024UL);
116 drm_printf(p, "amd-requested-vram:\t%llu KiB\n",
117 stats[TTM_PL_VRAM].requested/1024UL);
118 drm_printf(p, "amd-requested-gtt:\t%llu KiB\n",
119 stats[TTM_PL_TT].requested/1024UL);
120
121 for (hw_ip = 0; hw_ip < AMDGPU_HW_IP_NUM; ++hw_ip) {
122 if (!usage[hw_ip])
123 continue;
124
125 drm_printf(p, "drm-engine-%s:\t%lld ns\n", amdgpu_ip_name[hw_ip],
126 ktime_to_ns(usage[hw_ip]));
127 }
128}