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1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright 2019 NXP Semiconductors
3 */
4#ifndef _MSCC_FELIX_H
5#define _MSCC_FELIX_H
6
7#define ocelot_to_felix(o) container_of((o), struct felix, ocelot)
8
9/* Platform-specific information */
10struct felix_info {
11 const struct resource *target_io_res;
12 const struct resource *port_io_res;
13 const struct resource *imdio_res;
14 const struct reg_field *regfields;
15 const u32 *const *map;
16 const struct ocelot_ops *ops;
17 int num_mact_rows;
18 const struct ocelot_stat_layout *stats_layout;
19 unsigned int num_stats;
20 int num_ports;
21 int num_tx_queues;
22 struct vcap_props *vcap;
23 int switch_pci_bar;
24 int imdio_pci_bar;
25 const struct ptp_clock_info *ptp_caps;
26
27 /* Some Ocelot switches are integrated into the SoC without the
28 * extraction IRQ line connected to the ARM GIC. By enabling this
29 * workaround, the few packets that are delivered to the CPU port
30 * module (currently only PTP) are copied not only to the hardware CPU
31 * port module, but also to the 802.1Q Ethernet CPU port, and polling
32 * the extraction registers is triggered once the DSA tagger sees a PTP
33 * frame. The Ethernet frame is only used as a notification: it is
34 * dropped, and the original frame is extracted over MMIO and annotated
35 * with the RX timestamp.
36 */
37 bool quirk_no_xtr_irq;
38
39 int (*mdio_bus_alloc)(struct ocelot *ocelot);
40 void (*mdio_bus_free)(struct ocelot *ocelot);
41 void (*phylink_validate)(struct ocelot *ocelot, int port,
42 unsigned long *supported,
43 struct phylink_link_state *state);
44 int (*prevalidate_phy_mode)(struct ocelot *ocelot, int port,
45 phy_interface_t phy_mode);
46 int (*port_setup_tc)(struct dsa_switch *ds, int port,
47 enum tc_setup_type type, void *type_data);
48 void (*port_sched_speed_set)(struct ocelot *ocelot, int port,
49 u32 speed);
50};
51
52extern const struct dsa_switch_ops felix_switch_ops;
53
54/* DSA glue / front-end for struct ocelot */
55struct felix {
56 struct dsa_switch *ds;
57 const struct felix_info *info;
58 struct ocelot ocelot;
59 struct mii_bus *imdio;
60 struct lynx_pcs **pcs;
61 resource_size_t switch_base;
62 resource_size_t imdio_base;
63 struct dsa_8021q_context *dsa_8021q_ctx;
64 enum dsa_tag_protocol tag_proto;
65};
66
67struct net_device *felix_port_to_netdev(struct ocelot *ocelot, int port);
68int felix_netdev_to_port(struct net_device *dev);
69
70#endif
1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright 2019 NXP Semiconductors
3 */
4#ifndef _MSCC_FELIX_H
5#define _MSCC_FELIX_H
6
7#define ocelot_to_felix(o) container_of((o), struct felix, ocelot)
8#define FELIX_NUM_TC 8
9
10/* Platform-specific information */
11struct felix_info {
12 const struct resource *target_io_res;
13 const struct resource *port_io_res;
14 const struct resource *imdio_res;
15 const struct reg_field *regfields;
16 const u32 *const *map;
17 const struct ocelot_ops *ops;
18 int shared_queue_sz;
19 int num_mact_rows;
20 const struct ocelot_stat_layout *stats_layout;
21 unsigned int num_stats;
22 int num_ports;
23 int num_tx_queues;
24 struct vcap_field *vcap_is2_keys;
25 struct vcap_field *vcap_is2_actions;
26 const struct vcap_props *vcap;
27 int switch_pci_bar;
28 int imdio_pci_bar;
29 int (*mdio_bus_alloc)(struct ocelot *ocelot);
30 void (*mdio_bus_free)(struct ocelot *ocelot);
31 void (*pcs_config)(struct ocelot *ocelot, int port,
32 unsigned int link_an_mode,
33 const struct phylink_link_state *state);
34 void (*pcs_link_up)(struct ocelot *ocelot, int port,
35 unsigned int link_an_mode,
36 phy_interface_t interface,
37 int speed, int duplex);
38 void (*pcs_link_state)(struct ocelot *ocelot, int port,
39 struct phylink_link_state *state);
40 void (*phylink_validate)(struct ocelot *ocelot, int port,
41 unsigned long *supported,
42 struct phylink_link_state *state);
43 int (*prevalidate_phy_mode)(struct ocelot *ocelot, int port,
44 phy_interface_t phy_mode);
45 int (*port_setup_tc)(struct dsa_switch *ds, int port,
46 enum tc_setup_type type, void *type_data);
47 void (*port_sched_speed_set)(struct ocelot *ocelot, int port,
48 u32 speed);
49 void (*xmit_template_populate)(struct ocelot *ocelot, int port);
50};
51
52extern const struct dsa_switch_ops felix_switch_ops;
53extern struct pci_driver felix_vsc9959_pci_driver;
54extern struct platform_driver seville_vsc9953_driver;
55
56/* DSA glue / front-end for struct ocelot */
57struct felix {
58 struct dsa_switch *ds;
59 const struct felix_info *info;
60 struct ocelot ocelot;
61 struct mii_bus *imdio;
62 struct phy_device **pcs;
63 resource_size_t switch_base;
64 resource_size_t imdio_base;
65};
66
67void vsc9959_pcs_link_state(struct ocelot *ocelot, int port,
68 struct phylink_link_state *state);
69void vsc9959_pcs_config(struct ocelot *ocelot, int port,
70 unsigned int link_an_mode,
71 const struct phylink_link_state *state);
72void vsc9959_pcs_link_up(struct ocelot *ocelot, int port,
73 unsigned int link_an_mode,
74 phy_interface_t interface,
75 int speed, int duplex);
76void vsc9959_mdio_bus_free(struct ocelot *ocelot);
77
78#endif