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1// SPDX-License-Identifier: MIT
2/*
3 * Copyright © 2021 Intel Corporation
4 */
5
6#include <drm/drm_framebuffer.h>
7
8#include "intel_display.h"
9#include "intel_display_types.h"
10#include "intel_fb.h"
11
12#define check_array_bounds(i915, a, i) drm_WARN_ON(&(i915)->drm, (i) >= ARRAY_SIZE(a))
13
14bool is_ccs_plane(const struct drm_framebuffer *fb, int plane)
15{
16 if (!is_ccs_modifier(fb->modifier))
17 return false;
18
19 return plane >= fb->format->num_planes / 2;
20}
21
22bool is_gen12_ccs_plane(const struct drm_framebuffer *fb, int plane)
23{
24 return is_gen12_ccs_modifier(fb->modifier) && is_ccs_plane(fb, plane);
25}
26
27bool is_gen12_ccs_cc_plane(const struct drm_framebuffer *fb, int plane)
28{
29 return fb->modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC &&
30 plane == 2;
31}
32
33bool is_semiplanar_uv_plane(const struct drm_framebuffer *fb, int color_plane)
34{
35 return intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier) &&
36 color_plane == 1;
37}
38
39bool is_surface_linear(const struct drm_framebuffer *fb, int color_plane)
40{
41 return fb->modifier == DRM_FORMAT_MOD_LINEAR ||
42 is_gen12_ccs_plane(fb, color_plane);
43}
44
45int main_to_ccs_plane(const struct drm_framebuffer *fb, int main_plane)
46{
47 drm_WARN_ON(fb->dev, !is_ccs_modifier(fb->modifier) ||
48 (main_plane && main_plane >= fb->format->num_planes / 2));
49
50 return fb->format->num_planes / 2 + main_plane;
51}
52
53int skl_ccs_to_main_plane(const struct drm_framebuffer *fb, int ccs_plane)
54{
55 drm_WARN_ON(fb->dev, !is_ccs_modifier(fb->modifier) ||
56 ccs_plane < fb->format->num_planes / 2);
57
58 if (is_gen12_ccs_cc_plane(fb, ccs_plane))
59 return 0;
60
61 return ccs_plane - fb->format->num_planes / 2;
62}
63
64int skl_main_to_aux_plane(const struct drm_framebuffer *fb, int main_plane)
65{
66 struct drm_i915_private *i915 = to_i915(fb->dev);
67
68 if (is_ccs_modifier(fb->modifier))
69 return main_to_ccs_plane(fb, main_plane);
70 else if (DISPLAY_VER(i915) < 11 &&
71 intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier))
72 return 1;
73 else
74 return 0;
75}
76
77unsigned int intel_tile_size(const struct drm_i915_private *i915)
78{
79 return DISPLAY_VER(i915) == 2 ? 2048 : 4096;
80}
81
82unsigned int intel_tile_height(const struct drm_framebuffer *fb, int color_plane)
83{
84 if (is_gen12_ccs_plane(fb, color_plane))
85 return 1;
86
87 return intel_tile_size(to_i915(fb->dev)) /
88 intel_tile_width_bytes(fb, color_plane);
89}
90
91/* Return the tile dimensions in pixel units */
92static void intel_tile_dims(const struct drm_framebuffer *fb, int color_plane,
93 unsigned int *tile_width,
94 unsigned int *tile_height)
95{
96 unsigned int tile_width_bytes = intel_tile_width_bytes(fb, color_plane);
97 unsigned int cpp = fb->format->cpp[color_plane];
98
99 *tile_width = tile_width_bytes / cpp;
100 *tile_height = intel_tile_height(fb, color_plane);
101}
102
103unsigned int intel_tile_row_size(const struct drm_framebuffer *fb, int color_plane)
104{
105 unsigned int tile_width, tile_height;
106
107 intel_tile_dims(fb, color_plane, &tile_width, &tile_height);
108
109 return fb->pitches[color_plane] * tile_height;
110}
111
112unsigned int intel_cursor_alignment(const struct drm_i915_private *i915)
113{
114 if (IS_I830(i915))
115 return 16 * 1024;
116 else if (IS_I85X(i915))
117 return 256;
118 else if (IS_I845G(i915) || IS_I865G(i915))
119 return 32;
120 else
121 return 4 * 1024;
122}
123
124void intel_fb_plane_get_subsampling(int *hsub, int *vsub,
125 const struct drm_framebuffer *fb,
126 int color_plane)
127{
128 int main_plane;
129
130 if (color_plane == 0) {
131 *hsub = 1;
132 *vsub = 1;
133
134 return;
135 }
136
137 /*
138 * TODO: Deduct the subsampling from the char block for all CCS
139 * formats and planes.
140 */
141 if (!is_gen12_ccs_plane(fb, color_plane)) {
142 *hsub = fb->format->hsub;
143 *vsub = fb->format->vsub;
144
145 return;
146 }
147
148 main_plane = skl_ccs_to_main_plane(fb, color_plane);
149 *hsub = drm_format_info_block_width(fb->format, color_plane) /
150 drm_format_info_block_width(fb->format, main_plane);
151
152 /*
153 * The min stride check in the core framebuffer_check() function
154 * assumes that format->hsub applies to every plane except for the
155 * first plane. That's incorrect for the CCS AUX plane of the first
156 * plane, but for the above check to pass we must define the block
157 * width with that subsampling applied to it. Adjust the width here
158 * accordingly, so we can calculate the actual subsampling factor.
159 */
160 if (main_plane == 0)
161 *hsub *= fb->format->hsub;
162
163 *vsub = 32;
164}
165
166static void intel_fb_plane_dims(const struct intel_framebuffer *fb, int color_plane, int *w, int *h)
167{
168 int main_plane = is_ccs_plane(&fb->base, color_plane) ?
169 skl_ccs_to_main_plane(&fb->base, color_plane) : 0;
170 int main_hsub, main_vsub;
171 int hsub, vsub;
172
173 intel_fb_plane_get_subsampling(&main_hsub, &main_vsub, &fb->base, main_plane);
174 intel_fb_plane_get_subsampling(&hsub, &vsub, &fb->base, color_plane);
175 *w = fb->base.width / main_hsub / hsub;
176 *h = fb->base.height / main_vsub / vsub;
177}
178
179static u32 intel_adjust_tile_offset(int *x, int *y,
180 unsigned int tile_width,
181 unsigned int tile_height,
182 unsigned int tile_size,
183 unsigned int pitch_tiles,
184 u32 old_offset,
185 u32 new_offset)
186{
187 unsigned int pitch_pixels = pitch_tiles * tile_width;
188 unsigned int tiles;
189
190 WARN_ON(old_offset & (tile_size - 1));
191 WARN_ON(new_offset & (tile_size - 1));
192 WARN_ON(new_offset > old_offset);
193
194 tiles = (old_offset - new_offset) / tile_size;
195
196 *y += tiles / pitch_tiles * tile_height;
197 *x += tiles % pitch_tiles * tile_width;
198
199 /* minimize x in case it got needlessly big */
200 *y += *x / pitch_pixels * tile_height;
201 *x %= pitch_pixels;
202
203 return new_offset;
204}
205
206static u32 intel_adjust_aligned_offset(int *x, int *y,
207 const struct drm_framebuffer *fb,
208 int color_plane,
209 unsigned int rotation,
210 unsigned int pitch,
211 u32 old_offset, u32 new_offset)
212{
213 struct drm_i915_private *i915 = to_i915(fb->dev);
214 unsigned int cpp = fb->format->cpp[color_plane];
215
216 drm_WARN_ON(&i915->drm, new_offset > old_offset);
217
218 if (!is_surface_linear(fb, color_plane)) {
219 unsigned int tile_size, tile_width, tile_height;
220 unsigned int pitch_tiles;
221
222 tile_size = intel_tile_size(i915);
223 intel_tile_dims(fb, color_plane, &tile_width, &tile_height);
224
225 if (drm_rotation_90_or_270(rotation)) {
226 pitch_tiles = pitch / tile_height;
227 swap(tile_width, tile_height);
228 } else {
229 pitch_tiles = pitch / (tile_width * cpp);
230 }
231
232 intel_adjust_tile_offset(x, y, tile_width, tile_height,
233 tile_size, pitch_tiles,
234 old_offset, new_offset);
235 } else {
236 old_offset += *y * pitch + *x * cpp;
237
238 *y = (old_offset - new_offset) / pitch;
239 *x = ((old_offset - new_offset) - *y * pitch) / cpp;
240 }
241
242 return new_offset;
243}
244
245/*
246 * Adjust the tile offset by moving the difference into
247 * the x/y offsets.
248 */
249u32 intel_plane_adjust_aligned_offset(int *x, int *y,
250 const struct intel_plane_state *state,
251 int color_plane,
252 u32 old_offset, u32 new_offset)
253{
254 return intel_adjust_aligned_offset(x, y, state->hw.fb, color_plane,
255 state->hw.rotation,
256 state->view.color_plane[color_plane].stride,
257 old_offset, new_offset);
258}
259
260/*
261 * Computes the aligned offset to the base tile and adjusts
262 * x, y. bytes per pixel is assumed to be a power-of-two.
263 *
264 * In the 90/270 rotated case, x and y are assumed
265 * to be already rotated to match the rotated GTT view, and
266 * pitch is the tile_height aligned framebuffer height.
267 *
268 * This function is used when computing the derived information
269 * under intel_framebuffer, so using any of that information
270 * here is not allowed. Anything under drm_framebuffer can be
271 * used. This is why the user has to pass in the pitch since it
272 * is specified in the rotated orientation.
273 */
274static u32 intel_compute_aligned_offset(struct drm_i915_private *i915,
275 int *x, int *y,
276 const struct drm_framebuffer *fb,
277 int color_plane,
278 unsigned int pitch,
279 unsigned int rotation,
280 u32 alignment)
281{
282 unsigned int cpp = fb->format->cpp[color_plane];
283 u32 offset, offset_aligned;
284
285 if (!is_surface_linear(fb, color_plane)) {
286 unsigned int tile_size, tile_width, tile_height;
287 unsigned int tile_rows, tiles, pitch_tiles;
288
289 tile_size = intel_tile_size(i915);
290 intel_tile_dims(fb, color_plane, &tile_width, &tile_height);
291
292 if (drm_rotation_90_or_270(rotation)) {
293 pitch_tiles = pitch / tile_height;
294 swap(tile_width, tile_height);
295 } else {
296 pitch_tiles = pitch / (tile_width * cpp);
297 }
298
299 tile_rows = *y / tile_height;
300 *y %= tile_height;
301
302 tiles = *x / tile_width;
303 *x %= tile_width;
304
305 offset = (tile_rows * pitch_tiles + tiles) * tile_size;
306
307 offset_aligned = offset;
308 if (alignment)
309 offset_aligned = rounddown(offset_aligned, alignment);
310
311 intel_adjust_tile_offset(x, y, tile_width, tile_height,
312 tile_size, pitch_tiles,
313 offset, offset_aligned);
314 } else {
315 offset = *y * pitch + *x * cpp;
316 offset_aligned = offset;
317 if (alignment) {
318 offset_aligned = rounddown(offset_aligned, alignment);
319 *y = (offset % alignment) / pitch;
320 *x = ((offset % alignment) - *y * pitch) / cpp;
321 } else {
322 *y = *x = 0;
323 }
324 }
325
326 return offset_aligned;
327}
328
329u32 intel_plane_compute_aligned_offset(int *x, int *y,
330 const struct intel_plane_state *state,
331 int color_plane)
332{
333 struct intel_plane *intel_plane = to_intel_plane(state->uapi.plane);
334 struct drm_i915_private *i915 = to_i915(intel_plane->base.dev);
335 const struct drm_framebuffer *fb = state->hw.fb;
336 unsigned int rotation = state->hw.rotation;
337 int pitch = state->view.color_plane[color_plane].stride;
338 u32 alignment;
339
340 if (intel_plane->id == PLANE_CURSOR)
341 alignment = intel_cursor_alignment(i915);
342 else
343 alignment = intel_surf_alignment(fb, color_plane);
344
345 return intel_compute_aligned_offset(i915, x, y, fb, color_plane,
346 pitch, rotation, alignment);
347}
348
349/* Convert the fb->offset[] into x/y offsets */
350static int intel_fb_offset_to_xy(int *x, int *y,
351 const struct drm_framebuffer *fb,
352 int color_plane)
353{
354 struct drm_i915_private *i915 = to_i915(fb->dev);
355 unsigned int height;
356 u32 alignment;
357
358 /*
359 * All DPT color planes must be 512*4k aligned (the amount mapped by a
360 * single DPT page). For ADL_P CCS FBs this only works by requiring
361 * the allocated offsets to be 2MB aligned. Once supoort to remap
362 * such FBs is added we can remove this requirement, as then all the
363 * planes can be remapped to an aligned offset.
364 */
365 if (IS_ALDERLAKE_P(i915) && is_ccs_modifier(fb->modifier))
366 alignment = 512 * 4096;
367 else if (DISPLAY_VER(i915) >= 12 &&
368 is_semiplanar_uv_plane(fb, color_plane))
369 alignment = intel_tile_row_size(fb, color_plane);
370 else if (fb->modifier != DRM_FORMAT_MOD_LINEAR)
371 alignment = intel_tile_size(i915);
372 else
373 alignment = 0;
374
375 if (alignment != 0 && fb->offsets[color_plane] % alignment) {
376 drm_dbg_kms(&i915->drm,
377 "Misaligned offset 0x%08x for color plane %d\n",
378 fb->offsets[color_plane], color_plane);
379 return -EINVAL;
380 }
381
382 height = drm_framebuffer_plane_height(fb->height, fb, color_plane);
383 height = ALIGN(height, intel_tile_height(fb, color_plane));
384
385 /* Catch potential overflows early */
386 if (add_overflows_t(u32, mul_u32_u32(height, fb->pitches[color_plane]),
387 fb->offsets[color_plane])) {
388 drm_dbg_kms(&i915->drm,
389 "Bad offset 0x%08x or pitch %d for color plane %d\n",
390 fb->offsets[color_plane], fb->pitches[color_plane],
391 color_plane);
392 return -ERANGE;
393 }
394
395 *x = 0;
396 *y = 0;
397
398 intel_adjust_aligned_offset(x, y,
399 fb, color_plane, DRM_MODE_ROTATE_0,
400 fb->pitches[color_plane],
401 fb->offsets[color_plane], 0);
402
403 return 0;
404}
405
406static int intel_fb_check_ccs_xy(const struct drm_framebuffer *fb, int ccs_plane, int x, int y)
407{
408 struct drm_i915_private *i915 = to_i915(fb->dev);
409 const struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
410 int main_plane;
411 int hsub, vsub;
412 int tile_width, tile_height;
413 int ccs_x, ccs_y;
414 int main_x, main_y;
415
416 if (!is_ccs_plane(fb, ccs_plane) || is_gen12_ccs_cc_plane(fb, ccs_plane))
417 return 0;
418
419 intel_tile_dims(fb, ccs_plane, &tile_width, &tile_height);
420 intel_fb_plane_get_subsampling(&hsub, &vsub, fb, ccs_plane);
421
422 tile_width *= hsub;
423 tile_height *= vsub;
424
425 ccs_x = (x * hsub) % tile_width;
426 ccs_y = (y * vsub) % tile_height;
427
428 main_plane = skl_ccs_to_main_plane(fb, ccs_plane);
429 main_x = intel_fb->normal_view.color_plane[main_plane].x % tile_width;
430 main_y = intel_fb->normal_view.color_plane[main_plane].y % tile_height;
431
432 /*
433 * CCS doesn't have its own x/y offset register, so the intra CCS tile
434 * x/y offsets must match between CCS and the main surface.
435 */
436 if (main_x != ccs_x || main_y != ccs_y) {
437 drm_dbg_kms(&i915->drm,
438 "Bad CCS x/y (main %d,%d ccs %d,%d) full (main %d,%d ccs %d,%d)\n",
439 main_x, main_y,
440 ccs_x, ccs_y,
441 intel_fb->normal_view.color_plane[main_plane].x,
442 intel_fb->normal_view.color_plane[main_plane].y,
443 x, y);
444 return -EINVAL;
445 }
446
447 return 0;
448}
449
450static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
451{
452 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
453 struct drm_i915_private *i915 = to_i915(plane->base.dev);
454 const struct drm_framebuffer *fb = plane_state->hw.fb;
455 int i;
456
457 /* We don't want to deal with remapping with cursors */
458 if (plane->id == PLANE_CURSOR)
459 return false;
460
461 /*
462 * The display engine limits already match/exceed the
463 * render engine limits, so not much point in remapping.
464 * Would also need to deal with the fence POT alignment
465 * and gen2 2KiB GTT tile size.
466 */
467 if (DISPLAY_VER(i915) < 4)
468 return false;
469
470 /*
471 * The new CCS hash mode isn't compatible with remapping as
472 * the virtual address of the pages affects the compressed data.
473 */
474 if (is_ccs_modifier(fb->modifier))
475 return false;
476
477 /* Linear needs a page aligned stride for remapping */
478 if (fb->modifier == DRM_FORMAT_MOD_LINEAR) {
479 unsigned int alignment = intel_tile_size(i915) - 1;
480
481 for (i = 0; i < fb->format->num_planes; i++) {
482 if (fb->pitches[i] & alignment)
483 return false;
484 }
485 }
486
487 return true;
488}
489
490bool intel_fb_needs_pot_stride_remap(const struct intel_framebuffer *fb)
491{
492 struct drm_i915_private *i915 = to_i915(fb->base.dev);
493
494 return IS_ALDERLAKE_P(i915) && fb->base.modifier != DRM_FORMAT_MOD_LINEAR &&
495 !is_ccs_modifier(fb->base.modifier);
496}
497
498static int intel_fb_pitch(const struct intel_framebuffer *fb, int color_plane, unsigned int rotation)
499{
500 if (drm_rotation_90_or_270(rotation))
501 return fb->rotated_view.color_plane[color_plane].stride;
502 else if (intel_fb_needs_pot_stride_remap(fb))
503 return fb->remapped_view.color_plane[color_plane].stride;
504 else
505 return fb->normal_view.color_plane[color_plane].stride;
506}
507
508static bool intel_plane_needs_remap(const struct intel_plane_state *plane_state)
509{
510 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
511 const struct intel_framebuffer *fb = to_intel_framebuffer(plane_state->hw.fb);
512 unsigned int rotation = plane_state->hw.rotation;
513 u32 stride, max_stride;
514
515 /*
516 * No remapping for invisible planes since we don't have
517 * an actual source viewport to remap.
518 */
519 if (!plane_state->uapi.visible)
520 return false;
521
522 if (!intel_plane_can_remap(plane_state))
523 return false;
524
525 /*
526 * FIXME: aux plane limits on gen9+ are
527 * unclear in Bspec, for now no checking.
528 */
529 stride = intel_fb_pitch(fb, 0, rotation);
530 max_stride = plane->max_stride(plane, fb->base.format->format,
531 fb->base.modifier, rotation);
532
533 return stride > max_stride;
534}
535
536static int convert_plane_offset_to_xy(const struct intel_framebuffer *fb, int color_plane,
537 int plane_width, int *x, int *y)
538{
539 struct drm_i915_gem_object *obj = intel_fb_obj(&fb->base);
540 int ret;
541
542 ret = intel_fb_offset_to_xy(x, y, &fb->base, color_plane);
543 if (ret) {
544 drm_dbg_kms(fb->base.dev,
545 "bad fb plane %d offset: 0x%x\n",
546 color_plane, fb->base.offsets[color_plane]);
547 return ret;
548 }
549
550 ret = intel_fb_check_ccs_xy(&fb->base, color_plane, *x, *y);
551 if (ret)
552 return ret;
553
554 /*
555 * The fence (if used) is aligned to the start of the object
556 * so having the framebuffer wrap around across the edge of the
557 * fenced region doesn't really work. We have no API to configure
558 * the fence start offset within the object (nor could we probably
559 * on gen2/3). So it's just easier if we just require that the
560 * fb layout agrees with the fence layout. We already check that the
561 * fb stride matches the fence stride elsewhere.
562 */
563 if (color_plane == 0 && i915_gem_object_is_tiled(obj) &&
564 (*x + plane_width) * fb->base.format->cpp[color_plane] > fb->base.pitches[color_plane]) {
565 drm_dbg_kms(fb->base.dev,
566 "bad fb plane %d offset: 0x%x\n",
567 color_plane, fb->base.offsets[color_plane]);
568 return -EINVAL;
569 }
570
571 return 0;
572}
573
574static u32 calc_plane_aligned_offset(const struct intel_framebuffer *fb, int color_plane, int *x, int *y)
575{
576 struct drm_i915_private *i915 = to_i915(fb->base.dev);
577 unsigned int tile_size = intel_tile_size(i915);
578 u32 offset;
579
580 offset = intel_compute_aligned_offset(i915, x, y, &fb->base, color_plane,
581 fb->base.pitches[color_plane],
582 DRM_MODE_ROTATE_0,
583 tile_size);
584
585 return offset / tile_size;
586}
587
588struct fb_plane_view_dims {
589 unsigned int width, height;
590 unsigned int tile_width, tile_height;
591};
592
593static void init_plane_view_dims(const struct intel_framebuffer *fb, int color_plane,
594 unsigned int width, unsigned int height,
595 struct fb_plane_view_dims *dims)
596{
597 dims->width = width;
598 dims->height = height;
599
600 intel_tile_dims(&fb->base, color_plane, &dims->tile_width, &dims->tile_height);
601}
602
603static unsigned int
604plane_view_src_stride_tiles(const struct intel_framebuffer *fb, int color_plane,
605 const struct fb_plane_view_dims *dims)
606{
607 return DIV_ROUND_UP(fb->base.pitches[color_plane],
608 dims->tile_width * fb->base.format->cpp[color_plane]);
609}
610
611static unsigned int
612plane_view_dst_stride_tiles(const struct intel_framebuffer *fb, int color_plane,
613 unsigned int pitch_tiles)
614{
615 if (intel_fb_needs_pot_stride_remap(fb))
616 /*
617 * ADL_P, the only platform needing a POT stride has a minimum
618 * of 8 stride tiles.
619 */
620 return roundup_pow_of_two(max(pitch_tiles, 8u));
621 else
622 return pitch_tiles;
623}
624
625static unsigned int
626plane_view_width_tiles(const struct intel_framebuffer *fb, int color_plane,
627 const struct fb_plane_view_dims *dims,
628 int x)
629{
630 return DIV_ROUND_UP(x + dims->width, dims->tile_width);
631}
632
633static unsigned int
634plane_view_height_tiles(const struct intel_framebuffer *fb, int color_plane,
635 const struct fb_plane_view_dims *dims,
636 int y)
637{
638 return DIV_ROUND_UP(y + dims->height, dims->tile_height);
639}
640
641#define assign_chk_ovf(i915, var, val) ({ \
642 drm_WARN_ON(&(i915)->drm, overflows_type(val, var)); \
643 (var) = (val); \
644})
645
646static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_plane,
647 const struct fb_plane_view_dims *dims,
648 u32 obj_offset, u32 gtt_offset, int x, int y,
649 struct intel_fb_view *view)
650{
651 struct drm_i915_private *i915 = to_i915(fb->base.dev);
652 struct intel_remapped_plane_info *remap_info = &view->gtt.remapped.plane[color_plane];
653 struct i915_color_plane_view *color_plane_info = &view->color_plane[color_plane];
654 unsigned int tile_width = dims->tile_width;
655 unsigned int tile_height = dims->tile_height;
656 unsigned int tile_size = intel_tile_size(i915);
657 struct drm_rect r;
658 u32 size;
659
660 assign_chk_ovf(i915, remap_info->offset, obj_offset);
661 assign_chk_ovf(i915, remap_info->src_stride, plane_view_src_stride_tiles(fb, color_plane, dims));
662 assign_chk_ovf(i915, remap_info->width, plane_view_width_tiles(fb, color_plane, dims, x));
663 assign_chk_ovf(i915, remap_info->height, plane_view_height_tiles(fb, color_plane, dims, y));
664
665 if (view->gtt.type == I915_GGTT_VIEW_ROTATED) {
666 check_array_bounds(i915, view->gtt.rotated.plane, color_plane);
667
668 assign_chk_ovf(i915, remap_info->dst_stride,
669 plane_view_dst_stride_tiles(fb, color_plane, remap_info->height));
670
671 /* rotate the x/y offsets to match the GTT view */
672 drm_rect_init(&r, x, y, dims->width, dims->height);
673 drm_rect_rotate(&r,
674 remap_info->width * tile_width,
675 remap_info->height * tile_height,
676 DRM_MODE_ROTATE_270);
677
678 color_plane_info->x = r.x1;
679 color_plane_info->y = r.y1;
680
681 color_plane_info->stride = remap_info->dst_stride * tile_height;
682
683 size = remap_info->dst_stride * remap_info->width;
684
685 /* rotate the tile dimensions to match the GTT view */
686 swap(tile_width, tile_height);
687 } else {
688 drm_WARN_ON(&i915->drm, view->gtt.type != I915_GGTT_VIEW_REMAPPED);
689
690 check_array_bounds(i915, view->gtt.remapped.plane, color_plane);
691
692 assign_chk_ovf(i915, remap_info->dst_stride,
693 plane_view_dst_stride_tiles(fb, color_plane, remap_info->width));
694
695 color_plane_info->x = x;
696 color_plane_info->y = y;
697
698 color_plane_info->stride = remap_info->dst_stride * tile_width *
699 fb->base.format->cpp[color_plane];
700
701 size = remap_info->dst_stride * remap_info->height;
702 }
703
704 /*
705 * We only keep the x/y offsets, so push all of the gtt offset into
706 * the x/y offsets. x,y will hold the first pixel of the framebuffer
707 * plane from the start of the remapped/rotated gtt mapping.
708 */
709 intel_adjust_tile_offset(&color_plane_info->x, &color_plane_info->y,
710 tile_width, tile_height,
711 tile_size, remap_info->dst_stride,
712 gtt_offset * tile_size, 0);
713
714 return size;
715}
716
717#undef assign_chk_ovf
718
719/* Return number of tiles @color_plane needs. */
720static unsigned int
721calc_plane_normal_size(const struct intel_framebuffer *fb, int color_plane,
722 const struct fb_plane_view_dims *dims,
723 int x, int y)
724{
725 struct drm_i915_private *i915 = to_i915(fb->base.dev);
726 unsigned int tiles;
727
728 if (is_surface_linear(&fb->base, color_plane)) {
729 unsigned int size;
730
731 size = (y + dims->height) * fb->base.pitches[color_plane] +
732 x * fb->base.format->cpp[color_plane];
733 tiles = DIV_ROUND_UP(size, intel_tile_size(i915));
734 } else {
735 tiles = plane_view_src_stride_tiles(fb, color_plane, dims) *
736 plane_view_height_tiles(fb, color_plane, dims, y);
737 /*
738 * If the plane isn't horizontally tile aligned,
739 * we need one more tile.
740 */
741 if (x != 0)
742 tiles++;
743 }
744
745 return tiles;
746}
747
748static void intel_fb_view_init(struct intel_fb_view *view, enum i915_ggtt_view_type view_type)
749{
750 memset(view, 0, sizeof(*view));
751 view->gtt.type = view_type;
752}
753
754bool intel_fb_supports_90_270_rotation(const struct intel_framebuffer *fb)
755{
756 if (DISPLAY_VER(to_i915(fb->base.dev)) >= 13)
757 return false;
758
759 return fb->base.modifier == I915_FORMAT_MOD_Y_TILED ||
760 fb->base.modifier == I915_FORMAT_MOD_Yf_TILED;
761}
762
763int intel_fill_fb_info(struct drm_i915_private *i915, struct intel_framebuffer *fb)
764{
765 struct drm_i915_gem_object *obj = intel_fb_obj(&fb->base);
766 u32 gtt_offset_rotated = 0;
767 u32 gtt_offset_remapped = 0;
768 unsigned int max_size = 0;
769 int i, num_planes = fb->base.format->num_planes;
770 unsigned int tile_size = intel_tile_size(i915);
771
772 intel_fb_view_init(&fb->normal_view, I915_GGTT_VIEW_NORMAL);
773
774 drm_WARN_ON(&i915->drm,
775 intel_fb_supports_90_270_rotation(fb) &&
776 intel_fb_needs_pot_stride_remap(fb));
777
778 if (intel_fb_supports_90_270_rotation(fb))
779 intel_fb_view_init(&fb->rotated_view, I915_GGTT_VIEW_ROTATED);
780 if (intel_fb_needs_pot_stride_remap(fb))
781 intel_fb_view_init(&fb->remapped_view, I915_GGTT_VIEW_REMAPPED);
782
783 for (i = 0; i < num_planes; i++) {
784 struct fb_plane_view_dims view_dims;
785 unsigned int width, height;
786 unsigned int cpp, size;
787 u32 offset;
788 int x, y;
789 int ret;
790
791 /*
792 * Plane 2 of Render Compression with Clear Color fb modifier
793 * is consumed by the driver and not passed to DE. Skip the
794 * arithmetic related to alignment and offset calculation.
795 */
796 if (is_gen12_ccs_cc_plane(&fb->base, i)) {
797 if (IS_ALIGNED(fb->base.offsets[i], PAGE_SIZE))
798 continue;
799 else
800 return -EINVAL;
801 }
802
803 cpp = fb->base.format->cpp[i];
804 intel_fb_plane_dims(fb, i, &width, &height);
805
806 ret = convert_plane_offset_to_xy(fb, i, width, &x, &y);
807 if (ret)
808 return ret;
809
810 init_plane_view_dims(fb, i, width, height, &view_dims);
811
812 /*
813 * First pixel of the framebuffer from
814 * the start of the normal gtt mapping.
815 */
816 fb->normal_view.color_plane[i].x = x;
817 fb->normal_view.color_plane[i].y = y;
818 fb->normal_view.color_plane[i].stride = fb->base.pitches[i];
819
820 offset = calc_plane_aligned_offset(fb, i, &x, &y);
821
822 if (intel_fb_supports_90_270_rotation(fb))
823 gtt_offset_rotated += calc_plane_remap_info(fb, i, &view_dims,
824 offset, gtt_offset_rotated, x, y,
825 &fb->rotated_view);
826
827 if (intel_fb_needs_pot_stride_remap(fb))
828 gtt_offset_remapped += calc_plane_remap_info(fb, i, &view_dims,
829 offset, gtt_offset_remapped, x, y,
830 &fb->remapped_view);
831
832 size = calc_plane_normal_size(fb, i, &view_dims, x, y);
833 /* how many tiles in total needed in the bo */
834 max_size = max(max_size, offset + size);
835 }
836
837 if (mul_u32_u32(max_size, tile_size) > obj->base.size) {
838 drm_dbg_kms(&i915->drm,
839 "fb too big for bo (need %llu bytes, have %zu bytes)\n",
840 mul_u32_u32(max_size, tile_size), obj->base.size);
841 return -EINVAL;
842 }
843
844 return 0;
845}
846
847static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
848{
849 struct drm_i915_private *i915 =
850 to_i915(plane_state->uapi.plane->dev);
851 struct drm_framebuffer *fb = plane_state->hw.fb;
852 struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
853 unsigned int rotation = plane_state->hw.rotation;
854 int i, num_planes = fb->format->num_planes;
855 unsigned int src_x, src_y;
856 unsigned int src_w, src_h;
857 u32 gtt_offset = 0;
858
859 intel_fb_view_init(&plane_state->view,
860 drm_rotation_90_or_270(rotation) ? I915_GGTT_VIEW_ROTATED :
861 I915_GGTT_VIEW_REMAPPED);
862
863 src_x = plane_state->uapi.src.x1 >> 16;
864 src_y = plane_state->uapi.src.y1 >> 16;
865 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
866 src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
867
868 drm_WARN_ON(&i915->drm, is_ccs_modifier(fb->modifier));
869
870 /* Make src coordinates relative to the viewport */
871 drm_rect_translate(&plane_state->uapi.src,
872 -(src_x << 16), -(src_y << 16));
873
874 /* Rotate src coordinates to match rotated GTT view */
875 if (drm_rotation_90_or_270(rotation))
876 drm_rect_rotate(&plane_state->uapi.src,
877 src_w << 16, src_h << 16,
878 DRM_MODE_ROTATE_270);
879
880 for (i = 0; i < num_planes; i++) {
881 unsigned int hsub = i ? fb->format->hsub : 1;
882 unsigned int vsub = i ? fb->format->vsub : 1;
883 struct fb_plane_view_dims view_dims;
884 unsigned int width, height;
885 unsigned int x, y;
886 u32 offset;
887
888 x = src_x / hsub;
889 y = src_y / vsub;
890 width = src_w / hsub;
891 height = src_h / vsub;
892
893 init_plane_view_dims(intel_fb, i, width, height, &view_dims);
894
895 /*
896 * First pixel of the src viewport from the
897 * start of the normal gtt mapping.
898 */
899 x += intel_fb->normal_view.color_plane[i].x;
900 y += intel_fb->normal_view.color_plane[i].y;
901
902 offset = calc_plane_aligned_offset(intel_fb, i, &x, &y);
903
904 gtt_offset += calc_plane_remap_info(intel_fb, i, &view_dims,
905 offset, gtt_offset, x, y,
906 &plane_state->view);
907 }
908}
909
910void intel_fb_fill_view(const struct intel_framebuffer *fb, unsigned int rotation,
911 struct intel_fb_view *view)
912{
913 if (drm_rotation_90_or_270(rotation))
914 *view = fb->rotated_view;
915 else if (intel_fb_needs_pot_stride_remap(fb))
916 *view = fb->remapped_view;
917 else
918 *view = fb->normal_view;
919}
920
921static int intel_plane_check_stride(const struct intel_plane_state *plane_state)
922{
923 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
924 const struct drm_framebuffer *fb = plane_state->hw.fb;
925 unsigned int rotation = plane_state->hw.rotation;
926 u32 stride, max_stride;
927
928 /*
929 * We ignore stride for all invisible planes that
930 * can be remapped. Otherwise we could end up
931 * with a false positive when the remapping didn't
932 * kick in due the plane being invisible.
933 */
934 if (intel_plane_can_remap(plane_state) &&
935 !plane_state->uapi.visible)
936 return 0;
937
938 /* FIXME other color planes? */
939 stride = plane_state->view.color_plane[0].stride;
940 max_stride = plane->max_stride(plane, fb->format->format,
941 fb->modifier, rotation);
942
943 if (stride > max_stride) {
944 DRM_DEBUG_KMS("[FB:%d] stride (%d) exceeds [PLANE:%d:%s] max stride (%d)\n",
945 fb->base.id, stride,
946 plane->base.base.id, plane->base.name, max_stride);
947 return -EINVAL;
948 }
949
950 return 0;
951}
952
953int intel_plane_compute_gtt(struct intel_plane_state *plane_state)
954{
955 const struct intel_framebuffer *fb =
956 to_intel_framebuffer(plane_state->hw.fb);
957 unsigned int rotation = plane_state->hw.rotation;
958
959 if (!fb)
960 return 0;
961
962 if (intel_plane_needs_remap(plane_state)) {
963 intel_plane_remap_gtt(plane_state);
964
965 /*
966 * Sometimes even remapping can't overcome
967 * the stride limitations :( Can happen with
968 * big plane sizes and suitably misaligned
969 * offsets.
970 */
971 return intel_plane_check_stride(plane_state);
972 }
973
974 intel_fb_fill_view(fb, rotation, &plane_state->view);
975
976 /* Rotate src coordinates to match rotated GTT view */
977 if (drm_rotation_90_or_270(rotation))
978 drm_rect_rotate(&plane_state->uapi.src,
979 fb->base.width << 16, fb->base.height << 16,
980 DRM_MODE_ROTATE_270);
981
982 return intel_plane_check_stride(plane_state);
983}