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1/*
2 * Copyright © 2006 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28#include <drm/drm_dp_helper.h>
29
30#include "display/intel_display.h"
31#include "display/intel_display_types.h"
32#include "display/intel_gmbus.h"
33
34#include "i915_drv.h"
35
36#define _INTEL_BIOS_PRIVATE
37#include "intel_vbt_defs.h"
38
39/**
40 * DOC: Video BIOS Table (VBT)
41 *
42 * The Video BIOS Table, or VBT, provides platform and board specific
43 * configuration information to the driver that is not discoverable or available
44 * through other means. The configuration is mostly related to display
45 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
46 * the PCI ROM.
47 *
48 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
49 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
50 * contain the actual configuration information. The VBT Header, and thus the
51 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
52 * BDB Header. The data blocks are concatenated after the BDB Header. The data
53 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
54 * data. (Block 53, the MIPI Sequence Block is an exception.)
55 *
56 * The driver parses the VBT during load. The relevant information is stored in
57 * driver private data for ease of use, and the actual VBT is not read after
58 * that.
59 */
60
61/* Wrapper for VBT child device config */
62struct intel_bios_encoder_data {
63 struct drm_i915_private *i915;
64
65 struct child_device_config child;
66 struct dsc_compression_parameters_entry *dsc;
67 struct list_head node;
68};
69
70#define SLAVE_ADDR1 0x70
71#define SLAVE_ADDR2 0x72
72
73/* Get BDB block size given a pointer to Block ID. */
74static u32 _get_blocksize(const u8 *block_base)
75{
76 /* The MIPI Sequence Block v3+ has a separate size field. */
77 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
78 return *((const u32 *)(block_base + 4));
79 else
80 return *((const u16 *)(block_base + 1));
81}
82
83/* Get BDB block size give a pointer to data after Block ID and Block Size. */
84static u32 get_blocksize(const void *block_data)
85{
86 return _get_blocksize(block_data - 3);
87}
88
89static const void *
90find_section(const void *_bdb, enum bdb_block_id section_id)
91{
92 const struct bdb_header *bdb = _bdb;
93 const u8 *base = _bdb;
94 int index = 0;
95 u32 total, current_size;
96 enum bdb_block_id current_id;
97
98 /* skip to first section */
99 index += bdb->header_size;
100 total = bdb->bdb_size;
101
102 /* walk the sections looking for section_id */
103 while (index + 3 < total) {
104 current_id = *(base + index);
105 current_size = _get_blocksize(base + index);
106 index += 3;
107
108 if (index + current_size > total)
109 return NULL;
110
111 if (current_id == section_id)
112 return base + index;
113
114 index += current_size;
115 }
116
117 return NULL;
118}
119
120static void
121fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
122 const struct lvds_dvo_timing *dvo_timing)
123{
124 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
125 dvo_timing->hactive_lo;
126 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
127 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
128 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
129 ((dvo_timing->hsync_pulse_width_hi << 8) |
130 dvo_timing->hsync_pulse_width_lo);
131 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
132 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
133
134 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
135 dvo_timing->vactive_lo;
136 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
137 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
138 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
139 ((dvo_timing->vsync_pulse_width_hi << 4) |
140 dvo_timing->vsync_pulse_width_lo);
141 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
142 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
143 panel_fixed_mode->clock = dvo_timing->clock * 10;
144 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
145
146 if (dvo_timing->hsync_positive)
147 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
148 else
149 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
150
151 if (dvo_timing->vsync_positive)
152 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
153 else
154 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
155
156 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
157 dvo_timing->himage_lo;
158 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
159 dvo_timing->vimage_lo;
160
161 /* Some VBTs have bogus h/vtotal values */
162 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
163 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
164 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
165 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
166
167 drm_mode_set_name(panel_fixed_mode);
168}
169
170static const struct lvds_dvo_timing *
171get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
172 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
173 int index)
174{
175 /*
176 * the size of fp_timing varies on the different platform.
177 * So calculate the DVO timing relative offset in LVDS data
178 * entry to get the DVO timing entry
179 */
180
181 int lfp_data_size =
182 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
183 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
184 int dvo_timing_offset =
185 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
186 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
187 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
188
189 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
190}
191
192/* get lvds_fp_timing entry
193 * this function may return NULL if the corresponding entry is invalid
194 */
195static const struct lvds_fp_timing *
196get_lvds_fp_timing(const struct bdb_header *bdb,
197 const struct bdb_lvds_lfp_data *data,
198 const struct bdb_lvds_lfp_data_ptrs *ptrs,
199 int index)
200{
201 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
202 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
203 size_t ofs;
204
205 if (index >= ARRAY_SIZE(ptrs->ptr))
206 return NULL;
207 ofs = ptrs->ptr[index].fp_timing_offset;
208 if (ofs < data_ofs ||
209 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
210 return NULL;
211 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
212}
213
214/* Parse general panel options */
215static void
216parse_panel_options(struct drm_i915_private *i915,
217 const struct bdb_header *bdb)
218{
219 const struct bdb_lvds_options *lvds_options;
220 int panel_type;
221 int drrs_mode;
222 int ret;
223
224 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
225 if (!lvds_options)
226 return;
227
228 i915->vbt.lvds_dither = lvds_options->pixel_dither;
229
230 ret = intel_opregion_get_panel_type(i915);
231 if (ret >= 0) {
232 drm_WARN_ON(&i915->drm, ret > 0xf);
233 panel_type = ret;
234 drm_dbg_kms(&i915->drm, "Panel type: %d (OpRegion)\n",
235 panel_type);
236 } else {
237 if (lvds_options->panel_type > 0xf) {
238 drm_dbg_kms(&i915->drm,
239 "Invalid VBT panel type 0x%x\n",
240 lvds_options->panel_type);
241 return;
242 }
243 panel_type = lvds_options->panel_type;
244 drm_dbg_kms(&i915->drm, "Panel type: %d (VBT)\n",
245 panel_type);
246 }
247
248 i915->vbt.panel_type = panel_type;
249
250 drrs_mode = (lvds_options->dps_panel_type_bits
251 >> (panel_type * 2)) & MODE_MASK;
252 /*
253 * VBT has static DRRS = 0 and seamless DRRS = 2.
254 * The below piece of code is required to adjust vbt.drrs_type
255 * to match the enum drrs_support_type.
256 */
257 switch (drrs_mode) {
258 case 0:
259 i915->vbt.drrs_type = STATIC_DRRS_SUPPORT;
260 drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n");
261 break;
262 case 2:
263 i915->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
264 drm_dbg_kms(&i915->drm,
265 "DRRS supported mode is seamless\n");
266 break;
267 default:
268 i915->vbt.drrs_type = DRRS_NOT_SUPPORTED;
269 drm_dbg_kms(&i915->drm,
270 "DRRS not supported (VBT input)\n");
271 break;
272 }
273}
274
275/* Try to find integrated panel timing data */
276static void
277parse_lfp_panel_dtd(struct drm_i915_private *i915,
278 const struct bdb_header *bdb)
279{
280 const struct bdb_lvds_lfp_data *lvds_lfp_data;
281 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
282 const struct lvds_dvo_timing *panel_dvo_timing;
283 const struct lvds_fp_timing *fp_timing;
284 struct drm_display_mode *panel_fixed_mode;
285 int panel_type = i915->vbt.panel_type;
286
287 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
288 if (!lvds_lfp_data)
289 return;
290
291 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
292 if (!lvds_lfp_data_ptrs)
293 return;
294
295 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
296 lvds_lfp_data_ptrs,
297 panel_type);
298
299 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
300 if (!panel_fixed_mode)
301 return;
302
303 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
304
305 i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
306
307 drm_dbg_kms(&i915->drm,
308 "Found panel mode in BIOS VBT legacy lfp table:\n");
309 drm_mode_debug_printmodeline(panel_fixed_mode);
310
311 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
312 lvds_lfp_data_ptrs,
313 panel_type);
314 if (fp_timing) {
315 /* check the resolution, just to be sure */
316 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
317 fp_timing->y_res == panel_fixed_mode->vdisplay) {
318 i915->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
319 drm_dbg_kms(&i915->drm,
320 "VBT initial LVDS value %x\n",
321 i915->vbt.bios_lvds_val);
322 }
323 }
324}
325
326static void
327parse_generic_dtd(struct drm_i915_private *i915,
328 const struct bdb_header *bdb)
329{
330 const struct bdb_generic_dtd *generic_dtd;
331 const struct generic_dtd_entry *dtd;
332 struct drm_display_mode *panel_fixed_mode;
333 int num_dtd;
334
335 generic_dtd = find_section(bdb, BDB_GENERIC_DTD);
336 if (!generic_dtd)
337 return;
338
339 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
340 drm_err(&i915->drm, "GDTD size %u is too small.\n",
341 generic_dtd->gdtd_size);
342 return;
343 } else if (generic_dtd->gdtd_size !=
344 sizeof(struct generic_dtd_entry)) {
345 drm_err(&i915->drm, "Unexpected GDTD size %u\n",
346 generic_dtd->gdtd_size);
347 /* DTD has unknown fields, but keep going */
348 }
349
350 num_dtd = (get_blocksize(generic_dtd) -
351 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
352 if (i915->vbt.panel_type >= num_dtd) {
353 drm_err(&i915->drm,
354 "Panel type %d not found in table of %d DTD's\n",
355 i915->vbt.panel_type, num_dtd);
356 return;
357 }
358
359 dtd = &generic_dtd->dtd[i915->vbt.panel_type];
360
361 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
362 if (!panel_fixed_mode)
363 return;
364
365 panel_fixed_mode->hdisplay = dtd->hactive;
366 panel_fixed_mode->hsync_start =
367 panel_fixed_mode->hdisplay + dtd->hfront_porch;
368 panel_fixed_mode->hsync_end =
369 panel_fixed_mode->hsync_start + dtd->hsync;
370 panel_fixed_mode->htotal =
371 panel_fixed_mode->hdisplay + dtd->hblank;
372
373 panel_fixed_mode->vdisplay = dtd->vactive;
374 panel_fixed_mode->vsync_start =
375 panel_fixed_mode->vdisplay + dtd->vfront_porch;
376 panel_fixed_mode->vsync_end =
377 panel_fixed_mode->vsync_start + dtd->vsync;
378 panel_fixed_mode->vtotal =
379 panel_fixed_mode->vdisplay + dtd->vblank;
380
381 panel_fixed_mode->clock = dtd->pixel_clock;
382 panel_fixed_mode->width_mm = dtd->width_mm;
383 panel_fixed_mode->height_mm = dtd->height_mm;
384
385 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
386 drm_mode_set_name(panel_fixed_mode);
387
388 if (dtd->hsync_positive_polarity)
389 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
390 else
391 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
392
393 if (dtd->vsync_positive_polarity)
394 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
395 else
396 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
397
398 drm_dbg_kms(&i915->drm,
399 "Found panel mode in BIOS VBT generic dtd table:\n");
400 drm_mode_debug_printmodeline(panel_fixed_mode);
401
402 i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
403}
404
405static void
406parse_panel_dtd(struct drm_i915_private *i915,
407 const struct bdb_header *bdb)
408{
409 /*
410 * Older VBTs provided provided DTD information for internal displays
411 * through the "LFP panel DTD" block (42). As of VBT revision 229,
412 * that block is now deprecated and DTD information should be provided
413 * via a newer "generic DTD" block (58). Just to be safe, we'll
414 * try the new generic DTD block first on VBT >= 229, but still fall
415 * back to trying the old LFP block if that fails.
416 */
417 if (bdb->version >= 229)
418 parse_generic_dtd(i915, bdb);
419 if (!i915->vbt.lfp_lvds_vbt_mode)
420 parse_lfp_panel_dtd(i915, bdb);
421}
422
423static void
424parse_lfp_backlight(struct drm_i915_private *i915,
425 const struct bdb_header *bdb)
426{
427 const struct bdb_lfp_backlight_data *backlight_data;
428 const struct lfp_backlight_data_entry *entry;
429 int panel_type = i915->vbt.panel_type;
430 u16 level;
431
432 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
433 if (!backlight_data)
434 return;
435
436 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
437 drm_dbg_kms(&i915->drm,
438 "Unsupported backlight data entry size %u\n",
439 backlight_data->entry_size);
440 return;
441 }
442
443 entry = &backlight_data->data[panel_type];
444
445 i915->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
446 if (!i915->vbt.backlight.present) {
447 drm_dbg_kms(&i915->drm,
448 "PWM backlight not present in VBT (type %u)\n",
449 entry->type);
450 return;
451 }
452
453 i915->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
454 if (bdb->version >= 191) {
455 size_t exp_size;
456
457 if (bdb->version >= 236)
458 exp_size = sizeof(struct bdb_lfp_backlight_data);
459 else if (bdb->version >= 234)
460 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234;
461 else
462 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191;
463
464 if (get_blocksize(backlight_data) >= exp_size) {
465 const struct lfp_backlight_control_method *method;
466
467 method = &backlight_data->backlight_control[panel_type];
468 i915->vbt.backlight.type = method->type;
469 i915->vbt.backlight.controller = method->controller;
470 }
471 }
472
473 i915->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
474 i915->vbt.backlight.active_low_pwm = entry->active_low_pwm;
475
476 if (bdb->version >= 234) {
477 u16 min_level;
478 bool scale;
479
480 level = backlight_data->brightness_level[panel_type].level;
481 min_level = backlight_data->brightness_min_level[panel_type].level;
482
483 if (bdb->version >= 236)
484 scale = backlight_data->brightness_precision_bits[panel_type] == 16;
485 else
486 scale = level > 255;
487
488 if (scale)
489 min_level = min_level / 255;
490
491 if (min_level > 255) {
492 drm_warn(&i915->drm, "Brightness min level > 255\n");
493 level = 255;
494 }
495 i915->vbt.backlight.min_brightness = min_level;
496 } else {
497 level = backlight_data->level[panel_type];
498 i915->vbt.backlight.min_brightness = entry->min_brightness;
499 }
500
501 drm_dbg_kms(&i915->drm,
502 "VBT backlight PWM modulation frequency %u Hz, "
503 "active %s, min brightness %u, level %u, controller %u\n",
504 i915->vbt.backlight.pwm_freq_hz,
505 i915->vbt.backlight.active_low_pwm ? "low" : "high",
506 i915->vbt.backlight.min_brightness,
507 level,
508 i915->vbt.backlight.controller);
509}
510
511/* Try to find sdvo panel data */
512static void
513parse_sdvo_panel_data(struct drm_i915_private *i915,
514 const struct bdb_header *bdb)
515{
516 const struct bdb_sdvo_panel_dtds *dtds;
517 struct drm_display_mode *panel_fixed_mode;
518 int index;
519
520 index = i915->params.vbt_sdvo_panel_type;
521 if (index == -2) {
522 drm_dbg_kms(&i915->drm,
523 "Ignore SDVO panel mode from BIOS VBT tables.\n");
524 return;
525 }
526
527 if (index == -1) {
528 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
529
530 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
531 if (!sdvo_lvds_options)
532 return;
533
534 index = sdvo_lvds_options->panel_type;
535 }
536
537 dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS);
538 if (!dtds)
539 return;
540
541 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
542 if (!panel_fixed_mode)
543 return;
544
545 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]);
546
547 i915->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
548
549 drm_dbg_kms(&i915->drm,
550 "Found SDVO panel mode in BIOS VBT tables:\n");
551 drm_mode_debug_printmodeline(panel_fixed_mode);
552}
553
554static int intel_bios_ssc_frequency(struct drm_i915_private *i915,
555 bool alternate)
556{
557 switch (DISPLAY_VER(i915)) {
558 case 2:
559 return alternate ? 66667 : 48000;
560 case 3:
561 case 4:
562 return alternate ? 100000 : 96000;
563 default:
564 return alternate ? 100000 : 120000;
565 }
566}
567
568static void
569parse_general_features(struct drm_i915_private *i915,
570 const struct bdb_header *bdb)
571{
572 const struct bdb_general_features *general;
573
574 general = find_section(bdb, BDB_GENERAL_FEATURES);
575 if (!general)
576 return;
577
578 i915->vbt.int_tv_support = general->int_tv_support;
579 /* int_crt_support can't be trusted on earlier platforms */
580 if (bdb->version >= 155 &&
581 (HAS_DDI(i915) || IS_VALLEYVIEW(i915)))
582 i915->vbt.int_crt_support = general->int_crt_support;
583 i915->vbt.lvds_use_ssc = general->enable_ssc;
584 i915->vbt.lvds_ssc_freq =
585 intel_bios_ssc_frequency(i915, general->ssc_freq);
586 i915->vbt.display_clock_mode = general->display_clock_mode;
587 i915->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
588 if (bdb->version >= 181) {
589 i915->vbt.orientation = general->rotate_180 ?
590 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
591 DRM_MODE_PANEL_ORIENTATION_NORMAL;
592 } else {
593 i915->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
594 }
595 drm_dbg_kms(&i915->drm,
596 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
597 i915->vbt.int_tv_support,
598 i915->vbt.int_crt_support,
599 i915->vbt.lvds_use_ssc,
600 i915->vbt.lvds_ssc_freq,
601 i915->vbt.display_clock_mode,
602 i915->vbt.fdi_rx_polarity_inverted);
603}
604
605static const struct child_device_config *
606child_device_ptr(const struct bdb_general_definitions *defs, int i)
607{
608 return (const void *) &defs->devices[i * defs->child_dev_size];
609}
610
611static void
612parse_sdvo_device_mapping(struct drm_i915_private *i915)
613{
614 struct sdvo_device_mapping *mapping;
615 const struct intel_bios_encoder_data *devdata;
616 const struct child_device_config *child;
617 int count = 0;
618
619 /*
620 * Only parse SDVO mappings on gens that could have SDVO. This isn't
621 * accurate and doesn't have to be, as long as it's not too strict.
622 */
623 if (!IS_DISPLAY_VER(i915, 3, 7)) {
624 drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n");
625 return;
626 }
627
628 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
629 child = &devdata->child;
630
631 if (child->slave_addr != SLAVE_ADDR1 &&
632 child->slave_addr != SLAVE_ADDR2) {
633 /*
634 * If the slave address is neither 0x70 nor 0x72,
635 * it is not a SDVO device. Skip it.
636 */
637 continue;
638 }
639 if (child->dvo_port != DEVICE_PORT_DVOB &&
640 child->dvo_port != DEVICE_PORT_DVOC) {
641 /* skip the incorrect SDVO port */
642 drm_dbg_kms(&i915->drm,
643 "Incorrect SDVO port. Skip it\n");
644 continue;
645 }
646 drm_dbg_kms(&i915->drm,
647 "the SDVO device with slave addr %2x is found on"
648 " %s port\n",
649 child->slave_addr,
650 (child->dvo_port == DEVICE_PORT_DVOB) ?
651 "SDVOB" : "SDVOC");
652 mapping = &i915->vbt.sdvo_mappings[child->dvo_port - 1];
653 if (!mapping->initialized) {
654 mapping->dvo_port = child->dvo_port;
655 mapping->slave_addr = child->slave_addr;
656 mapping->dvo_wiring = child->dvo_wiring;
657 mapping->ddc_pin = child->ddc_pin;
658 mapping->i2c_pin = child->i2c_pin;
659 mapping->initialized = 1;
660 drm_dbg_kms(&i915->drm,
661 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
662 mapping->dvo_port, mapping->slave_addr,
663 mapping->dvo_wiring, mapping->ddc_pin,
664 mapping->i2c_pin);
665 } else {
666 drm_dbg_kms(&i915->drm,
667 "Maybe one SDVO port is shared by "
668 "two SDVO device.\n");
669 }
670 if (child->slave2_addr) {
671 /* Maybe this is a SDVO device with multiple inputs */
672 /* And the mapping info is not added */
673 drm_dbg_kms(&i915->drm,
674 "there exists the slave2_addr. Maybe this"
675 " is a SDVO device with multiple inputs.\n");
676 }
677 count++;
678 }
679
680 if (!count) {
681 /* No SDVO device info is found */
682 drm_dbg_kms(&i915->drm,
683 "No SDVO device info is found in VBT\n");
684 }
685}
686
687static void
688parse_driver_features(struct drm_i915_private *i915,
689 const struct bdb_header *bdb)
690{
691 const struct bdb_driver_features *driver;
692
693 driver = find_section(bdb, BDB_DRIVER_FEATURES);
694 if (!driver)
695 return;
696
697 if (DISPLAY_VER(i915) >= 5) {
698 /*
699 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
700 * to mean "eDP". The VBT spec doesn't agree with that
701 * interpretation, but real world VBTs seem to.
702 */
703 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
704 i915->vbt.int_lvds_support = 0;
705 } else {
706 /*
707 * FIXME it's not clear which BDB version has the LVDS config
708 * bits defined. Revision history in the VBT spec says:
709 * "0.92 | Add two definitions for VBT value of LVDS Active
710 * Config (00b and 11b values defined) | 06/13/2005"
711 * but does not the specify the BDB version.
712 *
713 * So far version 134 (on i945gm) is the oldest VBT observed
714 * in the wild with the bits correctly populated. Version
715 * 108 (on i85x) does not have the bits correctly populated.
716 */
717 if (bdb->version >= 134 &&
718 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
719 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
720 i915->vbt.int_lvds_support = 0;
721 }
722
723 if (bdb->version < 228) {
724 drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n",
725 driver->drrs_enabled);
726 /*
727 * If DRRS is not supported, drrs_type has to be set to 0.
728 * This is because, VBT is configured in such a way that
729 * static DRRS is 0 and DRRS not supported is represented by
730 * driver->drrs_enabled=false
731 */
732 if (!driver->drrs_enabled)
733 i915->vbt.drrs_type = DRRS_NOT_SUPPORTED;
734
735 i915->vbt.psr.enable = driver->psr_enabled;
736 }
737}
738
739static void
740parse_power_conservation_features(struct drm_i915_private *i915,
741 const struct bdb_header *bdb)
742{
743 const struct bdb_lfp_power *power;
744 u8 panel_type = i915->vbt.panel_type;
745
746 if (bdb->version < 228)
747 return;
748
749 power = find_section(bdb, BDB_LFP_POWER);
750 if (!power)
751 return;
752
753 i915->vbt.psr.enable = power->psr & BIT(panel_type);
754
755 /*
756 * If DRRS is not supported, drrs_type has to be set to 0.
757 * This is because, VBT is configured in such a way that
758 * static DRRS is 0 and DRRS not supported is represented by
759 * power->drrs & BIT(panel_type)=false
760 */
761 if (!(power->drrs & BIT(panel_type)))
762 i915->vbt.drrs_type = DRRS_NOT_SUPPORTED;
763
764 if (bdb->version >= 232)
765 i915->vbt.edp.hobl = power->hobl & BIT(panel_type);
766}
767
768static void
769parse_edp(struct drm_i915_private *i915, const struct bdb_header *bdb)
770{
771 const struct bdb_edp *edp;
772 const struct edp_power_seq *edp_pps;
773 const struct edp_fast_link_params *edp_link_params;
774 int panel_type = i915->vbt.panel_type;
775
776 edp = find_section(bdb, BDB_EDP);
777 if (!edp)
778 return;
779
780 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
781 case EDP_18BPP:
782 i915->vbt.edp.bpp = 18;
783 break;
784 case EDP_24BPP:
785 i915->vbt.edp.bpp = 24;
786 break;
787 case EDP_30BPP:
788 i915->vbt.edp.bpp = 30;
789 break;
790 }
791
792 /* Get the eDP sequencing and link info */
793 edp_pps = &edp->power_seqs[panel_type];
794 edp_link_params = &edp->fast_link_params[panel_type];
795
796 i915->vbt.edp.pps = *edp_pps;
797
798 switch (edp_link_params->rate) {
799 case EDP_RATE_1_62:
800 i915->vbt.edp.rate = DP_LINK_BW_1_62;
801 break;
802 case EDP_RATE_2_7:
803 i915->vbt.edp.rate = DP_LINK_BW_2_7;
804 break;
805 default:
806 drm_dbg_kms(&i915->drm,
807 "VBT has unknown eDP link rate value %u\n",
808 edp_link_params->rate);
809 break;
810 }
811
812 switch (edp_link_params->lanes) {
813 case EDP_LANE_1:
814 i915->vbt.edp.lanes = 1;
815 break;
816 case EDP_LANE_2:
817 i915->vbt.edp.lanes = 2;
818 break;
819 case EDP_LANE_4:
820 i915->vbt.edp.lanes = 4;
821 break;
822 default:
823 drm_dbg_kms(&i915->drm,
824 "VBT has unknown eDP lane count value %u\n",
825 edp_link_params->lanes);
826 break;
827 }
828
829 switch (edp_link_params->preemphasis) {
830 case EDP_PREEMPHASIS_NONE:
831 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
832 break;
833 case EDP_PREEMPHASIS_3_5dB:
834 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
835 break;
836 case EDP_PREEMPHASIS_6dB:
837 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
838 break;
839 case EDP_PREEMPHASIS_9_5dB:
840 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
841 break;
842 default:
843 drm_dbg_kms(&i915->drm,
844 "VBT has unknown eDP pre-emphasis value %u\n",
845 edp_link_params->preemphasis);
846 break;
847 }
848
849 switch (edp_link_params->vswing) {
850 case EDP_VSWING_0_4V:
851 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
852 break;
853 case EDP_VSWING_0_6V:
854 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
855 break;
856 case EDP_VSWING_0_8V:
857 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
858 break;
859 case EDP_VSWING_1_2V:
860 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
861 break;
862 default:
863 drm_dbg_kms(&i915->drm,
864 "VBT has unknown eDP voltage swing value %u\n",
865 edp_link_params->vswing);
866 break;
867 }
868
869 if (bdb->version >= 173) {
870 u8 vswing;
871
872 /* Don't read from VBT if module parameter has valid value*/
873 if (i915->params.edp_vswing) {
874 i915->vbt.edp.low_vswing =
875 i915->params.edp_vswing == 1;
876 } else {
877 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
878 i915->vbt.edp.low_vswing = vswing == 0;
879 }
880 }
881}
882
883static void
884parse_psr(struct drm_i915_private *i915, const struct bdb_header *bdb)
885{
886 const struct bdb_psr *psr;
887 const struct psr_table *psr_table;
888 int panel_type = i915->vbt.panel_type;
889
890 psr = find_section(bdb, BDB_PSR);
891 if (!psr) {
892 drm_dbg_kms(&i915->drm, "No PSR BDB found.\n");
893 return;
894 }
895
896 psr_table = &psr->psr_table[panel_type];
897
898 i915->vbt.psr.full_link = psr_table->full_link;
899 i915->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
900
901 /* Allowed VBT values goes from 0 to 15 */
902 i915->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
903 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
904
905 switch (psr_table->lines_to_wait) {
906 case 0:
907 i915->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
908 break;
909 case 1:
910 i915->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
911 break;
912 case 2:
913 i915->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
914 break;
915 case 3:
916 i915->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
917 break;
918 default:
919 drm_dbg_kms(&i915->drm,
920 "VBT has unknown PSR lines to wait %u\n",
921 psr_table->lines_to_wait);
922 break;
923 }
924
925 /*
926 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
927 * Old decimal value is wake up time in multiples of 100 us.
928 */
929 if (bdb->version >= 205 &&
930 (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) {
931 switch (psr_table->tp1_wakeup_time) {
932 case 0:
933 i915->vbt.psr.tp1_wakeup_time_us = 500;
934 break;
935 case 1:
936 i915->vbt.psr.tp1_wakeup_time_us = 100;
937 break;
938 case 3:
939 i915->vbt.psr.tp1_wakeup_time_us = 0;
940 break;
941 default:
942 drm_dbg_kms(&i915->drm,
943 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
944 psr_table->tp1_wakeup_time);
945 fallthrough;
946 case 2:
947 i915->vbt.psr.tp1_wakeup_time_us = 2500;
948 break;
949 }
950
951 switch (psr_table->tp2_tp3_wakeup_time) {
952 case 0:
953 i915->vbt.psr.tp2_tp3_wakeup_time_us = 500;
954 break;
955 case 1:
956 i915->vbt.psr.tp2_tp3_wakeup_time_us = 100;
957 break;
958 case 3:
959 i915->vbt.psr.tp2_tp3_wakeup_time_us = 0;
960 break;
961 default:
962 drm_dbg_kms(&i915->drm,
963 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
964 psr_table->tp2_tp3_wakeup_time);
965 fallthrough;
966 case 2:
967 i915->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
968 break;
969 }
970 } else {
971 i915->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
972 i915->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
973 }
974
975 if (bdb->version >= 226) {
976 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
977
978 wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
979 switch (wakeup_time) {
980 case 0:
981 wakeup_time = 500;
982 break;
983 case 1:
984 wakeup_time = 100;
985 break;
986 case 3:
987 wakeup_time = 50;
988 break;
989 default:
990 case 2:
991 wakeup_time = 2500;
992 break;
993 }
994 i915->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
995 } else {
996 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */
997 i915->vbt.psr.psr2_tp2_tp3_wakeup_time_us = i915->vbt.psr.tp2_tp3_wakeup_time_us;
998 }
999}
1000
1001static void parse_dsi_backlight_ports(struct drm_i915_private *i915,
1002 u16 version, enum port port)
1003{
1004 if (!i915->vbt.dsi.config->dual_link || version < 197) {
1005 i915->vbt.dsi.bl_ports = BIT(port);
1006 if (i915->vbt.dsi.config->cabc_supported)
1007 i915->vbt.dsi.cabc_ports = BIT(port);
1008
1009 return;
1010 }
1011
1012 switch (i915->vbt.dsi.config->dl_dcs_backlight_ports) {
1013 case DL_DCS_PORT_A:
1014 i915->vbt.dsi.bl_ports = BIT(PORT_A);
1015 break;
1016 case DL_DCS_PORT_C:
1017 i915->vbt.dsi.bl_ports = BIT(PORT_C);
1018 break;
1019 default:
1020 case DL_DCS_PORT_A_AND_C:
1021 i915->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C);
1022 break;
1023 }
1024
1025 if (!i915->vbt.dsi.config->cabc_supported)
1026 return;
1027
1028 switch (i915->vbt.dsi.config->dl_dcs_cabc_ports) {
1029 case DL_DCS_PORT_A:
1030 i915->vbt.dsi.cabc_ports = BIT(PORT_A);
1031 break;
1032 case DL_DCS_PORT_C:
1033 i915->vbt.dsi.cabc_ports = BIT(PORT_C);
1034 break;
1035 default:
1036 case DL_DCS_PORT_A_AND_C:
1037 i915->vbt.dsi.cabc_ports =
1038 BIT(PORT_A) | BIT(PORT_C);
1039 break;
1040 }
1041}
1042
1043static void
1044parse_mipi_config(struct drm_i915_private *i915,
1045 const struct bdb_header *bdb)
1046{
1047 const struct bdb_mipi_config *start;
1048 const struct mipi_config *config;
1049 const struct mipi_pps_data *pps;
1050 int panel_type = i915->vbt.panel_type;
1051 enum port port;
1052
1053 /* parse MIPI blocks only if LFP type is MIPI */
1054 if (!intel_bios_is_dsi_present(i915, &port))
1055 return;
1056
1057 /* Initialize this to undefined indicating no generic MIPI support */
1058 i915->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1059
1060 /* Block #40 is already parsed and panel_fixed_mode is
1061 * stored in i915->lfp_lvds_vbt_mode
1062 * resuse this when needed
1063 */
1064
1065 /* Parse #52 for panel index used from panel_type already
1066 * parsed
1067 */
1068 start = find_section(bdb, BDB_MIPI_CONFIG);
1069 if (!start) {
1070 drm_dbg_kms(&i915->drm, "No MIPI config BDB found");
1071 return;
1072 }
1073
1074 drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n",
1075 panel_type);
1076
1077 /*
1078 * get hold of the correct configuration block and pps data as per
1079 * the panel_type as index
1080 */
1081 config = &start->config[panel_type];
1082 pps = &start->pps[panel_type];
1083
1084 /* store as of now full data. Trim when we realise all is not needed */
1085 i915->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1086 if (!i915->vbt.dsi.config)
1087 return;
1088
1089 i915->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1090 if (!i915->vbt.dsi.pps) {
1091 kfree(i915->vbt.dsi.config);
1092 return;
1093 }
1094
1095 parse_dsi_backlight_ports(i915, bdb->version, port);
1096
1097 /* FIXME is the 90 vs. 270 correct? */
1098 switch (config->rotation) {
1099 case ENABLE_ROTATION_0:
1100 /*
1101 * Most (all?) VBTs claim 0 degrees despite having
1102 * an upside down panel, thus we do not trust this.
1103 */
1104 i915->vbt.dsi.orientation =
1105 DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1106 break;
1107 case ENABLE_ROTATION_90:
1108 i915->vbt.dsi.orientation =
1109 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1110 break;
1111 case ENABLE_ROTATION_180:
1112 i915->vbt.dsi.orientation =
1113 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1114 break;
1115 case ENABLE_ROTATION_270:
1116 i915->vbt.dsi.orientation =
1117 DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1118 break;
1119 }
1120
1121 /* We have mandatory mipi config blocks. Initialize as generic panel */
1122 i915->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1123}
1124
1125/* Find the sequence block and size for the given panel. */
1126static const u8 *
1127find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
1128 u16 panel_id, u32 *seq_size)
1129{
1130 u32 total = get_blocksize(sequence);
1131 const u8 *data = &sequence->data[0];
1132 u8 current_id;
1133 u32 current_size;
1134 int header_size = sequence->version >= 3 ? 5 : 3;
1135 int index = 0;
1136 int i;
1137
1138 /* skip new block size */
1139 if (sequence->version >= 3)
1140 data += 4;
1141
1142 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1143 if (index + header_size > total) {
1144 DRM_ERROR("Invalid sequence block (header)\n");
1145 return NULL;
1146 }
1147
1148 current_id = *(data + index);
1149 if (sequence->version >= 3)
1150 current_size = *((const u32 *)(data + index + 1));
1151 else
1152 current_size = *((const u16 *)(data + index + 1));
1153
1154 index += header_size;
1155
1156 if (index + current_size > total) {
1157 DRM_ERROR("Invalid sequence block\n");
1158 return NULL;
1159 }
1160
1161 if (current_id == panel_id) {
1162 *seq_size = current_size;
1163 return data + index;
1164 }
1165
1166 index += current_size;
1167 }
1168
1169 DRM_ERROR("Sequence block detected but no valid configuration\n");
1170
1171 return NULL;
1172}
1173
1174static int goto_next_sequence(const u8 *data, int index, int total)
1175{
1176 u16 len;
1177
1178 /* Skip Sequence Byte. */
1179 for (index = index + 1; index < total; index += len) {
1180 u8 operation_byte = *(data + index);
1181 index++;
1182
1183 switch (operation_byte) {
1184 case MIPI_SEQ_ELEM_END:
1185 return index;
1186 case MIPI_SEQ_ELEM_SEND_PKT:
1187 if (index + 4 > total)
1188 return 0;
1189
1190 len = *((const u16 *)(data + index + 2)) + 4;
1191 break;
1192 case MIPI_SEQ_ELEM_DELAY:
1193 len = 4;
1194 break;
1195 case MIPI_SEQ_ELEM_GPIO:
1196 len = 2;
1197 break;
1198 case MIPI_SEQ_ELEM_I2C:
1199 if (index + 7 > total)
1200 return 0;
1201 len = *(data + index + 6) + 7;
1202 break;
1203 default:
1204 DRM_ERROR("Unknown operation byte\n");
1205 return 0;
1206 }
1207 }
1208
1209 return 0;
1210}
1211
1212static int goto_next_sequence_v3(const u8 *data, int index, int total)
1213{
1214 int seq_end;
1215 u16 len;
1216 u32 size_of_sequence;
1217
1218 /*
1219 * Could skip sequence based on Size of Sequence alone, but also do some
1220 * checking on the structure.
1221 */
1222 if (total < 5) {
1223 DRM_ERROR("Too small sequence size\n");
1224 return 0;
1225 }
1226
1227 /* Skip Sequence Byte. */
1228 index++;
1229
1230 /*
1231 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1232 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1233 * byte.
1234 */
1235 size_of_sequence = *((const u32 *)(data + index));
1236 index += 4;
1237
1238 seq_end = index + size_of_sequence;
1239 if (seq_end > total) {
1240 DRM_ERROR("Invalid sequence size\n");
1241 return 0;
1242 }
1243
1244 for (; index < total; index += len) {
1245 u8 operation_byte = *(data + index);
1246 index++;
1247
1248 if (operation_byte == MIPI_SEQ_ELEM_END) {
1249 if (index != seq_end) {
1250 DRM_ERROR("Invalid element structure\n");
1251 return 0;
1252 }
1253 return index;
1254 }
1255
1256 len = *(data + index);
1257 index++;
1258
1259 /*
1260 * FIXME: Would be nice to check elements like for v1/v2 in
1261 * goto_next_sequence() above.
1262 */
1263 switch (operation_byte) {
1264 case MIPI_SEQ_ELEM_SEND_PKT:
1265 case MIPI_SEQ_ELEM_DELAY:
1266 case MIPI_SEQ_ELEM_GPIO:
1267 case MIPI_SEQ_ELEM_I2C:
1268 case MIPI_SEQ_ELEM_SPI:
1269 case MIPI_SEQ_ELEM_PMIC:
1270 break;
1271 default:
1272 DRM_ERROR("Unknown operation byte %u\n",
1273 operation_byte);
1274 break;
1275 }
1276 }
1277
1278 return 0;
1279}
1280
1281/*
1282 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1283 * skip all delay + gpio operands and stop at the first DSI packet op.
1284 */
1285static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915)
1286{
1287 const u8 *data = i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1288 int index, len;
1289
1290 if (drm_WARN_ON(&i915->drm,
1291 !data || i915->vbt.dsi.seq_version != 1))
1292 return 0;
1293
1294 /* index = 1 to skip sequence byte */
1295 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1296 switch (data[index]) {
1297 case MIPI_SEQ_ELEM_SEND_PKT:
1298 return index == 1 ? 0 : index;
1299 case MIPI_SEQ_ELEM_DELAY:
1300 len = 5; /* 1 byte for operand + uint32 */
1301 break;
1302 case MIPI_SEQ_ELEM_GPIO:
1303 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1304 break;
1305 default:
1306 return 0;
1307 }
1308 }
1309
1310 return 0;
1311}
1312
1313/*
1314 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1315 * The deassert must be done before calling intel_dsi_device_ready, so for
1316 * these devices we split the init OTP sequence into a deassert sequence and
1317 * the actual init OTP part.
1318 */
1319static void fixup_mipi_sequences(struct drm_i915_private *i915)
1320{
1321 u8 *init_otp;
1322 int len;
1323
1324 /* Limit this to VLV for now. */
1325 if (!IS_VALLEYVIEW(i915))
1326 return;
1327
1328 /* Limit this to v1 vid-mode sequences */
1329 if (i915->vbt.dsi.config->is_cmd_mode ||
1330 i915->vbt.dsi.seq_version != 1)
1331 return;
1332
1333 /* Only do this if there are otp and assert seqs and no deassert seq */
1334 if (!i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1335 !i915->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1336 i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1337 return;
1338
1339 /* The deassert-sequence ends at the first DSI packet */
1340 len = get_init_otp_deassert_fragment_len(i915);
1341 if (!len)
1342 return;
1343
1344 drm_dbg_kms(&i915->drm,
1345 "Using init OTP fragment to deassert reset\n");
1346
1347 /* Copy the fragment, update seq byte and terminate it */
1348 init_otp = (u8 *)i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1349 i915->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1350 if (!i915->vbt.dsi.deassert_seq)
1351 return;
1352 i915->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1353 i915->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1354 /* Use the copy for deassert */
1355 i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1356 i915->vbt.dsi.deassert_seq;
1357 /* Replace the last byte of the fragment with init OTP seq byte */
1358 init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1359 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1360 i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1361}
1362
1363static void
1364parse_mipi_sequence(struct drm_i915_private *i915,
1365 const struct bdb_header *bdb)
1366{
1367 int panel_type = i915->vbt.panel_type;
1368 const struct bdb_mipi_sequence *sequence;
1369 const u8 *seq_data;
1370 u32 seq_size;
1371 u8 *data;
1372 int index = 0;
1373
1374 /* Only our generic panel driver uses the sequence block. */
1375 if (i915->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
1376 return;
1377
1378 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
1379 if (!sequence) {
1380 drm_dbg_kms(&i915->drm,
1381 "No MIPI Sequence found, parsing complete\n");
1382 return;
1383 }
1384
1385 /* Fail gracefully for forward incompatible sequence block. */
1386 if (sequence->version >= 4) {
1387 drm_err(&i915->drm,
1388 "Unable to parse MIPI Sequence Block v%u\n",
1389 sequence->version);
1390 return;
1391 }
1392
1393 drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n",
1394 sequence->version);
1395
1396 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
1397 if (!seq_data)
1398 return;
1399
1400 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
1401 if (!data)
1402 return;
1403
1404 /* Parse the sequences, store pointers to each sequence. */
1405 for (;;) {
1406 u8 seq_id = *(data + index);
1407 if (seq_id == MIPI_SEQ_END)
1408 break;
1409
1410 if (seq_id >= MIPI_SEQ_MAX) {
1411 drm_err(&i915->drm, "Unknown sequence %u\n",
1412 seq_id);
1413 goto err;
1414 }
1415
1416 /* Log about presence of sequences we won't run. */
1417 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
1418 drm_dbg_kms(&i915->drm,
1419 "Unsupported sequence %u\n", seq_id);
1420
1421 i915->vbt.dsi.sequence[seq_id] = data + index;
1422
1423 if (sequence->version >= 3)
1424 index = goto_next_sequence_v3(data, index, seq_size);
1425 else
1426 index = goto_next_sequence(data, index, seq_size);
1427 if (!index) {
1428 drm_err(&i915->drm, "Invalid sequence %u\n",
1429 seq_id);
1430 goto err;
1431 }
1432 }
1433
1434 i915->vbt.dsi.data = data;
1435 i915->vbt.dsi.size = seq_size;
1436 i915->vbt.dsi.seq_version = sequence->version;
1437
1438 fixup_mipi_sequences(i915);
1439
1440 drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n");
1441 return;
1442
1443err:
1444 kfree(data);
1445 memset(i915->vbt.dsi.sequence, 0, sizeof(i915->vbt.dsi.sequence));
1446}
1447
1448static void
1449parse_compression_parameters(struct drm_i915_private *i915,
1450 const struct bdb_header *bdb)
1451{
1452 const struct bdb_compression_parameters *params;
1453 struct intel_bios_encoder_data *devdata;
1454 const struct child_device_config *child;
1455 u16 block_size;
1456 int index;
1457
1458 if (bdb->version < 198)
1459 return;
1460
1461 params = find_section(bdb, BDB_COMPRESSION_PARAMETERS);
1462 if (params) {
1463 /* Sanity checks */
1464 if (params->entry_size != sizeof(params->data[0])) {
1465 drm_dbg_kms(&i915->drm,
1466 "VBT: unsupported compression param entry size\n");
1467 return;
1468 }
1469
1470 block_size = get_blocksize(params);
1471 if (block_size < sizeof(*params)) {
1472 drm_dbg_kms(&i915->drm,
1473 "VBT: expected 16 compression param entries\n");
1474 return;
1475 }
1476 }
1477
1478 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
1479 child = &devdata->child;
1480
1481 if (!child->compression_enable)
1482 continue;
1483
1484 if (!params) {
1485 drm_dbg_kms(&i915->drm,
1486 "VBT: compression params not available\n");
1487 continue;
1488 }
1489
1490 if (child->compression_method_cps) {
1491 drm_dbg_kms(&i915->drm,
1492 "VBT: CPS compression not supported\n");
1493 continue;
1494 }
1495
1496 index = child->compression_structure_index;
1497
1498 devdata->dsc = kmemdup(¶ms->data[index],
1499 sizeof(*devdata->dsc), GFP_KERNEL);
1500 }
1501}
1502
1503static u8 translate_iboost(u8 val)
1504{
1505 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1506
1507 if (val >= ARRAY_SIZE(mapping)) {
1508 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1509 return 0;
1510 }
1511 return mapping[val];
1512}
1513
1514static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
1515{
1516 const struct ddi_vbt_port_info *info;
1517 enum port port;
1518
1519 if (!ddc_pin)
1520 return PORT_NONE;
1521
1522 for_each_port(port) {
1523 info = &i915->vbt.ddi_port_info[port];
1524
1525 if (info->devdata && ddc_pin == info->alternate_ddc_pin)
1526 return port;
1527 }
1528
1529 return PORT_NONE;
1530}
1531
1532static void sanitize_ddc_pin(struct drm_i915_private *i915,
1533 enum port port)
1534{
1535 struct ddi_vbt_port_info *info = &i915->vbt.ddi_port_info[port];
1536 struct child_device_config *child;
1537 enum port p;
1538
1539 p = get_port_by_ddc_pin(i915, info->alternate_ddc_pin);
1540 if (p == PORT_NONE)
1541 return;
1542
1543 drm_dbg_kms(&i915->drm,
1544 "port %c trying to use the same DDC pin (0x%x) as port %c, "
1545 "disabling port %c DVI/HDMI support\n",
1546 port_name(port), info->alternate_ddc_pin,
1547 port_name(p), port_name(p));
1548
1549 /*
1550 * If we have multiple ports supposedly sharing the pin, then dvi/hdmi
1551 * couldn't exist on the shared port. Otherwise they share the same ddc
1552 * pin and system couldn't communicate with them separately.
1553 *
1554 * Give inverse child device order the priority, last one wins. Yes,
1555 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
1556 * port A and port E with the same AUX ch and we must pick port E :(
1557 */
1558 info = &i915->vbt.ddi_port_info[p];
1559 child = &info->devdata->child;
1560
1561 child->device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
1562 child->device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
1563
1564 info->alternate_ddc_pin = 0;
1565}
1566
1567static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
1568{
1569 const struct ddi_vbt_port_info *info;
1570 enum port port;
1571
1572 if (!aux_ch)
1573 return PORT_NONE;
1574
1575 for_each_port(port) {
1576 info = &i915->vbt.ddi_port_info[port];
1577
1578 if (info->devdata && aux_ch == info->alternate_aux_channel)
1579 return port;
1580 }
1581
1582 return PORT_NONE;
1583}
1584
1585static void sanitize_aux_ch(struct drm_i915_private *i915,
1586 enum port port)
1587{
1588 struct ddi_vbt_port_info *info = &i915->vbt.ddi_port_info[port];
1589 struct child_device_config *child;
1590 enum port p;
1591
1592 p = get_port_by_aux_ch(i915, info->alternate_aux_channel);
1593 if (p == PORT_NONE)
1594 return;
1595
1596 drm_dbg_kms(&i915->drm,
1597 "port %c trying to use the same AUX CH (0x%x) as port %c, "
1598 "disabling port %c DP support\n",
1599 port_name(port), info->alternate_aux_channel,
1600 port_name(p), port_name(p));
1601
1602 /*
1603 * If we have multiple ports supposedly sharing the aux channel, then DP
1604 * couldn't exist on the shared port. Otherwise they share the same aux
1605 * channel and system couldn't communicate with them separately.
1606 *
1607 * Give inverse child device order the priority, last one wins. Yes,
1608 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
1609 * port A and port E with the same AUX ch and we must pick port E :(
1610 */
1611 info = &i915->vbt.ddi_port_info[p];
1612 child = &info->devdata->child;
1613
1614 child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1615 info->alternate_aux_channel = 0;
1616}
1617
1618static const u8 cnp_ddc_pin_map[] = {
1619 [0] = 0, /* N/A */
1620 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
1621 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
1622 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
1623 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
1624};
1625
1626static const u8 icp_ddc_pin_map[] = {
1627 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1628 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1629 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
1630 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
1631 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
1632 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
1633 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
1634 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
1635 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
1636};
1637
1638static const u8 rkl_pch_tgp_ddc_pin_map[] = {
1639 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1640 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1641 [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP,
1642 [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP,
1643};
1644
1645static const u8 adls_ddc_pin_map[] = {
1646 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1647 [ADLS_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
1648 [ADLS_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
1649 [ADLS_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
1650 [ADLS_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
1651};
1652
1653static const u8 gen9bc_tgp_ddc_pin_map[] = {
1654 [DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1655 [DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP,
1656 [DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP,
1657};
1658
1659static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
1660{
1661 const u8 *ddc_pin_map;
1662 int n_entries;
1663
1664 if (IS_ALDERLAKE_S(i915)) {
1665 ddc_pin_map = adls_ddc_pin_map;
1666 n_entries = ARRAY_SIZE(adls_ddc_pin_map);
1667 } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
1668 return vbt_pin;
1669 } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
1670 ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
1671 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
1672 } else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) {
1673 ddc_pin_map = gen9bc_tgp_ddc_pin_map;
1674 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
1675 } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
1676 ddc_pin_map = icp_ddc_pin_map;
1677 n_entries = ARRAY_SIZE(icp_ddc_pin_map);
1678 } else if (HAS_PCH_CNP(i915)) {
1679 ddc_pin_map = cnp_ddc_pin_map;
1680 n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
1681 } else {
1682 /* Assuming direct map */
1683 return vbt_pin;
1684 }
1685
1686 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
1687 return ddc_pin_map[vbt_pin];
1688
1689 drm_dbg_kms(&i915->drm,
1690 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
1691 vbt_pin);
1692 return 0;
1693}
1694
1695static enum port __dvo_port_to_port(int n_ports, int n_dvo,
1696 const int port_mapping[][3], u8 dvo_port)
1697{
1698 enum port port;
1699 int i;
1700
1701 for (port = PORT_A; port < n_ports; port++) {
1702 for (i = 0; i < n_dvo; i++) {
1703 if (port_mapping[port][i] == -1)
1704 break;
1705
1706 if (dvo_port == port_mapping[port][i])
1707 return port;
1708 }
1709 }
1710
1711 return PORT_NONE;
1712}
1713
1714static enum port dvo_port_to_port(struct drm_i915_private *i915,
1715 u8 dvo_port)
1716{
1717 /*
1718 * Each DDI port can have more than one value on the "DVO Port" field,
1719 * so look for all the possible values for each port.
1720 */
1721 static const int port_mapping[][3] = {
1722 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1723 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1724 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1725 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1726 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
1727 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
1728 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
1729 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
1730 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
1731 };
1732 /*
1733 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
1734 * map to DDI A,B,TC1,TC2 respectively.
1735 */
1736 static const int rkl_port_mapping[][3] = {
1737 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1738 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1739 [PORT_C] = { -1 },
1740 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1741 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1742 };
1743 /*
1744 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E,
1745 * PORT_F and PORT_G, we need to map that to correct VBT sections.
1746 */
1747 static const int adls_port_mapping[][3] = {
1748 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1749 [PORT_B] = { -1 },
1750 [PORT_C] = { -1 },
1751 [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1752 [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1753 [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1754 [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
1755 };
1756 static const int xelpd_port_mapping[][3] = {
1757 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1758 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1759 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1760 [PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1761 [PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
1762 [PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
1763 [PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
1764 [PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
1765 [PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
1766 };
1767
1768 if (DISPLAY_VER(i915) == 13)
1769 return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping),
1770 ARRAY_SIZE(xelpd_port_mapping[0]),
1771 xelpd_port_mapping,
1772 dvo_port);
1773 else if (IS_ALDERLAKE_S(i915))
1774 return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping),
1775 ARRAY_SIZE(adls_port_mapping[0]),
1776 adls_port_mapping,
1777 dvo_port);
1778 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
1779 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
1780 ARRAY_SIZE(rkl_port_mapping[0]),
1781 rkl_port_mapping,
1782 dvo_port);
1783 else
1784 return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
1785 ARRAY_SIZE(port_mapping[0]),
1786 port_mapping,
1787 dvo_port);
1788}
1789
1790static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate)
1791{
1792 switch (vbt_max_link_rate) {
1793 default:
1794 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF:
1795 return 0;
1796 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20:
1797 return 2000000;
1798 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5:
1799 return 1350000;
1800 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10:
1801 return 1000000;
1802 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3:
1803 return 810000;
1804 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2:
1805 return 540000;
1806 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR:
1807 return 270000;
1808 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR:
1809 return 162000;
1810 }
1811}
1812
1813static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
1814{
1815 switch (vbt_max_link_rate) {
1816 default:
1817 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3:
1818 return 810000;
1819 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2:
1820 return 540000;
1821 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR:
1822 return 270000;
1823 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR:
1824 return 162000;
1825 }
1826}
1827
1828static void sanitize_device_type(struct intel_bios_encoder_data *devdata,
1829 enum port port)
1830{
1831 struct drm_i915_private *i915 = devdata->i915;
1832 bool is_hdmi;
1833
1834 if (port != PORT_A || DISPLAY_VER(i915) >= 12)
1835 return;
1836
1837 if (!(devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING))
1838 return;
1839
1840 is_hdmi = !(devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT);
1841
1842 drm_dbg_kms(&i915->drm, "VBT claims port A supports DVI%s, ignoring\n",
1843 is_hdmi ? "/HDMI" : "");
1844
1845 devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
1846 devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
1847}
1848
1849static bool
1850intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata)
1851{
1852 return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1853}
1854
1855bool
1856intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata)
1857{
1858 return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1859}
1860
1861bool
1862intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata)
1863{
1864 return intel_bios_encoder_supports_dvi(devdata) &&
1865 (devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1866}
1867
1868bool
1869intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata)
1870{
1871 return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1872}
1873
1874static bool
1875intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata)
1876{
1877 return intel_bios_encoder_supports_dp(devdata) &&
1878 devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR;
1879}
1880
1881static bool is_port_valid(struct drm_i915_private *i915, enum port port)
1882{
1883 /*
1884 * On some ICL/CNL SKUs port F is not present, but broken VBTs mark
1885 * the port as present. Only try to initialize port F for the
1886 * SKUs that may actually have it.
1887 */
1888 if (port == PORT_F && (IS_ICELAKE(i915) || IS_CANNONLAKE(i915)))
1889 return IS_ICL_WITH_PORT_F(i915) || IS_CNL_WITH_PORT_F(i915);
1890
1891 return true;
1892}
1893
1894static void parse_ddi_port(struct drm_i915_private *i915,
1895 struct intel_bios_encoder_data *devdata)
1896{
1897 const struct child_device_config *child = &devdata->child;
1898 struct ddi_vbt_port_info *info;
1899 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt, supports_typec_usb, supports_tbt;
1900 int dp_boost_level, hdmi_boost_level;
1901 enum port port;
1902
1903 port = dvo_port_to_port(i915, child->dvo_port);
1904 if (port == PORT_NONE)
1905 return;
1906
1907 if (!is_port_valid(i915, port)) {
1908 drm_dbg_kms(&i915->drm,
1909 "VBT reports port %c as supported, but that can't be true: skipping\n",
1910 port_name(port));
1911 return;
1912 }
1913
1914 info = &i915->vbt.ddi_port_info[port];
1915
1916 if (info->devdata) {
1917 drm_dbg_kms(&i915->drm,
1918 "More than one child device for port %c in VBT, using the first.\n",
1919 port_name(port));
1920 return;
1921 }
1922
1923 sanitize_device_type(devdata, port);
1924
1925 is_dvi = intel_bios_encoder_supports_dvi(devdata);
1926 is_dp = intel_bios_encoder_supports_dp(devdata);
1927 is_crt = intel_bios_encoder_supports_crt(devdata);
1928 is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
1929 is_edp = intel_bios_encoder_supports_edp(devdata);
1930
1931 supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata);
1932 supports_tbt = intel_bios_encoder_supports_tbt(devdata);
1933
1934 drm_dbg_kms(&i915->drm,
1935 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
1936 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp,
1937 HAS_LSPCON(i915) && child->lspcon,
1938 supports_typec_usb, supports_tbt,
1939 devdata->dsc != NULL);
1940
1941 if (is_dvi) {
1942 u8 ddc_pin;
1943
1944 ddc_pin = map_ddc_pin(i915, child->ddc_pin);
1945 if (intel_gmbus_is_valid_pin(i915, ddc_pin)) {
1946 info->alternate_ddc_pin = ddc_pin;
1947 sanitize_ddc_pin(i915, port);
1948 } else {
1949 drm_dbg_kms(&i915->drm,
1950 "Port %c has invalid DDC pin %d, "
1951 "sticking to defaults\n",
1952 port_name(port), ddc_pin);
1953 }
1954 }
1955
1956 if (is_dp) {
1957 info->alternate_aux_channel = child->aux_channel;
1958
1959 sanitize_aux_ch(i915, port);
1960 }
1961
1962 if (i915->vbt.version >= 158) {
1963 /* The VBT HDMI level shift values match the table we have. */
1964 u8 hdmi_level_shift = child->hdmi_level_shifter_value;
1965 drm_dbg_kms(&i915->drm,
1966 "Port %c VBT HDMI level shift: %d\n",
1967 port_name(port),
1968 hdmi_level_shift);
1969 info->hdmi_level_shift = hdmi_level_shift;
1970 info->hdmi_level_shift_set = true;
1971 }
1972
1973 if (i915->vbt.version >= 204) {
1974 int max_tmds_clock;
1975
1976 switch (child->hdmi_max_data_rate) {
1977 default:
1978 MISSING_CASE(child->hdmi_max_data_rate);
1979 fallthrough;
1980 case HDMI_MAX_DATA_RATE_PLATFORM:
1981 max_tmds_clock = 0;
1982 break;
1983 case HDMI_MAX_DATA_RATE_297:
1984 max_tmds_clock = 297000;
1985 break;
1986 case HDMI_MAX_DATA_RATE_165:
1987 max_tmds_clock = 165000;
1988 break;
1989 }
1990
1991 if (max_tmds_clock)
1992 drm_dbg_kms(&i915->drm,
1993 "Port %c VBT HDMI max TMDS clock: %d kHz\n",
1994 port_name(port), max_tmds_clock);
1995 info->max_tmds_clock = max_tmds_clock;
1996 }
1997
1998 /* I_boost config for SKL and above */
1999 dp_boost_level = intel_bios_encoder_dp_boost_level(devdata);
2000 if (dp_boost_level)
2001 drm_dbg_kms(&i915->drm,
2002 "Port %c VBT (e)DP boost level: %d\n",
2003 port_name(port), dp_boost_level);
2004
2005 hdmi_boost_level = intel_bios_encoder_hdmi_boost_level(devdata);
2006 if (hdmi_boost_level)
2007 drm_dbg_kms(&i915->drm,
2008 "Port %c VBT HDMI boost level: %d\n",
2009 port_name(port), hdmi_boost_level);
2010
2011 /* DP max link rate for CNL+ */
2012 if (i915->vbt.version >= 216) {
2013 if (i915->vbt.version >= 230)
2014 info->dp_max_link_rate = parse_bdb_230_dp_max_link_rate(child->dp_max_link_rate);
2015 else
2016 info->dp_max_link_rate = parse_bdb_216_dp_max_link_rate(child->dp_max_link_rate);
2017
2018 drm_dbg_kms(&i915->drm,
2019 "Port %c VBT DP max link rate: %d\n",
2020 port_name(port), info->dp_max_link_rate);
2021 }
2022
2023 info->devdata = devdata;
2024}
2025
2026static void parse_ddi_ports(struct drm_i915_private *i915)
2027{
2028 struct intel_bios_encoder_data *devdata;
2029
2030 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
2031 return;
2032
2033 if (i915->vbt.version < 155)
2034 return;
2035
2036 list_for_each_entry(devdata, &i915->vbt.display_devices, node)
2037 parse_ddi_port(i915, devdata);
2038}
2039
2040static void
2041parse_general_definitions(struct drm_i915_private *i915,
2042 const struct bdb_header *bdb)
2043{
2044 const struct bdb_general_definitions *defs;
2045 struct intel_bios_encoder_data *devdata;
2046 const struct child_device_config *child;
2047 int i, child_device_num;
2048 u8 expected_size;
2049 u16 block_size;
2050 int bus_pin;
2051
2052 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
2053 if (!defs) {
2054 drm_dbg_kms(&i915->drm,
2055 "No general definition block is found, no devices defined.\n");
2056 return;
2057 }
2058
2059 block_size = get_blocksize(defs);
2060 if (block_size < sizeof(*defs)) {
2061 drm_dbg_kms(&i915->drm,
2062 "General definitions block too small (%u)\n",
2063 block_size);
2064 return;
2065 }
2066
2067 bus_pin = defs->crt_ddc_gmbus_pin;
2068 drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
2069 if (intel_gmbus_is_valid_pin(i915, bus_pin))
2070 i915->vbt.crt_ddc_pin = bus_pin;
2071
2072 if (bdb->version < 106) {
2073 expected_size = 22;
2074 } else if (bdb->version < 111) {
2075 expected_size = 27;
2076 } else if (bdb->version < 195) {
2077 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
2078 } else if (bdb->version == 195) {
2079 expected_size = 37;
2080 } else if (bdb->version <= 215) {
2081 expected_size = 38;
2082 } else if (bdb->version <= 237) {
2083 expected_size = 39;
2084 } else {
2085 expected_size = sizeof(*child);
2086 BUILD_BUG_ON(sizeof(*child) < 39);
2087 drm_dbg(&i915->drm,
2088 "Expected child device config size for VBT version %u not known; assuming %u\n",
2089 bdb->version, expected_size);
2090 }
2091
2092 /* Flag an error for unexpected size, but continue anyway. */
2093 if (defs->child_dev_size != expected_size)
2094 drm_err(&i915->drm,
2095 "Unexpected child device config size %u (expected %u for VBT version %u)\n",
2096 defs->child_dev_size, expected_size, bdb->version);
2097
2098 /* The legacy sized child device config is the minimum we need. */
2099 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
2100 drm_dbg_kms(&i915->drm,
2101 "Child device config size %u is too small.\n",
2102 defs->child_dev_size);
2103 return;
2104 }
2105
2106 /* get the number of child device */
2107 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
2108
2109 for (i = 0; i < child_device_num; i++) {
2110 child = child_device_ptr(defs, i);
2111 if (!child->device_type)
2112 continue;
2113
2114 drm_dbg_kms(&i915->drm,
2115 "Found VBT child device with type 0x%x\n",
2116 child->device_type);
2117
2118 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2119 if (!devdata)
2120 break;
2121
2122 devdata->i915 = i915;
2123
2124 /*
2125 * Copy as much as we know (sizeof) and is available
2126 * (child_dev_size) of the child device config. Accessing the
2127 * data must depend on VBT version.
2128 */
2129 memcpy(&devdata->child, child,
2130 min_t(size_t, defs->child_dev_size, sizeof(*child)));
2131
2132 list_add_tail(&devdata->node, &i915->vbt.display_devices);
2133 }
2134
2135 if (list_empty(&i915->vbt.display_devices))
2136 drm_dbg_kms(&i915->drm,
2137 "no child dev is parsed from VBT\n");
2138}
2139
2140/* Common defaults which may be overridden by VBT. */
2141static void
2142init_vbt_defaults(struct drm_i915_private *i915)
2143{
2144 i915->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
2145
2146 /* Default to having backlight */
2147 i915->vbt.backlight.present = true;
2148
2149 /* LFP panel data */
2150 i915->vbt.lvds_dither = 1;
2151
2152 /* SDVO panel data */
2153 i915->vbt.sdvo_lvds_vbt_mode = NULL;
2154
2155 /* general features */
2156 i915->vbt.int_tv_support = 1;
2157 i915->vbt.int_crt_support = 1;
2158
2159 /* driver features */
2160 i915->vbt.int_lvds_support = 1;
2161
2162 /* Default to using SSC */
2163 i915->vbt.lvds_use_ssc = 1;
2164 /*
2165 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
2166 * clock for LVDS.
2167 */
2168 i915->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915,
2169 !HAS_PCH_SPLIT(i915));
2170 drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n",
2171 i915->vbt.lvds_ssc_freq);
2172}
2173
2174/* Defaults to initialize only if there is no VBT. */
2175static void
2176init_vbt_missing_defaults(struct drm_i915_private *i915)
2177{
2178 enum port port;
2179 int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) |
2180 BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F);
2181
2182 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
2183 return;
2184
2185 for_each_port_masked(port, ports) {
2186 struct intel_bios_encoder_data *devdata;
2187 struct child_device_config *child;
2188 enum phy phy = intel_port_to_phy(i915, port);
2189
2190 /*
2191 * VBT has the TypeC mode (native,TBT/USB) and we don't want
2192 * to detect it.
2193 */
2194 if (intel_phy_is_tc(i915, phy))
2195 continue;
2196
2197 /* Create fake child device config */
2198 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2199 if (!devdata)
2200 break;
2201
2202 devdata->i915 = i915;
2203 child = &devdata->child;
2204
2205 if (port == PORT_F)
2206 child->dvo_port = DVO_PORT_HDMIF;
2207 else if (port == PORT_E)
2208 child->dvo_port = DVO_PORT_HDMIE;
2209 else
2210 child->dvo_port = DVO_PORT_HDMIA + port;
2211
2212 if (port != PORT_A && port != PORT_E)
2213 child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING;
2214
2215 if (port != PORT_E)
2216 child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2217
2218 if (port == PORT_A)
2219 child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR;
2220
2221 list_add_tail(&devdata->node, &i915->vbt.display_devices);
2222
2223 drm_dbg_kms(&i915->drm,
2224 "Generating default VBT child device with type 0x04%x on port %c\n",
2225 child->device_type, port_name(port));
2226 }
2227
2228 /* Bypass some minimum baseline VBT version checks */
2229 i915->vbt.version = 155;
2230}
2231
2232static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2233{
2234 const void *_vbt = vbt;
2235
2236 return _vbt + vbt->bdb_offset;
2237}
2238
2239/**
2240 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2241 * @buf: pointer to a buffer to validate
2242 * @size: size of the buffer
2243 *
2244 * Returns true on valid VBT.
2245 */
2246bool intel_bios_is_valid_vbt(const void *buf, size_t size)
2247{
2248 const struct vbt_header *vbt = buf;
2249 const struct bdb_header *bdb;
2250
2251 if (!vbt)
2252 return false;
2253
2254 if (sizeof(struct vbt_header) > size) {
2255 DRM_DEBUG_DRIVER("VBT header incomplete\n");
2256 return false;
2257 }
2258
2259 if (memcmp(vbt->signature, "$VBT", 4)) {
2260 DRM_DEBUG_DRIVER("VBT invalid signature\n");
2261 return false;
2262 }
2263
2264 if (vbt->vbt_size > size) {
2265 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n");
2266 return false;
2267 }
2268
2269 size = vbt->vbt_size;
2270
2271 if (range_overflows_t(size_t,
2272 vbt->bdb_offset,
2273 sizeof(struct bdb_header),
2274 size)) {
2275 DRM_DEBUG_DRIVER("BDB header incomplete\n");
2276 return false;
2277 }
2278
2279 bdb = get_bdb_header(vbt);
2280 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
2281 DRM_DEBUG_DRIVER("BDB incomplete\n");
2282 return false;
2283 }
2284
2285 return vbt;
2286}
2287
2288static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)
2289{
2290 struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
2291 void __iomem *p = NULL, *oprom;
2292 struct vbt_header *vbt;
2293 u16 vbt_size;
2294 size_t i, size;
2295
2296 oprom = pci_map_rom(pdev, &size);
2297 if (!oprom)
2298 return NULL;
2299
2300 /* Scour memory looking for the VBT signature. */
2301 for (i = 0; i + 4 < size; i += 4) {
2302 if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
2303 continue;
2304
2305 p = oprom + i;
2306 size -= i;
2307 break;
2308 }
2309
2310 if (!p)
2311 goto err_unmap_oprom;
2312
2313 if (sizeof(struct vbt_header) > size) {
2314 drm_dbg(&i915->drm, "VBT header incomplete\n");
2315 goto err_unmap_oprom;
2316 }
2317
2318 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
2319 if (vbt_size > size) {
2320 drm_dbg(&i915->drm,
2321 "VBT incomplete (vbt_size overflows)\n");
2322 goto err_unmap_oprom;
2323 }
2324
2325 /* The rest will be validated by intel_bios_is_valid_vbt() */
2326 vbt = kmalloc(vbt_size, GFP_KERNEL);
2327 if (!vbt)
2328 goto err_unmap_oprom;
2329
2330 memcpy_fromio(vbt, p, vbt_size);
2331
2332 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
2333 goto err_free_vbt;
2334
2335 pci_unmap_rom(pdev, oprom);
2336
2337 return vbt;
2338
2339err_free_vbt:
2340 kfree(vbt);
2341err_unmap_oprom:
2342 pci_unmap_rom(pdev, oprom);
2343
2344 return NULL;
2345}
2346
2347/**
2348 * intel_bios_init - find VBT and initialize settings from the BIOS
2349 * @i915: i915 device instance
2350 *
2351 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
2352 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
2353 * initialize some defaults if the VBT is not present at all.
2354 */
2355void intel_bios_init(struct drm_i915_private *i915)
2356{
2357 const struct vbt_header *vbt = i915->opregion.vbt;
2358 struct vbt_header *oprom_vbt = NULL;
2359 const struct bdb_header *bdb;
2360
2361 INIT_LIST_HEAD(&i915->vbt.display_devices);
2362
2363 if (!HAS_DISPLAY(i915)) {
2364 drm_dbg_kms(&i915->drm,
2365 "Skipping VBT init due to disabled display.\n");
2366 return;
2367 }
2368
2369 init_vbt_defaults(i915);
2370
2371 /* If the OpRegion does not have VBT, look in PCI ROM. */
2372 if (!vbt) {
2373 oprom_vbt = oprom_get_vbt(i915);
2374 if (!oprom_vbt)
2375 goto out;
2376
2377 vbt = oprom_vbt;
2378
2379 drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n");
2380 }
2381
2382 bdb = get_bdb_header(vbt);
2383 i915->vbt.version = bdb->version;
2384
2385 drm_dbg_kms(&i915->drm,
2386 "VBT signature \"%.*s\", BDB version %d\n",
2387 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
2388
2389 /* Grab useful general definitions */
2390 parse_general_features(i915, bdb);
2391 parse_general_definitions(i915, bdb);
2392 parse_panel_options(i915, bdb);
2393 parse_panel_dtd(i915, bdb);
2394 parse_lfp_backlight(i915, bdb);
2395 parse_sdvo_panel_data(i915, bdb);
2396 parse_driver_features(i915, bdb);
2397 parse_power_conservation_features(i915, bdb);
2398 parse_edp(i915, bdb);
2399 parse_psr(i915, bdb);
2400 parse_mipi_config(i915, bdb);
2401 parse_mipi_sequence(i915, bdb);
2402
2403 /* Depends on child device list */
2404 parse_compression_parameters(i915, bdb);
2405
2406out:
2407 if (!vbt) {
2408 drm_info(&i915->drm,
2409 "Failed to find VBIOS tables (VBT)\n");
2410 init_vbt_missing_defaults(i915);
2411 }
2412
2413 /* Further processing on pre-parsed or generated child device data */
2414 parse_sdvo_device_mapping(i915);
2415 parse_ddi_ports(i915);
2416
2417 kfree(oprom_vbt);
2418}
2419
2420/**
2421 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
2422 * @i915: i915 device instance
2423 */
2424void intel_bios_driver_remove(struct drm_i915_private *i915)
2425{
2426 struct intel_bios_encoder_data *devdata, *n;
2427
2428 list_for_each_entry_safe(devdata, n, &i915->vbt.display_devices, node) {
2429 list_del(&devdata->node);
2430 kfree(devdata->dsc);
2431 kfree(devdata);
2432 }
2433
2434 kfree(i915->vbt.sdvo_lvds_vbt_mode);
2435 i915->vbt.sdvo_lvds_vbt_mode = NULL;
2436 kfree(i915->vbt.lfp_lvds_vbt_mode);
2437 i915->vbt.lfp_lvds_vbt_mode = NULL;
2438 kfree(i915->vbt.dsi.data);
2439 i915->vbt.dsi.data = NULL;
2440 kfree(i915->vbt.dsi.pps);
2441 i915->vbt.dsi.pps = NULL;
2442 kfree(i915->vbt.dsi.config);
2443 i915->vbt.dsi.config = NULL;
2444 kfree(i915->vbt.dsi.deassert_seq);
2445 i915->vbt.dsi.deassert_seq = NULL;
2446}
2447
2448/**
2449 * intel_bios_is_tv_present - is integrated TV present in VBT
2450 * @i915: i915 device instance
2451 *
2452 * Return true if TV is present. If no child devices were parsed from VBT,
2453 * assume TV is present.
2454 */
2455bool intel_bios_is_tv_present(struct drm_i915_private *i915)
2456{
2457 const struct intel_bios_encoder_data *devdata;
2458 const struct child_device_config *child;
2459
2460 if (!i915->vbt.int_tv_support)
2461 return false;
2462
2463 if (list_empty(&i915->vbt.display_devices))
2464 return true;
2465
2466 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2467 child = &devdata->child;
2468
2469 /*
2470 * If the device type is not TV, continue.
2471 */
2472 switch (child->device_type) {
2473 case DEVICE_TYPE_INT_TV:
2474 case DEVICE_TYPE_TV:
2475 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
2476 break;
2477 default:
2478 continue;
2479 }
2480 /* Only when the addin_offset is non-zero, it is regarded
2481 * as present.
2482 */
2483 if (child->addin_offset)
2484 return true;
2485 }
2486
2487 return false;
2488}
2489
2490/**
2491 * intel_bios_is_lvds_present - is LVDS present in VBT
2492 * @i915: i915 device instance
2493 * @i2c_pin: i2c pin for LVDS if present
2494 *
2495 * Return true if LVDS is present. If no child devices were parsed from VBT,
2496 * assume LVDS is present.
2497 */
2498bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin)
2499{
2500 const struct intel_bios_encoder_data *devdata;
2501 const struct child_device_config *child;
2502
2503 if (list_empty(&i915->vbt.display_devices))
2504 return true;
2505
2506 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2507 child = &devdata->child;
2508
2509 /* If the device type is not LFP, continue.
2510 * We have to check both the new identifiers as well as the
2511 * old for compatibility with some BIOSes.
2512 */
2513 if (child->device_type != DEVICE_TYPE_INT_LFP &&
2514 child->device_type != DEVICE_TYPE_LFP)
2515 continue;
2516
2517 if (intel_gmbus_is_valid_pin(i915, child->i2c_pin))
2518 *i2c_pin = child->i2c_pin;
2519
2520 /* However, we cannot trust the BIOS writers to populate
2521 * the VBT correctly. Since LVDS requires additional
2522 * information from AIM blocks, a non-zero addin offset is
2523 * a good indicator that the LVDS is actually present.
2524 */
2525 if (child->addin_offset)
2526 return true;
2527
2528 /* But even then some BIOS writers perform some black magic
2529 * and instantiate the device without reference to any
2530 * additional data. Trust that if the VBT was written into
2531 * the OpRegion then they have validated the LVDS's existence.
2532 */
2533 if (i915->opregion.vbt)
2534 return true;
2535 }
2536
2537 return false;
2538}
2539
2540/**
2541 * intel_bios_is_port_present - is the specified digital port present
2542 * @i915: i915 device instance
2543 * @port: port to check
2544 *
2545 * Return true if the device in %port is present.
2546 */
2547bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port)
2548{
2549 const struct intel_bios_encoder_data *devdata;
2550 const struct child_device_config *child;
2551 static const struct {
2552 u16 dp, hdmi;
2553 } port_mapping[] = {
2554 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2555 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2556 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2557 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2558 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2559 };
2560
2561 if (HAS_DDI(i915)) {
2562 const struct ddi_vbt_port_info *port_info =
2563 &i915->vbt.ddi_port_info[port];
2564
2565 return port_info->devdata;
2566 }
2567
2568 /* FIXME maybe deal with port A as well? */
2569 if (drm_WARN_ON(&i915->drm,
2570 port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
2571 return false;
2572
2573 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2574 child = &devdata->child;
2575
2576 if ((child->dvo_port == port_mapping[port].dp ||
2577 child->dvo_port == port_mapping[port].hdmi) &&
2578 (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING |
2579 DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
2580 return true;
2581 }
2582
2583 return false;
2584}
2585
2586/**
2587 * intel_bios_is_port_edp - is the device in given port eDP
2588 * @i915: i915 device instance
2589 * @port: port to check
2590 *
2591 * Return true if the device in %port is eDP.
2592 */
2593bool intel_bios_is_port_edp(struct drm_i915_private *i915, enum port port)
2594{
2595 const struct intel_bios_encoder_data *devdata;
2596 const struct child_device_config *child;
2597 static const short port_mapping[] = {
2598 [PORT_B] = DVO_PORT_DPB,
2599 [PORT_C] = DVO_PORT_DPC,
2600 [PORT_D] = DVO_PORT_DPD,
2601 [PORT_E] = DVO_PORT_DPE,
2602 [PORT_F] = DVO_PORT_DPF,
2603 };
2604
2605 if (HAS_DDI(i915)) {
2606 const struct intel_bios_encoder_data *devdata;
2607
2608 devdata = intel_bios_encoder_data_lookup(i915, port);
2609
2610 return devdata && intel_bios_encoder_supports_edp(devdata);
2611 }
2612
2613 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2614 child = &devdata->child;
2615
2616 if (child->dvo_port == port_mapping[port] &&
2617 (child->device_type & DEVICE_TYPE_eDP_BITS) ==
2618 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
2619 return true;
2620 }
2621
2622 return false;
2623}
2624
2625static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
2626 enum port port)
2627{
2628 static const struct {
2629 u16 dp, hdmi;
2630 } port_mapping[] = {
2631 /*
2632 * Buggy VBTs may declare DP ports as having
2633 * HDMI type dvo_port :( So let's check both.
2634 */
2635 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2636 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2637 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2638 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2639 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2640 };
2641
2642 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
2643 return false;
2644
2645 if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
2646 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
2647 return false;
2648
2649 if (child->dvo_port == port_mapping[port].dp)
2650 return true;
2651
2652 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
2653 if (child->dvo_port == port_mapping[port].hdmi &&
2654 child->aux_channel != 0)
2655 return true;
2656
2657 return false;
2658}
2659
2660bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *i915,
2661 enum port port)
2662{
2663 const struct intel_bios_encoder_data *devdata;
2664
2665 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2666 if (child_dev_is_dp_dual_mode(&devdata->child, port))
2667 return true;
2668 }
2669
2670 return false;
2671}
2672
2673/**
2674 * intel_bios_is_dsi_present - is DSI present in VBT
2675 * @i915: i915 device instance
2676 * @port: port for DSI if present
2677 *
2678 * Return true if DSI is present, and return the port in %port.
2679 */
2680bool intel_bios_is_dsi_present(struct drm_i915_private *i915,
2681 enum port *port)
2682{
2683 const struct intel_bios_encoder_data *devdata;
2684 const struct child_device_config *child;
2685 u8 dvo_port;
2686
2687 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2688 child = &devdata->child;
2689
2690 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2691 continue;
2692
2693 dvo_port = child->dvo_port;
2694
2695 if (dvo_port == DVO_PORT_MIPIA ||
2696 (dvo_port == DVO_PORT_MIPIB && DISPLAY_VER(i915) >= 11) ||
2697 (dvo_port == DVO_PORT_MIPIC && DISPLAY_VER(i915) < 11)) {
2698 if (port)
2699 *port = dvo_port - DVO_PORT_MIPIA;
2700 return true;
2701 } else if (dvo_port == DVO_PORT_MIPIB ||
2702 dvo_port == DVO_PORT_MIPIC ||
2703 dvo_port == DVO_PORT_MIPID) {
2704 drm_dbg_kms(&i915->drm,
2705 "VBT has unsupported DSI port %c\n",
2706 port_name(dvo_port - DVO_PORT_MIPIA));
2707 }
2708 }
2709
2710 return false;
2711}
2712
2713static void fill_dsc(struct intel_crtc_state *crtc_state,
2714 struct dsc_compression_parameters_entry *dsc,
2715 int dsc_max_bpc)
2716{
2717 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
2718 int bpc = 8;
2719
2720 vdsc_cfg->dsc_version_major = dsc->version_major;
2721 vdsc_cfg->dsc_version_minor = dsc->version_minor;
2722
2723 if (dsc->support_12bpc && dsc_max_bpc >= 12)
2724 bpc = 12;
2725 else if (dsc->support_10bpc && dsc_max_bpc >= 10)
2726 bpc = 10;
2727 else if (dsc->support_8bpc && dsc_max_bpc >= 8)
2728 bpc = 8;
2729 else
2730 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n",
2731 dsc_max_bpc);
2732
2733 crtc_state->pipe_bpp = bpc * 3;
2734
2735 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp,
2736 VBT_DSC_MAX_BPP(dsc->max_bpp));
2737
2738 /*
2739 * FIXME: This is ugly, and slice count should take DSC engine
2740 * throughput etc. into account.
2741 *
2742 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
2743 */
2744 if (dsc->slices_per_line & BIT(2)) {
2745 crtc_state->dsc.slice_count = 4;
2746 } else if (dsc->slices_per_line & BIT(1)) {
2747 crtc_state->dsc.slice_count = 2;
2748 } else {
2749 /* FIXME */
2750 if (!(dsc->slices_per_line & BIT(0)))
2751 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n");
2752
2753 crtc_state->dsc.slice_count = 1;
2754 }
2755
2756 if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
2757 crtc_state->dsc.slice_count != 0)
2758 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n",
2759 crtc_state->hw.adjusted_mode.crtc_hdisplay,
2760 crtc_state->dsc.slice_count);
2761
2762 /*
2763 * The VBT rc_buffer_block_size and rc_buffer_size definitions
2764 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63.
2765 */
2766 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size,
2767 dsc->rc_buffer_size);
2768
2769 /* FIXME: DSI spec says bpc + 1 for this one */
2770 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
2771
2772 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
2773
2774 vdsc_cfg->slice_height = dsc->slice_height;
2775}
2776
2777/* FIXME: initially DSI specific */
2778bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
2779 struct intel_crtc_state *crtc_state,
2780 int dsc_max_bpc)
2781{
2782 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2783 const struct intel_bios_encoder_data *devdata;
2784 const struct child_device_config *child;
2785
2786 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2787 child = &devdata->child;
2788
2789 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2790 continue;
2791
2792 if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) {
2793 if (!devdata->dsc)
2794 return false;
2795
2796 if (crtc_state)
2797 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
2798
2799 return true;
2800 }
2801 }
2802
2803 return false;
2804}
2805
2806/**
2807 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
2808 * @i915: i915 device instance
2809 * @port: port to check
2810 *
2811 * Return true if HPD should be inverted for %port.
2812 */
2813bool
2814intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
2815 enum port port)
2816{
2817 const struct intel_bios_encoder_data *devdata =
2818 i915->vbt.ddi_port_info[port].devdata;
2819
2820 if (drm_WARN_ON_ONCE(&i915->drm,
2821 !IS_GEMINILAKE(i915) && !IS_BROXTON(i915)))
2822 return false;
2823
2824 return devdata && devdata->child.hpd_invert;
2825}
2826
2827/**
2828 * intel_bios_is_lspcon_present - if LSPCON is attached on %port
2829 * @i915: i915 device instance
2830 * @port: port to check
2831 *
2832 * Return true if LSPCON is present on this port
2833 */
2834bool
2835intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
2836 enum port port)
2837{
2838 const struct intel_bios_encoder_data *devdata =
2839 i915->vbt.ddi_port_info[port].devdata;
2840
2841 return HAS_LSPCON(i915) && devdata && devdata->child.lspcon;
2842}
2843
2844/**
2845 * intel_bios_is_lane_reversal_needed - if lane reversal needed on port
2846 * @i915: i915 device instance
2847 * @port: port to check
2848 *
2849 * Return true if port requires lane reversal
2850 */
2851bool
2852intel_bios_is_lane_reversal_needed(const struct drm_i915_private *i915,
2853 enum port port)
2854{
2855 const struct intel_bios_encoder_data *devdata =
2856 i915->vbt.ddi_port_info[port].devdata;
2857
2858 return devdata && devdata->child.lane_reversal;
2859}
2860
2861enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
2862 enum port port)
2863{
2864 const struct ddi_vbt_port_info *info =
2865 &i915->vbt.ddi_port_info[port];
2866 enum aux_ch aux_ch;
2867
2868 if (!info->alternate_aux_channel) {
2869 aux_ch = (enum aux_ch)port;
2870
2871 drm_dbg_kms(&i915->drm,
2872 "using AUX %c for port %c (platform default)\n",
2873 aux_ch_name(aux_ch), port_name(port));
2874 return aux_ch;
2875 }
2876
2877 /*
2878 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
2879 * map to DDI A,B,TC1,TC2 respectively.
2880 *
2881 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
2882 * map to DDI A,TC1,TC2,TC3,TC4 respectively.
2883 */
2884 switch (info->alternate_aux_channel) {
2885 case DP_AUX_A:
2886 aux_ch = AUX_CH_A;
2887 break;
2888 case DP_AUX_B:
2889 if (IS_ALDERLAKE_S(i915))
2890 aux_ch = AUX_CH_USBC1;
2891 else
2892 aux_ch = AUX_CH_B;
2893 break;
2894 case DP_AUX_C:
2895 if (IS_ALDERLAKE_S(i915))
2896 aux_ch = AUX_CH_USBC2;
2897 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
2898 aux_ch = AUX_CH_USBC1;
2899 else
2900 aux_ch = AUX_CH_C;
2901 break;
2902 case DP_AUX_D:
2903 if (DISPLAY_VER(i915) == 13)
2904 aux_ch = AUX_CH_D_XELPD;
2905 else if (IS_ALDERLAKE_S(i915))
2906 aux_ch = AUX_CH_USBC3;
2907 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
2908 aux_ch = AUX_CH_USBC2;
2909 else
2910 aux_ch = AUX_CH_D;
2911 break;
2912 case DP_AUX_E:
2913 if (DISPLAY_VER(i915) == 13)
2914 aux_ch = AUX_CH_E_XELPD;
2915 else if (IS_ALDERLAKE_S(i915))
2916 aux_ch = AUX_CH_USBC4;
2917 else
2918 aux_ch = AUX_CH_E;
2919 break;
2920 case DP_AUX_F:
2921 if (DISPLAY_VER(i915) == 13)
2922 aux_ch = AUX_CH_USBC1;
2923 else
2924 aux_ch = AUX_CH_F;
2925 break;
2926 case DP_AUX_G:
2927 if (DISPLAY_VER(i915) == 13)
2928 aux_ch = AUX_CH_USBC2;
2929 else
2930 aux_ch = AUX_CH_G;
2931 break;
2932 case DP_AUX_H:
2933 if (DISPLAY_VER(i915) == 13)
2934 aux_ch = AUX_CH_USBC3;
2935 else
2936 aux_ch = AUX_CH_H;
2937 break;
2938 case DP_AUX_I:
2939 if (DISPLAY_VER(i915) == 13)
2940 aux_ch = AUX_CH_USBC4;
2941 else
2942 aux_ch = AUX_CH_I;
2943 break;
2944 default:
2945 MISSING_CASE(info->alternate_aux_channel);
2946 aux_ch = AUX_CH_A;
2947 break;
2948 }
2949
2950 drm_dbg_kms(&i915->drm, "using AUX %c for port %c (VBT)\n",
2951 aux_ch_name(aux_ch), port_name(port));
2952
2953 return aux_ch;
2954}
2955
2956int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
2957{
2958 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2959
2960 return i915->vbt.ddi_port_info[encoder->port].max_tmds_clock;
2961}
2962
2963int intel_bios_hdmi_level_shift(struct intel_encoder *encoder)
2964{
2965 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2966 const struct ddi_vbt_port_info *info =
2967 &i915->vbt.ddi_port_info[encoder->port];
2968
2969 return info->hdmi_level_shift_set ? info->hdmi_level_shift : -1;
2970}
2971
2972int intel_bios_encoder_dp_boost_level(const struct intel_bios_encoder_data *devdata)
2973{
2974 if (!devdata || devdata->i915->vbt.version < 196 || !devdata->child.iboost)
2975 return 0;
2976
2977 return translate_iboost(devdata->child.dp_iboost_level);
2978}
2979
2980int intel_bios_encoder_hdmi_boost_level(const struct intel_bios_encoder_data *devdata)
2981{
2982 if (!devdata || devdata->i915->vbt.version < 196 || !devdata->child.iboost)
2983 return 0;
2984
2985 return translate_iboost(devdata->child.hdmi_iboost_level);
2986}
2987
2988int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
2989{
2990 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2991
2992 return i915->vbt.ddi_port_info[encoder->port].dp_max_link_rate;
2993}
2994
2995int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
2996{
2997 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2998
2999 return i915->vbt.ddi_port_info[encoder->port].alternate_ddc_pin;
3000}
3001
3002bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata)
3003{
3004 return devdata->i915->vbt.version >= 195 && devdata->child.dp_usb_type_c;
3005}
3006
3007bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata)
3008{
3009 return devdata->i915->vbt.version >= 209 && devdata->child.tbt;
3010}
3011
3012const struct intel_bios_encoder_data *
3013intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port)
3014{
3015 return i915->vbt.ddi_port_info[port].devdata;
3016}
1/*
2 * Copyright © 2006 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28#include <drm/drm_dp_helper.h>
29
30#include "display/intel_display.h"
31#include "display/intel_display_types.h"
32#include "display/intel_gmbus.h"
33
34#include "i915_drv.h"
35
36#define _INTEL_BIOS_PRIVATE
37#include "intel_vbt_defs.h"
38
39/**
40 * DOC: Video BIOS Table (VBT)
41 *
42 * The Video BIOS Table, or VBT, provides platform and board specific
43 * configuration information to the driver that is not discoverable or available
44 * through other means. The configuration is mostly related to display
45 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
46 * the PCI ROM.
47 *
48 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
49 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
50 * contain the actual configuration information. The VBT Header, and thus the
51 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
52 * BDB Header. The data blocks are concatenated after the BDB Header. The data
53 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
54 * data. (Block 53, the MIPI Sequence Block is an exception.)
55 *
56 * The driver parses the VBT during load. The relevant information is stored in
57 * driver private data for ease of use, and the actual VBT is not read after
58 * that.
59 */
60
61/* Wrapper for VBT child device config */
62struct display_device_data {
63 struct child_device_config child;
64 struct dsc_compression_parameters_entry *dsc;
65 struct list_head node;
66};
67
68#define SLAVE_ADDR1 0x70
69#define SLAVE_ADDR2 0x72
70
71/* Get BDB block size given a pointer to Block ID. */
72static u32 _get_blocksize(const u8 *block_base)
73{
74 /* The MIPI Sequence Block v3+ has a separate size field. */
75 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
76 return *((const u32 *)(block_base + 4));
77 else
78 return *((const u16 *)(block_base + 1));
79}
80
81/* Get BDB block size give a pointer to data after Block ID and Block Size. */
82static u32 get_blocksize(const void *block_data)
83{
84 return _get_blocksize(block_data - 3);
85}
86
87static const void *
88find_section(const void *_bdb, enum bdb_block_id section_id)
89{
90 const struct bdb_header *bdb = _bdb;
91 const u8 *base = _bdb;
92 int index = 0;
93 u32 total, current_size;
94 enum bdb_block_id current_id;
95
96 /* skip to first section */
97 index += bdb->header_size;
98 total = bdb->bdb_size;
99
100 /* walk the sections looking for section_id */
101 while (index + 3 < total) {
102 current_id = *(base + index);
103 current_size = _get_blocksize(base + index);
104 index += 3;
105
106 if (index + current_size > total)
107 return NULL;
108
109 if (current_id == section_id)
110 return base + index;
111
112 index += current_size;
113 }
114
115 return NULL;
116}
117
118static void
119fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
120 const struct lvds_dvo_timing *dvo_timing)
121{
122 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
123 dvo_timing->hactive_lo;
124 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
125 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
126 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
127 ((dvo_timing->hsync_pulse_width_hi << 8) |
128 dvo_timing->hsync_pulse_width_lo);
129 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
130 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
131
132 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
133 dvo_timing->vactive_lo;
134 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
135 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
136 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
137 ((dvo_timing->vsync_pulse_width_hi << 4) |
138 dvo_timing->vsync_pulse_width_lo);
139 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
140 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
141 panel_fixed_mode->clock = dvo_timing->clock * 10;
142 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
143
144 if (dvo_timing->hsync_positive)
145 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
146 else
147 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
148
149 if (dvo_timing->vsync_positive)
150 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
151 else
152 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
153
154 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
155 dvo_timing->himage_lo;
156 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
157 dvo_timing->vimage_lo;
158
159 /* Some VBTs have bogus h/vtotal values */
160 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
161 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
162 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
163 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
164
165 drm_mode_set_name(panel_fixed_mode);
166}
167
168static const struct lvds_dvo_timing *
169get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
170 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
171 int index)
172{
173 /*
174 * the size of fp_timing varies on the different platform.
175 * So calculate the DVO timing relative offset in LVDS data
176 * entry to get the DVO timing entry
177 */
178
179 int lfp_data_size =
180 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
181 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
182 int dvo_timing_offset =
183 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
184 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
185 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
186
187 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
188}
189
190/* get lvds_fp_timing entry
191 * this function may return NULL if the corresponding entry is invalid
192 */
193static const struct lvds_fp_timing *
194get_lvds_fp_timing(const struct bdb_header *bdb,
195 const struct bdb_lvds_lfp_data *data,
196 const struct bdb_lvds_lfp_data_ptrs *ptrs,
197 int index)
198{
199 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
200 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
201 size_t ofs;
202
203 if (index >= ARRAY_SIZE(ptrs->ptr))
204 return NULL;
205 ofs = ptrs->ptr[index].fp_timing_offset;
206 if (ofs < data_ofs ||
207 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
208 return NULL;
209 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
210}
211
212/* Parse general panel options */
213static void
214parse_panel_options(struct drm_i915_private *dev_priv,
215 const struct bdb_header *bdb)
216{
217 const struct bdb_lvds_options *lvds_options;
218 int panel_type;
219 int drrs_mode;
220 int ret;
221
222 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
223 if (!lvds_options)
224 return;
225
226 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
227
228 ret = intel_opregion_get_panel_type(dev_priv);
229 if (ret >= 0) {
230 drm_WARN_ON(&dev_priv->drm, ret > 0xf);
231 panel_type = ret;
232 drm_dbg_kms(&dev_priv->drm, "Panel type: %d (OpRegion)\n",
233 panel_type);
234 } else {
235 if (lvds_options->panel_type > 0xf) {
236 drm_dbg_kms(&dev_priv->drm,
237 "Invalid VBT panel type 0x%x\n",
238 lvds_options->panel_type);
239 return;
240 }
241 panel_type = lvds_options->panel_type;
242 drm_dbg_kms(&dev_priv->drm, "Panel type: %d (VBT)\n",
243 panel_type);
244 }
245
246 dev_priv->vbt.panel_type = panel_type;
247
248 drrs_mode = (lvds_options->dps_panel_type_bits
249 >> (panel_type * 2)) & MODE_MASK;
250 /*
251 * VBT has static DRRS = 0 and seamless DRRS = 2.
252 * The below piece of code is required to adjust vbt.drrs_type
253 * to match the enum drrs_support_type.
254 */
255 switch (drrs_mode) {
256 case 0:
257 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
258 drm_dbg_kms(&dev_priv->drm, "DRRS supported mode is static\n");
259 break;
260 case 2:
261 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
262 drm_dbg_kms(&dev_priv->drm,
263 "DRRS supported mode is seamless\n");
264 break;
265 default:
266 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
267 drm_dbg_kms(&dev_priv->drm,
268 "DRRS not supported (VBT input)\n");
269 break;
270 }
271}
272
273/* Try to find integrated panel timing data */
274static void
275parse_lfp_panel_dtd(struct drm_i915_private *dev_priv,
276 const struct bdb_header *bdb)
277{
278 const struct bdb_lvds_lfp_data *lvds_lfp_data;
279 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
280 const struct lvds_dvo_timing *panel_dvo_timing;
281 const struct lvds_fp_timing *fp_timing;
282 struct drm_display_mode *panel_fixed_mode;
283 int panel_type = dev_priv->vbt.panel_type;
284
285 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
286 if (!lvds_lfp_data)
287 return;
288
289 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
290 if (!lvds_lfp_data_ptrs)
291 return;
292
293 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
294 lvds_lfp_data_ptrs,
295 panel_type);
296
297 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
298 if (!panel_fixed_mode)
299 return;
300
301 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
302
303 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
304
305 drm_dbg_kms(&dev_priv->drm,
306 "Found panel mode in BIOS VBT legacy lfp table:\n");
307 drm_mode_debug_printmodeline(panel_fixed_mode);
308
309 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
310 lvds_lfp_data_ptrs,
311 panel_type);
312 if (fp_timing) {
313 /* check the resolution, just to be sure */
314 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
315 fp_timing->y_res == panel_fixed_mode->vdisplay) {
316 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
317 drm_dbg_kms(&dev_priv->drm,
318 "VBT initial LVDS value %x\n",
319 dev_priv->vbt.bios_lvds_val);
320 }
321 }
322}
323
324static void
325parse_generic_dtd(struct drm_i915_private *dev_priv,
326 const struct bdb_header *bdb)
327{
328 const struct bdb_generic_dtd *generic_dtd;
329 const struct generic_dtd_entry *dtd;
330 struct drm_display_mode *panel_fixed_mode;
331 int num_dtd;
332
333 generic_dtd = find_section(bdb, BDB_GENERIC_DTD);
334 if (!generic_dtd)
335 return;
336
337 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
338 drm_err(&dev_priv->drm, "GDTD size %u is too small.\n",
339 generic_dtd->gdtd_size);
340 return;
341 } else if (generic_dtd->gdtd_size !=
342 sizeof(struct generic_dtd_entry)) {
343 drm_err(&dev_priv->drm, "Unexpected GDTD size %u\n",
344 generic_dtd->gdtd_size);
345 /* DTD has unknown fields, but keep going */
346 }
347
348 num_dtd = (get_blocksize(generic_dtd) -
349 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
350 if (dev_priv->vbt.panel_type >= num_dtd) {
351 drm_err(&dev_priv->drm,
352 "Panel type %d not found in table of %d DTD's\n",
353 dev_priv->vbt.panel_type, num_dtd);
354 return;
355 }
356
357 dtd = &generic_dtd->dtd[dev_priv->vbt.panel_type];
358
359 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
360 if (!panel_fixed_mode)
361 return;
362
363 panel_fixed_mode->hdisplay = dtd->hactive;
364 panel_fixed_mode->hsync_start =
365 panel_fixed_mode->hdisplay + dtd->hfront_porch;
366 panel_fixed_mode->hsync_end =
367 panel_fixed_mode->hsync_start + dtd->hsync;
368 panel_fixed_mode->htotal =
369 panel_fixed_mode->hdisplay + dtd->hblank;
370
371 panel_fixed_mode->vdisplay = dtd->vactive;
372 panel_fixed_mode->vsync_start =
373 panel_fixed_mode->vdisplay + dtd->vfront_porch;
374 panel_fixed_mode->vsync_end =
375 panel_fixed_mode->vsync_start + dtd->vsync;
376 panel_fixed_mode->vtotal =
377 panel_fixed_mode->vdisplay + dtd->vblank;
378
379 panel_fixed_mode->clock = dtd->pixel_clock;
380 panel_fixed_mode->width_mm = dtd->width_mm;
381 panel_fixed_mode->height_mm = dtd->height_mm;
382
383 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
384 drm_mode_set_name(panel_fixed_mode);
385
386 if (dtd->hsync_positive_polarity)
387 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
388 else
389 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
390
391 if (dtd->vsync_positive_polarity)
392 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
393 else
394 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
395
396 drm_dbg_kms(&dev_priv->drm,
397 "Found panel mode in BIOS VBT generic dtd table:\n");
398 drm_mode_debug_printmodeline(panel_fixed_mode);
399
400 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
401}
402
403static void
404parse_panel_dtd(struct drm_i915_private *dev_priv,
405 const struct bdb_header *bdb)
406{
407 /*
408 * Older VBTs provided provided DTD information for internal displays
409 * through the "LFP panel DTD" block (42). As of VBT revision 229,
410 * that block is now deprecated and DTD information should be provided
411 * via a newer "generic DTD" block (58). Just to be safe, we'll
412 * try the new generic DTD block first on VBT >= 229, but still fall
413 * back to trying the old LFP block if that fails.
414 */
415 if (bdb->version >= 229)
416 parse_generic_dtd(dev_priv, bdb);
417 if (!dev_priv->vbt.lfp_lvds_vbt_mode)
418 parse_lfp_panel_dtd(dev_priv, bdb);
419}
420
421static void
422parse_lfp_backlight(struct drm_i915_private *dev_priv,
423 const struct bdb_header *bdb)
424{
425 const struct bdb_lfp_backlight_data *backlight_data;
426 const struct lfp_backlight_data_entry *entry;
427 int panel_type = dev_priv->vbt.panel_type;
428
429 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
430 if (!backlight_data)
431 return;
432
433 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
434 drm_dbg_kms(&dev_priv->drm,
435 "Unsupported backlight data entry size %u\n",
436 backlight_data->entry_size);
437 return;
438 }
439
440 entry = &backlight_data->data[panel_type];
441
442 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
443 if (!dev_priv->vbt.backlight.present) {
444 drm_dbg_kms(&dev_priv->drm,
445 "PWM backlight not present in VBT (type %u)\n",
446 entry->type);
447 return;
448 }
449
450 dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
451 if (bdb->version >= 191 &&
452 get_blocksize(backlight_data) >= sizeof(*backlight_data)) {
453 const struct lfp_backlight_control_method *method;
454
455 method = &backlight_data->backlight_control[panel_type];
456 dev_priv->vbt.backlight.type = method->type;
457 dev_priv->vbt.backlight.controller = method->controller;
458 }
459
460 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
461 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
462 dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
463 drm_dbg_kms(&dev_priv->drm,
464 "VBT backlight PWM modulation frequency %u Hz, "
465 "active %s, min brightness %u, level %u, controller %u\n",
466 dev_priv->vbt.backlight.pwm_freq_hz,
467 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
468 dev_priv->vbt.backlight.min_brightness,
469 backlight_data->level[panel_type],
470 dev_priv->vbt.backlight.controller);
471}
472
473/* Try to find sdvo panel data */
474static void
475parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
476 const struct bdb_header *bdb)
477{
478 const struct bdb_sdvo_panel_dtds *dtds;
479 struct drm_display_mode *panel_fixed_mode;
480 int index;
481
482 index = dev_priv->params.vbt_sdvo_panel_type;
483 if (index == -2) {
484 drm_dbg_kms(&dev_priv->drm,
485 "Ignore SDVO panel mode from BIOS VBT tables.\n");
486 return;
487 }
488
489 if (index == -1) {
490 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
491
492 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
493 if (!sdvo_lvds_options)
494 return;
495
496 index = sdvo_lvds_options->panel_type;
497 }
498
499 dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS);
500 if (!dtds)
501 return;
502
503 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
504 if (!panel_fixed_mode)
505 return;
506
507 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]);
508
509 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
510
511 drm_dbg_kms(&dev_priv->drm,
512 "Found SDVO panel mode in BIOS VBT tables:\n");
513 drm_mode_debug_printmodeline(panel_fixed_mode);
514}
515
516static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
517 bool alternate)
518{
519 switch (INTEL_GEN(dev_priv)) {
520 case 2:
521 return alternate ? 66667 : 48000;
522 case 3:
523 case 4:
524 return alternate ? 100000 : 96000;
525 default:
526 return alternate ? 100000 : 120000;
527 }
528}
529
530static void
531parse_general_features(struct drm_i915_private *dev_priv,
532 const struct bdb_header *bdb)
533{
534 const struct bdb_general_features *general;
535
536 general = find_section(bdb, BDB_GENERAL_FEATURES);
537 if (!general)
538 return;
539
540 dev_priv->vbt.int_tv_support = general->int_tv_support;
541 /* int_crt_support can't be trusted on earlier platforms */
542 if (bdb->version >= 155 &&
543 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))
544 dev_priv->vbt.int_crt_support = general->int_crt_support;
545 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
546 dev_priv->vbt.lvds_ssc_freq =
547 intel_bios_ssc_frequency(dev_priv, general->ssc_freq);
548 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
549 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
550 if (bdb->version >= 181) {
551 dev_priv->vbt.orientation = general->rotate_180 ?
552 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
553 DRM_MODE_PANEL_ORIENTATION_NORMAL;
554 } else {
555 dev_priv->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
556 }
557 drm_dbg_kms(&dev_priv->drm,
558 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
559 dev_priv->vbt.int_tv_support,
560 dev_priv->vbt.int_crt_support,
561 dev_priv->vbt.lvds_use_ssc,
562 dev_priv->vbt.lvds_ssc_freq,
563 dev_priv->vbt.display_clock_mode,
564 dev_priv->vbt.fdi_rx_polarity_inverted);
565}
566
567static const struct child_device_config *
568child_device_ptr(const struct bdb_general_definitions *defs, int i)
569{
570 return (const void *) &defs->devices[i * defs->child_dev_size];
571}
572
573static void
574parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version)
575{
576 struct sdvo_device_mapping *mapping;
577 const struct display_device_data *devdata;
578 const struct child_device_config *child;
579 int count = 0;
580
581 /*
582 * Only parse SDVO mappings on gens that could have SDVO. This isn't
583 * accurate and doesn't have to be, as long as it's not too strict.
584 */
585 if (!IS_GEN_RANGE(dev_priv, 3, 7)) {
586 drm_dbg_kms(&dev_priv->drm, "Skipping SDVO device mapping\n");
587 return;
588 }
589
590 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
591 child = &devdata->child;
592
593 if (child->slave_addr != SLAVE_ADDR1 &&
594 child->slave_addr != SLAVE_ADDR2) {
595 /*
596 * If the slave address is neither 0x70 nor 0x72,
597 * it is not a SDVO device. Skip it.
598 */
599 continue;
600 }
601 if (child->dvo_port != DEVICE_PORT_DVOB &&
602 child->dvo_port != DEVICE_PORT_DVOC) {
603 /* skip the incorrect SDVO port */
604 drm_dbg_kms(&dev_priv->drm,
605 "Incorrect SDVO port. Skip it\n");
606 continue;
607 }
608 drm_dbg_kms(&dev_priv->drm,
609 "the SDVO device with slave addr %2x is found on"
610 " %s port\n",
611 child->slave_addr,
612 (child->dvo_port == DEVICE_PORT_DVOB) ?
613 "SDVOB" : "SDVOC");
614 mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1];
615 if (!mapping->initialized) {
616 mapping->dvo_port = child->dvo_port;
617 mapping->slave_addr = child->slave_addr;
618 mapping->dvo_wiring = child->dvo_wiring;
619 mapping->ddc_pin = child->ddc_pin;
620 mapping->i2c_pin = child->i2c_pin;
621 mapping->initialized = 1;
622 drm_dbg_kms(&dev_priv->drm,
623 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
624 mapping->dvo_port, mapping->slave_addr,
625 mapping->dvo_wiring, mapping->ddc_pin,
626 mapping->i2c_pin);
627 } else {
628 drm_dbg_kms(&dev_priv->drm,
629 "Maybe one SDVO port is shared by "
630 "two SDVO device.\n");
631 }
632 if (child->slave2_addr) {
633 /* Maybe this is a SDVO device with multiple inputs */
634 /* And the mapping info is not added */
635 drm_dbg_kms(&dev_priv->drm,
636 "there exists the slave2_addr. Maybe this"
637 " is a SDVO device with multiple inputs.\n");
638 }
639 count++;
640 }
641
642 if (!count) {
643 /* No SDVO device info is found */
644 drm_dbg_kms(&dev_priv->drm,
645 "No SDVO device info is found in VBT\n");
646 }
647}
648
649static void
650parse_driver_features(struct drm_i915_private *dev_priv,
651 const struct bdb_header *bdb)
652{
653 const struct bdb_driver_features *driver;
654
655 driver = find_section(bdb, BDB_DRIVER_FEATURES);
656 if (!driver)
657 return;
658
659 if (INTEL_GEN(dev_priv) >= 5) {
660 /*
661 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
662 * to mean "eDP". The VBT spec doesn't agree with that
663 * interpretation, but real world VBTs seem to.
664 */
665 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
666 dev_priv->vbt.int_lvds_support = 0;
667 } else {
668 /*
669 * FIXME it's not clear which BDB version has the LVDS config
670 * bits defined. Revision history in the VBT spec says:
671 * "0.92 | Add two definitions for VBT value of LVDS Active
672 * Config (00b and 11b values defined) | 06/13/2005"
673 * but does not the specify the BDB version.
674 *
675 * So far version 134 (on i945gm) is the oldest VBT observed
676 * in the wild with the bits correctly populated. Version
677 * 108 (on i85x) does not have the bits correctly populated.
678 */
679 if (bdb->version >= 134 &&
680 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
681 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
682 dev_priv->vbt.int_lvds_support = 0;
683 }
684
685 if (bdb->version < 228) {
686 drm_dbg_kms(&dev_priv->drm, "DRRS State Enabled:%d\n",
687 driver->drrs_enabled);
688 /*
689 * If DRRS is not supported, drrs_type has to be set to 0.
690 * This is because, VBT is configured in such a way that
691 * static DRRS is 0 and DRRS not supported is represented by
692 * driver->drrs_enabled=false
693 */
694 if (!driver->drrs_enabled)
695 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
696
697 dev_priv->vbt.psr.enable = driver->psr_enabled;
698 }
699}
700
701static void
702parse_power_conservation_features(struct drm_i915_private *dev_priv,
703 const struct bdb_header *bdb)
704{
705 const struct bdb_lfp_power *power;
706 u8 panel_type = dev_priv->vbt.panel_type;
707
708 if (bdb->version < 228)
709 return;
710
711 power = find_section(bdb, BDB_LFP_POWER);
712 if (!power)
713 return;
714
715 dev_priv->vbt.psr.enable = power->psr & BIT(panel_type);
716
717 /*
718 * If DRRS is not supported, drrs_type has to be set to 0.
719 * This is because, VBT is configured in such a way that
720 * static DRRS is 0 and DRRS not supported is represented by
721 * power->drrs & BIT(panel_type)=false
722 */
723 if (!(power->drrs & BIT(panel_type)))
724 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
725
726 if (bdb->version >= 232)
727 dev_priv->vbt.edp.hobl = power->hobl & BIT(panel_type);
728}
729
730static void
731parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
732{
733 const struct bdb_edp *edp;
734 const struct edp_power_seq *edp_pps;
735 const struct edp_fast_link_params *edp_link_params;
736 int panel_type = dev_priv->vbt.panel_type;
737
738 edp = find_section(bdb, BDB_EDP);
739 if (!edp)
740 return;
741
742 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
743 case EDP_18BPP:
744 dev_priv->vbt.edp.bpp = 18;
745 break;
746 case EDP_24BPP:
747 dev_priv->vbt.edp.bpp = 24;
748 break;
749 case EDP_30BPP:
750 dev_priv->vbt.edp.bpp = 30;
751 break;
752 }
753
754 /* Get the eDP sequencing and link info */
755 edp_pps = &edp->power_seqs[panel_type];
756 edp_link_params = &edp->fast_link_params[panel_type];
757
758 dev_priv->vbt.edp.pps = *edp_pps;
759
760 switch (edp_link_params->rate) {
761 case EDP_RATE_1_62:
762 dev_priv->vbt.edp.rate = DP_LINK_BW_1_62;
763 break;
764 case EDP_RATE_2_7:
765 dev_priv->vbt.edp.rate = DP_LINK_BW_2_7;
766 break;
767 default:
768 drm_dbg_kms(&dev_priv->drm,
769 "VBT has unknown eDP link rate value %u\n",
770 edp_link_params->rate);
771 break;
772 }
773
774 switch (edp_link_params->lanes) {
775 case EDP_LANE_1:
776 dev_priv->vbt.edp.lanes = 1;
777 break;
778 case EDP_LANE_2:
779 dev_priv->vbt.edp.lanes = 2;
780 break;
781 case EDP_LANE_4:
782 dev_priv->vbt.edp.lanes = 4;
783 break;
784 default:
785 drm_dbg_kms(&dev_priv->drm,
786 "VBT has unknown eDP lane count value %u\n",
787 edp_link_params->lanes);
788 break;
789 }
790
791 switch (edp_link_params->preemphasis) {
792 case EDP_PREEMPHASIS_NONE:
793 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
794 break;
795 case EDP_PREEMPHASIS_3_5dB:
796 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
797 break;
798 case EDP_PREEMPHASIS_6dB:
799 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
800 break;
801 case EDP_PREEMPHASIS_9_5dB:
802 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
803 break;
804 default:
805 drm_dbg_kms(&dev_priv->drm,
806 "VBT has unknown eDP pre-emphasis value %u\n",
807 edp_link_params->preemphasis);
808 break;
809 }
810
811 switch (edp_link_params->vswing) {
812 case EDP_VSWING_0_4V:
813 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
814 break;
815 case EDP_VSWING_0_6V:
816 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
817 break;
818 case EDP_VSWING_0_8V:
819 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
820 break;
821 case EDP_VSWING_1_2V:
822 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
823 break;
824 default:
825 drm_dbg_kms(&dev_priv->drm,
826 "VBT has unknown eDP voltage swing value %u\n",
827 edp_link_params->vswing);
828 break;
829 }
830
831 if (bdb->version >= 173) {
832 u8 vswing;
833
834 /* Don't read from VBT if module parameter has valid value*/
835 if (dev_priv->params.edp_vswing) {
836 dev_priv->vbt.edp.low_vswing =
837 dev_priv->params.edp_vswing == 1;
838 } else {
839 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
840 dev_priv->vbt.edp.low_vswing = vswing == 0;
841 }
842 }
843}
844
845static void
846parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
847{
848 const struct bdb_psr *psr;
849 const struct psr_table *psr_table;
850 int panel_type = dev_priv->vbt.panel_type;
851
852 psr = find_section(bdb, BDB_PSR);
853 if (!psr) {
854 drm_dbg_kms(&dev_priv->drm, "No PSR BDB found.\n");
855 return;
856 }
857
858 psr_table = &psr->psr_table[panel_type];
859
860 dev_priv->vbt.psr.full_link = psr_table->full_link;
861 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
862
863 /* Allowed VBT values goes from 0 to 15 */
864 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
865 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
866
867 switch (psr_table->lines_to_wait) {
868 case 0:
869 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
870 break;
871 case 1:
872 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
873 break;
874 case 2:
875 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
876 break;
877 case 3:
878 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
879 break;
880 default:
881 drm_dbg_kms(&dev_priv->drm,
882 "VBT has unknown PSR lines to wait %u\n",
883 psr_table->lines_to_wait);
884 break;
885 }
886
887 /*
888 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
889 * Old decimal value is wake up time in multiples of 100 us.
890 */
891 if (bdb->version >= 205 &&
892 (IS_GEN9_BC(dev_priv) || IS_GEMINILAKE(dev_priv) ||
893 INTEL_GEN(dev_priv) >= 10)) {
894 switch (psr_table->tp1_wakeup_time) {
895 case 0:
896 dev_priv->vbt.psr.tp1_wakeup_time_us = 500;
897 break;
898 case 1:
899 dev_priv->vbt.psr.tp1_wakeup_time_us = 100;
900 break;
901 case 3:
902 dev_priv->vbt.psr.tp1_wakeup_time_us = 0;
903 break;
904 default:
905 drm_dbg_kms(&dev_priv->drm,
906 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
907 psr_table->tp1_wakeup_time);
908 fallthrough;
909 case 2:
910 dev_priv->vbt.psr.tp1_wakeup_time_us = 2500;
911 break;
912 }
913
914 switch (psr_table->tp2_tp3_wakeup_time) {
915 case 0:
916 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 500;
917 break;
918 case 1:
919 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 100;
920 break;
921 case 3:
922 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 0;
923 break;
924 default:
925 drm_dbg_kms(&dev_priv->drm,
926 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
927 psr_table->tp2_tp3_wakeup_time);
928 fallthrough;
929 case 2:
930 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
931 break;
932 }
933 } else {
934 dev_priv->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
935 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
936 }
937
938 if (bdb->version >= 226) {
939 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
940
941 wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
942 switch (wakeup_time) {
943 case 0:
944 wakeup_time = 500;
945 break;
946 case 1:
947 wakeup_time = 100;
948 break;
949 case 3:
950 wakeup_time = 50;
951 break;
952 default:
953 case 2:
954 wakeup_time = 2500;
955 break;
956 }
957 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
958 } else {
959 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */
960 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = dev_priv->vbt.psr.tp2_tp3_wakeup_time_us;
961 }
962}
963
964static void parse_dsi_backlight_ports(struct drm_i915_private *dev_priv,
965 u16 version, enum port port)
966{
967 if (!dev_priv->vbt.dsi.config->dual_link || version < 197) {
968 dev_priv->vbt.dsi.bl_ports = BIT(port);
969 if (dev_priv->vbt.dsi.config->cabc_supported)
970 dev_priv->vbt.dsi.cabc_ports = BIT(port);
971
972 return;
973 }
974
975 switch (dev_priv->vbt.dsi.config->dl_dcs_backlight_ports) {
976 case DL_DCS_PORT_A:
977 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A);
978 break;
979 case DL_DCS_PORT_C:
980 dev_priv->vbt.dsi.bl_ports = BIT(PORT_C);
981 break;
982 default:
983 case DL_DCS_PORT_A_AND_C:
984 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C);
985 break;
986 }
987
988 if (!dev_priv->vbt.dsi.config->cabc_supported)
989 return;
990
991 switch (dev_priv->vbt.dsi.config->dl_dcs_cabc_ports) {
992 case DL_DCS_PORT_A:
993 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_A);
994 break;
995 case DL_DCS_PORT_C:
996 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_C);
997 break;
998 default:
999 case DL_DCS_PORT_A_AND_C:
1000 dev_priv->vbt.dsi.cabc_ports =
1001 BIT(PORT_A) | BIT(PORT_C);
1002 break;
1003 }
1004}
1005
1006static void
1007parse_mipi_config(struct drm_i915_private *dev_priv,
1008 const struct bdb_header *bdb)
1009{
1010 const struct bdb_mipi_config *start;
1011 const struct mipi_config *config;
1012 const struct mipi_pps_data *pps;
1013 int panel_type = dev_priv->vbt.panel_type;
1014 enum port port;
1015
1016 /* parse MIPI blocks only if LFP type is MIPI */
1017 if (!intel_bios_is_dsi_present(dev_priv, &port))
1018 return;
1019
1020 /* Initialize this to undefined indicating no generic MIPI support */
1021 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1022
1023 /* Block #40 is already parsed and panel_fixed_mode is
1024 * stored in dev_priv->lfp_lvds_vbt_mode
1025 * resuse this when needed
1026 */
1027
1028 /* Parse #52 for panel index used from panel_type already
1029 * parsed
1030 */
1031 start = find_section(bdb, BDB_MIPI_CONFIG);
1032 if (!start) {
1033 drm_dbg_kms(&dev_priv->drm, "No MIPI config BDB found");
1034 return;
1035 }
1036
1037 drm_dbg(&dev_priv->drm, "Found MIPI Config block, panel index = %d\n",
1038 panel_type);
1039
1040 /*
1041 * get hold of the correct configuration block and pps data as per
1042 * the panel_type as index
1043 */
1044 config = &start->config[panel_type];
1045 pps = &start->pps[panel_type];
1046
1047 /* store as of now full data. Trim when we realise all is not needed */
1048 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1049 if (!dev_priv->vbt.dsi.config)
1050 return;
1051
1052 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1053 if (!dev_priv->vbt.dsi.pps) {
1054 kfree(dev_priv->vbt.dsi.config);
1055 return;
1056 }
1057
1058 parse_dsi_backlight_ports(dev_priv, bdb->version, port);
1059
1060 /* FIXME is the 90 vs. 270 correct? */
1061 switch (config->rotation) {
1062 case ENABLE_ROTATION_0:
1063 /*
1064 * Most (all?) VBTs claim 0 degrees despite having
1065 * an upside down panel, thus we do not trust this.
1066 */
1067 dev_priv->vbt.dsi.orientation =
1068 DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1069 break;
1070 case ENABLE_ROTATION_90:
1071 dev_priv->vbt.dsi.orientation =
1072 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1073 break;
1074 case ENABLE_ROTATION_180:
1075 dev_priv->vbt.dsi.orientation =
1076 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1077 break;
1078 case ENABLE_ROTATION_270:
1079 dev_priv->vbt.dsi.orientation =
1080 DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1081 break;
1082 }
1083
1084 /* We have mandatory mipi config blocks. Initialize as generic panel */
1085 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1086}
1087
1088/* Find the sequence block and size for the given panel. */
1089static const u8 *
1090find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
1091 u16 panel_id, u32 *seq_size)
1092{
1093 u32 total = get_blocksize(sequence);
1094 const u8 *data = &sequence->data[0];
1095 u8 current_id;
1096 u32 current_size;
1097 int header_size = sequence->version >= 3 ? 5 : 3;
1098 int index = 0;
1099 int i;
1100
1101 /* skip new block size */
1102 if (sequence->version >= 3)
1103 data += 4;
1104
1105 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1106 if (index + header_size > total) {
1107 DRM_ERROR("Invalid sequence block (header)\n");
1108 return NULL;
1109 }
1110
1111 current_id = *(data + index);
1112 if (sequence->version >= 3)
1113 current_size = *((const u32 *)(data + index + 1));
1114 else
1115 current_size = *((const u16 *)(data + index + 1));
1116
1117 index += header_size;
1118
1119 if (index + current_size > total) {
1120 DRM_ERROR("Invalid sequence block\n");
1121 return NULL;
1122 }
1123
1124 if (current_id == panel_id) {
1125 *seq_size = current_size;
1126 return data + index;
1127 }
1128
1129 index += current_size;
1130 }
1131
1132 DRM_ERROR("Sequence block detected but no valid configuration\n");
1133
1134 return NULL;
1135}
1136
1137static int goto_next_sequence(const u8 *data, int index, int total)
1138{
1139 u16 len;
1140
1141 /* Skip Sequence Byte. */
1142 for (index = index + 1; index < total; index += len) {
1143 u8 operation_byte = *(data + index);
1144 index++;
1145
1146 switch (operation_byte) {
1147 case MIPI_SEQ_ELEM_END:
1148 return index;
1149 case MIPI_SEQ_ELEM_SEND_PKT:
1150 if (index + 4 > total)
1151 return 0;
1152
1153 len = *((const u16 *)(data + index + 2)) + 4;
1154 break;
1155 case MIPI_SEQ_ELEM_DELAY:
1156 len = 4;
1157 break;
1158 case MIPI_SEQ_ELEM_GPIO:
1159 len = 2;
1160 break;
1161 case MIPI_SEQ_ELEM_I2C:
1162 if (index + 7 > total)
1163 return 0;
1164 len = *(data + index + 6) + 7;
1165 break;
1166 default:
1167 DRM_ERROR("Unknown operation byte\n");
1168 return 0;
1169 }
1170 }
1171
1172 return 0;
1173}
1174
1175static int goto_next_sequence_v3(const u8 *data, int index, int total)
1176{
1177 int seq_end;
1178 u16 len;
1179 u32 size_of_sequence;
1180
1181 /*
1182 * Could skip sequence based on Size of Sequence alone, but also do some
1183 * checking on the structure.
1184 */
1185 if (total < 5) {
1186 DRM_ERROR("Too small sequence size\n");
1187 return 0;
1188 }
1189
1190 /* Skip Sequence Byte. */
1191 index++;
1192
1193 /*
1194 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1195 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1196 * byte.
1197 */
1198 size_of_sequence = *((const u32 *)(data + index));
1199 index += 4;
1200
1201 seq_end = index + size_of_sequence;
1202 if (seq_end > total) {
1203 DRM_ERROR("Invalid sequence size\n");
1204 return 0;
1205 }
1206
1207 for (; index < total; index += len) {
1208 u8 operation_byte = *(data + index);
1209 index++;
1210
1211 if (operation_byte == MIPI_SEQ_ELEM_END) {
1212 if (index != seq_end) {
1213 DRM_ERROR("Invalid element structure\n");
1214 return 0;
1215 }
1216 return index;
1217 }
1218
1219 len = *(data + index);
1220 index++;
1221
1222 /*
1223 * FIXME: Would be nice to check elements like for v1/v2 in
1224 * goto_next_sequence() above.
1225 */
1226 switch (operation_byte) {
1227 case MIPI_SEQ_ELEM_SEND_PKT:
1228 case MIPI_SEQ_ELEM_DELAY:
1229 case MIPI_SEQ_ELEM_GPIO:
1230 case MIPI_SEQ_ELEM_I2C:
1231 case MIPI_SEQ_ELEM_SPI:
1232 case MIPI_SEQ_ELEM_PMIC:
1233 break;
1234 default:
1235 DRM_ERROR("Unknown operation byte %u\n",
1236 operation_byte);
1237 break;
1238 }
1239 }
1240
1241 return 0;
1242}
1243
1244/*
1245 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1246 * skip all delay + gpio operands and stop at the first DSI packet op.
1247 */
1248static int get_init_otp_deassert_fragment_len(struct drm_i915_private *dev_priv)
1249{
1250 const u8 *data = dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1251 int index, len;
1252
1253 if (drm_WARN_ON(&dev_priv->drm,
1254 !data || dev_priv->vbt.dsi.seq_version != 1))
1255 return 0;
1256
1257 /* index = 1 to skip sequence byte */
1258 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1259 switch (data[index]) {
1260 case MIPI_SEQ_ELEM_SEND_PKT:
1261 return index == 1 ? 0 : index;
1262 case MIPI_SEQ_ELEM_DELAY:
1263 len = 5; /* 1 byte for operand + uint32 */
1264 break;
1265 case MIPI_SEQ_ELEM_GPIO:
1266 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1267 break;
1268 default:
1269 return 0;
1270 }
1271 }
1272
1273 return 0;
1274}
1275
1276/*
1277 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1278 * The deassert must be done before calling intel_dsi_device_ready, so for
1279 * these devices we split the init OTP sequence into a deassert sequence and
1280 * the actual init OTP part.
1281 */
1282static void fixup_mipi_sequences(struct drm_i915_private *dev_priv)
1283{
1284 u8 *init_otp;
1285 int len;
1286
1287 /* Limit this to VLV for now. */
1288 if (!IS_VALLEYVIEW(dev_priv))
1289 return;
1290
1291 /* Limit this to v1 vid-mode sequences */
1292 if (dev_priv->vbt.dsi.config->is_cmd_mode ||
1293 dev_priv->vbt.dsi.seq_version != 1)
1294 return;
1295
1296 /* Only do this if there are otp and assert seqs and no deassert seq */
1297 if (!dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1298 !dev_priv->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1299 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1300 return;
1301
1302 /* The deassert-sequence ends at the first DSI packet */
1303 len = get_init_otp_deassert_fragment_len(dev_priv);
1304 if (!len)
1305 return;
1306
1307 drm_dbg_kms(&dev_priv->drm,
1308 "Using init OTP fragment to deassert reset\n");
1309
1310 /* Copy the fragment, update seq byte and terminate it */
1311 init_otp = (u8 *)dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1312 dev_priv->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1313 if (!dev_priv->vbt.dsi.deassert_seq)
1314 return;
1315 dev_priv->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1316 dev_priv->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1317 /* Use the copy for deassert */
1318 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1319 dev_priv->vbt.dsi.deassert_seq;
1320 /* Replace the last byte of the fragment with init OTP seq byte */
1321 init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1322 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1323 dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1324}
1325
1326static void
1327parse_mipi_sequence(struct drm_i915_private *dev_priv,
1328 const struct bdb_header *bdb)
1329{
1330 int panel_type = dev_priv->vbt.panel_type;
1331 const struct bdb_mipi_sequence *sequence;
1332 const u8 *seq_data;
1333 u32 seq_size;
1334 u8 *data;
1335 int index = 0;
1336
1337 /* Only our generic panel driver uses the sequence block. */
1338 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
1339 return;
1340
1341 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
1342 if (!sequence) {
1343 drm_dbg_kms(&dev_priv->drm,
1344 "No MIPI Sequence found, parsing complete\n");
1345 return;
1346 }
1347
1348 /* Fail gracefully for forward incompatible sequence block. */
1349 if (sequence->version >= 4) {
1350 drm_err(&dev_priv->drm,
1351 "Unable to parse MIPI Sequence Block v%u\n",
1352 sequence->version);
1353 return;
1354 }
1355
1356 drm_dbg(&dev_priv->drm, "Found MIPI sequence block v%u\n",
1357 sequence->version);
1358
1359 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
1360 if (!seq_data)
1361 return;
1362
1363 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
1364 if (!data)
1365 return;
1366
1367 /* Parse the sequences, store pointers to each sequence. */
1368 for (;;) {
1369 u8 seq_id = *(data + index);
1370 if (seq_id == MIPI_SEQ_END)
1371 break;
1372
1373 if (seq_id >= MIPI_SEQ_MAX) {
1374 drm_err(&dev_priv->drm, "Unknown sequence %u\n",
1375 seq_id);
1376 goto err;
1377 }
1378
1379 /* Log about presence of sequences we won't run. */
1380 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
1381 drm_dbg_kms(&dev_priv->drm,
1382 "Unsupported sequence %u\n", seq_id);
1383
1384 dev_priv->vbt.dsi.sequence[seq_id] = data + index;
1385
1386 if (sequence->version >= 3)
1387 index = goto_next_sequence_v3(data, index, seq_size);
1388 else
1389 index = goto_next_sequence(data, index, seq_size);
1390 if (!index) {
1391 drm_err(&dev_priv->drm, "Invalid sequence %u\n",
1392 seq_id);
1393 goto err;
1394 }
1395 }
1396
1397 dev_priv->vbt.dsi.data = data;
1398 dev_priv->vbt.dsi.size = seq_size;
1399 dev_priv->vbt.dsi.seq_version = sequence->version;
1400
1401 fixup_mipi_sequences(dev_priv);
1402
1403 drm_dbg(&dev_priv->drm, "MIPI related VBT parsing complete\n");
1404 return;
1405
1406err:
1407 kfree(data);
1408 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
1409}
1410
1411static void
1412parse_compression_parameters(struct drm_i915_private *i915,
1413 const struct bdb_header *bdb)
1414{
1415 const struct bdb_compression_parameters *params;
1416 struct display_device_data *devdata;
1417 const struct child_device_config *child;
1418 u16 block_size;
1419 int index;
1420
1421 if (bdb->version < 198)
1422 return;
1423
1424 params = find_section(bdb, BDB_COMPRESSION_PARAMETERS);
1425 if (params) {
1426 /* Sanity checks */
1427 if (params->entry_size != sizeof(params->data[0])) {
1428 drm_dbg_kms(&i915->drm,
1429 "VBT: unsupported compression param entry size\n");
1430 return;
1431 }
1432
1433 block_size = get_blocksize(params);
1434 if (block_size < sizeof(*params)) {
1435 drm_dbg_kms(&i915->drm,
1436 "VBT: expected 16 compression param entries\n");
1437 return;
1438 }
1439 }
1440
1441 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
1442 child = &devdata->child;
1443
1444 if (!child->compression_enable)
1445 continue;
1446
1447 if (!params) {
1448 drm_dbg_kms(&i915->drm,
1449 "VBT: compression params not available\n");
1450 continue;
1451 }
1452
1453 if (child->compression_method_cps) {
1454 drm_dbg_kms(&i915->drm,
1455 "VBT: CPS compression not supported\n");
1456 continue;
1457 }
1458
1459 index = child->compression_structure_index;
1460
1461 devdata->dsc = kmemdup(¶ms->data[index],
1462 sizeof(*devdata->dsc), GFP_KERNEL);
1463 }
1464}
1465
1466static u8 translate_iboost(u8 val)
1467{
1468 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1469
1470 if (val >= ARRAY_SIZE(mapping)) {
1471 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1472 return 0;
1473 }
1474 return mapping[val];
1475}
1476
1477static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
1478{
1479 const struct ddi_vbt_port_info *info;
1480 enum port port;
1481
1482 for_each_port(port) {
1483 info = &i915->vbt.ddi_port_info[port];
1484
1485 if (info->child && ddc_pin == info->alternate_ddc_pin)
1486 return port;
1487 }
1488
1489 return PORT_NONE;
1490}
1491
1492static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
1493 enum port port)
1494{
1495 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1496 enum port p;
1497
1498 if (!info->alternate_ddc_pin)
1499 return;
1500
1501 p = get_port_by_ddc_pin(dev_priv, info->alternate_ddc_pin);
1502 if (p != PORT_NONE) {
1503 drm_dbg_kms(&dev_priv->drm,
1504 "port %c trying to use the same DDC pin (0x%x) as port %c, "
1505 "disabling port %c DVI/HDMI support\n",
1506 port_name(port), info->alternate_ddc_pin,
1507 port_name(p), port_name(p));
1508
1509 /*
1510 * If we have multiple ports supposedly sharing the
1511 * pin, then dvi/hdmi couldn't exist on the shared
1512 * port. Otherwise they share the same ddc bin and
1513 * system couldn't communicate with them separately.
1514 *
1515 * Give inverse child device order the priority,
1516 * last one wins. Yes, there are real machines
1517 * (eg. Asrock B250M-HDV) where VBT has both
1518 * port A and port E with the same AUX ch and
1519 * we must pick port E :(
1520 */
1521 info = &dev_priv->vbt.ddi_port_info[p];
1522
1523 info->supports_dvi = false;
1524 info->supports_hdmi = false;
1525 info->alternate_ddc_pin = 0;
1526 }
1527}
1528
1529static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
1530{
1531 const struct ddi_vbt_port_info *info;
1532 enum port port;
1533
1534 for_each_port(port) {
1535 info = &i915->vbt.ddi_port_info[port];
1536
1537 if (info->child && aux_ch == info->alternate_aux_channel)
1538 return port;
1539 }
1540
1541 return PORT_NONE;
1542}
1543
1544static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
1545 enum port port)
1546{
1547 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1548 enum port p;
1549
1550 if (!info->alternate_aux_channel)
1551 return;
1552
1553 p = get_port_by_aux_ch(dev_priv, info->alternate_aux_channel);
1554 if (p != PORT_NONE) {
1555 drm_dbg_kms(&dev_priv->drm,
1556 "port %c trying to use the same AUX CH (0x%x) as port %c, "
1557 "disabling port %c DP support\n",
1558 port_name(port), info->alternate_aux_channel,
1559 port_name(p), port_name(p));
1560
1561 /*
1562 * If we have multiple ports supposedlt sharing the
1563 * aux channel, then DP couldn't exist on the shared
1564 * port. Otherwise they share the same aux channel
1565 * and system couldn't communicate with them separately.
1566 *
1567 * Give inverse child device order the priority,
1568 * last one wins. Yes, there are real machines
1569 * (eg. Asrock B250M-HDV) where VBT has both
1570 * port A and port E with the same AUX ch and
1571 * we must pick port E :(
1572 */
1573 info = &dev_priv->vbt.ddi_port_info[p];
1574
1575 info->supports_dp = false;
1576 info->alternate_aux_channel = 0;
1577 }
1578}
1579
1580static const u8 cnp_ddc_pin_map[] = {
1581 [0] = 0, /* N/A */
1582 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
1583 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
1584 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
1585 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
1586};
1587
1588static const u8 icp_ddc_pin_map[] = {
1589 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1590 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1591 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
1592 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
1593 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
1594 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
1595 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
1596 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
1597 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
1598};
1599
1600static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
1601{
1602 const u8 *ddc_pin_map;
1603 int n_entries;
1604
1605 if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) {
1606 ddc_pin_map = icp_ddc_pin_map;
1607 n_entries = ARRAY_SIZE(icp_ddc_pin_map);
1608 } else if (HAS_PCH_CNP(dev_priv)) {
1609 ddc_pin_map = cnp_ddc_pin_map;
1610 n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
1611 } else {
1612 /* Assuming direct map */
1613 return vbt_pin;
1614 }
1615
1616 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
1617 return ddc_pin_map[vbt_pin];
1618
1619 drm_dbg_kms(&dev_priv->drm,
1620 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
1621 vbt_pin);
1622 return 0;
1623}
1624
1625static enum port __dvo_port_to_port(int n_ports, int n_dvo,
1626 const int port_mapping[][3], u8 dvo_port)
1627{
1628 enum port port;
1629 int i;
1630
1631 for (port = PORT_A; port < n_ports; port++) {
1632 for (i = 0; i < n_dvo; i++) {
1633 if (port_mapping[port][i] == -1)
1634 break;
1635
1636 if (dvo_port == port_mapping[port][i])
1637 return port;
1638 }
1639 }
1640
1641 return PORT_NONE;
1642}
1643
1644static enum port dvo_port_to_port(struct drm_i915_private *dev_priv,
1645 u8 dvo_port)
1646{
1647 /*
1648 * Each DDI port can have more than one value on the "DVO Port" field,
1649 * so look for all the possible values for each port.
1650 */
1651 static const int port_mapping[][3] = {
1652 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1653 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1654 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1655 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1656 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
1657 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
1658 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
1659 };
1660 /*
1661 * Bspec lists the ports as A, B, C, D - however internally in our
1662 * driver we keep them as PORT_A, PORT_B, PORT_D and PORT_E so the
1663 * registers in Display Engine match the right offsets. Apply the
1664 * mapping here to translate from VBT to internal convention.
1665 */
1666 static const int rkl_port_mapping[][3] = {
1667 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1668 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1669 [PORT_C] = { -1 },
1670 [PORT_D] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1671 [PORT_E] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1672 };
1673
1674 if (IS_ROCKETLAKE(dev_priv))
1675 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
1676 ARRAY_SIZE(rkl_port_mapping[0]),
1677 rkl_port_mapping,
1678 dvo_port);
1679 else
1680 return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
1681 ARRAY_SIZE(port_mapping[0]),
1682 port_mapping,
1683 dvo_port);
1684}
1685
1686static void parse_ddi_port(struct drm_i915_private *dev_priv,
1687 struct display_device_data *devdata,
1688 u8 bdb_version)
1689{
1690 const struct child_device_config *child = &devdata->child;
1691 struct ddi_vbt_port_info *info;
1692 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
1693 enum port port;
1694
1695 port = dvo_port_to_port(dev_priv, child->dvo_port);
1696 if (port == PORT_NONE)
1697 return;
1698
1699 info = &dev_priv->vbt.ddi_port_info[port];
1700
1701 if (info->child) {
1702 drm_dbg_kms(&dev_priv->drm,
1703 "More than one child device for port %c in VBT, using the first.\n",
1704 port_name(port));
1705 return;
1706 }
1707
1708 is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1709 is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1710 is_crt = child->device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1711 is_hdmi = is_dvi && (child->device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1712 is_edp = is_dp && (child->device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
1713
1714 if (port == PORT_A && is_dvi && INTEL_GEN(dev_priv) < 12) {
1715 drm_dbg_kms(&dev_priv->drm,
1716 "VBT claims port A supports DVI%s, ignoring\n",
1717 is_hdmi ? "/HDMI" : "");
1718 is_dvi = false;
1719 is_hdmi = false;
1720 }
1721
1722 info->supports_dvi = is_dvi;
1723 info->supports_hdmi = is_hdmi;
1724 info->supports_dp = is_dp;
1725 info->supports_edp = is_edp;
1726
1727 if (bdb_version >= 195)
1728 info->supports_typec_usb = child->dp_usb_type_c;
1729
1730 if (bdb_version >= 209)
1731 info->supports_tbt = child->tbt;
1732
1733 drm_dbg_kms(&dev_priv->drm,
1734 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
1735 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp,
1736 HAS_LSPCON(dev_priv) && child->lspcon,
1737 info->supports_typec_usb, info->supports_tbt,
1738 devdata->dsc != NULL);
1739
1740 if (is_dvi) {
1741 u8 ddc_pin;
1742
1743 ddc_pin = map_ddc_pin(dev_priv, child->ddc_pin);
1744 if (intel_gmbus_is_valid_pin(dev_priv, ddc_pin)) {
1745 info->alternate_ddc_pin = ddc_pin;
1746 sanitize_ddc_pin(dev_priv, port);
1747 } else {
1748 drm_dbg_kms(&dev_priv->drm,
1749 "Port %c has invalid DDC pin %d, "
1750 "sticking to defaults\n",
1751 port_name(port), ddc_pin);
1752 }
1753 }
1754
1755 if (is_dp) {
1756 info->alternate_aux_channel = child->aux_channel;
1757
1758 sanitize_aux_ch(dev_priv, port);
1759 }
1760
1761 if (bdb_version >= 158) {
1762 /* The VBT HDMI level shift values match the table we have. */
1763 u8 hdmi_level_shift = child->hdmi_level_shifter_value;
1764 drm_dbg_kms(&dev_priv->drm,
1765 "VBT HDMI level shift for port %c: %d\n",
1766 port_name(port),
1767 hdmi_level_shift);
1768 info->hdmi_level_shift = hdmi_level_shift;
1769 info->hdmi_level_shift_set = true;
1770 }
1771
1772 if (bdb_version >= 204) {
1773 int max_tmds_clock;
1774
1775 switch (child->hdmi_max_data_rate) {
1776 default:
1777 MISSING_CASE(child->hdmi_max_data_rate);
1778 fallthrough;
1779 case HDMI_MAX_DATA_RATE_PLATFORM:
1780 max_tmds_clock = 0;
1781 break;
1782 case HDMI_MAX_DATA_RATE_297:
1783 max_tmds_clock = 297000;
1784 break;
1785 case HDMI_MAX_DATA_RATE_165:
1786 max_tmds_clock = 165000;
1787 break;
1788 }
1789
1790 if (max_tmds_clock)
1791 drm_dbg_kms(&dev_priv->drm,
1792 "VBT HDMI max TMDS clock for port %c: %d kHz\n",
1793 port_name(port), max_tmds_clock);
1794 info->max_tmds_clock = max_tmds_clock;
1795 }
1796
1797 /* Parse the I_boost config for SKL and above */
1798 if (bdb_version >= 196 && child->iboost) {
1799 info->dp_boost_level = translate_iboost(child->dp_iboost_level);
1800 drm_dbg_kms(&dev_priv->drm,
1801 "VBT (e)DP boost level for port %c: %d\n",
1802 port_name(port), info->dp_boost_level);
1803 info->hdmi_boost_level = translate_iboost(child->hdmi_iboost_level);
1804 drm_dbg_kms(&dev_priv->drm,
1805 "VBT HDMI boost level for port %c: %d\n",
1806 port_name(port), info->hdmi_boost_level);
1807 }
1808
1809 /* DP max link rate for CNL+ */
1810 if (bdb_version >= 216) {
1811 switch (child->dp_max_link_rate) {
1812 default:
1813 case VBT_DP_MAX_LINK_RATE_HBR3:
1814 info->dp_max_link_rate = 810000;
1815 break;
1816 case VBT_DP_MAX_LINK_RATE_HBR2:
1817 info->dp_max_link_rate = 540000;
1818 break;
1819 case VBT_DP_MAX_LINK_RATE_HBR:
1820 info->dp_max_link_rate = 270000;
1821 break;
1822 case VBT_DP_MAX_LINK_RATE_LBR:
1823 info->dp_max_link_rate = 162000;
1824 break;
1825 }
1826 drm_dbg_kms(&dev_priv->drm,
1827 "VBT DP max link rate for port %c: %d\n",
1828 port_name(port), info->dp_max_link_rate);
1829 }
1830
1831 info->child = child;
1832}
1833
1834static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
1835{
1836 struct display_device_data *devdata;
1837
1838 if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv))
1839 return;
1840
1841 if (bdb_version < 155)
1842 return;
1843
1844 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node)
1845 parse_ddi_port(dev_priv, devdata, bdb_version);
1846}
1847
1848static void
1849parse_general_definitions(struct drm_i915_private *dev_priv,
1850 const struct bdb_header *bdb)
1851{
1852 const struct bdb_general_definitions *defs;
1853 struct display_device_data *devdata;
1854 const struct child_device_config *child;
1855 int i, child_device_num;
1856 u8 expected_size;
1857 u16 block_size;
1858 int bus_pin;
1859
1860 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1861 if (!defs) {
1862 drm_dbg_kms(&dev_priv->drm,
1863 "No general definition block is found, no devices defined.\n");
1864 return;
1865 }
1866
1867 block_size = get_blocksize(defs);
1868 if (block_size < sizeof(*defs)) {
1869 drm_dbg_kms(&dev_priv->drm,
1870 "General definitions block too small (%u)\n",
1871 block_size);
1872 return;
1873 }
1874
1875 bus_pin = defs->crt_ddc_gmbus_pin;
1876 drm_dbg_kms(&dev_priv->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
1877 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
1878 dev_priv->vbt.crt_ddc_pin = bus_pin;
1879
1880 if (bdb->version < 106) {
1881 expected_size = 22;
1882 } else if (bdb->version < 111) {
1883 expected_size = 27;
1884 } else if (bdb->version < 195) {
1885 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
1886 } else if (bdb->version == 195) {
1887 expected_size = 37;
1888 } else if (bdb->version <= 215) {
1889 expected_size = 38;
1890 } else if (bdb->version <= 229) {
1891 expected_size = 39;
1892 } else {
1893 expected_size = sizeof(*child);
1894 BUILD_BUG_ON(sizeof(*child) < 39);
1895 drm_dbg(&dev_priv->drm,
1896 "Expected child device config size for VBT version %u not known; assuming %u\n",
1897 bdb->version, expected_size);
1898 }
1899
1900 /* Flag an error for unexpected size, but continue anyway. */
1901 if (defs->child_dev_size != expected_size)
1902 drm_err(&dev_priv->drm,
1903 "Unexpected child device config size %u (expected %u for VBT version %u)\n",
1904 defs->child_dev_size, expected_size, bdb->version);
1905
1906 /* The legacy sized child device config is the minimum we need. */
1907 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
1908 drm_dbg_kms(&dev_priv->drm,
1909 "Child device config size %u is too small.\n",
1910 defs->child_dev_size);
1911 return;
1912 }
1913
1914 /* get the number of child device */
1915 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
1916
1917 for (i = 0; i < child_device_num; i++) {
1918 child = child_device_ptr(defs, i);
1919 if (!child->device_type)
1920 continue;
1921
1922 drm_dbg_kms(&dev_priv->drm,
1923 "Found VBT child device with type 0x%x\n",
1924 child->device_type);
1925
1926 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
1927 if (!devdata)
1928 break;
1929
1930 /*
1931 * Copy as much as we know (sizeof) and is available
1932 * (child_dev_size) of the child device config. Accessing the
1933 * data must depend on VBT version.
1934 */
1935 memcpy(&devdata->child, child,
1936 min_t(size_t, defs->child_dev_size, sizeof(*child)));
1937
1938 list_add_tail(&devdata->node, &dev_priv->vbt.display_devices);
1939 }
1940
1941 if (list_empty(&dev_priv->vbt.display_devices))
1942 drm_dbg_kms(&dev_priv->drm,
1943 "no child dev is parsed from VBT\n");
1944}
1945
1946/* Common defaults which may be overridden by VBT. */
1947static void
1948init_vbt_defaults(struct drm_i915_private *dev_priv)
1949{
1950 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
1951
1952 /* Default to having backlight */
1953 dev_priv->vbt.backlight.present = true;
1954
1955 /* LFP panel data */
1956 dev_priv->vbt.lvds_dither = 1;
1957
1958 /* SDVO panel data */
1959 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
1960
1961 /* general features */
1962 dev_priv->vbt.int_tv_support = 1;
1963 dev_priv->vbt.int_crt_support = 1;
1964
1965 /* driver features */
1966 dev_priv->vbt.int_lvds_support = 1;
1967
1968 /* Default to using SSC */
1969 dev_priv->vbt.lvds_use_ssc = 1;
1970 /*
1971 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
1972 * clock for LVDS.
1973 */
1974 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
1975 !HAS_PCH_SPLIT(dev_priv));
1976 drm_dbg_kms(&dev_priv->drm, "Set default to SSC at %d kHz\n",
1977 dev_priv->vbt.lvds_ssc_freq);
1978}
1979
1980/* Defaults to initialize only if there is no VBT. */
1981static void
1982init_vbt_missing_defaults(struct drm_i915_private *dev_priv)
1983{
1984 enum port port;
1985
1986 for_each_port(port) {
1987 struct ddi_vbt_port_info *info =
1988 &dev_priv->vbt.ddi_port_info[port];
1989 enum phy phy = intel_port_to_phy(dev_priv, port);
1990
1991 /*
1992 * VBT has the TypeC mode (native,TBT/USB) and we don't want
1993 * to detect it.
1994 */
1995 if (intel_phy_is_tc(dev_priv, phy))
1996 continue;
1997
1998 info->supports_dvi = (port != PORT_A && port != PORT_E);
1999 info->supports_hdmi = info->supports_dvi;
2000 info->supports_dp = (port != PORT_E);
2001 info->supports_edp = (port == PORT_A);
2002 }
2003}
2004
2005static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2006{
2007 const void *_vbt = vbt;
2008
2009 return _vbt + vbt->bdb_offset;
2010}
2011
2012/**
2013 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2014 * @buf: pointer to a buffer to validate
2015 * @size: size of the buffer
2016 *
2017 * Returns true on valid VBT.
2018 */
2019bool intel_bios_is_valid_vbt(const void *buf, size_t size)
2020{
2021 const struct vbt_header *vbt = buf;
2022 const struct bdb_header *bdb;
2023
2024 if (!vbt)
2025 return false;
2026
2027 if (sizeof(struct vbt_header) > size) {
2028 DRM_DEBUG_DRIVER("VBT header incomplete\n");
2029 return false;
2030 }
2031
2032 if (memcmp(vbt->signature, "$VBT", 4)) {
2033 DRM_DEBUG_DRIVER("VBT invalid signature\n");
2034 return false;
2035 }
2036
2037 if (vbt->vbt_size > size) {
2038 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n");
2039 return false;
2040 }
2041
2042 size = vbt->vbt_size;
2043
2044 if (range_overflows_t(size_t,
2045 vbt->bdb_offset,
2046 sizeof(struct bdb_header),
2047 size)) {
2048 DRM_DEBUG_DRIVER("BDB header incomplete\n");
2049 return false;
2050 }
2051
2052 bdb = get_bdb_header(vbt);
2053 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
2054 DRM_DEBUG_DRIVER("BDB incomplete\n");
2055 return false;
2056 }
2057
2058 return vbt;
2059}
2060
2061static struct vbt_header *oprom_get_vbt(struct drm_i915_private *dev_priv)
2062{
2063 struct pci_dev *pdev = dev_priv->drm.pdev;
2064 void __iomem *p = NULL, *oprom;
2065 struct vbt_header *vbt;
2066 u16 vbt_size;
2067 size_t i, size;
2068
2069 oprom = pci_map_rom(pdev, &size);
2070 if (!oprom)
2071 return NULL;
2072
2073 /* Scour memory looking for the VBT signature. */
2074 for (i = 0; i + 4 < size; i += 4) {
2075 if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
2076 continue;
2077
2078 p = oprom + i;
2079 size -= i;
2080 break;
2081 }
2082
2083 if (!p)
2084 goto err_unmap_oprom;
2085
2086 if (sizeof(struct vbt_header) > size) {
2087 drm_dbg(&dev_priv->drm, "VBT header incomplete\n");
2088 goto err_unmap_oprom;
2089 }
2090
2091 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
2092 if (vbt_size > size) {
2093 drm_dbg(&dev_priv->drm,
2094 "VBT incomplete (vbt_size overflows)\n");
2095 goto err_unmap_oprom;
2096 }
2097
2098 /* The rest will be validated by intel_bios_is_valid_vbt() */
2099 vbt = kmalloc(vbt_size, GFP_KERNEL);
2100 if (!vbt)
2101 goto err_unmap_oprom;
2102
2103 memcpy_fromio(vbt, p, vbt_size);
2104
2105 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
2106 goto err_free_vbt;
2107
2108 pci_unmap_rom(pdev, oprom);
2109
2110 return vbt;
2111
2112err_free_vbt:
2113 kfree(vbt);
2114err_unmap_oprom:
2115 pci_unmap_rom(pdev, oprom);
2116
2117 return NULL;
2118}
2119
2120/**
2121 * intel_bios_init - find VBT and initialize settings from the BIOS
2122 * @dev_priv: i915 device instance
2123 *
2124 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
2125 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
2126 * initialize some defaults if the VBT is not present at all.
2127 */
2128void intel_bios_init(struct drm_i915_private *dev_priv)
2129{
2130 const struct vbt_header *vbt = dev_priv->opregion.vbt;
2131 struct vbt_header *oprom_vbt = NULL;
2132 const struct bdb_header *bdb;
2133
2134 INIT_LIST_HEAD(&dev_priv->vbt.display_devices);
2135
2136 if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv)) {
2137 drm_dbg_kms(&dev_priv->drm,
2138 "Skipping VBT init due to disabled display.\n");
2139 return;
2140 }
2141
2142 init_vbt_defaults(dev_priv);
2143
2144 /* If the OpRegion does not have VBT, look in PCI ROM. */
2145 if (!vbt) {
2146 oprom_vbt = oprom_get_vbt(dev_priv);
2147 if (!oprom_vbt)
2148 goto out;
2149
2150 vbt = oprom_vbt;
2151
2152 drm_dbg_kms(&dev_priv->drm, "Found valid VBT in PCI ROM\n");
2153 }
2154
2155 bdb = get_bdb_header(vbt);
2156
2157 drm_dbg_kms(&dev_priv->drm,
2158 "VBT signature \"%.*s\", BDB version %d\n",
2159 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
2160
2161 /* Grab useful general definitions */
2162 parse_general_features(dev_priv, bdb);
2163 parse_general_definitions(dev_priv, bdb);
2164 parse_panel_options(dev_priv, bdb);
2165 parse_panel_dtd(dev_priv, bdb);
2166 parse_lfp_backlight(dev_priv, bdb);
2167 parse_sdvo_panel_data(dev_priv, bdb);
2168 parse_driver_features(dev_priv, bdb);
2169 parse_power_conservation_features(dev_priv, bdb);
2170 parse_edp(dev_priv, bdb);
2171 parse_psr(dev_priv, bdb);
2172 parse_mipi_config(dev_priv, bdb);
2173 parse_mipi_sequence(dev_priv, bdb);
2174
2175 /* Depends on child device list */
2176 parse_compression_parameters(dev_priv, bdb);
2177
2178 /* Further processing on pre-parsed data */
2179 parse_sdvo_device_mapping(dev_priv, bdb->version);
2180 parse_ddi_ports(dev_priv, bdb->version);
2181
2182out:
2183 if (!vbt) {
2184 drm_info(&dev_priv->drm,
2185 "Failed to find VBIOS tables (VBT)\n");
2186 init_vbt_missing_defaults(dev_priv);
2187 }
2188
2189 kfree(oprom_vbt);
2190}
2191
2192/**
2193 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
2194 * @dev_priv: i915 device instance
2195 */
2196void intel_bios_driver_remove(struct drm_i915_private *dev_priv)
2197{
2198 struct display_device_data *devdata, *n;
2199
2200 list_for_each_entry_safe(devdata, n, &dev_priv->vbt.display_devices, node) {
2201 list_del(&devdata->node);
2202 kfree(devdata->dsc);
2203 kfree(devdata);
2204 }
2205
2206 kfree(dev_priv->vbt.sdvo_lvds_vbt_mode);
2207 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
2208 kfree(dev_priv->vbt.lfp_lvds_vbt_mode);
2209 dev_priv->vbt.lfp_lvds_vbt_mode = NULL;
2210 kfree(dev_priv->vbt.dsi.data);
2211 dev_priv->vbt.dsi.data = NULL;
2212 kfree(dev_priv->vbt.dsi.pps);
2213 dev_priv->vbt.dsi.pps = NULL;
2214 kfree(dev_priv->vbt.dsi.config);
2215 dev_priv->vbt.dsi.config = NULL;
2216 kfree(dev_priv->vbt.dsi.deassert_seq);
2217 dev_priv->vbt.dsi.deassert_seq = NULL;
2218}
2219
2220/**
2221 * intel_bios_is_tv_present - is integrated TV present in VBT
2222 * @dev_priv: i915 device instance
2223 *
2224 * Return true if TV is present. If no child devices were parsed from VBT,
2225 * assume TV is present.
2226 */
2227bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
2228{
2229 const struct display_device_data *devdata;
2230 const struct child_device_config *child;
2231
2232 if (!dev_priv->vbt.int_tv_support)
2233 return false;
2234
2235 if (list_empty(&dev_priv->vbt.display_devices))
2236 return true;
2237
2238 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2239 child = &devdata->child;
2240
2241 /*
2242 * If the device type is not TV, continue.
2243 */
2244 switch (child->device_type) {
2245 case DEVICE_TYPE_INT_TV:
2246 case DEVICE_TYPE_TV:
2247 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
2248 break;
2249 default:
2250 continue;
2251 }
2252 /* Only when the addin_offset is non-zero, it is regarded
2253 * as present.
2254 */
2255 if (child->addin_offset)
2256 return true;
2257 }
2258
2259 return false;
2260}
2261
2262/**
2263 * intel_bios_is_lvds_present - is LVDS present in VBT
2264 * @dev_priv: i915 device instance
2265 * @i2c_pin: i2c pin for LVDS if present
2266 *
2267 * Return true if LVDS is present. If no child devices were parsed from VBT,
2268 * assume LVDS is present.
2269 */
2270bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
2271{
2272 const struct display_device_data *devdata;
2273 const struct child_device_config *child;
2274
2275 if (list_empty(&dev_priv->vbt.display_devices))
2276 return true;
2277
2278 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2279 child = &devdata->child;
2280
2281 /* If the device type is not LFP, continue.
2282 * We have to check both the new identifiers as well as the
2283 * old for compatibility with some BIOSes.
2284 */
2285 if (child->device_type != DEVICE_TYPE_INT_LFP &&
2286 child->device_type != DEVICE_TYPE_LFP)
2287 continue;
2288
2289 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
2290 *i2c_pin = child->i2c_pin;
2291
2292 /* However, we cannot trust the BIOS writers to populate
2293 * the VBT correctly. Since LVDS requires additional
2294 * information from AIM blocks, a non-zero addin offset is
2295 * a good indicator that the LVDS is actually present.
2296 */
2297 if (child->addin_offset)
2298 return true;
2299
2300 /* But even then some BIOS writers perform some black magic
2301 * and instantiate the device without reference to any
2302 * additional data. Trust that if the VBT was written into
2303 * the OpRegion then they have validated the LVDS's existence.
2304 */
2305 if (dev_priv->opregion.vbt)
2306 return true;
2307 }
2308
2309 return false;
2310}
2311
2312/**
2313 * intel_bios_is_port_present - is the specified digital port present
2314 * @dev_priv: i915 device instance
2315 * @port: port to check
2316 *
2317 * Return true if the device in %port is present.
2318 */
2319bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port)
2320{
2321 const struct display_device_data *devdata;
2322 const struct child_device_config *child;
2323 static const struct {
2324 u16 dp, hdmi;
2325 } port_mapping[] = {
2326 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2327 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2328 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2329 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2330 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2331 };
2332
2333 if (HAS_DDI(dev_priv)) {
2334 const struct ddi_vbt_port_info *port_info =
2335 &dev_priv->vbt.ddi_port_info[port];
2336
2337 return port_info->child;
2338 }
2339
2340 /* FIXME maybe deal with port A as well? */
2341 if (drm_WARN_ON(&dev_priv->drm,
2342 port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
2343 return false;
2344
2345 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2346 child = &devdata->child;
2347
2348 if ((child->dvo_port == port_mapping[port].dp ||
2349 child->dvo_port == port_mapping[port].hdmi) &&
2350 (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING |
2351 DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
2352 return true;
2353 }
2354
2355 return false;
2356}
2357
2358/**
2359 * intel_bios_is_port_edp - is the device in given port eDP
2360 * @dev_priv: i915 device instance
2361 * @port: port to check
2362 *
2363 * Return true if the device in %port is eDP.
2364 */
2365bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
2366{
2367 const struct display_device_data *devdata;
2368 const struct child_device_config *child;
2369 static const short port_mapping[] = {
2370 [PORT_B] = DVO_PORT_DPB,
2371 [PORT_C] = DVO_PORT_DPC,
2372 [PORT_D] = DVO_PORT_DPD,
2373 [PORT_E] = DVO_PORT_DPE,
2374 [PORT_F] = DVO_PORT_DPF,
2375 };
2376
2377 if (HAS_DDI(dev_priv))
2378 return dev_priv->vbt.ddi_port_info[port].supports_edp;
2379
2380 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2381 child = &devdata->child;
2382
2383 if (child->dvo_port == port_mapping[port] &&
2384 (child->device_type & DEVICE_TYPE_eDP_BITS) ==
2385 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
2386 return true;
2387 }
2388
2389 return false;
2390}
2391
2392static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
2393 enum port port)
2394{
2395 static const struct {
2396 u16 dp, hdmi;
2397 } port_mapping[] = {
2398 /*
2399 * Buggy VBTs may declare DP ports as having
2400 * HDMI type dvo_port :( So let's check both.
2401 */
2402 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2403 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2404 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2405 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2406 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2407 };
2408
2409 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
2410 return false;
2411
2412 if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
2413 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
2414 return false;
2415
2416 if (child->dvo_port == port_mapping[port].dp)
2417 return true;
2418
2419 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
2420 if (child->dvo_port == port_mapping[port].hdmi &&
2421 child->aux_channel != 0)
2422 return true;
2423
2424 return false;
2425}
2426
2427bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
2428 enum port port)
2429{
2430 const struct display_device_data *devdata;
2431
2432 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2433 if (child_dev_is_dp_dual_mode(&devdata->child, port))
2434 return true;
2435 }
2436
2437 return false;
2438}
2439
2440/**
2441 * intel_bios_is_dsi_present - is DSI present in VBT
2442 * @dev_priv: i915 device instance
2443 * @port: port for DSI if present
2444 *
2445 * Return true if DSI is present, and return the port in %port.
2446 */
2447bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
2448 enum port *port)
2449{
2450 const struct display_device_data *devdata;
2451 const struct child_device_config *child;
2452 u8 dvo_port;
2453
2454 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2455 child = &devdata->child;
2456
2457 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2458 continue;
2459
2460 dvo_port = child->dvo_port;
2461
2462 if (dvo_port == DVO_PORT_MIPIA ||
2463 (dvo_port == DVO_PORT_MIPIB && INTEL_GEN(dev_priv) >= 11) ||
2464 (dvo_port == DVO_PORT_MIPIC && INTEL_GEN(dev_priv) < 11)) {
2465 if (port)
2466 *port = dvo_port - DVO_PORT_MIPIA;
2467 return true;
2468 } else if (dvo_port == DVO_PORT_MIPIB ||
2469 dvo_port == DVO_PORT_MIPIC ||
2470 dvo_port == DVO_PORT_MIPID) {
2471 drm_dbg_kms(&dev_priv->drm,
2472 "VBT has unsupported DSI port %c\n",
2473 port_name(dvo_port - DVO_PORT_MIPIA));
2474 }
2475 }
2476
2477 return false;
2478}
2479
2480static void fill_dsc(struct intel_crtc_state *crtc_state,
2481 struct dsc_compression_parameters_entry *dsc,
2482 int dsc_max_bpc)
2483{
2484 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
2485 int bpc = 8;
2486
2487 vdsc_cfg->dsc_version_major = dsc->version_major;
2488 vdsc_cfg->dsc_version_minor = dsc->version_minor;
2489
2490 if (dsc->support_12bpc && dsc_max_bpc >= 12)
2491 bpc = 12;
2492 else if (dsc->support_10bpc && dsc_max_bpc >= 10)
2493 bpc = 10;
2494 else if (dsc->support_8bpc && dsc_max_bpc >= 8)
2495 bpc = 8;
2496 else
2497 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n",
2498 dsc_max_bpc);
2499
2500 crtc_state->pipe_bpp = bpc * 3;
2501
2502 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp,
2503 VBT_DSC_MAX_BPP(dsc->max_bpp));
2504
2505 /*
2506 * FIXME: This is ugly, and slice count should take DSC engine
2507 * throughput etc. into account.
2508 *
2509 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
2510 */
2511 if (dsc->slices_per_line & BIT(2)) {
2512 crtc_state->dsc.slice_count = 4;
2513 } else if (dsc->slices_per_line & BIT(1)) {
2514 crtc_state->dsc.slice_count = 2;
2515 } else {
2516 /* FIXME */
2517 if (!(dsc->slices_per_line & BIT(0)))
2518 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n");
2519
2520 crtc_state->dsc.slice_count = 1;
2521 }
2522
2523 if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
2524 crtc_state->dsc.slice_count != 0)
2525 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n",
2526 crtc_state->hw.adjusted_mode.crtc_hdisplay,
2527 crtc_state->dsc.slice_count);
2528
2529 /*
2530 * FIXME: Use VBT rc_buffer_block_size and rc_buffer_size for the
2531 * implementation specific physical rate buffer size. Currently we use
2532 * the required rate buffer model size calculated in
2533 * drm_dsc_compute_rc_parameters() according to VESA DSC Annex E.
2534 *
2535 * The VBT rc_buffer_block_size and rc_buffer_size definitions
2536 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. The DP DSC
2537 * implementation should also use the DPCD (or perhaps VBT for eDP)
2538 * provided value for the buffer size.
2539 */
2540
2541 /* FIXME: DSI spec says bpc + 1 for this one */
2542 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
2543
2544 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
2545
2546 vdsc_cfg->slice_height = dsc->slice_height;
2547}
2548
2549/* FIXME: initially DSI specific */
2550bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
2551 struct intel_crtc_state *crtc_state,
2552 int dsc_max_bpc)
2553{
2554 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2555 const struct display_device_data *devdata;
2556 const struct child_device_config *child;
2557
2558 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2559 child = &devdata->child;
2560
2561 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2562 continue;
2563
2564 if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) {
2565 if (!devdata->dsc)
2566 return false;
2567
2568 if (crtc_state)
2569 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
2570
2571 return true;
2572 }
2573 }
2574
2575 return false;
2576}
2577
2578/**
2579 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
2580 * @i915: i915 device instance
2581 * @port: port to check
2582 *
2583 * Return true if HPD should be inverted for %port.
2584 */
2585bool
2586intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
2587 enum port port)
2588{
2589 const struct child_device_config *child =
2590 i915->vbt.ddi_port_info[port].child;
2591
2592 if (drm_WARN_ON_ONCE(&i915->drm, !IS_GEN9_LP(i915)))
2593 return false;
2594
2595 return child && child->hpd_invert;
2596}
2597
2598/**
2599 * intel_bios_is_lspcon_present - if LSPCON is attached on %port
2600 * @i915: i915 device instance
2601 * @port: port to check
2602 *
2603 * Return true if LSPCON is present on this port
2604 */
2605bool
2606intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
2607 enum port port)
2608{
2609 const struct child_device_config *child =
2610 i915->vbt.ddi_port_info[port].child;
2611
2612 return HAS_LSPCON(i915) && child && child->lspcon;
2613}
2614
2615enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv,
2616 enum port port)
2617{
2618 const struct ddi_vbt_port_info *info =
2619 &dev_priv->vbt.ddi_port_info[port];
2620 enum aux_ch aux_ch;
2621
2622 if (!info->alternate_aux_channel) {
2623 aux_ch = (enum aux_ch)port;
2624
2625 drm_dbg_kms(&dev_priv->drm,
2626 "using AUX %c for port %c (platform default)\n",
2627 aux_ch_name(aux_ch), port_name(port));
2628 return aux_ch;
2629 }
2630
2631 switch (info->alternate_aux_channel) {
2632 case DP_AUX_A:
2633 aux_ch = AUX_CH_A;
2634 break;
2635 case DP_AUX_B:
2636 aux_ch = AUX_CH_B;
2637 break;
2638 case DP_AUX_C:
2639 aux_ch = IS_ROCKETLAKE(dev_priv) ? AUX_CH_D : AUX_CH_C;
2640 break;
2641 case DP_AUX_D:
2642 aux_ch = IS_ROCKETLAKE(dev_priv) ? AUX_CH_E : AUX_CH_D;
2643 break;
2644 case DP_AUX_E:
2645 aux_ch = AUX_CH_E;
2646 break;
2647 case DP_AUX_F:
2648 aux_ch = AUX_CH_F;
2649 break;
2650 case DP_AUX_G:
2651 aux_ch = AUX_CH_G;
2652 break;
2653 default:
2654 MISSING_CASE(info->alternate_aux_channel);
2655 aux_ch = AUX_CH_A;
2656 break;
2657 }
2658
2659 drm_dbg_kms(&dev_priv->drm, "using AUX %c for port %c (VBT)\n",
2660 aux_ch_name(aux_ch), port_name(port));
2661
2662 return aux_ch;
2663}
2664
2665int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
2666{
2667 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2668
2669 return i915->vbt.ddi_port_info[encoder->port].max_tmds_clock;
2670}
2671
2672int intel_bios_hdmi_level_shift(struct intel_encoder *encoder)
2673{
2674 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2675 const struct ddi_vbt_port_info *info =
2676 &i915->vbt.ddi_port_info[encoder->port];
2677
2678 return info->hdmi_level_shift_set ? info->hdmi_level_shift : -1;
2679}
2680
2681int intel_bios_dp_boost_level(struct intel_encoder *encoder)
2682{
2683 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2684
2685 return i915->vbt.ddi_port_info[encoder->port].dp_boost_level;
2686}
2687
2688int intel_bios_hdmi_boost_level(struct intel_encoder *encoder)
2689{
2690 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2691
2692 return i915->vbt.ddi_port_info[encoder->port].hdmi_boost_level;
2693}
2694
2695int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
2696{
2697 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2698
2699 return i915->vbt.ddi_port_info[encoder->port].dp_max_link_rate;
2700}
2701
2702int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
2703{
2704 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2705
2706 return i915->vbt.ddi_port_info[encoder->port].alternate_ddc_pin;
2707}
2708
2709bool intel_bios_port_supports_dvi(struct drm_i915_private *i915, enum port port)
2710{
2711 return i915->vbt.ddi_port_info[port].supports_dvi;
2712}
2713
2714bool intel_bios_port_supports_hdmi(struct drm_i915_private *i915, enum port port)
2715{
2716 return i915->vbt.ddi_port_info[port].supports_hdmi;
2717}
2718
2719bool intel_bios_port_supports_dp(struct drm_i915_private *i915, enum port port)
2720{
2721 return i915->vbt.ddi_port_info[port].supports_dp;
2722}
2723
2724bool intel_bios_port_supports_typec_usb(struct drm_i915_private *i915,
2725 enum port port)
2726{
2727 return i915->vbt.ddi_port_info[port].supports_typec_usb;
2728}
2729
2730bool intel_bios_port_supports_tbt(struct drm_i915_private *i915, enum port port)
2731{
2732 return i915->vbt.ddi_port_info[port].supports_tbt;
2733}