Loading...
1// SPDX-License-Identifier: GPL-2.0-or-later
2// Copyright 2019 IBM Corp.
3
4#include <dt-bindings/interrupt-controller/arm-gic.h>
5#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6#include <dt-bindings/clock/ast2600-clock.h>
7
8/ {
9 model = "Aspeed BMC";
10 compatible = "aspeed,ast2600";
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
14
15 aliases {
16 i2c0 = &i2c0;
17 i2c1 = &i2c1;
18 i2c2 = &i2c2;
19 i2c3 = &i2c3;
20 i2c4 = &i2c4;
21 i2c5 = &i2c5;
22 i2c6 = &i2c6;
23 i2c7 = &i2c7;
24 i2c8 = &i2c8;
25 i2c9 = &i2c9;
26 i2c10 = &i2c10;
27 i2c11 = &i2c11;
28 i2c12 = &i2c12;
29 i2c13 = &i2c13;
30 i2c14 = &i2c14;
31 i2c15 = &i2c15;
32 serial0 = &uart1;
33 serial1 = &uart2;
34 serial2 = &uart3;
35 serial3 = &uart4;
36 serial4 = &uart5;
37 serial5 = &vuart1;
38 serial6 = &vuart2;
39 };
40
41
42 cpus {
43 #address-cells = <1>;
44 #size-cells = <0>;
45 enable-method = "aspeed,ast2600-smp";
46
47 cpu@f00 {
48 compatible = "arm,cortex-a7";
49 device_type = "cpu";
50 reg = <0xf00>;
51 };
52
53 cpu@f01 {
54 compatible = "arm,cortex-a7";
55 device_type = "cpu";
56 reg = <0xf01>;
57 };
58 };
59
60 timer {
61 compatible = "arm,armv7-timer";
62 interrupt-parent = <&gic>;
63 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
64 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
65 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
66 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
67 clocks = <&syscon ASPEED_CLK_HPLL>;
68 arm,cpu-registers-not-fw-configured;
69 always-on;
70 };
71
72 edac: sdram@1e6e0000 {
73 compatible = "aspeed,ast2600-sdram-edac", "syscon";
74 reg = <0x1e6e0000 0x174>;
75 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
76 };
77
78 ahb {
79 compatible = "simple-bus";
80 #address-cells = <1>;
81 #size-cells = <1>;
82 device_type = "soc";
83 ranges;
84
85 gic: interrupt-controller@40461000 {
86 compatible = "arm,cortex-a7-gic";
87 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
88 #interrupt-cells = <3>;
89 interrupt-controller;
90 interrupt-parent = <&gic>;
91 reg = <0x40461000 0x1000>,
92 <0x40462000 0x1000>,
93 <0x40464000 0x2000>,
94 <0x40466000 0x2000>;
95 };
96
97 fmc: spi@1e620000 {
98 reg = < 0x1e620000 0xc4
99 0x20000000 0x10000000 >;
100 #address-cells = <1>;
101 #size-cells = <0>;
102 compatible = "aspeed,ast2600-fmc";
103 clocks = <&syscon ASPEED_CLK_AHB>;
104 status = "disabled";
105 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
106 flash@0 {
107 reg = < 0 >;
108 compatible = "jedec,spi-nor";
109 spi-max-frequency = <50000000>;
110 status = "disabled";
111 };
112 flash@1 {
113 reg = < 1 >;
114 compatible = "jedec,spi-nor";
115 spi-max-frequency = <50000000>;
116 status = "disabled";
117 };
118 flash@2 {
119 reg = < 2 >;
120 compatible = "jedec,spi-nor";
121 spi-max-frequency = <50000000>;
122 status = "disabled";
123 };
124 };
125
126 spi1: spi@1e630000 {
127 reg = < 0x1e630000 0xc4
128 0x30000000 0x10000000 >;
129 #address-cells = <1>;
130 #size-cells = <0>;
131 compatible = "aspeed,ast2600-spi";
132 clocks = <&syscon ASPEED_CLK_AHB>;
133 status = "disabled";
134 flash@0 {
135 reg = < 0 >;
136 compatible = "jedec,spi-nor";
137 spi-max-frequency = <50000000>;
138 status = "disabled";
139 };
140 flash@1 {
141 reg = < 1 >;
142 compatible = "jedec,spi-nor";
143 spi-max-frequency = <50000000>;
144 status = "disabled";
145 };
146 };
147
148 spi2: spi@1e631000 {
149 reg = < 0x1e631000 0xc4
150 0x50000000 0x10000000 >;
151 #address-cells = <1>;
152 #size-cells = <0>;
153 compatible = "aspeed,ast2600-spi";
154 clocks = <&syscon ASPEED_CLK_AHB>;
155 status = "disabled";
156 flash@0 {
157 reg = < 0 >;
158 compatible = "jedec,spi-nor";
159 spi-max-frequency = <50000000>;
160 status = "disabled";
161 };
162 flash@1 {
163 reg = < 1 >;
164 compatible = "jedec,spi-nor";
165 spi-max-frequency = <50000000>;
166 status = "disabled";
167 };
168 flash@2 {
169 reg = < 2 >;
170 compatible = "jedec,spi-nor";
171 spi-max-frequency = <50000000>;
172 status = "disabled";
173 };
174 };
175
176 mdio0: mdio@1e650000 {
177 compatible = "aspeed,ast2600-mdio";
178 reg = <0x1e650000 0x8>;
179 #address-cells = <1>;
180 #size-cells = <0>;
181 status = "disabled";
182 pinctrl-names = "default";
183 pinctrl-0 = <&pinctrl_mdio1_default>;
184 };
185
186 mdio1: mdio@1e650008 {
187 compatible = "aspeed,ast2600-mdio";
188 reg = <0x1e650008 0x8>;
189 #address-cells = <1>;
190 #size-cells = <0>;
191 status = "disabled";
192 pinctrl-names = "default";
193 pinctrl-0 = <&pinctrl_mdio2_default>;
194 };
195
196 mdio2: mdio@1e650010 {
197 compatible = "aspeed,ast2600-mdio";
198 reg = <0x1e650010 0x8>;
199 #address-cells = <1>;
200 #size-cells = <0>;
201 status = "disabled";
202 pinctrl-names = "default";
203 pinctrl-0 = <&pinctrl_mdio3_default>;
204 };
205
206 mdio3: mdio@1e650018 {
207 compatible = "aspeed,ast2600-mdio";
208 reg = <0x1e650018 0x8>;
209 #address-cells = <1>;
210 #size-cells = <0>;
211 status = "disabled";
212 pinctrl-names = "default";
213 pinctrl-0 = <&pinctrl_mdio4_default>;
214 };
215
216 mac0: ftgmac@1e660000 {
217 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
218 reg = <0x1e660000 0x180>;
219 #address-cells = <1>;
220 #size-cells = <0>;
221 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
222 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
223 status = "disabled";
224 };
225
226 mac1: ftgmac@1e680000 {
227 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
228 reg = <0x1e680000 0x180>;
229 #address-cells = <1>;
230 #size-cells = <0>;
231 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
232 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
233 status = "disabled";
234 };
235
236 mac2: ftgmac@1e670000 {
237 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
238 reg = <0x1e670000 0x180>;
239 #address-cells = <1>;
240 #size-cells = <0>;
241 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
242 clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>;
243 status = "disabled";
244 };
245
246 mac3: ftgmac@1e690000 {
247 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
248 reg = <0x1e690000 0x180>;
249 #address-cells = <1>;
250 #size-cells = <0>;
251 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
252 clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>;
253 status = "disabled";
254 };
255
256 ehci0: usb@1e6a1000 {
257 compatible = "aspeed,ast2600-ehci", "generic-ehci";
258 reg = <0x1e6a1000 0x100>;
259 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
260 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
261 pinctrl-names = "default";
262 pinctrl-0 = <&pinctrl_usb2ah_default>;
263 status = "disabled";
264 };
265
266 ehci1: usb@1e6a3000 {
267 compatible = "aspeed,ast2600-ehci", "generic-ehci";
268 reg = <0x1e6a3000 0x100>;
269 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
270 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
271 pinctrl-names = "default";
272 pinctrl-0 = <&pinctrl_usb2bh_default>;
273 status = "disabled";
274 };
275
276 uhci: usb@1e6b0000 {
277 compatible = "aspeed,ast2600-uhci", "generic-uhci";
278 reg = <0x1e6b0000 0x100>;
279 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
280 #ports = <2>;
281 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
282 status = "disabled";
283 /*
284 * No default pinmux, it will follow EHCI, use an
285 * explicit pinmux override if EHCI is not enabled.
286 */
287 };
288
289 vhub: usb-vhub@1e6a0000 {
290 compatible = "aspeed,ast2600-usb-vhub";
291 reg = <0x1e6a0000 0x350>;
292 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
293 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
294 aspeed,vhub-downstream-ports = <7>;
295 aspeed,vhub-generic-endpoints = <21>;
296 pinctrl-names = "default";
297 pinctrl-0 = <&pinctrl_usb2ad_default>;
298 status = "disabled";
299 };
300
301 apb {
302 compatible = "simple-bus";
303 #address-cells = <1>;
304 #size-cells = <1>;
305 ranges;
306
307 syscon: syscon@1e6e2000 {
308 compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd";
309 reg = <0x1e6e2000 0x1000>;
310 ranges = <0 0x1e6e2000 0x1000>;
311 #address-cells = <1>;
312 #size-cells = <1>;
313 #clock-cells = <1>;
314 #reset-cells = <1>;
315
316 pinctrl: pinctrl {
317 compatible = "aspeed,ast2600-pinctrl";
318 };
319
320 silicon-id@14 {
321 compatible = "aspeed,ast2600-silicon-id", "aspeed,silicon-id";
322 reg = <0x14 0x4 0x5b0 0x8>;
323 };
324
325 smp-memram@180 {
326 compatible = "aspeed,ast2600-smpmem";
327 reg = <0x180 0x40>;
328 };
329
330 scu_ic0: interrupt-controller@560 {
331 #interrupt-cells = <1>;
332 compatible = "aspeed,ast2600-scu-ic0";
333 reg = <0x560 0x4>;
334 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
335 interrupt-controller;
336 };
337
338 scu_ic1: interrupt-controller@570 {
339 #interrupt-cells = <1>;
340 compatible = "aspeed,ast2600-scu-ic1";
341 reg = <0x570 0x4>;
342 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
343 interrupt-controller;
344 };
345 };
346
347 rng: hwrng@1e6e2524 {
348 compatible = "timeriomem_rng";
349 reg = <0x1e6e2524 0x4>;
350 period = <1>;
351 quality = <100>;
352 };
353
354 xdma: xdma@1e6e7000 {
355 compatible = "aspeed,ast2600-xdma";
356 reg = <0x1e6e7000 0x100>;
357 clocks = <&syscon ASPEED_CLK_GATE_BCLK>;
358 resets = <&syscon ASPEED_RESET_DEV_XDMA>, <&syscon ASPEED_RESET_RC_XDMA>;
359 reset-names = "device", "root-complex";
360 interrupts-extended = <&gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
361 <&scu_ic0 ASPEED_AST2600_SCU_IC0_PCIE_PERST_LO_TO_HI>;
362 aspeed,pcie-device = "bmc";
363 aspeed,scu = <&syscon>;
364 status = "disabled";
365 };
366
367 gpio0: gpio@1e780000 {
368 #gpio-cells = <2>;
369 gpio-controller;
370 compatible = "aspeed,ast2600-gpio";
371 reg = <0x1e780000 0x400>;
372 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
373 gpio-ranges = <&pinctrl 0 0 208>;
374 ngpios = <208>;
375 clocks = <&syscon ASPEED_CLK_APB2>;
376 interrupt-controller;
377 #interrupt-cells = <2>;
378 };
379
380 gpio1: gpio@1e780800 {
381 #gpio-cells = <2>;
382 gpio-controller;
383 compatible = "aspeed,ast2600-gpio";
384 reg = <0x1e780800 0x800>;
385 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
386 gpio-ranges = <&pinctrl 0 208 36>;
387 ngpios = <36>;
388 clocks = <&syscon ASPEED_CLK_APB1>;
389 interrupt-controller;
390 #interrupt-cells = <2>;
391 };
392
393 rtc: rtc@1e781000 {
394 compatible = "aspeed,ast2600-rtc";
395 reg = <0x1e781000 0x18>;
396 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
397 status = "disabled";
398 };
399
400 timer: timer@1e782000 {
401 compatible = "aspeed,ast2600-timer";
402 reg = <0x1e782000 0x90>;
403 interrupts-extended = <&gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
404 <&gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
405 <&gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
406 <&gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
407 <&gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
408 <&gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
409 <&gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
410 <&gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
411 clocks = <&syscon ASPEED_CLK_APB1>;
412 clock-names = "PCLK";
413 status = "disabled";
414 };
415
416 uart1: serial@1e783000 {
417 compatible = "ns16550a";
418 reg = <0x1e783000 0x20>;
419 reg-shift = <2>;
420 reg-io-width = <4>;
421 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
422 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
423 resets = <&lpc_reset 4>;
424 no-loopback-test;
425 pinctrl-names = "default";
426 pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>;
427 status = "disabled";
428 };
429
430 uart5: serial@1e784000 {
431 compatible = "ns16550a";
432 reg = <0x1e784000 0x1000>;
433 reg-shift = <2>;
434 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
435 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
436 no-loopback-test;
437 };
438
439 wdt1: watchdog@1e785000 {
440 compatible = "aspeed,ast2600-wdt";
441 reg = <0x1e785000 0x40>;
442 };
443
444 wdt2: watchdog@1e785040 {
445 compatible = "aspeed,ast2600-wdt";
446 reg = <0x1e785040 0x40>;
447 status = "disabled";
448 };
449
450 wdt3: watchdog@1e785080 {
451 compatible = "aspeed,ast2600-wdt";
452 reg = <0x1e785080 0x40>;
453 status = "disabled";
454 };
455
456 wdt4: watchdog@1e7850c0 {
457 compatible = "aspeed,ast2600-wdt";
458 reg = <0x1e7850C0 0x40>;
459 status = "disabled";
460 };
461
462 lpc: lpc@1e789000 {
463 compatible = "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon";
464 reg = <0x1e789000 0x1000>;
465 reg-io-width = <4>;
466
467 #address-cells = <1>;
468 #size-cells = <1>;
469 ranges = <0x0 0x1e789000 0x1000>;
470
471 kcs1: kcs@24 {
472 compatible = "aspeed,ast2500-kcs-bmc-v2";
473 reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
474 interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
475 kcs_chan = <1>;
476 status = "disabled";
477 };
478
479 kcs2: kcs@28 {
480 compatible = "aspeed,ast2500-kcs-bmc-v2";
481 reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>;
482 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
483 status = "disabled";
484 };
485
486 kcs3: kcs@2c {
487 compatible = "aspeed,ast2500-kcs-bmc-v2";
488 reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>;
489 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
490 status = "disabled";
491 };
492
493 kcs4: kcs@114 {
494 compatible = "aspeed,ast2500-kcs-bmc-v2";
495 reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>;
496 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
497 status = "disabled";
498 };
499
500 lpc_ctrl: lpc-ctrl@80 {
501 compatible = "aspeed,ast2600-lpc-ctrl";
502 reg = <0x80 0x80>;
503 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
504 status = "disabled";
505 };
506
507 lpc_snoop: lpc-snoop@80 {
508 compatible = "aspeed,ast2600-lpc-snoop";
509 reg = <0x80 0x80>;
510 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
511 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
512 status = "disabled";
513 };
514
515 lhc: lhc@a0 {
516 compatible = "aspeed,ast2600-lhc";
517 reg = <0xa0 0x24 0xc8 0x8>;
518 };
519
520 lpc_reset: reset-controller@98 {
521 compatible = "aspeed,ast2600-lpc-reset";
522 reg = <0x98 0x4>;
523 #reset-cells = <1>;
524 };
525
526 ibt: ibt@140 {
527 compatible = "aspeed,ast2600-ibt-bmc";
528 reg = <0x140 0x18>;
529 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
530 status = "disabled";
531 };
532 };
533
534 sdc: sdc@1e740000 {
535 compatible = "aspeed,ast2600-sd-controller";
536 reg = <0x1e740000 0x100>;
537 #address-cells = <1>;
538 #size-cells = <1>;
539 ranges = <0 0x1e740000 0x10000>;
540 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
541 status = "disabled";
542
543 sdhci0: sdhci@1e740100 {
544 compatible = "aspeed,ast2600-sdhci", "sdhci";
545 reg = <0x100 0x100>;
546 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
547 sdhci,auto-cmd12;
548 clocks = <&syscon ASPEED_CLK_SDIO>;
549 status = "disabled";
550 };
551
552 sdhci1: sdhci@1e740200 {
553 compatible = "aspeed,ast2600-sdhci", "sdhci";
554 reg = <0x200 0x100>;
555 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
556 sdhci,auto-cmd12;
557 clocks = <&syscon ASPEED_CLK_SDIO>;
558 status = "disabled";
559 };
560 };
561
562 emmc_controller: sdc@1e750000 {
563 compatible = "aspeed,ast2600-sd-controller";
564 reg = <0x1e750000 0x100>;
565 #address-cells = <1>;
566 #size-cells = <1>;
567 ranges = <0 0x1e750000 0x10000>;
568 clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>;
569 status = "disabled";
570
571 emmc: sdhci@1e750100 {
572 compatible = "aspeed,ast2600-sdhci";
573 reg = <0x100 0x100>;
574 sdhci,auto-cmd12;
575 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
576 clocks = <&syscon ASPEED_CLK_EMMC>;
577 pinctrl-names = "default";
578 pinctrl-0 = <&pinctrl_emmc_default>;
579 };
580 };
581
582 vuart1: serial@1e787000 {
583 compatible = "aspeed,ast2500-vuart";
584 reg = <0x1e787000 0x40>;
585 reg-shift = <2>;
586 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
587 clocks = <&syscon ASPEED_CLK_APB1>;
588 no-loopback-test;
589 status = "disabled";
590 };
591
592 vuart2: serial@1e788000 {
593 compatible = "aspeed,ast2500-vuart";
594 reg = <0x1e788000 0x40>;
595 reg-shift = <2>;
596 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
597 clocks = <&syscon ASPEED_CLK_APB1>;
598 no-loopback-test;
599 status = "disabled";
600 };
601
602 uart2: serial@1e78d000 {
603 compatible = "ns16550a";
604 reg = <0x1e78d000 0x20>;
605 reg-shift = <2>;
606 reg-io-width = <4>;
607 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
608 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
609 resets = <&lpc_reset 5>;
610 no-loopback-test;
611 pinctrl-names = "default";
612 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
613 status = "disabled";
614 };
615
616 uart3: serial@1e78e000 {
617 compatible = "ns16550a";
618 reg = <0x1e78e000 0x20>;
619 reg-shift = <2>;
620 reg-io-width = <4>;
621 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
622 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
623 resets = <&lpc_reset 6>;
624 no-loopback-test;
625 pinctrl-names = "default";
626 pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
627 status = "disabled";
628 };
629
630 uart4: serial@1e78f000 {
631 compatible = "ns16550a";
632 reg = <0x1e78f000 0x20>;
633 reg-shift = <2>;
634 reg-io-width = <4>;
635 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
636 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
637 resets = <&lpc_reset 7>;
638 no-loopback-test;
639 pinctrl-names = "default";
640 pinctrl-0 = <&pinctrl_txd4_default &pinctrl_rxd4_default>;
641 status = "disabled";
642 };
643
644 i2c: bus@1e78a000 {
645 compatible = "simple-bus";
646 #address-cells = <1>;
647 #size-cells = <1>;
648 ranges = <0 0x1e78a000 0x1000>;
649 };
650
651 fsim0: fsi@1e79b000 {
652 compatible = "aspeed,ast2600-fsi-master", "fsi-master";
653 reg = <0x1e79b000 0x94>;
654 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
655 pinctrl-names = "default";
656 pinctrl-0 = <&pinctrl_fsi1_default>;
657 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
658 status = "disabled";
659 };
660
661 fsim1: fsi@1e79b100 {
662 compatible = "aspeed,ast2600-fsi-master", "fsi-master";
663 reg = <0x1e79b100 0x94>;
664 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
665 pinctrl-names = "default";
666 pinctrl-0 = <&pinctrl_fsi2_default>;
667 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
668 status = "disabled";
669 };
670 };
671 };
672};
673
674#include "aspeed-g6-pinctrl.dtsi"
675
676&i2c {
677 i2c0: i2c-bus@80 {
678 #address-cells = <1>;
679 #size-cells = <0>;
680 #interrupt-cells = <1>;
681 reg = <0x80 0x80>;
682 compatible = "aspeed,ast2600-i2c-bus";
683 clocks = <&syscon ASPEED_CLK_APB2>;
684 resets = <&syscon ASPEED_RESET_I2C>;
685 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
686 bus-frequency = <100000>;
687 pinctrl-names = "default";
688 pinctrl-0 = <&pinctrl_i2c1_default>;
689 status = "disabled";
690 };
691
692 i2c1: i2c-bus@100 {
693 #address-cells = <1>;
694 #size-cells = <0>;
695 #interrupt-cells = <1>;
696 reg = <0x100 0x80>;
697 compatible = "aspeed,ast2600-i2c-bus";
698 clocks = <&syscon ASPEED_CLK_APB2>;
699 resets = <&syscon ASPEED_RESET_I2C>;
700 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
701 bus-frequency = <100000>;
702 pinctrl-names = "default";
703 pinctrl-0 = <&pinctrl_i2c2_default>;
704 status = "disabled";
705 };
706
707 i2c2: i2c-bus@180 {
708 #address-cells = <1>;
709 #size-cells = <0>;
710 #interrupt-cells = <1>;
711 reg = <0x180 0x80>;
712 compatible = "aspeed,ast2600-i2c-bus";
713 clocks = <&syscon ASPEED_CLK_APB2>;
714 resets = <&syscon ASPEED_RESET_I2C>;
715 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
716 bus-frequency = <100000>;
717 pinctrl-names = "default";
718 pinctrl-0 = <&pinctrl_i2c3_default>;
719 status = "disabled";
720 };
721
722 i2c3: i2c-bus@200 {
723 #address-cells = <1>;
724 #size-cells = <0>;
725 #interrupt-cells = <1>;
726 reg = <0x200 0x80>;
727 compatible = "aspeed,ast2600-i2c-bus";
728 clocks = <&syscon ASPEED_CLK_APB2>;
729 resets = <&syscon ASPEED_RESET_I2C>;
730 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
731 bus-frequency = <100000>;
732 pinctrl-names = "default";
733 pinctrl-0 = <&pinctrl_i2c4_default>;
734 status = "disabled";
735 };
736
737 i2c4: i2c-bus@280 {
738 #address-cells = <1>;
739 #size-cells = <0>;
740 #interrupt-cells = <1>;
741 reg = <0x280 0x80>;
742 compatible = "aspeed,ast2600-i2c-bus";
743 clocks = <&syscon ASPEED_CLK_APB2>;
744 resets = <&syscon ASPEED_RESET_I2C>;
745 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
746 bus-frequency = <100000>;
747 pinctrl-names = "default";
748 pinctrl-0 = <&pinctrl_i2c5_default>;
749 status = "disabled";
750 };
751
752 i2c5: i2c-bus@300 {
753 #address-cells = <1>;
754 #size-cells = <0>;
755 #interrupt-cells = <1>;
756 reg = <0x300 0x80>;
757 compatible = "aspeed,ast2600-i2c-bus";
758 clocks = <&syscon ASPEED_CLK_APB2>;
759 resets = <&syscon ASPEED_RESET_I2C>;
760 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
761 bus-frequency = <100000>;
762 pinctrl-names = "default";
763 pinctrl-0 = <&pinctrl_i2c6_default>;
764 status = "disabled";
765 };
766
767 i2c6: i2c-bus@380 {
768 #address-cells = <1>;
769 #size-cells = <0>;
770 #interrupt-cells = <1>;
771 reg = <0x380 0x80>;
772 compatible = "aspeed,ast2600-i2c-bus";
773 clocks = <&syscon ASPEED_CLK_APB2>;
774 resets = <&syscon ASPEED_RESET_I2C>;
775 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
776 bus-frequency = <100000>;
777 pinctrl-names = "default";
778 pinctrl-0 = <&pinctrl_i2c7_default>;
779 status = "disabled";
780 };
781
782 i2c7: i2c-bus@400 {
783 #address-cells = <1>;
784 #size-cells = <0>;
785 #interrupt-cells = <1>;
786 reg = <0x400 0x80>;
787 compatible = "aspeed,ast2600-i2c-bus";
788 clocks = <&syscon ASPEED_CLK_APB2>;
789 resets = <&syscon ASPEED_RESET_I2C>;
790 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
791 bus-frequency = <100000>;
792 pinctrl-names = "default";
793 pinctrl-0 = <&pinctrl_i2c8_default>;
794 status = "disabled";
795 };
796
797 i2c8: i2c-bus@480 {
798 #address-cells = <1>;
799 #size-cells = <0>;
800 #interrupt-cells = <1>;
801 reg = <0x480 0x80>;
802 compatible = "aspeed,ast2600-i2c-bus";
803 clocks = <&syscon ASPEED_CLK_APB2>;
804 resets = <&syscon ASPEED_RESET_I2C>;
805 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
806 bus-frequency = <100000>;
807 pinctrl-names = "default";
808 pinctrl-0 = <&pinctrl_i2c9_default>;
809 status = "disabled";
810 };
811
812 i2c9: i2c-bus@500 {
813 #address-cells = <1>;
814 #size-cells = <0>;
815 #interrupt-cells = <1>;
816 reg = <0x500 0x80>;
817 compatible = "aspeed,ast2600-i2c-bus";
818 clocks = <&syscon ASPEED_CLK_APB2>;
819 resets = <&syscon ASPEED_RESET_I2C>;
820 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
821 bus-frequency = <100000>;
822 pinctrl-names = "default";
823 pinctrl-0 = <&pinctrl_i2c10_default>;
824 status = "disabled";
825 };
826
827 i2c10: i2c-bus@580 {
828 #address-cells = <1>;
829 #size-cells = <0>;
830 #interrupt-cells = <1>;
831 reg = <0x580 0x80>;
832 compatible = "aspeed,ast2600-i2c-bus";
833 clocks = <&syscon ASPEED_CLK_APB2>;
834 resets = <&syscon ASPEED_RESET_I2C>;
835 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
836 bus-frequency = <100000>;
837 pinctrl-names = "default";
838 pinctrl-0 = <&pinctrl_i2c11_default>;
839 status = "disabled";
840 };
841
842 i2c11: i2c-bus@600 {
843 #address-cells = <1>;
844 #size-cells = <0>;
845 #interrupt-cells = <1>;
846 reg = <0x600 0x80>;
847 compatible = "aspeed,ast2600-i2c-bus";
848 clocks = <&syscon ASPEED_CLK_APB2>;
849 resets = <&syscon ASPEED_RESET_I2C>;
850 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
851 bus-frequency = <100000>;
852 pinctrl-names = "default";
853 pinctrl-0 = <&pinctrl_i2c12_default>;
854 status = "disabled";
855 };
856
857 i2c12: i2c-bus@680 {
858 #address-cells = <1>;
859 #size-cells = <0>;
860 #interrupt-cells = <1>;
861 reg = <0x680 0x80>;
862 compatible = "aspeed,ast2600-i2c-bus";
863 clocks = <&syscon ASPEED_CLK_APB2>;
864 resets = <&syscon ASPEED_RESET_I2C>;
865 interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
866 bus-frequency = <100000>;
867 pinctrl-names = "default";
868 pinctrl-0 = <&pinctrl_i2c13_default>;
869 status = "disabled";
870 };
871
872 i2c13: i2c-bus@700 {
873 #address-cells = <1>;
874 #size-cells = <0>;
875 #interrupt-cells = <1>;
876 reg = <0x700 0x80>;
877 compatible = "aspeed,ast2600-i2c-bus";
878 clocks = <&syscon ASPEED_CLK_APB2>;
879 resets = <&syscon ASPEED_RESET_I2C>;
880 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
881 bus-frequency = <100000>;
882 pinctrl-names = "default";
883 pinctrl-0 = <&pinctrl_i2c14_default>;
884 status = "disabled";
885 };
886
887 i2c14: i2c-bus@780 {
888 #address-cells = <1>;
889 #size-cells = <0>;
890 #interrupt-cells = <1>;
891 reg = <0x780 0x80>;
892 compatible = "aspeed,ast2600-i2c-bus";
893 clocks = <&syscon ASPEED_CLK_APB2>;
894 resets = <&syscon ASPEED_RESET_I2C>;
895 interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
896 bus-frequency = <100000>;
897 pinctrl-names = "default";
898 pinctrl-0 = <&pinctrl_i2c15_default>;
899 status = "disabled";
900 };
901
902 i2c15: i2c-bus@800 {
903 #address-cells = <1>;
904 #size-cells = <0>;
905 #interrupt-cells = <1>;
906 reg = <0x800 0x80>;
907 compatible = "aspeed,ast2600-i2c-bus";
908 clocks = <&syscon ASPEED_CLK_APB2>;
909 resets = <&syscon ASPEED_RESET_I2C>;
910 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
911 bus-frequency = <100000>;
912 pinctrl-names = "default";
913 pinctrl-0 = <&pinctrl_i2c16_default>;
914 status = "disabled";
915 };
916};
1// SPDX-License-Identifier: GPL-2.0-or-later
2// Copyright 2019 IBM Corp.
3
4#include <dt-bindings/interrupt-controller/arm-gic.h>
5#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6#include <dt-bindings/clock/ast2600-clock.h>
7
8/ {
9 model = "Aspeed BMC";
10 compatible = "aspeed,ast2600";
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
14
15 aliases {
16 i2c0 = &i2c0;
17 i2c1 = &i2c1;
18 i2c2 = &i2c2;
19 i2c3 = &i2c3;
20 i2c4 = &i2c4;
21 i2c5 = &i2c5;
22 i2c6 = &i2c6;
23 i2c7 = &i2c7;
24 i2c8 = &i2c8;
25 i2c9 = &i2c9;
26 i2c10 = &i2c10;
27 i2c11 = &i2c11;
28 i2c12 = &i2c12;
29 i2c13 = &i2c13;
30 i2c14 = &i2c14;
31 i2c15 = &i2c15;
32 serial0 = &uart1;
33 serial1 = &uart2;
34 serial2 = &uart3;
35 serial3 = &uart4;
36 serial4 = &uart5;
37 serial5 = &vuart1;
38 serial6 = &vuart2;
39 };
40
41
42 cpus {
43 #address-cells = <1>;
44 #size-cells = <0>;
45 enable-method = "aspeed,ast2600-smp";
46
47 cpu@f00 {
48 compatible = "arm,cortex-a7";
49 device_type = "cpu";
50 reg = <0xf00>;
51 };
52
53 cpu@f01 {
54 compatible = "arm,cortex-a7";
55 device_type = "cpu";
56 reg = <0xf01>;
57 };
58 };
59
60 timer {
61 compatible = "arm,armv7-timer";
62 interrupt-parent = <&gic>;
63 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
64 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
65 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
66 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
67 clocks = <&syscon ASPEED_CLK_HPLL>;
68 arm,cpu-registers-not-fw-configured;
69 always-on;
70 };
71
72 ahb {
73 compatible = "simple-bus";
74 #address-cells = <1>;
75 #size-cells = <1>;
76 device_type = "soc";
77 ranges;
78
79 gic: interrupt-controller@40461000 {
80 compatible = "arm,cortex-a7-gic";
81 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
82 #interrupt-cells = <3>;
83 interrupt-controller;
84 interrupt-parent = <&gic>;
85 reg = <0x40461000 0x1000>,
86 <0x40462000 0x1000>,
87 <0x40464000 0x2000>,
88 <0x40466000 0x2000>;
89 };
90
91 fmc: spi@1e620000 {
92 reg = < 0x1e620000 0xc4
93 0x20000000 0x10000000 >;
94 #address-cells = <1>;
95 #size-cells = <0>;
96 compatible = "aspeed,ast2600-fmc";
97 clocks = <&syscon ASPEED_CLK_AHB>;
98 status = "disabled";
99 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
100 flash@0 {
101 reg = < 0 >;
102 compatible = "jedec,spi-nor";
103 spi-max-frequency = <50000000>;
104 status = "disabled";
105 };
106 flash@1 {
107 reg = < 1 >;
108 compatible = "jedec,spi-nor";
109 spi-max-frequency = <50000000>;
110 status = "disabled";
111 };
112 flash@2 {
113 reg = < 2 >;
114 compatible = "jedec,spi-nor";
115 spi-max-frequency = <50000000>;
116 status = "disabled";
117 };
118 };
119
120 spi1: spi@1e630000 {
121 reg = < 0x1e630000 0xc4
122 0x30000000 0x10000000 >;
123 #address-cells = <1>;
124 #size-cells = <0>;
125 compatible = "aspeed,ast2600-spi";
126 clocks = <&syscon ASPEED_CLK_AHB>;
127 status = "disabled";
128 flash@0 {
129 reg = < 0 >;
130 compatible = "jedec,spi-nor";
131 spi-max-frequency = <50000000>;
132 status = "disabled";
133 };
134 flash@1 {
135 reg = < 1 >;
136 compatible = "jedec,spi-nor";
137 spi-max-frequency = <50000000>;
138 status = "disabled";
139 };
140 };
141
142 spi2: spi@1e631000 {
143 reg = < 0x1e631000 0xc4
144 0x50000000 0x10000000 >;
145 #address-cells = <1>;
146 #size-cells = <0>;
147 compatible = "aspeed,ast2600-spi";
148 clocks = <&syscon ASPEED_CLK_AHB>;
149 status = "disabled";
150 flash@0 {
151 reg = < 0 >;
152 compatible = "jedec,spi-nor";
153 spi-max-frequency = <50000000>;
154 status = "disabled";
155 };
156 flash@1 {
157 reg = < 1 >;
158 compatible = "jedec,spi-nor";
159 spi-max-frequency = <50000000>;
160 status = "disabled";
161 };
162 flash@2 {
163 reg = < 2 >;
164 compatible = "jedec,spi-nor";
165 spi-max-frequency = <50000000>;
166 status = "disabled";
167 };
168 };
169
170 mdio0: mdio@1e650000 {
171 compatible = "aspeed,ast2600-mdio";
172 reg = <0x1e650000 0x8>;
173 #address-cells = <1>;
174 #size-cells = <0>;
175 status = "disabled";
176 pinctrl-names = "default";
177 pinctrl-0 = <&pinctrl_mdio1_default>;
178 };
179
180 mdio1: mdio@1e650008 {
181 compatible = "aspeed,ast2600-mdio";
182 reg = <0x1e650008 0x8>;
183 #address-cells = <1>;
184 #size-cells = <0>;
185 status = "disabled";
186 pinctrl-names = "default";
187 pinctrl-0 = <&pinctrl_mdio2_default>;
188 };
189
190 mdio2: mdio@1e650010 {
191 compatible = "aspeed,ast2600-mdio";
192 reg = <0x1e650010 0x8>;
193 #address-cells = <1>;
194 #size-cells = <0>;
195 status = "disabled";
196 pinctrl-names = "default";
197 pinctrl-0 = <&pinctrl_mdio3_default>;
198 };
199
200 mdio3: mdio@1e650018 {
201 compatible = "aspeed,ast2600-mdio";
202 reg = <0x1e650018 0x8>;
203 #address-cells = <1>;
204 #size-cells = <0>;
205 status = "disabled";
206 pinctrl-names = "default";
207 pinctrl-0 = <&pinctrl_mdio4_default>;
208 };
209
210 mac0: ftgmac@1e660000 {
211 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
212 reg = <0x1e660000 0x180>;
213 #address-cells = <1>;
214 #size-cells = <0>;
215 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
216 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
217 status = "disabled";
218 };
219
220 mac1: ftgmac@1e680000 {
221 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
222 reg = <0x1e680000 0x180>;
223 #address-cells = <1>;
224 #size-cells = <0>;
225 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
226 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
227 status = "disabled";
228 };
229
230 mac2: ftgmac@1e670000 {
231 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
232 reg = <0x1e670000 0x180>;
233 #address-cells = <1>;
234 #size-cells = <0>;
235 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
236 clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>;
237 status = "disabled";
238 };
239
240 mac3: ftgmac@1e690000 {
241 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
242 reg = <0x1e690000 0x180>;
243 #address-cells = <1>;
244 #size-cells = <0>;
245 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
246 clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>;
247 status = "disabled";
248 };
249
250 ehci0: usb@1e6a1000 {
251 compatible = "aspeed,ast2600-ehci", "generic-ehci";
252 reg = <0x1e6a1000 0x100>;
253 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
254 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
255 pinctrl-names = "default";
256 pinctrl-0 = <&pinctrl_usb2ah_default>;
257 status = "disabled";
258 };
259
260 ehci1: usb@1e6a3000 {
261 compatible = "aspeed,ast2600-ehci", "generic-ehci";
262 reg = <0x1e6a3000 0x100>;
263 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
264 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
265 pinctrl-names = "default";
266 pinctrl-0 = <&pinctrl_usb2bh_default>;
267 status = "disabled";
268 };
269
270 uhci: usb@1e6b0000 {
271 compatible = "aspeed,ast2600-uhci", "generic-uhci";
272 reg = <0x1e6b0000 0x100>;
273 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
274 #ports = <2>;
275 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
276 status = "disabled";
277 /*
278 * No default pinmux, it will follow EHCI, use an
279 * explicit pinmux override if EHCI is not enabled.
280 */
281 };
282
283 vhub: usb-vhub@1e6a0000 {
284 compatible = "aspeed,ast2600-usb-vhub";
285 reg = <0x1e6a0000 0x350>;
286 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
287 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
288 aspeed,vhub-downstream-ports = <7>;
289 aspeed,vhub-generic-endpoints = <21>;
290 pinctrl-names = "default";
291 pinctrl-0 = <&pinctrl_usb2ad_default>;
292 status = "disabled";
293 };
294
295 apb {
296 compatible = "simple-bus";
297 #address-cells = <1>;
298 #size-cells = <1>;
299 ranges;
300
301 syscon: syscon@1e6e2000 {
302 compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd";
303 reg = <0x1e6e2000 0x1000>;
304 ranges = <0 0x1e6e2000 0x1000>;
305 #address-cells = <1>;
306 #size-cells = <1>;
307 #clock-cells = <1>;
308 #reset-cells = <1>;
309
310 pinctrl: pinctrl {
311 compatible = "aspeed,ast2600-pinctrl";
312 };
313
314 smp-memram@180 {
315 compatible = "aspeed,ast2600-smpmem";
316 reg = <0x180 0x40>;
317 };
318
319 scu_ic0: interrupt-controller@560 {
320 #interrupt-cells = <1>;
321 compatible = "aspeed,ast2600-scu-ic0";
322 reg = <0x560 0x4>;
323 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
324 interrupt-controller;
325 };
326
327 scu_ic1: interrupt-controller@570 {
328 #interrupt-cells = <1>;
329 compatible = "aspeed,ast2600-scu-ic1";
330 reg = <0x570 0x4>;
331 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
332 interrupt-controller;
333 };
334 };
335
336 rng: hwrng@1e6e2524 {
337 compatible = "timeriomem_rng";
338 reg = <0x1e6e2524 0x4>;
339 period = <1>;
340 quality = <100>;
341 };
342
343 xdma: xdma@1e6e7000 {
344 compatible = "aspeed,ast2600-xdma";
345 reg = <0x1e6e7000 0x100>;
346 clocks = <&syscon ASPEED_CLK_GATE_BCLK>;
347 resets = <&syscon ASPEED_RESET_DEV_XDMA>, <&syscon ASPEED_RESET_RC_XDMA>;
348 reset-names = "device", "root-complex";
349 interrupts-extended = <&gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
350 <&scu_ic0 ASPEED_AST2600_SCU_IC0_PCIE_PERST_LO_TO_HI>;
351 aspeed,pcie-device = "bmc";
352 aspeed,scu = <&syscon>;
353 status = "disabled";
354 };
355
356 gpio0: gpio@1e780000 {
357 #gpio-cells = <2>;
358 gpio-controller;
359 compatible = "aspeed,ast2600-gpio";
360 reg = <0x1e780000 0x800>;
361 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
362 gpio-ranges = <&pinctrl 0 0 208>;
363 ngpios = <208>;
364 clocks = <&syscon ASPEED_CLK_APB2>;
365 interrupt-controller;
366 #interrupt-cells = <2>;
367 };
368
369 gpio1: gpio@1e780800 {
370 #gpio-cells = <2>;
371 gpio-controller;
372 compatible = "aspeed,ast2600-gpio";
373 reg = <0x1e780800 0x800>;
374 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
375 gpio-ranges = <&pinctrl 0 208 36>;
376 ngpios = <36>;
377 clocks = <&syscon ASPEED_CLK_APB1>;
378 interrupt-controller;
379 #interrupt-cells = <2>;
380 };
381
382 rtc: rtc@1e781000 {
383 compatible = "aspeed,ast2600-rtc";
384 reg = <0x1e781000 0x18>;
385 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
386 status = "disabled";
387 };
388
389 timer: timer@1e782000 {
390 compatible = "aspeed,ast2600-timer";
391 reg = <0x1e782000 0x90>;
392 interrupts-extended = <&gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
393 <&gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
394 <&gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
395 <&gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
396 <&gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
397 <&gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
398 <&gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
399 <&gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
400 clocks = <&syscon ASPEED_CLK_APB1>;
401 clock-names = "PCLK";
402 status = "disabled";
403 };
404
405 uart1: serial@1e783000 {
406 compatible = "ns16550a";
407 reg = <0x1e783000 0x20>;
408 reg-shift = <2>;
409 reg-io-width = <4>;
410 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
411 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
412 resets = <&lpc_reset 4>;
413 no-loopback-test;
414 pinctrl-names = "default";
415 pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>;
416 status = "disabled";
417 };
418
419 uart5: serial@1e784000 {
420 compatible = "ns16550a";
421 reg = <0x1e784000 0x1000>;
422 reg-shift = <2>;
423 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
424 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
425 no-loopback-test;
426 };
427
428 wdt1: watchdog@1e785000 {
429 compatible = "aspeed,ast2600-wdt";
430 reg = <0x1e785000 0x40>;
431 };
432
433 wdt2: watchdog@1e785040 {
434 compatible = "aspeed,ast2600-wdt";
435 reg = <0x1e785040 0x40>;
436 status = "disabled";
437 };
438
439 wdt3: watchdog@1e785080 {
440 compatible = "aspeed,ast2600-wdt";
441 reg = <0x1e785080 0x40>;
442 status = "disabled";
443 };
444
445 wdt4: watchdog@1e7850c0 {
446 compatible = "aspeed,ast2600-wdt";
447 reg = <0x1e7850C0 0x40>;
448 status = "disabled";
449 };
450
451 lpc: lpc@1e789000 {
452 compatible = "aspeed,ast2600-lpc", "simple-mfd";
453 reg = <0x1e789000 0x1000>;
454
455 #address-cells = <1>;
456 #size-cells = <1>;
457 ranges = <0x0 0x1e789000 0x1000>;
458
459 lpc_bmc: lpc-bmc@0 {
460 compatible = "aspeed,ast2600-lpc-bmc", "simple-mfd", "syscon";
461 reg = <0x0 0x80>;
462 reg-io-width = <4>;
463
464 #address-cells = <1>;
465 #size-cells = <1>;
466 ranges = <0x0 0x0 0x80>;
467
468 kcs1: kcs@24 {
469 compatible = "aspeed,ast2500-kcs-bmc-v2";
470 reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
471 interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
472 kcs_chan = <1>;
473 status = "disabled";
474 };
475 kcs2: kcs@28 {
476 compatible = "aspeed,ast2500-kcs-bmc-v2";
477 reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>;
478 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
479 status = "disabled";
480 };
481 kcs3: kcs@2c {
482 compatible = "aspeed,ast2500-kcs-bmc-v2";
483 reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>;
484 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
485 status = "disabled";
486 };
487 };
488
489 lpc_host: lpc-host@80 {
490 compatible = "aspeed,ast2600-lpc-host", "simple-mfd", "syscon";
491 reg = <0x80 0x1e0>;
492 reg-io-width = <4>;
493
494 #address-cells = <1>;
495 #size-cells = <1>;
496 ranges = <0x0 0x80 0x1e0>;
497
498 kcs4: kcs@94 {
499 compatible = "aspeed,ast2500-kcs-bmc-v2";
500 reg = <0x94 0x1>, <0x98 0x1>, <0x9c 0x1>;
501 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
502 status = "disabled";
503 };
504
505 lpc_ctrl: lpc-ctrl@0 {
506 compatible = "aspeed,ast2600-lpc-ctrl";
507 reg = <0x0 0x80>;
508 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
509 status = "disabled";
510 };
511
512 lpc_snoop: lpc-snoop@0 {
513 compatible = "aspeed,ast2600-lpc-snoop";
514 reg = <0x0 0x80>;
515 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
516 status = "disabled";
517 };
518
519 lhc: lhc@20 {
520 compatible = "aspeed,ast2600-lhc";
521 reg = <0x20 0x24 0x48 0x8>;
522 };
523
524 lpc_reset: reset-controller@18 {
525 compatible = "aspeed,ast2600-lpc-reset";
526 reg = <0x18 0x4>;
527 #reset-cells = <1>;
528 };
529
530 ibt: ibt@c0 {
531 compatible = "aspeed,ast2600-ibt-bmc";
532 reg = <0xc0 0x18>;
533 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
534 status = "disabled";
535 };
536 };
537 };
538
539 sdc: sdc@1e740000 {
540 compatible = "aspeed,ast2600-sd-controller";
541 reg = <0x1e740000 0x100>;
542 #address-cells = <1>;
543 #size-cells = <1>;
544 ranges = <0 0x1e740000 0x10000>;
545 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
546 status = "disabled";
547
548 sdhci0: sdhci@1e740100 {
549 compatible = "aspeed,ast2600-sdhci", "sdhci";
550 reg = <0x100 0x100>;
551 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
552 sdhci,auto-cmd12;
553 clocks = <&syscon ASPEED_CLK_SDIO>;
554 status = "disabled";
555 };
556
557 sdhci1: sdhci@1e740200 {
558 compatible = "aspeed,ast2600-sdhci", "sdhci";
559 reg = <0x200 0x100>;
560 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
561 sdhci,auto-cmd12;
562 clocks = <&syscon ASPEED_CLK_SDIO>;
563 status = "disabled";
564 };
565 };
566
567 emmc_controller: sdc@1e750000 {
568 compatible = "aspeed,ast2600-sd-controller";
569 reg = <0x1e750000 0x100>;
570 #address-cells = <1>;
571 #size-cells = <1>;
572 ranges = <0 0x1e750000 0x10000>;
573 clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>;
574 status = "disabled";
575
576 emmc: sdhci@1e750100 {
577 compatible = "aspeed,ast2600-sdhci";
578 reg = <0x100 0x100>;
579 sdhci,auto-cmd12;
580 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
581 clocks = <&syscon ASPEED_CLK_EMMC>;
582 pinctrl-names = "default";
583 pinctrl-0 = <&pinctrl_emmc_default>;
584 };
585 };
586
587 vuart1: serial@1e787000 {
588 compatible = "aspeed,ast2500-vuart";
589 reg = <0x1e787000 0x40>;
590 reg-shift = <2>;
591 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
592 clocks = <&syscon ASPEED_CLK_APB1>;
593 no-loopback-test;
594 status = "disabled";
595 };
596
597 vuart2: serial@1e788000 {
598 compatible = "aspeed,ast2500-vuart";
599 reg = <0x1e788000 0x40>;
600 reg-shift = <2>;
601 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
602 clocks = <&syscon ASPEED_CLK_APB1>;
603 no-loopback-test;
604 status = "disabled";
605 };
606
607 uart2: serial@1e78d000 {
608 compatible = "ns16550a";
609 reg = <0x1e78d000 0x20>;
610 reg-shift = <2>;
611 reg-io-width = <4>;
612 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
613 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
614 resets = <&lpc_reset 5>;
615 no-loopback-test;
616 pinctrl-names = "default";
617 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
618 status = "disabled";
619 };
620
621 uart3: serial@1e78e000 {
622 compatible = "ns16550a";
623 reg = <0x1e78e000 0x20>;
624 reg-shift = <2>;
625 reg-io-width = <4>;
626 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
627 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
628 resets = <&lpc_reset 6>;
629 no-loopback-test;
630 pinctrl-names = "default";
631 pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
632 status = "disabled";
633 };
634
635 uart4: serial@1e78f000 {
636 compatible = "ns16550a";
637 reg = <0x1e78f000 0x20>;
638 reg-shift = <2>;
639 reg-io-width = <4>;
640 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
641 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
642 resets = <&lpc_reset 7>;
643 no-loopback-test;
644 pinctrl-names = "default";
645 pinctrl-0 = <&pinctrl_txd4_default &pinctrl_rxd4_default>;
646 status = "disabled";
647 };
648
649 i2c: bus@1e78a000 {
650 compatible = "simple-bus";
651 #address-cells = <1>;
652 #size-cells = <1>;
653 ranges = <0 0x1e78a000 0x1000>;
654 };
655
656 fsim0: fsi@1e79b000 {
657 compatible = "aspeed,ast2600-fsi-master", "fsi-master";
658 reg = <0x1e79b000 0x94>;
659 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
660 pinctrl-names = "default";
661 pinctrl-0 = <&pinctrl_fsi1_default>;
662 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
663 status = "disabled";
664 };
665
666 fsim1: fsi@1e79b100 {
667 compatible = "aspeed,ast2600-fsi-master", "fsi-master";
668 reg = <0x1e79b100 0x94>;
669 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
670 pinctrl-names = "default";
671 pinctrl-0 = <&pinctrl_fsi2_default>;
672 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
673 status = "disabled";
674 };
675 };
676 };
677};
678
679#include "aspeed-g6-pinctrl.dtsi"
680
681&i2c {
682 i2c0: i2c-bus@80 {
683 #address-cells = <1>;
684 #size-cells = <0>;
685 #interrupt-cells = <1>;
686 reg = <0x80 0x80>;
687 compatible = "aspeed,ast2600-i2c-bus";
688 clocks = <&syscon ASPEED_CLK_APB2>;
689 resets = <&syscon ASPEED_RESET_I2C>;
690 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
691 bus-frequency = <100000>;
692 pinctrl-names = "default";
693 pinctrl-0 = <&pinctrl_i2c1_default>;
694 status = "disabled";
695 };
696
697 i2c1: i2c-bus@100 {
698 #address-cells = <1>;
699 #size-cells = <0>;
700 #interrupt-cells = <1>;
701 reg = <0x100 0x80>;
702 compatible = "aspeed,ast2600-i2c-bus";
703 clocks = <&syscon ASPEED_CLK_APB2>;
704 resets = <&syscon ASPEED_RESET_I2C>;
705 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
706 bus-frequency = <100000>;
707 pinctrl-names = "default";
708 pinctrl-0 = <&pinctrl_i2c2_default>;
709 status = "disabled";
710 };
711
712 i2c2: i2c-bus@180 {
713 #address-cells = <1>;
714 #size-cells = <0>;
715 #interrupt-cells = <1>;
716 reg = <0x180 0x80>;
717 compatible = "aspeed,ast2600-i2c-bus";
718 clocks = <&syscon ASPEED_CLK_APB2>;
719 resets = <&syscon ASPEED_RESET_I2C>;
720 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
721 bus-frequency = <100000>;
722 pinctrl-names = "default";
723 pinctrl-0 = <&pinctrl_i2c3_default>;
724 status = "disabled";
725 };
726
727 i2c3: i2c-bus@200 {
728 #address-cells = <1>;
729 #size-cells = <0>;
730 #interrupt-cells = <1>;
731 reg = <0x200 0x80>;
732 compatible = "aspeed,ast2600-i2c-bus";
733 clocks = <&syscon ASPEED_CLK_APB2>;
734 resets = <&syscon ASPEED_RESET_I2C>;
735 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
736 bus-frequency = <100000>;
737 pinctrl-names = "default";
738 pinctrl-0 = <&pinctrl_i2c4_default>;
739 status = "disabled";
740 };
741
742 i2c4: i2c-bus@280 {
743 #address-cells = <1>;
744 #size-cells = <0>;
745 #interrupt-cells = <1>;
746 reg = <0x280 0x80>;
747 compatible = "aspeed,ast2600-i2c-bus";
748 clocks = <&syscon ASPEED_CLK_APB2>;
749 resets = <&syscon ASPEED_RESET_I2C>;
750 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
751 bus-frequency = <100000>;
752 pinctrl-names = "default";
753 pinctrl-0 = <&pinctrl_i2c5_default>;
754 status = "disabled";
755 };
756
757 i2c5: i2c-bus@300 {
758 #address-cells = <1>;
759 #size-cells = <0>;
760 #interrupt-cells = <1>;
761 reg = <0x300 0x80>;
762 compatible = "aspeed,ast2600-i2c-bus";
763 clocks = <&syscon ASPEED_CLK_APB2>;
764 resets = <&syscon ASPEED_RESET_I2C>;
765 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
766 bus-frequency = <100000>;
767 pinctrl-names = "default";
768 pinctrl-0 = <&pinctrl_i2c6_default>;
769 status = "disabled";
770 };
771
772 i2c6: i2c-bus@380 {
773 #address-cells = <1>;
774 #size-cells = <0>;
775 #interrupt-cells = <1>;
776 reg = <0x380 0x80>;
777 compatible = "aspeed,ast2600-i2c-bus";
778 clocks = <&syscon ASPEED_CLK_APB2>;
779 resets = <&syscon ASPEED_RESET_I2C>;
780 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
781 bus-frequency = <100000>;
782 pinctrl-names = "default";
783 pinctrl-0 = <&pinctrl_i2c7_default>;
784 status = "disabled";
785 };
786
787 i2c7: i2c-bus@400 {
788 #address-cells = <1>;
789 #size-cells = <0>;
790 #interrupt-cells = <1>;
791 reg = <0x400 0x80>;
792 compatible = "aspeed,ast2600-i2c-bus";
793 clocks = <&syscon ASPEED_CLK_APB2>;
794 resets = <&syscon ASPEED_RESET_I2C>;
795 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
796 bus-frequency = <100000>;
797 pinctrl-names = "default";
798 pinctrl-0 = <&pinctrl_i2c8_default>;
799 status = "disabled";
800 };
801
802 i2c8: i2c-bus@480 {
803 #address-cells = <1>;
804 #size-cells = <0>;
805 #interrupt-cells = <1>;
806 reg = <0x480 0x80>;
807 compatible = "aspeed,ast2600-i2c-bus";
808 clocks = <&syscon ASPEED_CLK_APB2>;
809 resets = <&syscon ASPEED_RESET_I2C>;
810 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
811 bus-frequency = <100000>;
812 pinctrl-names = "default";
813 pinctrl-0 = <&pinctrl_i2c9_default>;
814 status = "disabled";
815 };
816
817 i2c9: i2c-bus@500 {
818 #address-cells = <1>;
819 #size-cells = <0>;
820 #interrupt-cells = <1>;
821 reg = <0x500 0x80>;
822 compatible = "aspeed,ast2600-i2c-bus";
823 clocks = <&syscon ASPEED_CLK_APB2>;
824 resets = <&syscon ASPEED_RESET_I2C>;
825 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
826 bus-frequency = <100000>;
827 pinctrl-names = "default";
828 pinctrl-0 = <&pinctrl_i2c10_default>;
829 status = "disabled";
830 };
831
832 i2c10: i2c-bus@580 {
833 #address-cells = <1>;
834 #size-cells = <0>;
835 #interrupt-cells = <1>;
836 reg = <0x580 0x80>;
837 compatible = "aspeed,ast2600-i2c-bus";
838 clocks = <&syscon ASPEED_CLK_APB2>;
839 resets = <&syscon ASPEED_RESET_I2C>;
840 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
841 bus-frequency = <100000>;
842 pinctrl-names = "default";
843 pinctrl-0 = <&pinctrl_i2c11_default>;
844 status = "disabled";
845 };
846
847 i2c11: i2c-bus@600 {
848 #address-cells = <1>;
849 #size-cells = <0>;
850 #interrupt-cells = <1>;
851 reg = <0x600 0x80>;
852 compatible = "aspeed,ast2600-i2c-bus";
853 clocks = <&syscon ASPEED_CLK_APB2>;
854 resets = <&syscon ASPEED_RESET_I2C>;
855 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
856 bus-frequency = <100000>;
857 pinctrl-names = "default";
858 pinctrl-0 = <&pinctrl_i2c12_default>;
859 status = "disabled";
860 };
861
862 i2c12: i2c-bus@680 {
863 #address-cells = <1>;
864 #size-cells = <0>;
865 #interrupt-cells = <1>;
866 reg = <0x680 0x80>;
867 compatible = "aspeed,ast2600-i2c-bus";
868 clocks = <&syscon ASPEED_CLK_APB2>;
869 resets = <&syscon ASPEED_RESET_I2C>;
870 interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
871 bus-frequency = <100000>;
872 pinctrl-names = "default";
873 pinctrl-0 = <&pinctrl_i2c13_default>;
874 status = "disabled";
875 };
876
877 i2c13: i2c-bus@700 {
878 #address-cells = <1>;
879 #size-cells = <0>;
880 #interrupt-cells = <1>;
881 reg = <0x700 0x80>;
882 compatible = "aspeed,ast2600-i2c-bus";
883 clocks = <&syscon ASPEED_CLK_APB2>;
884 resets = <&syscon ASPEED_RESET_I2C>;
885 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
886 bus-frequency = <100000>;
887 pinctrl-names = "default";
888 pinctrl-0 = <&pinctrl_i2c14_default>;
889 status = "disabled";
890 };
891
892 i2c14: i2c-bus@780 {
893 #address-cells = <1>;
894 #size-cells = <0>;
895 #interrupt-cells = <1>;
896 reg = <0x780 0x80>;
897 compatible = "aspeed,ast2600-i2c-bus";
898 clocks = <&syscon ASPEED_CLK_APB2>;
899 resets = <&syscon ASPEED_RESET_I2C>;
900 interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
901 bus-frequency = <100000>;
902 pinctrl-names = "default";
903 pinctrl-0 = <&pinctrl_i2c15_default>;
904 status = "disabled";
905 };
906
907 i2c15: i2c-bus@800 {
908 #address-cells = <1>;
909 #size-cells = <0>;
910 #interrupt-cells = <1>;
911 reg = <0x800 0x80>;
912 compatible = "aspeed,ast2600-i2c-bus";
913 clocks = <&syscon ASPEED_CLK_APB2>;
914 resets = <&syscon ASPEED_RESET_I2C>;
915 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
916 bus-frequency = <100000>;
917 pinctrl-names = "default";
918 pinctrl-0 = <&pinctrl_i2c16_default>;
919 status = "disabled";
920 };
921};