Loading...
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Driver for CS4231 sound chips found on Sparcs.
4 * Copyright (C) 2002, 2008 David S. Miller <davem@davemloft.net>
5 *
6 * Based entirely upon drivers/sbus/audio/cs4231.c which is:
7 * Copyright (C) 1996, 1997, 1998 Derrick J Brashear (shadow@andrew.cmu.edu)
8 * and also sound/isa/cs423x/cs4231_lib.c which is:
9 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
10 */
11
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/delay.h>
15#include <linux/init.h>
16#include <linux/interrupt.h>
17#include <linux/moduleparam.h>
18#include <linux/irq.h>
19#include <linux/io.h>
20#include <linux/of.h>
21#include <linux/of_device.h>
22
23#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/info.h>
26#include <sound/control.h>
27#include <sound/timer.h>
28#include <sound/initval.h>
29#include <sound/pcm_params.h>
30
31#ifdef CONFIG_SBUS
32#define SBUS_SUPPORT
33#endif
34
35#if defined(CONFIG_PCI) && defined(CONFIG_SPARC64)
36#define EBUS_SUPPORT
37#include <linux/pci.h>
38#include <asm/ebus_dma.h>
39#endif
40
41static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
42static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
43/* Enable this card */
44static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
45
46module_param_array(index, int, NULL, 0444);
47MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard.");
48module_param_array(id, charp, NULL, 0444);
49MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard.");
50module_param_array(enable, bool, NULL, 0444);
51MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard.");
52MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller");
53MODULE_DESCRIPTION("Sun CS4231");
54MODULE_LICENSE("GPL");
55
56#ifdef SBUS_SUPPORT
57struct sbus_dma_info {
58 spinlock_t lock; /* DMA access lock */
59 int dir;
60 void __iomem *regs;
61};
62#endif
63
64struct snd_cs4231;
65struct cs4231_dma_control {
66 void (*prepare)(struct cs4231_dma_control *dma_cont,
67 int dir);
68 void (*enable)(struct cs4231_dma_control *dma_cont, int on);
69 int (*request)(struct cs4231_dma_control *dma_cont,
70 dma_addr_t bus_addr, size_t len);
71 unsigned int (*address)(struct cs4231_dma_control *dma_cont);
72#ifdef EBUS_SUPPORT
73 struct ebus_dma_info ebus_info;
74#endif
75#ifdef SBUS_SUPPORT
76 struct sbus_dma_info sbus_info;
77#endif
78};
79
80struct snd_cs4231 {
81 spinlock_t lock; /* registers access lock */
82 void __iomem *port;
83
84 struct cs4231_dma_control p_dma;
85 struct cs4231_dma_control c_dma;
86
87 u32 flags;
88#define CS4231_FLAG_EBUS 0x00000001
89#define CS4231_FLAG_PLAYBACK 0x00000002
90#define CS4231_FLAG_CAPTURE 0x00000004
91
92 struct snd_card *card;
93 struct snd_pcm *pcm;
94 struct snd_pcm_substream *playback_substream;
95 unsigned int p_periods_sent;
96 struct snd_pcm_substream *capture_substream;
97 unsigned int c_periods_sent;
98 struct snd_timer *timer;
99
100 unsigned short mode;
101#define CS4231_MODE_NONE 0x0000
102#define CS4231_MODE_PLAY 0x0001
103#define CS4231_MODE_RECORD 0x0002
104#define CS4231_MODE_TIMER 0x0004
105#define CS4231_MODE_OPEN (CS4231_MODE_PLAY | CS4231_MODE_RECORD | \
106 CS4231_MODE_TIMER)
107
108 unsigned char image[32]; /* registers image */
109 int mce_bit;
110 int calibrate_mute;
111 struct mutex mce_mutex; /* mutex for mce register */
112 struct mutex open_mutex; /* mutex for ALSA open/close */
113
114 struct platform_device *op;
115 unsigned int irq[2];
116 unsigned int regs_size;
117 struct snd_cs4231 *next;
118};
119
120/* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for
121 * now.... -DaveM
122 */
123
124/* IO ports */
125#include <sound/cs4231-regs.h>
126
127/* XXX offsets are different than PC ISA chips... */
128#define CS4231U(chip, x) ((chip)->port + ((c_d_c_CS4231##x) << 2))
129
130/* SBUS DMA register defines. */
131
132#define APCCSR 0x10UL /* APC DMA CSR */
133#define APCCVA 0x20UL /* APC Capture DMA Address */
134#define APCCC 0x24UL /* APC Capture Count */
135#define APCCNVA 0x28UL /* APC Capture DMA Next Address */
136#define APCCNC 0x2cUL /* APC Capture Next Count */
137#define APCPVA 0x30UL /* APC Play DMA Address */
138#define APCPC 0x34UL /* APC Play Count */
139#define APCPNVA 0x38UL /* APC Play DMA Next Address */
140#define APCPNC 0x3cUL /* APC Play Next Count */
141
142/* Defines for SBUS DMA-routines */
143
144#define APCVA 0x0UL /* APC DMA Address */
145#define APCC 0x4UL /* APC Count */
146#define APCNVA 0x8UL /* APC DMA Next Address */
147#define APCNC 0xcUL /* APC Next Count */
148#define APC_PLAY 0x30UL /* Play registers start at 0x30 */
149#define APC_RECORD 0x20UL /* Record registers start at 0x20 */
150
151/* APCCSR bits */
152
153#define APC_INT_PENDING 0x800000 /* Interrupt Pending */
154#define APC_PLAY_INT 0x400000 /* Playback interrupt */
155#define APC_CAPT_INT 0x200000 /* Capture interrupt */
156#define APC_GENL_INT 0x100000 /* General interrupt */
157#define APC_XINT_ENA 0x80000 /* General ext int. enable */
158#define APC_XINT_PLAY 0x40000 /* Playback ext intr */
159#define APC_XINT_CAPT 0x20000 /* Capture ext intr */
160#define APC_XINT_GENL 0x10000 /* Error ext intr */
161#define APC_XINT_EMPT 0x8000 /* Pipe empty interrupt (0 write to pva) */
162#define APC_XINT_PEMP 0x4000 /* Play pipe empty (pva and pnva not set) */
163#define APC_XINT_PNVA 0x2000 /* Playback NVA dirty */
164#define APC_XINT_PENA 0x1000 /* play pipe empty Int enable */
165#define APC_XINT_COVF 0x800 /* Cap data dropped on floor */
166#define APC_XINT_CNVA 0x400 /* Capture NVA dirty */
167#define APC_XINT_CEMP 0x200 /* Capture pipe empty (cva and cnva not set) */
168#define APC_XINT_CENA 0x100 /* Cap. pipe empty int enable */
169#define APC_PPAUSE 0x80 /* Pause the play DMA */
170#define APC_CPAUSE 0x40 /* Pause the capture DMA */
171#define APC_CDC_RESET 0x20 /* CODEC RESET */
172#define APC_PDMA_READY 0x08 /* Play DMA Go */
173#define APC_CDMA_READY 0x04 /* Capture DMA Go */
174#define APC_CHIP_RESET 0x01 /* Reset the chip */
175
176/* EBUS DMA register offsets */
177
178#define EBDMA_CSR 0x00UL /* Control/Status */
179#define EBDMA_ADDR 0x04UL /* DMA Address */
180#define EBDMA_COUNT 0x08UL /* DMA Count */
181
182/*
183 * Some variables
184 */
185
186static const unsigned char freq_bits[14] = {
187 /* 5510 */ 0x00 | CS4231_XTAL2,
188 /* 6620 */ 0x0E | CS4231_XTAL2,
189 /* 8000 */ 0x00 | CS4231_XTAL1,
190 /* 9600 */ 0x0E | CS4231_XTAL1,
191 /* 11025 */ 0x02 | CS4231_XTAL2,
192 /* 16000 */ 0x02 | CS4231_XTAL1,
193 /* 18900 */ 0x04 | CS4231_XTAL2,
194 /* 22050 */ 0x06 | CS4231_XTAL2,
195 /* 27042 */ 0x04 | CS4231_XTAL1,
196 /* 32000 */ 0x06 | CS4231_XTAL1,
197 /* 33075 */ 0x0C | CS4231_XTAL2,
198 /* 37800 */ 0x08 | CS4231_XTAL2,
199 /* 44100 */ 0x0A | CS4231_XTAL2,
200 /* 48000 */ 0x0C | CS4231_XTAL1
201};
202
203static const unsigned int rates[14] = {
204 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
205 27042, 32000, 33075, 37800, 44100, 48000
206};
207
208static const struct snd_pcm_hw_constraint_list hw_constraints_rates = {
209 .count = ARRAY_SIZE(rates),
210 .list = rates,
211};
212
213static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
214{
215 return snd_pcm_hw_constraint_list(runtime, 0,
216 SNDRV_PCM_HW_PARAM_RATE,
217 &hw_constraints_rates);
218}
219
220static const unsigned char snd_cs4231_original_image[32] =
221{
222 0x00, /* 00/00 - lic */
223 0x00, /* 01/01 - ric */
224 0x9f, /* 02/02 - la1ic */
225 0x9f, /* 03/03 - ra1ic */
226 0x9f, /* 04/04 - la2ic */
227 0x9f, /* 05/05 - ra2ic */
228 0xbf, /* 06/06 - loc */
229 0xbf, /* 07/07 - roc */
230 0x20, /* 08/08 - pdfr */
231 CS4231_AUTOCALIB, /* 09/09 - ic */
232 0x00, /* 0a/10 - pc */
233 0x00, /* 0b/11 - ti */
234 CS4231_MODE2, /* 0c/12 - mi */
235 0x00, /* 0d/13 - lbc */
236 0x00, /* 0e/14 - pbru */
237 0x00, /* 0f/15 - pbrl */
238 0x80, /* 10/16 - afei */
239 0x01, /* 11/17 - afeii */
240 0x9f, /* 12/18 - llic */
241 0x9f, /* 13/19 - rlic */
242 0x00, /* 14/20 - tlb */
243 0x00, /* 15/21 - thb */
244 0x00, /* 16/22 - la3mic/reserved */
245 0x00, /* 17/23 - ra3mic/reserved */
246 0x00, /* 18/24 - afs */
247 0x00, /* 19/25 - lamoc/version */
248 0x00, /* 1a/26 - mioc */
249 0x00, /* 1b/27 - ramoc/reserved */
250 0x20, /* 1c/28 - cdfr */
251 0x00, /* 1d/29 - res4 */
252 0x00, /* 1e/30 - cbru */
253 0x00, /* 1f/31 - cbrl */
254};
255
256static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr)
257{
258 if (cp->flags & CS4231_FLAG_EBUS)
259 return readb(reg_addr);
260 else
261 return sbus_readb(reg_addr);
262}
263
264static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val,
265 void __iomem *reg_addr)
266{
267 if (cp->flags & CS4231_FLAG_EBUS)
268 return writeb(val, reg_addr);
269 else
270 return sbus_writeb(val, reg_addr);
271}
272
273/*
274 * Basic I/O functions
275 */
276
277static void snd_cs4231_ready(struct snd_cs4231 *chip)
278{
279 int timeout;
280
281 for (timeout = 250; timeout > 0; timeout--) {
282 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
283 if ((val & CS4231_INIT) == 0)
284 break;
285 udelay(100);
286 }
287}
288
289static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg,
290 unsigned char value)
291{
292 snd_cs4231_ready(chip);
293#ifdef CONFIG_SND_DEBUG
294 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
295 snd_printdd("out: auto calibration time out - reg = 0x%x, "
296 "value = 0x%x\n",
297 reg, value);
298#endif
299 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
300 wmb();
301 __cs4231_writeb(chip, value, CS4231U(chip, REG));
302 mb();
303}
304
305static inline void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
306 unsigned char mask, unsigned char value)
307{
308 unsigned char tmp = (chip->image[reg] & mask) | value;
309
310 chip->image[reg] = tmp;
311 if (!chip->calibrate_mute)
312 snd_cs4231_dout(chip, reg, tmp);
313}
314
315static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg,
316 unsigned char value)
317{
318 snd_cs4231_dout(chip, reg, value);
319 chip->image[reg] = value;
320 mb();
321}
322
323static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
324{
325 snd_cs4231_ready(chip);
326#ifdef CONFIG_SND_DEBUG
327 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
328 snd_printdd("in: auto calibration time out - reg = 0x%x\n",
329 reg);
330#endif
331 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
332 mb();
333 return __cs4231_readb(chip, CS4231U(chip, REG));
334}
335
336/*
337 * CS4231 detection / MCE routines
338 */
339
340static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
341{
342 int timeout;
343
344 /* looks like this sequence is proper for CS4231A chip (GUS MAX) */
345 for (timeout = 5; timeout > 0; timeout--)
346 __cs4231_readb(chip, CS4231U(chip, REGSEL));
347
348 /* end of cleanup sequence */
349 for (timeout = 500; timeout > 0; timeout--) {
350 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
351 if ((val & CS4231_INIT) == 0)
352 break;
353 msleep(1);
354 }
355}
356
357static void snd_cs4231_mce_up(struct snd_cs4231 *chip)
358{
359 unsigned long flags;
360 int timeout;
361
362 spin_lock_irqsave(&chip->lock, flags);
363 snd_cs4231_ready(chip);
364#ifdef CONFIG_SND_DEBUG
365 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
366 snd_printdd("mce_up - auto calibration time out (0)\n");
367#endif
368 chip->mce_bit |= CS4231_MCE;
369 timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL));
370 if (timeout == 0x80)
371 snd_printdd("mce_up [%p]: serious init problem - "
372 "codec still busy\n",
373 chip->port);
374 if (!(timeout & CS4231_MCE))
375 __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f),
376 CS4231U(chip, REGSEL));
377 spin_unlock_irqrestore(&chip->lock, flags);
378}
379
380static void snd_cs4231_mce_down(struct snd_cs4231 *chip)
381{
382 unsigned long flags, timeout;
383 int reg;
384
385 snd_cs4231_busy_wait(chip);
386 spin_lock_irqsave(&chip->lock, flags);
387#ifdef CONFIG_SND_DEBUG
388 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
389 snd_printdd("mce_down [%p] - auto calibration time out (0)\n",
390 CS4231U(chip, REGSEL));
391#endif
392 chip->mce_bit &= ~CS4231_MCE;
393 reg = __cs4231_readb(chip, CS4231U(chip, REGSEL));
394 __cs4231_writeb(chip, chip->mce_bit | (reg & 0x1f),
395 CS4231U(chip, REGSEL));
396 if (reg == 0x80)
397 snd_printdd("mce_down [%p]: serious init problem "
398 "- codec still busy\n", chip->port);
399 if ((reg & CS4231_MCE) == 0) {
400 spin_unlock_irqrestore(&chip->lock, flags);
401 return;
402 }
403
404 /*
405 * Wait for auto-calibration (AC) process to finish, i.e. ACI to go low.
406 */
407 timeout = jiffies + msecs_to_jiffies(250);
408 do {
409 spin_unlock_irqrestore(&chip->lock, flags);
410 msleep(1);
411 spin_lock_irqsave(&chip->lock, flags);
412 reg = snd_cs4231_in(chip, CS4231_TEST_INIT);
413 reg &= CS4231_CALIB_IN_PROGRESS;
414 } while (reg && time_before(jiffies, timeout));
415 spin_unlock_irqrestore(&chip->lock, flags);
416
417 if (reg)
418 snd_printk(KERN_ERR
419 "mce_down - auto calibration time out (2)\n");
420}
421
422static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont,
423 struct snd_pcm_substream *substream,
424 unsigned int *periods_sent)
425{
426 struct snd_pcm_runtime *runtime = substream->runtime;
427
428 while (1) {
429 unsigned int period_size = snd_pcm_lib_period_bytes(substream);
430 unsigned int offset = period_size * (*periods_sent);
431
432 if (WARN_ON(period_size >= (1 << 24)))
433 return;
434
435 if (dma_cont->request(dma_cont,
436 runtime->dma_addr + offset, period_size))
437 return;
438 (*periods_sent) = ((*periods_sent) + 1) % runtime->periods;
439 }
440}
441
442static void cs4231_dma_trigger(struct snd_pcm_substream *substream,
443 unsigned int what, int on)
444{
445 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
446 struct cs4231_dma_control *dma_cont;
447
448 if (what & CS4231_PLAYBACK_ENABLE) {
449 dma_cont = &chip->p_dma;
450 if (on) {
451 dma_cont->prepare(dma_cont, 0);
452 dma_cont->enable(dma_cont, 1);
453 snd_cs4231_advance_dma(dma_cont,
454 chip->playback_substream,
455 &chip->p_periods_sent);
456 } else {
457 dma_cont->enable(dma_cont, 0);
458 }
459 }
460 if (what & CS4231_RECORD_ENABLE) {
461 dma_cont = &chip->c_dma;
462 if (on) {
463 dma_cont->prepare(dma_cont, 1);
464 dma_cont->enable(dma_cont, 1);
465 snd_cs4231_advance_dma(dma_cont,
466 chip->capture_substream,
467 &chip->c_periods_sent);
468 } else {
469 dma_cont->enable(dma_cont, 0);
470 }
471 }
472}
473
474static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd)
475{
476 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
477 int result = 0;
478
479 switch (cmd) {
480 case SNDRV_PCM_TRIGGER_START:
481 case SNDRV_PCM_TRIGGER_STOP:
482 {
483 unsigned int what = 0;
484 struct snd_pcm_substream *s;
485 unsigned long flags;
486
487 snd_pcm_group_for_each_entry(s, substream) {
488 if (s == chip->playback_substream) {
489 what |= CS4231_PLAYBACK_ENABLE;
490 snd_pcm_trigger_done(s, substream);
491 } else if (s == chip->capture_substream) {
492 what |= CS4231_RECORD_ENABLE;
493 snd_pcm_trigger_done(s, substream);
494 }
495 }
496
497 spin_lock_irqsave(&chip->lock, flags);
498 if (cmd == SNDRV_PCM_TRIGGER_START) {
499 cs4231_dma_trigger(substream, what, 1);
500 chip->image[CS4231_IFACE_CTRL] |= what;
501 } else {
502 cs4231_dma_trigger(substream, what, 0);
503 chip->image[CS4231_IFACE_CTRL] &= ~what;
504 }
505 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
506 chip->image[CS4231_IFACE_CTRL]);
507 spin_unlock_irqrestore(&chip->lock, flags);
508 break;
509 }
510 default:
511 result = -EINVAL;
512 break;
513 }
514
515 return result;
516}
517
518/*
519 * CODEC I/O
520 */
521
522static unsigned char snd_cs4231_get_rate(unsigned int rate)
523{
524 int i;
525
526 for (i = 0; i < 14; i++)
527 if (rate == rates[i])
528 return freq_bits[i];
529
530 return freq_bits[13];
531}
532
533static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format,
534 int channels)
535{
536 unsigned char rformat;
537
538 rformat = CS4231_LINEAR_8;
539 switch (format) {
540 case SNDRV_PCM_FORMAT_MU_LAW:
541 rformat = CS4231_ULAW_8;
542 break;
543 case SNDRV_PCM_FORMAT_A_LAW:
544 rformat = CS4231_ALAW_8;
545 break;
546 case SNDRV_PCM_FORMAT_S16_LE:
547 rformat = CS4231_LINEAR_16;
548 break;
549 case SNDRV_PCM_FORMAT_S16_BE:
550 rformat = CS4231_LINEAR_16_BIG;
551 break;
552 case SNDRV_PCM_FORMAT_IMA_ADPCM:
553 rformat = CS4231_ADPCM_16;
554 break;
555 }
556 if (channels > 1)
557 rformat |= CS4231_STEREO;
558 return rformat;
559}
560
561static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
562{
563 unsigned long flags;
564
565 mute = mute ? 1 : 0;
566 spin_lock_irqsave(&chip->lock, flags);
567 if (chip->calibrate_mute == mute) {
568 spin_unlock_irqrestore(&chip->lock, flags);
569 return;
570 }
571 if (!mute) {
572 snd_cs4231_dout(chip, CS4231_LEFT_INPUT,
573 chip->image[CS4231_LEFT_INPUT]);
574 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT,
575 chip->image[CS4231_RIGHT_INPUT]);
576 snd_cs4231_dout(chip, CS4231_LOOPBACK,
577 chip->image[CS4231_LOOPBACK]);
578 }
579 snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT,
580 mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
581 snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT,
582 mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
583 snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT,
584 mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
585 snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT,
586 mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
587 snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT,
588 mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
589 snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT,
590 mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
591 snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN,
592 mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
593 snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN,
594 mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
595 snd_cs4231_dout(chip, CS4231_MONO_CTRL,
596 mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
597 chip->calibrate_mute = mute;
598 spin_unlock_irqrestore(&chip->lock, flags);
599}
600
601static void snd_cs4231_playback_format(struct snd_cs4231 *chip,
602 struct snd_pcm_hw_params *params,
603 unsigned char pdfr)
604{
605 unsigned long flags;
606
607 mutex_lock(&chip->mce_mutex);
608 snd_cs4231_calibrate_mute(chip, 1);
609
610 snd_cs4231_mce_up(chip);
611
612 spin_lock_irqsave(&chip->lock, flags);
613 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
614 (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
615 (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
616 pdfr);
617 spin_unlock_irqrestore(&chip->lock, flags);
618
619 snd_cs4231_mce_down(chip);
620
621 snd_cs4231_calibrate_mute(chip, 0);
622 mutex_unlock(&chip->mce_mutex);
623}
624
625static void snd_cs4231_capture_format(struct snd_cs4231 *chip,
626 struct snd_pcm_hw_params *params,
627 unsigned char cdfr)
628{
629 unsigned long flags;
630
631 mutex_lock(&chip->mce_mutex);
632 snd_cs4231_calibrate_mute(chip, 1);
633
634 snd_cs4231_mce_up(chip);
635
636 spin_lock_irqsave(&chip->lock, flags);
637 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
638 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
639 ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
640 (cdfr & 0x0f));
641 spin_unlock_irqrestore(&chip->lock, flags);
642 snd_cs4231_mce_down(chip);
643 snd_cs4231_mce_up(chip);
644 spin_lock_irqsave(&chip->lock, flags);
645 }
646 snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
647 spin_unlock_irqrestore(&chip->lock, flags);
648
649 snd_cs4231_mce_down(chip);
650
651 snd_cs4231_calibrate_mute(chip, 0);
652 mutex_unlock(&chip->mce_mutex);
653}
654
655/*
656 * Timer interface
657 */
658
659static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer)
660{
661 struct snd_cs4231 *chip = snd_timer_chip(timer);
662
663 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
664}
665
666static int snd_cs4231_timer_start(struct snd_timer *timer)
667{
668 unsigned long flags;
669 unsigned int ticks;
670 struct snd_cs4231 *chip = snd_timer_chip(timer);
671
672 spin_lock_irqsave(&chip->lock, flags);
673 ticks = timer->sticks;
674 if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
675 (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
676 (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
677 snd_cs4231_out(chip, CS4231_TIMER_HIGH,
678 chip->image[CS4231_TIMER_HIGH] =
679 (unsigned char) (ticks >> 8));
680 snd_cs4231_out(chip, CS4231_TIMER_LOW,
681 chip->image[CS4231_TIMER_LOW] =
682 (unsigned char) ticks);
683 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
684 chip->image[CS4231_ALT_FEATURE_1] |
685 CS4231_TIMER_ENABLE);
686 }
687 spin_unlock_irqrestore(&chip->lock, flags);
688
689 return 0;
690}
691
692static int snd_cs4231_timer_stop(struct snd_timer *timer)
693{
694 unsigned long flags;
695 struct snd_cs4231 *chip = snd_timer_chip(timer);
696
697 spin_lock_irqsave(&chip->lock, flags);
698 chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE;
699 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
700 chip->image[CS4231_ALT_FEATURE_1]);
701 spin_unlock_irqrestore(&chip->lock, flags);
702
703 return 0;
704}
705
706static void snd_cs4231_init(struct snd_cs4231 *chip)
707{
708 unsigned long flags;
709
710 snd_cs4231_mce_down(chip);
711
712#ifdef SNDRV_DEBUG_MCE
713 snd_printdd("init: (1)\n");
714#endif
715 snd_cs4231_mce_up(chip);
716 spin_lock_irqsave(&chip->lock, flags);
717 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
718 CS4231_PLAYBACK_PIO |
719 CS4231_RECORD_ENABLE |
720 CS4231_RECORD_PIO |
721 CS4231_CALIB_MODE);
722 chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
723 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
724 spin_unlock_irqrestore(&chip->lock, flags);
725 snd_cs4231_mce_down(chip);
726
727#ifdef SNDRV_DEBUG_MCE
728 snd_printdd("init: (2)\n");
729#endif
730
731 snd_cs4231_mce_up(chip);
732 spin_lock_irqsave(&chip->lock, flags);
733 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
734 chip->image[CS4231_ALT_FEATURE_1]);
735 spin_unlock_irqrestore(&chip->lock, flags);
736 snd_cs4231_mce_down(chip);
737
738#ifdef SNDRV_DEBUG_MCE
739 snd_printdd("init: (3) - afei = 0x%x\n",
740 chip->image[CS4231_ALT_FEATURE_1]);
741#endif
742
743 spin_lock_irqsave(&chip->lock, flags);
744 snd_cs4231_out(chip, CS4231_ALT_FEATURE_2,
745 chip->image[CS4231_ALT_FEATURE_2]);
746 spin_unlock_irqrestore(&chip->lock, flags);
747
748 snd_cs4231_mce_up(chip);
749 spin_lock_irqsave(&chip->lock, flags);
750 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
751 chip->image[CS4231_PLAYBK_FORMAT]);
752 spin_unlock_irqrestore(&chip->lock, flags);
753 snd_cs4231_mce_down(chip);
754
755#ifdef SNDRV_DEBUG_MCE
756 snd_printdd("init: (4)\n");
757#endif
758
759 snd_cs4231_mce_up(chip);
760 spin_lock_irqsave(&chip->lock, flags);
761 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
762 spin_unlock_irqrestore(&chip->lock, flags);
763 snd_cs4231_mce_down(chip);
764
765#ifdef SNDRV_DEBUG_MCE
766 snd_printdd("init: (5)\n");
767#endif
768}
769
770static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
771{
772 unsigned long flags;
773
774 mutex_lock(&chip->open_mutex);
775 if ((chip->mode & mode)) {
776 mutex_unlock(&chip->open_mutex);
777 return -EAGAIN;
778 }
779 if (chip->mode & CS4231_MODE_OPEN) {
780 chip->mode |= mode;
781 mutex_unlock(&chip->open_mutex);
782 return 0;
783 }
784 /* ok. now enable and ack CODEC IRQ */
785 spin_lock_irqsave(&chip->lock, flags);
786 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
787 CS4231_RECORD_IRQ |
788 CS4231_TIMER_IRQ);
789 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
790 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
791 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
792
793 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
794 CS4231_RECORD_IRQ |
795 CS4231_TIMER_IRQ);
796 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
797
798 spin_unlock_irqrestore(&chip->lock, flags);
799
800 chip->mode = mode;
801 mutex_unlock(&chip->open_mutex);
802 return 0;
803}
804
805static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
806{
807 unsigned long flags;
808
809 mutex_lock(&chip->open_mutex);
810 chip->mode &= ~mode;
811 if (chip->mode & CS4231_MODE_OPEN) {
812 mutex_unlock(&chip->open_mutex);
813 return;
814 }
815 snd_cs4231_calibrate_mute(chip, 1);
816
817 /* disable IRQ */
818 spin_lock_irqsave(&chip->lock, flags);
819 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
820 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
821 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
822
823 /* now disable record & playback */
824
825 if (chip->image[CS4231_IFACE_CTRL] &
826 (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
827 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
828 spin_unlock_irqrestore(&chip->lock, flags);
829 snd_cs4231_mce_up(chip);
830 spin_lock_irqsave(&chip->lock, flags);
831 chip->image[CS4231_IFACE_CTRL] &=
832 ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
833 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
834 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
835 chip->image[CS4231_IFACE_CTRL]);
836 spin_unlock_irqrestore(&chip->lock, flags);
837 snd_cs4231_mce_down(chip);
838 spin_lock_irqsave(&chip->lock, flags);
839 }
840
841 /* clear IRQ again */
842 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
843 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
844 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
845 spin_unlock_irqrestore(&chip->lock, flags);
846
847 snd_cs4231_calibrate_mute(chip, 0);
848
849 chip->mode = 0;
850 mutex_unlock(&chip->open_mutex);
851}
852
853/*
854 * timer open/close
855 */
856
857static int snd_cs4231_timer_open(struct snd_timer *timer)
858{
859 struct snd_cs4231 *chip = snd_timer_chip(timer);
860 snd_cs4231_open(chip, CS4231_MODE_TIMER);
861 return 0;
862}
863
864static int snd_cs4231_timer_close(struct snd_timer *timer)
865{
866 struct snd_cs4231 *chip = snd_timer_chip(timer);
867 snd_cs4231_close(chip, CS4231_MODE_TIMER);
868 return 0;
869}
870
871static const struct snd_timer_hardware snd_cs4231_timer_table = {
872 .flags = SNDRV_TIMER_HW_AUTO,
873 .resolution = 9945,
874 .ticks = 65535,
875 .open = snd_cs4231_timer_open,
876 .close = snd_cs4231_timer_close,
877 .c_resolution = snd_cs4231_timer_resolution,
878 .start = snd_cs4231_timer_start,
879 .stop = snd_cs4231_timer_stop,
880};
881
882/*
883 * ok.. exported functions..
884 */
885
886static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
887 struct snd_pcm_hw_params *hw_params)
888{
889 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
890 unsigned char new_pdfr;
891
892 new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params),
893 params_channels(hw_params)) |
894 snd_cs4231_get_rate(params_rate(hw_params));
895 snd_cs4231_playback_format(chip, hw_params, new_pdfr);
896
897 return 0;
898}
899
900static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
901{
902 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
903 struct snd_pcm_runtime *runtime = substream->runtime;
904 unsigned long flags;
905 int ret = 0;
906
907 spin_lock_irqsave(&chip->lock, flags);
908
909 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
910 CS4231_PLAYBACK_PIO);
911
912 if (WARN_ON(runtime->period_size > 0xffff + 1)) {
913 ret = -EINVAL;
914 goto out;
915 }
916
917 chip->p_periods_sent = 0;
918
919out:
920 spin_unlock_irqrestore(&chip->lock, flags);
921
922 return ret;
923}
924
925static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
926 struct snd_pcm_hw_params *hw_params)
927{
928 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
929 unsigned char new_cdfr;
930
931 new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params),
932 params_channels(hw_params)) |
933 snd_cs4231_get_rate(params_rate(hw_params));
934 snd_cs4231_capture_format(chip, hw_params, new_cdfr);
935
936 return 0;
937}
938
939static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
940{
941 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
942 unsigned long flags;
943
944 spin_lock_irqsave(&chip->lock, flags);
945 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE |
946 CS4231_RECORD_PIO);
947
948
949 chip->c_periods_sent = 0;
950 spin_unlock_irqrestore(&chip->lock, flags);
951
952 return 0;
953}
954
955static void snd_cs4231_overrange(struct snd_cs4231 *chip)
956{
957 unsigned long flags;
958 unsigned char res;
959
960 spin_lock_irqsave(&chip->lock, flags);
961 res = snd_cs4231_in(chip, CS4231_TEST_INIT);
962 spin_unlock_irqrestore(&chip->lock, flags);
963
964 /* detect overrange only above 0dB; may be user selectable? */
965 if (res & (0x08 | 0x02))
966 chip->capture_substream->runtime->overrange++;
967}
968
969static void snd_cs4231_play_callback(struct snd_cs4231 *chip)
970{
971 if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) {
972 snd_pcm_period_elapsed(chip->playback_substream);
973 snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream,
974 &chip->p_periods_sent);
975 }
976}
977
978static void snd_cs4231_capture_callback(struct snd_cs4231 *chip)
979{
980 if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) {
981 snd_pcm_period_elapsed(chip->capture_substream);
982 snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream,
983 &chip->c_periods_sent);
984 }
985}
986
987static snd_pcm_uframes_t snd_cs4231_playback_pointer(
988 struct snd_pcm_substream *substream)
989{
990 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
991 struct cs4231_dma_control *dma_cont = &chip->p_dma;
992 size_t ptr;
993
994 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
995 return 0;
996 ptr = dma_cont->address(dma_cont);
997 if (ptr != 0)
998 ptr -= substream->runtime->dma_addr;
999
1000 return bytes_to_frames(substream->runtime, ptr);
1001}
1002
1003static snd_pcm_uframes_t snd_cs4231_capture_pointer(
1004 struct snd_pcm_substream *substream)
1005{
1006 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1007 struct cs4231_dma_control *dma_cont = &chip->c_dma;
1008 size_t ptr;
1009
1010 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1011 return 0;
1012 ptr = dma_cont->address(dma_cont);
1013 if (ptr != 0)
1014 ptr -= substream->runtime->dma_addr;
1015
1016 return bytes_to_frames(substream->runtime, ptr);
1017}
1018
1019static int snd_cs4231_probe(struct snd_cs4231 *chip)
1020{
1021 unsigned long flags;
1022 int i;
1023 int id = 0;
1024 int vers = 0;
1025 unsigned char *ptr;
1026
1027 for (i = 0; i < 50; i++) {
1028 mb();
1029 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
1030 msleep(2);
1031 else {
1032 spin_lock_irqsave(&chip->lock, flags);
1033 snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1034 id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1035 vers = snd_cs4231_in(chip, CS4231_VERSION);
1036 spin_unlock_irqrestore(&chip->lock, flags);
1037 if (id == 0x0a)
1038 break; /* this is valid value */
1039 }
1040 }
1041 snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id);
1042 if (id != 0x0a)
1043 return -ENODEV; /* no valid device found */
1044
1045 spin_lock_irqsave(&chip->lock, flags);
1046
1047 /* clear any pendings IRQ */
1048 __cs4231_readb(chip, CS4231U(chip, STATUS));
1049 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS));
1050 mb();
1051
1052 spin_unlock_irqrestore(&chip->lock, flags);
1053
1054 chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1055 chip->image[CS4231_IFACE_CTRL] =
1056 chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA;
1057 chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1058 chip->image[CS4231_ALT_FEATURE_2] = 0x01;
1059 if (vers & 0x20)
1060 chip->image[CS4231_ALT_FEATURE_2] |= 0x02;
1061
1062 ptr = (unsigned char *) &chip->image;
1063
1064 snd_cs4231_mce_down(chip);
1065
1066 spin_lock_irqsave(&chip->lock, flags);
1067
1068 for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */
1069 snd_cs4231_out(chip, i, *ptr++);
1070
1071 spin_unlock_irqrestore(&chip->lock, flags);
1072
1073 snd_cs4231_mce_up(chip);
1074
1075 snd_cs4231_mce_down(chip);
1076
1077 mdelay(2);
1078
1079 return 0; /* all things are ok.. */
1080}
1081
1082static const struct snd_pcm_hardware snd_cs4231_playback = {
1083 .info = SNDRV_PCM_INFO_MMAP |
1084 SNDRV_PCM_INFO_INTERLEAVED |
1085 SNDRV_PCM_INFO_MMAP_VALID |
1086 SNDRV_PCM_INFO_SYNC_START,
1087 .formats = SNDRV_PCM_FMTBIT_MU_LAW |
1088 SNDRV_PCM_FMTBIT_A_LAW |
1089 SNDRV_PCM_FMTBIT_IMA_ADPCM |
1090 SNDRV_PCM_FMTBIT_U8 |
1091 SNDRV_PCM_FMTBIT_S16_LE |
1092 SNDRV_PCM_FMTBIT_S16_BE,
1093 .rates = SNDRV_PCM_RATE_KNOT |
1094 SNDRV_PCM_RATE_8000_48000,
1095 .rate_min = 5510,
1096 .rate_max = 48000,
1097 .channels_min = 1,
1098 .channels_max = 2,
1099 .buffer_bytes_max = 32 * 1024,
1100 .period_bytes_min = 64,
1101 .period_bytes_max = 32 * 1024,
1102 .periods_min = 1,
1103 .periods_max = 1024,
1104};
1105
1106static const struct snd_pcm_hardware snd_cs4231_capture = {
1107 .info = SNDRV_PCM_INFO_MMAP |
1108 SNDRV_PCM_INFO_INTERLEAVED |
1109 SNDRV_PCM_INFO_MMAP_VALID |
1110 SNDRV_PCM_INFO_SYNC_START,
1111 .formats = SNDRV_PCM_FMTBIT_MU_LAW |
1112 SNDRV_PCM_FMTBIT_A_LAW |
1113 SNDRV_PCM_FMTBIT_IMA_ADPCM |
1114 SNDRV_PCM_FMTBIT_U8 |
1115 SNDRV_PCM_FMTBIT_S16_LE |
1116 SNDRV_PCM_FMTBIT_S16_BE,
1117 .rates = SNDRV_PCM_RATE_KNOT |
1118 SNDRV_PCM_RATE_8000_48000,
1119 .rate_min = 5510,
1120 .rate_max = 48000,
1121 .channels_min = 1,
1122 .channels_max = 2,
1123 .buffer_bytes_max = 32 * 1024,
1124 .period_bytes_min = 64,
1125 .period_bytes_max = 32 * 1024,
1126 .periods_min = 1,
1127 .periods_max = 1024,
1128};
1129
1130static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
1131{
1132 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1133 struct snd_pcm_runtime *runtime = substream->runtime;
1134 int err;
1135
1136 runtime->hw = snd_cs4231_playback;
1137
1138 err = snd_cs4231_open(chip, CS4231_MODE_PLAY);
1139 if (err < 0)
1140 return err;
1141 chip->playback_substream = substream;
1142 chip->p_periods_sent = 0;
1143 snd_pcm_set_sync(substream);
1144 snd_cs4231_xrate(runtime);
1145
1146 return 0;
1147}
1148
1149static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
1150{
1151 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1152 struct snd_pcm_runtime *runtime = substream->runtime;
1153 int err;
1154
1155 runtime->hw = snd_cs4231_capture;
1156
1157 err = snd_cs4231_open(chip, CS4231_MODE_RECORD);
1158 if (err < 0)
1159 return err;
1160 chip->capture_substream = substream;
1161 chip->c_periods_sent = 0;
1162 snd_pcm_set_sync(substream);
1163 snd_cs4231_xrate(runtime);
1164
1165 return 0;
1166}
1167
1168static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
1169{
1170 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1171
1172 snd_cs4231_close(chip, CS4231_MODE_PLAY);
1173 chip->playback_substream = NULL;
1174
1175 return 0;
1176}
1177
1178static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
1179{
1180 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1181
1182 snd_cs4231_close(chip, CS4231_MODE_RECORD);
1183 chip->capture_substream = NULL;
1184
1185 return 0;
1186}
1187
1188/* XXX We can do some power-management, in particular on EBUS using
1189 * XXX the audio AUXIO register...
1190 */
1191
1192static const struct snd_pcm_ops snd_cs4231_playback_ops = {
1193 .open = snd_cs4231_playback_open,
1194 .close = snd_cs4231_playback_close,
1195 .hw_params = snd_cs4231_playback_hw_params,
1196 .prepare = snd_cs4231_playback_prepare,
1197 .trigger = snd_cs4231_trigger,
1198 .pointer = snd_cs4231_playback_pointer,
1199};
1200
1201static const struct snd_pcm_ops snd_cs4231_capture_ops = {
1202 .open = snd_cs4231_capture_open,
1203 .close = snd_cs4231_capture_close,
1204 .hw_params = snd_cs4231_capture_hw_params,
1205 .prepare = snd_cs4231_capture_prepare,
1206 .trigger = snd_cs4231_trigger,
1207 .pointer = snd_cs4231_capture_pointer,
1208};
1209
1210static int snd_cs4231_pcm(struct snd_card *card)
1211{
1212 struct snd_cs4231 *chip = card->private_data;
1213 struct snd_pcm *pcm;
1214 int err;
1215
1216 err = snd_pcm_new(card, "CS4231", 0, 1, 1, &pcm);
1217 if (err < 0)
1218 return err;
1219
1220 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1221 &snd_cs4231_playback_ops);
1222 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1223 &snd_cs4231_capture_ops);
1224
1225 /* global setup */
1226 pcm->private_data = chip;
1227 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1228 strcpy(pcm->name, "CS4231");
1229
1230 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1231 &chip->op->dev, 64 * 1024, 128 * 1024);
1232
1233 chip->pcm = pcm;
1234
1235 return 0;
1236}
1237
1238static int snd_cs4231_timer(struct snd_card *card)
1239{
1240 struct snd_cs4231 *chip = card->private_data;
1241 struct snd_timer *timer;
1242 struct snd_timer_id tid;
1243 int err;
1244
1245 /* Timer initialization */
1246 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1247 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1248 tid.card = card->number;
1249 tid.device = 0;
1250 tid.subdevice = 0;
1251 err = snd_timer_new(card, "CS4231", &tid, &timer);
1252 if (err < 0)
1253 return err;
1254 strcpy(timer->name, "CS4231");
1255 timer->private_data = chip;
1256 timer->hw = snd_cs4231_timer_table;
1257 chip->timer = timer;
1258
1259 return 0;
1260}
1261
1262/*
1263 * MIXER part
1264 */
1265
1266static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol,
1267 struct snd_ctl_elem_info *uinfo)
1268{
1269 static const char * const texts[4] = {
1270 "Line", "CD", "Mic", "Mix"
1271 };
1272
1273 return snd_ctl_enum_info(uinfo, 2, 4, texts);
1274}
1275
1276static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol,
1277 struct snd_ctl_elem_value *ucontrol)
1278{
1279 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1280 unsigned long flags;
1281
1282 spin_lock_irqsave(&chip->lock, flags);
1283 ucontrol->value.enumerated.item[0] =
1284 (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1285 ucontrol->value.enumerated.item[1] =
1286 (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1287 spin_unlock_irqrestore(&chip->lock, flags);
1288
1289 return 0;
1290}
1291
1292static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol,
1293 struct snd_ctl_elem_value *ucontrol)
1294{
1295 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1296 unsigned long flags;
1297 unsigned short left, right;
1298 int change;
1299
1300 if (ucontrol->value.enumerated.item[0] > 3 ||
1301 ucontrol->value.enumerated.item[1] > 3)
1302 return -EINVAL;
1303 left = ucontrol->value.enumerated.item[0] << 6;
1304 right = ucontrol->value.enumerated.item[1] << 6;
1305
1306 spin_lock_irqsave(&chip->lock, flags);
1307
1308 left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1309 right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1310 change = left != chip->image[CS4231_LEFT_INPUT] ||
1311 right != chip->image[CS4231_RIGHT_INPUT];
1312 snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1313 snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1314
1315 spin_unlock_irqrestore(&chip->lock, flags);
1316
1317 return change;
1318}
1319
1320static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol,
1321 struct snd_ctl_elem_info *uinfo)
1322{
1323 int mask = (kcontrol->private_value >> 16) & 0xff;
1324
1325 uinfo->type = (mask == 1) ?
1326 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1327 uinfo->count = 1;
1328 uinfo->value.integer.min = 0;
1329 uinfo->value.integer.max = mask;
1330
1331 return 0;
1332}
1333
1334static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol,
1335 struct snd_ctl_elem_value *ucontrol)
1336{
1337 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1338 unsigned long flags;
1339 int reg = kcontrol->private_value & 0xff;
1340 int shift = (kcontrol->private_value >> 8) & 0xff;
1341 int mask = (kcontrol->private_value >> 16) & 0xff;
1342 int invert = (kcontrol->private_value >> 24) & 0xff;
1343
1344 spin_lock_irqsave(&chip->lock, flags);
1345
1346 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1347
1348 spin_unlock_irqrestore(&chip->lock, flags);
1349
1350 if (invert)
1351 ucontrol->value.integer.value[0] =
1352 (mask - ucontrol->value.integer.value[0]);
1353
1354 return 0;
1355}
1356
1357static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol,
1358 struct snd_ctl_elem_value *ucontrol)
1359{
1360 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1361 unsigned long flags;
1362 int reg = kcontrol->private_value & 0xff;
1363 int shift = (kcontrol->private_value >> 8) & 0xff;
1364 int mask = (kcontrol->private_value >> 16) & 0xff;
1365 int invert = (kcontrol->private_value >> 24) & 0xff;
1366 int change;
1367 unsigned short val;
1368
1369 val = (ucontrol->value.integer.value[0] & mask);
1370 if (invert)
1371 val = mask - val;
1372 val <<= shift;
1373
1374 spin_lock_irqsave(&chip->lock, flags);
1375
1376 val = (chip->image[reg] & ~(mask << shift)) | val;
1377 change = val != chip->image[reg];
1378 snd_cs4231_out(chip, reg, val);
1379
1380 spin_unlock_irqrestore(&chip->lock, flags);
1381
1382 return change;
1383}
1384
1385static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol,
1386 struct snd_ctl_elem_info *uinfo)
1387{
1388 int mask = (kcontrol->private_value >> 24) & 0xff;
1389
1390 uinfo->type = mask == 1 ?
1391 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1392 uinfo->count = 2;
1393 uinfo->value.integer.min = 0;
1394 uinfo->value.integer.max = mask;
1395
1396 return 0;
1397}
1398
1399static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol,
1400 struct snd_ctl_elem_value *ucontrol)
1401{
1402 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1403 unsigned long flags;
1404 int left_reg = kcontrol->private_value & 0xff;
1405 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1406 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1407 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1408 int mask = (kcontrol->private_value >> 24) & 0xff;
1409 int invert = (kcontrol->private_value >> 22) & 1;
1410
1411 spin_lock_irqsave(&chip->lock, flags);
1412
1413 ucontrol->value.integer.value[0] =
1414 (chip->image[left_reg] >> shift_left) & mask;
1415 ucontrol->value.integer.value[1] =
1416 (chip->image[right_reg] >> shift_right) & mask;
1417
1418 spin_unlock_irqrestore(&chip->lock, flags);
1419
1420 if (invert) {
1421 ucontrol->value.integer.value[0] =
1422 (mask - ucontrol->value.integer.value[0]);
1423 ucontrol->value.integer.value[1] =
1424 (mask - ucontrol->value.integer.value[1]);
1425 }
1426
1427 return 0;
1428}
1429
1430static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol,
1431 struct snd_ctl_elem_value *ucontrol)
1432{
1433 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1434 unsigned long flags;
1435 int left_reg = kcontrol->private_value & 0xff;
1436 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1437 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1438 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1439 int mask = (kcontrol->private_value >> 24) & 0xff;
1440 int invert = (kcontrol->private_value >> 22) & 1;
1441 int change;
1442 unsigned short val1, val2;
1443
1444 val1 = ucontrol->value.integer.value[0] & mask;
1445 val2 = ucontrol->value.integer.value[1] & mask;
1446 if (invert) {
1447 val1 = mask - val1;
1448 val2 = mask - val2;
1449 }
1450 val1 <<= shift_left;
1451 val2 <<= shift_right;
1452
1453 spin_lock_irqsave(&chip->lock, flags);
1454
1455 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1456 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1457 change = val1 != chip->image[left_reg];
1458 change |= val2 != chip->image[right_reg];
1459 snd_cs4231_out(chip, left_reg, val1);
1460 snd_cs4231_out(chip, right_reg, val2);
1461
1462 spin_unlock_irqrestore(&chip->lock, flags);
1463
1464 return change;
1465}
1466
1467#define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
1468{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1469 .info = snd_cs4231_info_single, \
1470 .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \
1471 .private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) }
1472
1473#define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, \
1474 shift_right, mask, invert) \
1475{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1476 .info = snd_cs4231_info_double, \
1477 .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \
1478 .private_value = (left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | \
1479 ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22) }
1480
1481static const struct snd_kcontrol_new snd_cs4231_controls[] = {
1482CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT,
1483 CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1484CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT,
1485 CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1486CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN,
1487 CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1488CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN,
1489 CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1490CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT,
1491 CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1492CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT,
1493 CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1494CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT,
1495 CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1496CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT,
1497 CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1498CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1499CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1500CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1501CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1502CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0,
1503 15, 0),
1504{
1505 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1506 .name = "Capture Source",
1507 .info = snd_cs4231_info_mux,
1508 .get = snd_cs4231_get_mux,
1509 .put = snd_cs4231_put_mux,
1510},
1511CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5,
1512 1, 0),
1513CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1514CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1),
1515/* SPARC specific uses of XCTL{0,1} general purpose outputs. */
1516CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1),
1517CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1)
1518};
1519
1520static int snd_cs4231_mixer(struct snd_card *card)
1521{
1522 struct snd_cs4231 *chip = card->private_data;
1523 int err, idx;
1524
1525 if (snd_BUG_ON(!chip || !chip->pcm))
1526 return -EINVAL;
1527
1528 strcpy(card->mixername, chip->pcm->name);
1529
1530 for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
1531 err = snd_ctl_add(card,
1532 snd_ctl_new1(&snd_cs4231_controls[idx], chip));
1533 if (err < 0)
1534 return err;
1535 }
1536 return 0;
1537}
1538
1539static int dev;
1540
1541static int cs4231_attach_begin(struct platform_device *op,
1542 struct snd_card **rcard)
1543{
1544 struct snd_card *card;
1545 struct snd_cs4231 *chip;
1546 int err;
1547
1548 *rcard = NULL;
1549
1550 if (dev >= SNDRV_CARDS)
1551 return -ENODEV;
1552
1553 if (!enable[dev]) {
1554 dev++;
1555 return -ENOENT;
1556 }
1557
1558 err = snd_card_new(&op->dev, index[dev], id[dev], THIS_MODULE,
1559 sizeof(struct snd_cs4231), &card);
1560 if (err < 0)
1561 return err;
1562
1563 strcpy(card->driver, "CS4231");
1564 strcpy(card->shortname, "Sun CS4231");
1565
1566 chip = card->private_data;
1567 chip->card = card;
1568
1569 *rcard = card;
1570 return 0;
1571}
1572
1573static int cs4231_attach_finish(struct snd_card *card)
1574{
1575 struct snd_cs4231 *chip = card->private_data;
1576 int err;
1577
1578 err = snd_cs4231_pcm(card);
1579 if (err < 0)
1580 goto out_err;
1581
1582 err = snd_cs4231_mixer(card);
1583 if (err < 0)
1584 goto out_err;
1585
1586 err = snd_cs4231_timer(card);
1587 if (err < 0)
1588 goto out_err;
1589
1590 err = snd_card_register(card);
1591 if (err < 0)
1592 goto out_err;
1593
1594 dev_set_drvdata(&chip->op->dev, chip);
1595
1596 dev++;
1597 return 0;
1598
1599out_err:
1600 snd_card_free(card);
1601 return err;
1602}
1603
1604#ifdef SBUS_SUPPORT
1605
1606static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id)
1607{
1608 unsigned long flags;
1609 unsigned char status;
1610 u32 csr;
1611 struct snd_cs4231 *chip = dev_id;
1612
1613 /*This is IRQ is not raised by the cs4231*/
1614 if (!(__cs4231_readb(chip, CS4231U(chip, STATUS)) & CS4231_GLOBALIRQ))
1615 return IRQ_NONE;
1616
1617 /* ACK the APC interrupt. */
1618 csr = sbus_readl(chip->port + APCCSR);
1619
1620 sbus_writel(csr, chip->port + APCCSR);
1621
1622 if ((csr & APC_PDMA_READY) &&
1623 (csr & APC_PLAY_INT) &&
1624 (csr & APC_XINT_PNVA) &&
1625 !(csr & APC_XINT_EMPT))
1626 snd_cs4231_play_callback(chip);
1627
1628 if ((csr & APC_CDMA_READY) &&
1629 (csr & APC_CAPT_INT) &&
1630 (csr & APC_XINT_CNVA) &&
1631 !(csr & APC_XINT_EMPT))
1632 snd_cs4231_capture_callback(chip);
1633
1634 status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
1635
1636 if (status & CS4231_TIMER_IRQ) {
1637 if (chip->timer)
1638 snd_timer_interrupt(chip->timer, chip->timer->sticks);
1639 }
1640
1641 if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY))
1642 snd_cs4231_overrange(chip);
1643
1644 /* ACK the CS4231 interrupt. */
1645 spin_lock_irqsave(&chip->lock, flags);
1646 snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
1647 spin_unlock_irqrestore(&chip->lock, flags);
1648
1649 return IRQ_HANDLED;
1650}
1651
1652/*
1653 * SBUS DMA routines
1654 */
1655
1656static int sbus_dma_request(struct cs4231_dma_control *dma_cont,
1657 dma_addr_t bus_addr, size_t len)
1658{
1659 unsigned long flags;
1660 u32 test, csr;
1661 int err;
1662 struct sbus_dma_info *base = &dma_cont->sbus_info;
1663
1664 if (len >= (1 << 24))
1665 return -EINVAL;
1666 spin_lock_irqsave(&base->lock, flags);
1667 csr = sbus_readl(base->regs + APCCSR);
1668 err = -EINVAL;
1669 test = APC_CDMA_READY;
1670 if (base->dir == APC_PLAY)
1671 test = APC_PDMA_READY;
1672 if (!(csr & test))
1673 goto out;
1674 err = -EBUSY;
1675 test = APC_XINT_CNVA;
1676 if (base->dir == APC_PLAY)
1677 test = APC_XINT_PNVA;
1678 if (!(csr & test))
1679 goto out;
1680 err = 0;
1681 sbus_writel(bus_addr, base->regs + base->dir + APCNVA);
1682 sbus_writel(len, base->regs + base->dir + APCNC);
1683out:
1684 spin_unlock_irqrestore(&base->lock, flags);
1685 return err;
1686}
1687
1688static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d)
1689{
1690 unsigned long flags;
1691 u32 csr, test;
1692 struct sbus_dma_info *base = &dma_cont->sbus_info;
1693
1694 spin_lock_irqsave(&base->lock, flags);
1695 csr = sbus_readl(base->regs + APCCSR);
1696 test = APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA |
1697 APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL |
1698 APC_XINT_PENA;
1699 if (base->dir == APC_RECORD)
1700 test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA |
1701 APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL;
1702 csr |= test;
1703 sbus_writel(csr, base->regs + APCCSR);
1704 spin_unlock_irqrestore(&base->lock, flags);
1705}
1706
1707static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1708{
1709 unsigned long flags;
1710 u32 csr, shift;
1711 struct sbus_dma_info *base = &dma_cont->sbus_info;
1712
1713 spin_lock_irqsave(&base->lock, flags);
1714 if (!on) {
1715 sbus_writel(0, base->regs + base->dir + APCNC);
1716 sbus_writel(0, base->regs + base->dir + APCNVA);
1717 if (base->dir == APC_PLAY) {
1718 sbus_writel(0, base->regs + base->dir + APCC);
1719 sbus_writel(0, base->regs + base->dir + APCVA);
1720 }
1721
1722 udelay(1200);
1723 }
1724 csr = sbus_readl(base->regs + APCCSR);
1725 shift = 0;
1726 if (base->dir == APC_PLAY)
1727 shift = 1;
1728 if (on)
1729 csr &= ~(APC_CPAUSE << shift);
1730 else
1731 csr |= (APC_CPAUSE << shift);
1732 sbus_writel(csr, base->regs + APCCSR);
1733 if (on)
1734 csr |= (APC_CDMA_READY << shift);
1735 else
1736 csr &= ~(APC_CDMA_READY << shift);
1737 sbus_writel(csr, base->regs + APCCSR);
1738
1739 spin_unlock_irqrestore(&base->lock, flags);
1740}
1741
1742static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont)
1743{
1744 struct sbus_dma_info *base = &dma_cont->sbus_info;
1745
1746 return sbus_readl(base->regs + base->dir + APCVA);
1747}
1748
1749/*
1750 * Init and exit routines
1751 */
1752
1753static int snd_cs4231_sbus_free(struct snd_cs4231 *chip)
1754{
1755 struct platform_device *op = chip->op;
1756
1757 if (chip->irq[0])
1758 free_irq(chip->irq[0], chip);
1759
1760 if (chip->port)
1761 of_iounmap(&op->resource[0], chip->port, chip->regs_size);
1762
1763 return 0;
1764}
1765
1766static int snd_cs4231_sbus_dev_free(struct snd_device *device)
1767{
1768 struct snd_cs4231 *cp = device->device_data;
1769
1770 return snd_cs4231_sbus_free(cp);
1771}
1772
1773static const struct snd_device_ops snd_cs4231_sbus_dev_ops = {
1774 .dev_free = snd_cs4231_sbus_dev_free,
1775};
1776
1777static int snd_cs4231_sbus_create(struct snd_card *card,
1778 struct platform_device *op,
1779 int dev)
1780{
1781 struct snd_cs4231 *chip = card->private_data;
1782 int err;
1783
1784 spin_lock_init(&chip->lock);
1785 spin_lock_init(&chip->c_dma.sbus_info.lock);
1786 spin_lock_init(&chip->p_dma.sbus_info.lock);
1787 mutex_init(&chip->mce_mutex);
1788 mutex_init(&chip->open_mutex);
1789 chip->op = op;
1790 chip->regs_size = resource_size(&op->resource[0]);
1791 memcpy(&chip->image, &snd_cs4231_original_image,
1792 sizeof(snd_cs4231_original_image));
1793
1794 chip->port = of_ioremap(&op->resource[0], 0,
1795 chip->regs_size, "cs4231");
1796 if (!chip->port) {
1797 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
1798 return -EIO;
1799 }
1800
1801 chip->c_dma.sbus_info.regs = chip->port;
1802 chip->p_dma.sbus_info.regs = chip->port;
1803 chip->c_dma.sbus_info.dir = APC_RECORD;
1804 chip->p_dma.sbus_info.dir = APC_PLAY;
1805
1806 chip->p_dma.prepare = sbus_dma_prepare;
1807 chip->p_dma.enable = sbus_dma_enable;
1808 chip->p_dma.request = sbus_dma_request;
1809 chip->p_dma.address = sbus_dma_addr;
1810
1811 chip->c_dma.prepare = sbus_dma_prepare;
1812 chip->c_dma.enable = sbus_dma_enable;
1813 chip->c_dma.request = sbus_dma_request;
1814 chip->c_dma.address = sbus_dma_addr;
1815
1816 if (request_irq(op->archdata.irqs[0], snd_cs4231_sbus_interrupt,
1817 IRQF_SHARED, "cs4231", chip)) {
1818 snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n",
1819 dev, op->archdata.irqs[0]);
1820 snd_cs4231_sbus_free(chip);
1821 return -EBUSY;
1822 }
1823 chip->irq[0] = op->archdata.irqs[0];
1824
1825 if (snd_cs4231_probe(chip) < 0) {
1826 snd_cs4231_sbus_free(chip);
1827 return -ENODEV;
1828 }
1829 snd_cs4231_init(chip);
1830
1831 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
1832 chip, &snd_cs4231_sbus_dev_ops);
1833 if (err < 0) {
1834 snd_cs4231_sbus_free(chip);
1835 return err;
1836 }
1837
1838 return 0;
1839}
1840
1841static int cs4231_sbus_probe(struct platform_device *op)
1842{
1843 struct resource *rp = &op->resource[0];
1844 struct snd_card *card;
1845 int err;
1846
1847 err = cs4231_attach_begin(op, &card);
1848 if (err)
1849 return err;
1850
1851 sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d",
1852 card->shortname,
1853 rp->flags & 0xffL,
1854 (unsigned long long)rp->start,
1855 op->archdata.irqs[0]);
1856
1857 err = snd_cs4231_sbus_create(card, op, dev);
1858 if (err < 0) {
1859 snd_card_free(card);
1860 return err;
1861 }
1862
1863 return cs4231_attach_finish(card);
1864}
1865#endif
1866
1867#ifdef EBUS_SUPPORT
1868
1869static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event,
1870 void *cookie)
1871{
1872 struct snd_cs4231 *chip = cookie;
1873
1874 snd_cs4231_play_callback(chip);
1875}
1876
1877static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p,
1878 int event, void *cookie)
1879{
1880 struct snd_cs4231 *chip = cookie;
1881
1882 snd_cs4231_capture_callback(chip);
1883}
1884
1885/*
1886 * EBUS DMA wrappers
1887 */
1888
1889static int _ebus_dma_request(struct cs4231_dma_control *dma_cont,
1890 dma_addr_t bus_addr, size_t len)
1891{
1892 return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len);
1893}
1894
1895static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1896{
1897 ebus_dma_enable(&dma_cont->ebus_info, on);
1898}
1899
1900static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir)
1901{
1902 ebus_dma_prepare(&dma_cont->ebus_info, dir);
1903}
1904
1905static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont)
1906{
1907 return ebus_dma_addr(&dma_cont->ebus_info);
1908}
1909
1910/*
1911 * Init and exit routines
1912 */
1913
1914static int snd_cs4231_ebus_free(struct snd_cs4231 *chip)
1915{
1916 struct platform_device *op = chip->op;
1917
1918 if (chip->c_dma.ebus_info.regs) {
1919 ebus_dma_unregister(&chip->c_dma.ebus_info);
1920 of_iounmap(&op->resource[2], chip->c_dma.ebus_info.regs, 0x10);
1921 }
1922 if (chip->p_dma.ebus_info.regs) {
1923 ebus_dma_unregister(&chip->p_dma.ebus_info);
1924 of_iounmap(&op->resource[1], chip->p_dma.ebus_info.regs, 0x10);
1925 }
1926
1927 if (chip->port)
1928 of_iounmap(&op->resource[0], chip->port, 0x10);
1929
1930 return 0;
1931}
1932
1933static int snd_cs4231_ebus_dev_free(struct snd_device *device)
1934{
1935 struct snd_cs4231 *cp = device->device_data;
1936
1937 return snd_cs4231_ebus_free(cp);
1938}
1939
1940static const struct snd_device_ops snd_cs4231_ebus_dev_ops = {
1941 .dev_free = snd_cs4231_ebus_dev_free,
1942};
1943
1944static int snd_cs4231_ebus_create(struct snd_card *card,
1945 struct platform_device *op,
1946 int dev)
1947{
1948 struct snd_cs4231 *chip = card->private_data;
1949 int err;
1950
1951 spin_lock_init(&chip->lock);
1952 spin_lock_init(&chip->c_dma.ebus_info.lock);
1953 spin_lock_init(&chip->p_dma.ebus_info.lock);
1954 mutex_init(&chip->mce_mutex);
1955 mutex_init(&chip->open_mutex);
1956 chip->flags |= CS4231_FLAG_EBUS;
1957 chip->op = op;
1958 memcpy(&chip->image, &snd_cs4231_original_image,
1959 sizeof(snd_cs4231_original_image));
1960 strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)");
1961 chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
1962 chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback;
1963 chip->c_dma.ebus_info.client_cookie = chip;
1964 chip->c_dma.ebus_info.irq = op->archdata.irqs[0];
1965 strcpy(chip->p_dma.ebus_info.name, "cs4231(play)");
1966 chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
1967 chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback;
1968 chip->p_dma.ebus_info.client_cookie = chip;
1969 chip->p_dma.ebus_info.irq = op->archdata.irqs[1];
1970
1971 chip->p_dma.prepare = _ebus_dma_prepare;
1972 chip->p_dma.enable = _ebus_dma_enable;
1973 chip->p_dma.request = _ebus_dma_request;
1974 chip->p_dma.address = _ebus_dma_addr;
1975
1976 chip->c_dma.prepare = _ebus_dma_prepare;
1977 chip->c_dma.enable = _ebus_dma_enable;
1978 chip->c_dma.request = _ebus_dma_request;
1979 chip->c_dma.address = _ebus_dma_addr;
1980
1981 chip->port = of_ioremap(&op->resource[0], 0, 0x10, "cs4231");
1982 chip->p_dma.ebus_info.regs =
1983 of_ioremap(&op->resource[1], 0, 0x10, "cs4231_pdma");
1984 chip->c_dma.ebus_info.regs =
1985 of_ioremap(&op->resource[2], 0, 0x10, "cs4231_cdma");
1986 if (!chip->port || !chip->p_dma.ebus_info.regs ||
1987 !chip->c_dma.ebus_info.regs) {
1988 snd_cs4231_ebus_free(chip);
1989 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
1990 return -EIO;
1991 }
1992
1993 if (ebus_dma_register(&chip->c_dma.ebus_info)) {
1994 snd_cs4231_ebus_free(chip);
1995 snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n",
1996 dev);
1997 return -EBUSY;
1998 }
1999 if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) {
2000 snd_cs4231_ebus_free(chip);
2001 snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n",
2002 dev);
2003 return -EBUSY;
2004 }
2005
2006 if (ebus_dma_register(&chip->p_dma.ebus_info)) {
2007 snd_cs4231_ebus_free(chip);
2008 snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n",
2009 dev);
2010 return -EBUSY;
2011 }
2012 if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) {
2013 snd_cs4231_ebus_free(chip);
2014 snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev);
2015 return -EBUSY;
2016 }
2017
2018 if (snd_cs4231_probe(chip) < 0) {
2019 snd_cs4231_ebus_free(chip);
2020 return -ENODEV;
2021 }
2022 snd_cs4231_init(chip);
2023
2024 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2025 chip, &snd_cs4231_ebus_dev_ops);
2026 if (err < 0) {
2027 snd_cs4231_ebus_free(chip);
2028 return err;
2029 }
2030
2031 return 0;
2032}
2033
2034static int cs4231_ebus_probe(struct platform_device *op)
2035{
2036 struct snd_card *card;
2037 int err;
2038
2039 err = cs4231_attach_begin(op, &card);
2040 if (err)
2041 return err;
2042
2043 sprintf(card->longname, "%s at 0x%llx, irq %d",
2044 card->shortname,
2045 op->resource[0].start,
2046 op->archdata.irqs[0]);
2047
2048 err = snd_cs4231_ebus_create(card, op, dev);
2049 if (err < 0) {
2050 snd_card_free(card);
2051 return err;
2052 }
2053
2054 return cs4231_attach_finish(card);
2055}
2056#endif
2057
2058static int cs4231_probe(struct platform_device *op)
2059{
2060#ifdef EBUS_SUPPORT
2061 if (of_node_name_eq(op->dev.of_node->parent, "ebus"))
2062 return cs4231_ebus_probe(op);
2063#endif
2064#ifdef SBUS_SUPPORT
2065 if (of_node_name_eq(op->dev.of_node->parent, "sbus") ||
2066 of_node_name_eq(op->dev.of_node->parent, "sbi"))
2067 return cs4231_sbus_probe(op);
2068#endif
2069 return -ENODEV;
2070}
2071
2072static int cs4231_remove(struct platform_device *op)
2073{
2074 struct snd_cs4231 *chip = dev_get_drvdata(&op->dev);
2075
2076 snd_card_free(chip->card);
2077
2078 return 0;
2079}
2080
2081static const struct of_device_id cs4231_match[] = {
2082 {
2083 .name = "SUNW,CS4231",
2084 },
2085 {
2086 .name = "audio",
2087 .compatible = "SUNW,CS4231",
2088 },
2089 {},
2090};
2091
2092MODULE_DEVICE_TABLE(of, cs4231_match);
2093
2094static struct platform_driver cs4231_driver = {
2095 .driver = {
2096 .name = "audio",
2097 .of_match_table = cs4231_match,
2098 },
2099 .probe = cs4231_probe,
2100 .remove = cs4231_remove,
2101};
2102
2103module_platform_driver(cs4231_driver);
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Driver for CS4231 sound chips found on Sparcs.
4 * Copyright (C) 2002, 2008 David S. Miller <davem@davemloft.net>
5 *
6 * Based entirely upon drivers/sbus/audio/cs4231.c which is:
7 * Copyright (C) 1996, 1997, 1998 Derrick J Brashear (shadow@andrew.cmu.edu)
8 * and also sound/isa/cs423x/cs4231_lib.c which is:
9 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
10 */
11
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/delay.h>
15#include <linux/init.h>
16#include <linux/interrupt.h>
17#include <linux/moduleparam.h>
18#include <linux/irq.h>
19#include <linux/io.h>
20#include <linux/of.h>
21#include <linux/of_device.h>
22
23#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/info.h>
26#include <sound/control.h>
27#include <sound/timer.h>
28#include <sound/initval.h>
29#include <sound/pcm_params.h>
30
31#ifdef CONFIG_SBUS
32#define SBUS_SUPPORT
33#endif
34
35#if defined(CONFIG_PCI) && defined(CONFIG_SPARC64)
36#define EBUS_SUPPORT
37#include <linux/pci.h>
38#include <asm/ebus_dma.h>
39#endif
40
41static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
42static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
43/* Enable this card */
44static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
45
46module_param_array(index, int, NULL, 0444);
47MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard.");
48module_param_array(id, charp, NULL, 0444);
49MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard.");
50module_param_array(enable, bool, NULL, 0444);
51MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard.");
52MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller");
53MODULE_DESCRIPTION("Sun CS4231");
54MODULE_LICENSE("GPL");
55MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}");
56
57#ifdef SBUS_SUPPORT
58struct sbus_dma_info {
59 spinlock_t lock; /* DMA access lock */
60 int dir;
61 void __iomem *regs;
62};
63#endif
64
65struct snd_cs4231;
66struct cs4231_dma_control {
67 void (*prepare)(struct cs4231_dma_control *dma_cont,
68 int dir);
69 void (*enable)(struct cs4231_dma_control *dma_cont, int on);
70 int (*request)(struct cs4231_dma_control *dma_cont,
71 dma_addr_t bus_addr, size_t len);
72 unsigned int (*address)(struct cs4231_dma_control *dma_cont);
73#ifdef EBUS_SUPPORT
74 struct ebus_dma_info ebus_info;
75#endif
76#ifdef SBUS_SUPPORT
77 struct sbus_dma_info sbus_info;
78#endif
79};
80
81struct snd_cs4231 {
82 spinlock_t lock; /* registers access lock */
83 void __iomem *port;
84
85 struct cs4231_dma_control p_dma;
86 struct cs4231_dma_control c_dma;
87
88 u32 flags;
89#define CS4231_FLAG_EBUS 0x00000001
90#define CS4231_FLAG_PLAYBACK 0x00000002
91#define CS4231_FLAG_CAPTURE 0x00000004
92
93 struct snd_card *card;
94 struct snd_pcm *pcm;
95 struct snd_pcm_substream *playback_substream;
96 unsigned int p_periods_sent;
97 struct snd_pcm_substream *capture_substream;
98 unsigned int c_periods_sent;
99 struct snd_timer *timer;
100
101 unsigned short mode;
102#define CS4231_MODE_NONE 0x0000
103#define CS4231_MODE_PLAY 0x0001
104#define CS4231_MODE_RECORD 0x0002
105#define CS4231_MODE_TIMER 0x0004
106#define CS4231_MODE_OPEN (CS4231_MODE_PLAY | CS4231_MODE_RECORD | \
107 CS4231_MODE_TIMER)
108
109 unsigned char image[32]; /* registers image */
110 int mce_bit;
111 int calibrate_mute;
112 struct mutex mce_mutex; /* mutex for mce register */
113 struct mutex open_mutex; /* mutex for ALSA open/close */
114
115 struct platform_device *op;
116 unsigned int irq[2];
117 unsigned int regs_size;
118 struct snd_cs4231 *next;
119};
120
121/* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for
122 * now.... -DaveM
123 */
124
125/* IO ports */
126#include <sound/cs4231-regs.h>
127
128/* XXX offsets are different than PC ISA chips... */
129#define CS4231U(chip, x) ((chip)->port + ((c_d_c_CS4231##x) << 2))
130
131/* SBUS DMA register defines. */
132
133#define APCCSR 0x10UL /* APC DMA CSR */
134#define APCCVA 0x20UL /* APC Capture DMA Address */
135#define APCCC 0x24UL /* APC Capture Count */
136#define APCCNVA 0x28UL /* APC Capture DMA Next Address */
137#define APCCNC 0x2cUL /* APC Capture Next Count */
138#define APCPVA 0x30UL /* APC Play DMA Address */
139#define APCPC 0x34UL /* APC Play Count */
140#define APCPNVA 0x38UL /* APC Play DMA Next Address */
141#define APCPNC 0x3cUL /* APC Play Next Count */
142
143/* Defines for SBUS DMA-routines */
144
145#define APCVA 0x0UL /* APC DMA Address */
146#define APCC 0x4UL /* APC Count */
147#define APCNVA 0x8UL /* APC DMA Next Address */
148#define APCNC 0xcUL /* APC Next Count */
149#define APC_PLAY 0x30UL /* Play registers start at 0x30 */
150#define APC_RECORD 0x20UL /* Record registers start at 0x20 */
151
152/* APCCSR bits */
153
154#define APC_INT_PENDING 0x800000 /* Interrupt Pending */
155#define APC_PLAY_INT 0x400000 /* Playback interrupt */
156#define APC_CAPT_INT 0x200000 /* Capture interrupt */
157#define APC_GENL_INT 0x100000 /* General interrupt */
158#define APC_XINT_ENA 0x80000 /* General ext int. enable */
159#define APC_XINT_PLAY 0x40000 /* Playback ext intr */
160#define APC_XINT_CAPT 0x20000 /* Capture ext intr */
161#define APC_XINT_GENL 0x10000 /* Error ext intr */
162#define APC_XINT_EMPT 0x8000 /* Pipe empty interrupt (0 write to pva) */
163#define APC_XINT_PEMP 0x4000 /* Play pipe empty (pva and pnva not set) */
164#define APC_XINT_PNVA 0x2000 /* Playback NVA dirty */
165#define APC_XINT_PENA 0x1000 /* play pipe empty Int enable */
166#define APC_XINT_COVF 0x800 /* Cap data dropped on floor */
167#define APC_XINT_CNVA 0x400 /* Capture NVA dirty */
168#define APC_XINT_CEMP 0x200 /* Capture pipe empty (cva and cnva not set) */
169#define APC_XINT_CENA 0x100 /* Cap. pipe empty int enable */
170#define APC_PPAUSE 0x80 /* Pause the play DMA */
171#define APC_CPAUSE 0x40 /* Pause the capture DMA */
172#define APC_CDC_RESET 0x20 /* CODEC RESET */
173#define APC_PDMA_READY 0x08 /* Play DMA Go */
174#define APC_CDMA_READY 0x04 /* Capture DMA Go */
175#define APC_CHIP_RESET 0x01 /* Reset the chip */
176
177/* EBUS DMA register offsets */
178
179#define EBDMA_CSR 0x00UL /* Control/Status */
180#define EBDMA_ADDR 0x04UL /* DMA Address */
181#define EBDMA_COUNT 0x08UL /* DMA Count */
182
183/*
184 * Some variables
185 */
186
187static unsigned char freq_bits[14] = {
188 /* 5510 */ 0x00 | CS4231_XTAL2,
189 /* 6620 */ 0x0E | CS4231_XTAL2,
190 /* 8000 */ 0x00 | CS4231_XTAL1,
191 /* 9600 */ 0x0E | CS4231_XTAL1,
192 /* 11025 */ 0x02 | CS4231_XTAL2,
193 /* 16000 */ 0x02 | CS4231_XTAL1,
194 /* 18900 */ 0x04 | CS4231_XTAL2,
195 /* 22050 */ 0x06 | CS4231_XTAL2,
196 /* 27042 */ 0x04 | CS4231_XTAL1,
197 /* 32000 */ 0x06 | CS4231_XTAL1,
198 /* 33075 */ 0x0C | CS4231_XTAL2,
199 /* 37800 */ 0x08 | CS4231_XTAL2,
200 /* 44100 */ 0x0A | CS4231_XTAL2,
201 /* 48000 */ 0x0C | CS4231_XTAL1
202};
203
204static const unsigned int rates[14] = {
205 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
206 27042, 32000, 33075, 37800, 44100, 48000
207};
208
209static const struct snd_pcm_hw_constraint_list hw_constraints_rates = {
210 .count = ARRAY_SIZE(rates),
211 .list = rates,
212};
213
214static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
215{
216 return snd_pcm_hw_constraint_list(runtime, 0,
217 SNDRV_PCM_HW_PARAM_RATE,
218 &hw_constraints_rates);
219}
220
221static unsigned char snd_cs4231_original_image[32] =
222{
223 0x00, /* 00/00 - lic */
224 0x00, /* 01/01 - ric */
225 0x9f, /* 02/02 - la1ic */
226 0x9f, /* 03/03 - ra1ic */
227 0x9f, /* 04/04 - la2ic */
228 0x9f, /* 05/05 - ra2ic */
229 0xbf, /* 06/06 - loc */
230 0xbf, /* 07/07 - roc */
231 0x20, /* 08/08 - pdfr */
232 CS4231_AUTOCALIB, /* 09/09 - ic */
233 0x00, /* 0a/10 - pc */
234 0x00, /* 0b/11 - ti */
235 CS4231_MODE2, /* 0c/12 - mi */
236 0x00, /* 0d/13 - lbc */
237 0x00, /* 0e/14 - pbru */
238 0x00, /* 0f/15 - pbrl */
239 0x80, /* 10/16 - afei */
240 0x01, /* 11/17 - afeii */
241 0x9f, /* 12/18 - llic */
242 0x9f, /* 13/19 - rlic */
243 0x00, /* 14/20 - tlb */
244 0x00, /* 15/21 - thb */
245 0x00, /* 16/22 - la3mic/reserved */
246 0x00, /* 17/23 - ra3mic/reserved */
247 0x00, /* 18/24 - afs */
248 0x00, /* 19/25 - lamoc/version */
249 0x00, /* 1a/26 - mioc */
250 0x00, /* 1b/27 - ramoc/reserved */
251 0x20, /* 1c/28 - cdfr */
252 0x00, /* 1d/29 - res4 */
253 0x00, /* 1e/30 - cbru */
254 0x00, /* 1f/31 - cbrl */
255};
256
257static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr)
258{
259 if (cp->flags & CS4231_FLAG_EBUS)
260 return readb(reg_addr);
261 else
262 return sbus_readb(reg_addr);
263}
264
265static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val,
266 void __iomem *reg_addr)
267{
268 if (cp->flags & CS4231_FLAG_EBUS)
269 return writeb(val, reg_addr);
270 else
271 return sbus_writeb(val, reg_addr);
272}
273
274/*
275 * Basic I/O functions
276 */
277
278static void snd_cs4231_ready(struct snd_cs4231 *chip)
279{
280 int timeout;
281
282 for (timeout = 250; timeout > 0; timeout--) {
283 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
284 if ((val & CS4231_INIT) == 0)
285 break;
286 udelay(100);
287 }
288}
289
290static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg,
291 unsigned char value)
292{
293 snd_cs4231_ready(chip);
294#ifdef CONFIG_SND_DEBUG
295 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
296 snd_printdd("out: auto calibration time out - reg = 0x%x, "
297 "value = 0x%x\n",
298 reg, value);
299#endif
300 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
301 wmb();
302 __cs4231_writeb(chip, value, CS4231U(chip, REG));
303 mb();
304}
305
306static inline void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
307 unsigned char mask, unsigned char value)
308{
309 unsigned char tmp = (chip->image[reg] & mask) | value;
310
311 chip->image[reg] = tmp;
312 if (!chip->calibrate_mute)
313 snd_cs4231_dout(chip, reg, tmp);
314}
315
316static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg,
317 unsigned char value)
318{
319 snd_cs4231_dout(chip, reg, value);
320 chip->image[reg] = value;
321 mb();
322}
323
324static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
325{
326 snd_cs4231_ready(chip);
327#ifdef CONFIG_SND_DEBUG
328 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
329 snd_printdd("in: auto calibration time out - reg = 0x%x\n",
330 reg);
331#endif
332 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
333 mb();
334 return __cs4231_readb(chip, CS4231U(chip, REG));
335}
336
337/*
338 * CS4231 detection / MCE routines
339 */
340
341static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
342{
343 int timeout;
344
345 /* looks like this sequence is proper for CS4231A chip (GUS MAX) */
346 for (timeout = 5; timeout > 0; timeout--)
347 __cs4231_readb(chip, CS4231U(chip, REGSEL));
348
349 /* end of cleanup sequence */
350 for (timeout = 500; timeout > 0; timeout--) {
351 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
352 if ((val & CS4231_INIT) == 0)
353 break;
354 msleep(1);
355 }
356}
357
358static void snd_cs4231_mce_up(struct snd_cs4231 *chip)
359{
360 unsigned long flags;
361 int timeout;
362
363 spin_lock_irqsave(&chip->lock, flags);
364 snd_cs4231_ready(chip);
365#ifdef CONFIG_SND_DEBUG
366 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
367 snd_printdd("mce_up - auto calibration time out (0)\n");
368#endif
369 chip->mce_bit |= CS4231_MCE;
370 timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL));
371 if (timeout == 0x80)
372 snd_printdd("mce_up [%p]: serious init problem - "
373 "codec still busy\n",
374 chip->port);
375 if (!(timeout & CS4231_MCE))
376 __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f),
377 CS4231U(chip, REGSEL));
378 spin_unlock_irqrestore(&chip->lock, flags);
379}
380
381static void snd_cs4231_mce_down(struct snd_cs4231 *chip)
382{
383 unsigned long flags, timeout;
384 int reg;
385
386 snd_cs4231_busy_wait(chip);
387 spin_lock_irqsave(&chip->lock, flags);
388#ifdef CONFIG_SND_DEBUG
389 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
390 snd_printdd("mce_down [%p] - auto calibration time out (0)\n",
391 CS4231U(chip, REGSEL));
392#endif
393 chip->mce_bit &= ~CS4231_MCE;
394 reg = __cs4231_readb(chip, CS4231U(chip, REGSEL));
395 __cs4231_writeb(chip, chip->mce_bit | (reg & 0x1f),
396 CS4231U(chip, REGSEL));
397 if (reg == 0x80)
398 snd_printdd("mce_down [%p]: serious init problem "
399 "- codec still busy\n", chip->port);
400 if ((reg & CS4231_MCE) == 0) {
401 spin_unlock_irqrestore(&chip->lock, flags);
402 return;
403 }
404
405 /*
406 * Wait for auto-calibration (AC) process to finish, i.e. ACI to go low.
407 */
408 timeout = jiffies + msecs_to_jiffies(250);
409 do {
410 spin_unlock_irqrestore(&chip->lock, flags);
411 msleep(1);
412 spin_lock_irqsave(&chip->lock, flags);
413 reg = snd_cs4231_in(chip, CS4231_TEST_INIT);
414 reg &= CS4231_CALIB_IN_PROGRESS;
415 } while (reg && time_before(jiffies, timeout));
416 spin_unlock_irqrestore(&chip->lock, flags);
417
418 if (reg)
419 snd_printk(KERN_ERR
420 "mce_down - auto calibration time out (2)\n");
421}
422
423static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont,
424 struct snd_pcm_substream *substream,
425 unsigned int *periods_sent)
426{
427 struct snd_pcm_runtime *runtime = substream->runtime;
428
429 while (1) {
430 unsigned int period_size = snd_pcm_lib_period_bytes(substream);
431 unsigned int offset = period_size * (*periods_sent);
432
433 if (WARN_ON(period_size >= (1 << 24)))
434 return;
435
436 if (dma_cont->request(dma_cont,
437 runtime->dma_addr + offset, period_size))
438 return;
439 (*periods_sent) = ((*periods_sent) + 1) % runtime->periods;
440 }
441}
442
443static void cs4231_dma_trigger(struct snd_pcm_substream *substream,
444 unsigned int what, int on)
445{
446 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
447 struct cs4231_dma_control *dma_cont;
448
449 if (what & CS4231_PLAYBACK_ENABLE) {
450 dma_cont = &chip->p_dma;
451 if (on) {
452 dma_cont->prepare(dma_cont, 0);
453 dma_cont->enable(dma_cont, 1);
454 snd_cs4231_advance_dma(dma_cont,
455 chip->playback_substream,
456 &chip->p_periods_sent);
457 } else {
458 dma_cont->enable(dma_cont, 0);
459 }
460 }
461 if (what & CS4231_RECORD_ENABLE) {
462 dma_cont = &chip->c_dma;
463 if (on) {
464 dma_cont->prepare(dma_cont, 1);
465 dma_cont->enable(dma_cont, 1);
466 snd_cs4231_advance_dma(dma_cont,
467 chip->capture_substream,
468 &chip->c_periods_sent);
469 } else {
470 dma_cont->enable(dma_cont, 0);
471 }
472 }
473}
474
475static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd)
476{
477 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
478 int result = 0;
479
480 switch (cmd) {
481 case SNDRV_PCM_TRIGGER_START:
482 case SNDRV_PCM_TRIGGER_STOP:
483 {
484 unsigned int what = 0;
485 struct snd_pcm_substream *s;
486 unsigned long flags;
487
488 snd_pcm_group_for_each_entry(s, substream) {
489 if (s == chip->playback_substream) {
490 what |= CS4231_PLAYBACK_ENABLE;
491 snd_pcm_trigger_done(s, substream);
492 } else if (s == chip->capture_substream) {
493 what |= CS4231_RECORD_ENABLE;
494 snd_pcm_trigger_done(s, substream);
495 }
496 }
497
498 spin_lock_irqsave(&chip->lock, flags);
499 if (cmd == SNDRV_PCM_TRIGGER_START) {
500 cs4231_dma_trigger(substream, what, 1);
501 chip->image[CS4231_IFACE_CTRL] |= what;
502 } else {
503 cs4231_dma_trigger(substream, what, 0);
504 chip->image[CS4231_IFACE_CTRL] &= ~what;
505 }
506 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
507 chip->image[CS4231_IFACE_CTRL]);
508 spin_unlock_irqrestore(&chip->lock, flags);
509 break;
510 }
511 default:
512 result = -EINVAL;
513 break;
514 }
515
516 return result;
517}
518
519/*
520 * CODEC I/O
521 */
522
523static unsigned char snd_cs4231_get_rate(unsigned int rate)
524{
525 int i;
526
527 for (i = 0; i < 14; i++)
528 if (rate == rates[i])
529 return freq_bits[i];
530
531 return freq_bits[13];
532}
533
534static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format,
535 int channels)
536{
537 unsigned char rformat;
538
539 rformat = CS4231_LINEAR_8;
540 switch (format) {
541 case SNDRV_PCM_FORMAT_MU_LAW:
542 rformat = CS4231_ULAW_8;
543 break;
544 case SNDRV_PCM_FORMAT_A_LAW:
545 rformat = CS4231_ALAW_8;
546 break;
547 case SNDRV_PCM_FORMAT_S16_LE:
548 rformat = CS4231_LINEAR_16;
549 break;
550 case SNDRV_PCM_FORMAT_S16_BE:
551 rformat = CS4231_LINEAR_16_BIG;
552 break;
553 case SNDRV_PCM_FORMAT_IMA_ADPCM:
554 rformat = CS4231_ADPCM_16;
555 break;
556 }
557 if (channels > 1)
558 rformat |= CS4231_STEREO;
559 return rformat;
560}
561
562static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
563{
564 unsigned long flags;
565
566 mute = mute ? 1 : 0;
567 spin_lock_irqsave(&chip->lock, flags);
568 if (chip->calibrate_mute == mute) {
569 spin_unlock_irqrestore(&chip->lock, flags);
570 return;
571 }
572 if (!mute) {
573 snd_cs4231_dout(chip, CS4231_LEFT_INPUT,
574 chip->image[CS4231_LEFT_INPUT]);
575 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT,
576 chip->image[CS4231_RIGHT_INPUT]);
577 snd_cs4231_dout(chip, CS4231_LOOPBACK,
578 chip->image[CS4231_LOOPBACK]);
579 }
580 snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT,
581 mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
582 snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT,
583 mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
584 snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT,
585 mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
586 snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT,
587 mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
588 snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT,
589 mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
590 snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT,
591 mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
592 snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN,
593 mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
594 snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN,
595 mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
596 snd_cs4231_dout(chip, CS4231_MONO_CTRL,
597 mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
598 chip->calibrate_mute = mute;
599 spin_unlock_irqrestore(&chip->lock, flags);
600}
601
602static void snd_cs4231_playback_format(struct snd_cs4231 *chip,
603 struct snd_pcm_hw_params *params,
604 unsigned char pdfr)
605{
606 unsigned long flags;
607
608 mutex_lock(&chip->mce_mutex);
609 snd_cs4231_calibrate_mute(chip, 1);
610
611 snd_cs4231_mce_up(chip);
612
613 spin_lock_irqsave(&chip->lock, flags);
614 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
615 (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
616 (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
617 pdfr);
618 spin_unlock_irqrestore(&chip->lock, flags);
619
620 snd_cs4231_mce_down(chip);
621
622 snd_cs4231_calibrate_mute(chip, 0);
623 mutex_unlock(&chip->mce_mutex);
624}
625
626static void snd_cs4231_capture_format(struct snd_cs4231 *chip,
627 struct snd_pcm_hw_params *params,
628 unsigned char cdfr)
629{
630 unsigned long flags;
631
632 mutex_lock(&chip->mce_mutex);
633 snd_cs4231_calibrate_mute(chip, 1);
634
635 snd_cs4231_mce_up(chip);
636
637 spin_lock_irqsave(&chip->lock, flags);
638 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
639 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
640 ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
641 (cdfr & 0x0f));
642 spin_unlock_irqrestore(&chip->lock, flags);
643 snd_cs4231_mce_down(chip);
644 snd_cs4231_mce_up(chip);
645 spin_lock_irqsave(&chip->lock, flags);
646 }
647 snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
648 spin_unlock_irqrestore(&chip->lock, flags);
649
650 snd_cs4231_mce_down(chip);
651
652 snd_cs4231_calibrate_mute(chip, 0);
653 mutex_unlock(&chip->mce_mutex);
654}
655
656/*
657 * Timer interface
658 */
659
660static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer)
661{
662 struct snd_cs4231 *chip = snd_timer_chip(timer);
663
664 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
665}
666
667static int snd_cs4231_timer_start(struct snd_timer *timer)
668{
669 unsigned long flags;
670 unsigned int ticks;
671 struct snd_cs4231 *chip = snd_timer_chip(timer);
672
673 spin_lock_irqsave(&chip->lock, flags);
674 ticks = timer->sticks;
675 if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
676 (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
677 (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
678 snd_cs4231_out(chip, CS4231_TIMER_HIGH,
679 chip->image[CS4231_TIMER_HIGH] =
680 (unsigned char) (ticks >> 8));
681 snd_cs4231_out(chip, CS4231_TIMER_LOW,
682 chip->image[CS4231_TIMER_LOW] =
683 (unsigned char) ticks);
684 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
685 chip->image[CS4231_ALT_FEATURE_1] |
686 CS4231_TIMER_ENABLE);
687 }
688 spin_unlock_irqrestore(&chip->lock, flags);
689
690 return 0;
691}
692
693static int snd_cs4231_timer_stop(struct snd_timer *timer)
694{
695 unsigned long flags;
696 struct snd_cs4231 *chip = snd_timer_chip(timer);
697
698 spin_lock_irqsave(&chip->lock, flags);
699 chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE;
700 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
701 chip->image[CS4231_ALT_FEATURE_1]);
702 spin_unlock_irqrestore(&chip->lock, flags);
703
704 return 0;
705}
706
707static void snd_cs4231_init(struct snd_cs4231 *chip)
708{
709 unsigned long flags;
710
711 snd_cs4231_mce_down(chip);
712
713#ifdef SNDRV_DEBUG_MCE
714 snd_printdd("init: (1)\n");
715#endif
716 snd_cs4231_mce_up(chip);
717 spin_lock_irqsave(&chip->lock, flags);
718 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
719 CS4231_PLAYBACK_PIO |
720 CS4231_RECORD_ENABLE |
721 CS4231_RECORD_PIO |
722 CS4231_CALIB_MODE);
723 chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
724 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
725 spin_unlock_irqrestore(&chip->lock, flags);
726 snd_cs4231_mce_down(chip);
727
728#ifdef SNDRV_DEBUG_MCE
729 snd_printdd("init: (2)\n");
730#endif
731
732 snd_cs4231_mce_up(chip);
733 spin_lock_irqsave(&chip->lock, flags);
734 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
735 chip->image[CS4231_ALT_FEATURE_1]);
736 spin_unlock_irqrestore(&chip->lock, flags);
737 snd_cs4231_mce_down(chip);
738
739#ifdef SNDRV_DEBUG_MCE
740 snd_printdd("init: (3) - afei = 0x%x\n",
741 chip->image[CS4231_ALT_FEATURE_1]);
742#endif
743
744 spin_lock_irqsave(&chip->lock, flags);
745 snd_cs4231_out(chip, CS4231_ALT_FEATURE_2,
746 chip->image[CS4231_ALT_FEATURE_2]);
747 spin_unlock_irqrestore(&chip->lock, flags);
748
749 snd_cs4231_mce_up(chip);
750 spin_lock_irqsave(&chip->lock, flags);
751 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
752 chip->image[CS4231_PLAYBK_FORMAT]);
753 spin_unlock_irqrestore(&chip->lock, flags);
754 snd_cs4231_mce_down(chip);
755
756#ifdef SNDRV_DEBUG_MCE
757 snd_printdd("init: (4)\n");
758#endif
759
760 snd_cs4231_mce_up(chip);
761 spin_lock_irqsave(&chip->lock, flags);
762 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
763 spin_unlock_irqrestore(&chip->lock, flags);
764 snd_cs4231_mce_down(chip);
765
766#ifdef SNDRV_DEBUG_MCE
767 snd_printdd("init: (5)\n");
768#endif
769}
770
771static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
772{
773 unsigned long flags;
774
775 mutex_lock(&chip->open_mutex);
776 if ((chip->mode & mode)) {
777 mutex_unlock(&chip->open_mutex);
778 return -EAGAIN;
779 }
780 if (chip->mode & CS4231_MODE_OPEN) {
781 chip->mode |= mode;
782 mutex_unlock(&chip->open_mutex);
783 return 0;
784 }
785 /* ok. now enable and ack CODEC IRQ */
786 spin_lock_irqsave(&chip->lock, flags);
787 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
788 CS4231_RECORD_IRQ |
789 CS4231_TIMER_IRQ);
790 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
791 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
792 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
793
794 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
795 CS4231_RECORD_IRQ |
796 CS4231_TIMER_IRQ);
797 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
798
799 spin_unlock_irqrestore(&chip->lock, flags);
800
801 chip->mode = mode;
802 mutex_unlock(&chip->open_mutex);
803 return 0;
804}
805
806static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
807{
808 unsigned long flags;
809
810 mutex_lock(&chip->open_mutex);
811 chip->mode &= ~mode;
812 if (chip->mode & CS4231_MODE_OPEN) {
813 mutex_unlock(&chip->open_mutex);
814 return;
815 }
816 snd_cs4231_calibrate_mute(chip, 1);
817
818 /* disable IRQ */
819 spin_lock_irqsave(&chip->lock, flags);
820 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
821 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
822 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
823
824 /* now disable record & playback */
825
826 if (chip->image[CS4231_IFACE_CTRL] &
827 (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
828 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
829 spin_unlock_irqrestore(&chip->lock, flags);
830 snd_cs4231_mce_up(chip);
831 spin_lock_irqsave(&chip->lock, flags);
832 chip->image[CS4231_IFACE_CTRL] &=
833 ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
834 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
835 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
836 chip->image[CS4231_IFACE_CTRL]);
837 spin_unlock_irqrestore(&chip->lock, flags);
838 snd_cs4231_mce_down(chip);
839 spin_lock_irqsave(&chip->lock, flags);
840 }
841
842 /* clear IRQ again */
843 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
844 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
845 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
846 spin_unlock_irqrestore(&chip->lock, flags);
847
848 snd_cs4231_calibrate_mute(chip, 0);
849
850 chip->mode = 0;
851 mutex_unlock(&chip->open_mutex);
852}
853
854/*
855 * timer open/close
856 */
857
858static int snd_cs4231_timer_open(struct snd_timer *timer)
859{
860 struct snd_cs4231 *chip = snd_timer_chip(timer);
861 snd_cs4231_open(chip, CS4231_MODE_TIMER);
862 return 0;
863}
864
865static int snd_cs4231_timer_close(struct snd_timer *timer)
866{
867 struct snd_cs4231 *chip = snd_timer_chip(timer);
868 snd_cs4231_close(chip, CS4231_MODE_TIMER);
869 return 0;
870}
871
872static struct snd_timer_hardware snd_cs4231_timer_table = {
873 .flags = SNDRV_TIMER_HW_AUTO,
874 .resolution = 9945,
875 .ticks = 65535,
876 .open = snd_cs4231_timer_open,
877 .close = snd_cs4231_timer_close,
878 .c_resolution = snd_cs4231_timer_resolution,
879 .start = snd_cs4231_timer_start,
880 .stop = snd_cs4231_timer_stop,
881};
882
883/*
884 * ok.. exported functions..
885 */
886
887static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
888 struct snd_pcm_hw_params *hw_params)
889{
890 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
891 unsigned char new_pdfr;
892 int err;
893
894 err = snd_pcm_lib_malloc_pages(substream,
895 params_buffer_bytes(hw_params));
896 if (err < 0)
897 return err;
898 new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params),
899 params_channels(hw_params)) |
900 snd_cs4231_get_rate(params_rate(hw_params));
901 snd_cs4231_playback_format(chip, hw_params, new_pdfr);
902
903 return 0;
904}
905
906static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
907{
908 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
909 struct snd_pcm_runtime *runtime = substream->runtime;
910 unsigned long flags;
911 int ret = 0;
912
913 spin_lock_irqsave(&chip->lock, flags);
914
915 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
916 CS4231_PLAYBACK_PIO);
917
918 if (WARN_ON(runtime->period_size > 0xffff + 1)) {
919 ret = -EINVAL;
920 goto out;
921 }
922
923 chip->p_periods_sent = 0;
924
925out:
926 spin_unlock_irqrestore(&chip->lock, flags);
927
928 return ret;
929}
930
931static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
932 struct snd_pcm_hw_params *hw_params)
933{
934 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
935 unsigned char new_cdfr;
936 int err;
937
938 err = snd_pcm_lib_malloc_pages(substream,
939 params_buffer_bytes(hw_params));
940 if (err < 0)
941 return err;
942 new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params),
943 params_channels(hw_params)) |
944 snd_cs4231_get_rate(params_rate(hw_params));
945 snd_cs4231_capture_format(chip, hw_params, new_cdfr);
946
947 return 0;
948}
949
950static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
951{
952 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
953 unsigned long flags;
954
955 spin_lock_irqsave(&chip->lock, flags);
956 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE |
957 CS4231_RECORD_PIO);
958
959
960 chip->c_periods_sent = 0;
961 spin_unlock_irqrestore(&chip->lock, flags);
962
963 return 0;
964}
965
966static void snd_cs4231_overrange(struct snd_cs4231 *chip)
967{
968 unsigned long flags;
969 unsigned char res;
970
971 spin_lock_irqsave(&chip->lock, flags);
972 res = snd_cs4231_in(chip, CS4231_TEST_INIT);
973 spin_unlock_irqrestore(&chip->lock, flags);
974
975 /* detect overrange only above 0dB; may be user selectable? */
976 if (res & (0x08 | 0x02))
977 chip->capture_substream->runtime->overrange++;
978}
979
980static void snd_cs4231_play_callback(struct snd_cs4231 *chip)
981{
982 if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) {
983 snd_pcm_period_elapsed(chip->playback_substream);
984 snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream,
985 &chip->p_periods_sent);
986 }
987}
988
989static void snd_cs4231_capture_callback(struct snd_cs4231 *chip)
990{
991 if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) {
992 snd_pcm_period_elapsed(chip->capture_substream);
993 snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream,
994 &chip->c_periods_sent);
995 }
996}
997
998static snd_pcm_uframes_t snd_cs4231_playback_pointer(
999 struct snd_pcm_substream *substream)
1000{
1001 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1002 struct cs4231_dma_control *dma_cont = &chip->p_dma;
1003 size_t ptr;
1004
1005 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
1006 return 0;
1007 ptr = dma_cont->address(dma_cont);
1008 if (ptr != 0)
1009 ptr -= substream->runtime->dma_addr;
1010
1011 return bytes_to_frames(substream->runtime, ptr);
1012}
1013
1014static snd_pcm_uframes_t snd_cs4231_capture_pointer(
1015 struct snd_pcm_substream *substream)
1016{
1017 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1018 struct cs4231_dma_control *dma_cont = &chip->c_dma;
1019 size_t ptr;
1020
1021 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1022 return 0;
1023 ptr = dma_cont->address(dma_cont);
1024 if (ptr != 0)
1025 ptr -= substream->runtime->dma_addr;
1026
1027 return bytes_to_frames(substream->runtime, ptr);
1028}
1029
1030static int snd_cs4231_probe(struct snd_cs4231 *chip)
1031{
1032 unsigned long flags;
1033 int i;
1034 int id = 0;
1035 int vers = 0;
1036 unsigned char *ptr;
1037
1038 for (i = 0; i < 50; i++) {
1039 mb();
1040 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
1041 msleep(2);
1042 else {
1043 spin_lock_irqsave(&chip->lock, flags);
1044 snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1045 id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1046 vers = snd_cs4231_in(chip, CS4231_VERSION);
1047 spin_unlock_irqrestore(&chip->lock, flags);
1048 if (id == 0x0a)
1049 break; /* this is valid value */
1050 }
1051 }
1052 snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id);
1053 if (id != 0x0a)
1054 return -ENODEV; /* no valid device found */
1055
1056 spin_lock_irqsave(&chip->lock, flags);
1057
1058 /* clear any pendings IRQ */
1059 __cs4231_readb(chip, CS4231U(chip, STATUS));
1060 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS));
1061 mb();
1062
1063 spin_unlock_irqrestore(&chip->lock, flags);
1064
1065 chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1066 chip->image[CS4231_IFACE_CTRL] =
1067 chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA;
1068 chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1069 chip->image[CS4231_ALT_FEATURE_2] = 0x01;
1070 if (vers & 0x20)
1071 chip->image[CS4231_ALT_FEATURE_2] |= 0x02;
1072
1073 ptr = (unsigned char *) &chip->image;
1074
1075 snd_cs4231_mce_down(chip);
1076
1077 spin_lock_irqsave(&chip->lock, flags);
1078
1079 for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */
1080 snd_cs4231_out(chip, i, *ptr++);
1081
1082 spin_unlock_irqrestore(&chip->lock, flags);
1083
1084 snd_cs4231_mce_up(chip);
1085
1086 snd_cs4231_mce_down(chip);
1087
1088 mdelay(2);
1089
1090 return 0; /* all things are ok.. */
1091}
1092
1093static const struct snd_pcm_hardware snd_cs4231_playback = {
1094 .info = SNDRV_PCM_INFO_MMAP |
1095 SNDRV_PCM_INFO_INTERLEAVED |
1096 SNDRV_PCM_INFO_MMAP_VALID |
1097 SNDRV_PCM_INFO_SYNC_START,
1098 .formats = SNDRV_PCM_FMTBIT_MU_LAW |
1099 SNDRV_PCM_FMTBIT_A_LAW |
1100 SNDRV_PCM_FMTBIT_IMA_ADPCM |
1101 SNDRV_PCM_FMTBIT_U8 |
1102 SNDRV_PCM_FMTBIT_S16_LE |
1103 SNDRV_PCM_FMTBIT_S16_BE,
1104 .rates = SNDRV_PCM_RATE_KNOT |
1105 SNDRV_PCM_RATE_8000_48000,
1106 .rate_min = 5510,
1107 .rate_max = 48000,
1108 .channels_min = 1,
1109 .channels_max = 2,
1110 .buffer_bytes_max = 32 * 1024,
1111 .period_bytes_min = 64,
1112 .period_bytes_max = 32 * 1024,
1113 .periods_min = 1,
1114 .periods_max = 1024,
1115};
1116
1117static const struct snd_pcm_hardware snd_cs4231_capture = {
1118 .info = SNDRV_PCM_INFO_MMAP |
1119 SNDRV_PCM_INFO_INTERLEAVED |
1120 SNDRV_PCM_INFO_MMAP_VALID |
1121 SNDRV_PCM_INFO_SYNC_START,
1122 .formats = SNDRV_PCM_FMTBIT_MU_LAW |
1123 SNDRV_PCM_FMTBIT_A_LAW |
1124 SNDRV_PCM_FMTBIT_IMA_ADPCM |
1125 SNDRV_PCM_FMTBIT_U8 |
1126 SNDRV_PCM_FMTBIT_S16_LE |
1127 SNDRV_PCM_FMTBIT_S16_BE,
1128 .rates = SNDRV_PCM_RATE_KNOT |
1129 SNDRV_PCM_RATE_8000_48000,
1130 .rate_min = 5510,
1131 .rate_max = 48000,
1132 .channels_min = 1,
1133 .channels_max = 2,
1134 .buffer_bytes_max = 32 * 1024,
1135 .period_bytes_min = 64,
1136 .period_bytes_max = 32 * 1024,
1137 .periods_min = 1,
1138 .periods_max = 1024,
1139};
1140
1141static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
1142{
1143 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1144 struct snd_pcm_runtime *runtime = substream->runtime;
1145 int err;
1146
1147 runtime->hw = snd_cs4231_playback;
1148
1149 err = snd_cs4231_open(chip, CS4231_MODE_PLAY);
1150 if (err < 0)
1151 return err;
1152 chip->playback_substream = substream;
1153 chip->p_periods_sent = 0;
1154 snd_pcm_set_sync(substream);
1155 snd_cs4231_xrate(runtime);
1156
1157 return 0;
1158}
1159
1160static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
1161{
1162 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1163 struct snd_pcm_runtime *runtime = substream->runtime;
1164 int err;
1165
1166 runtime->hw = snd_cs4231_capture;
1167
1168 err = snd_cs4231_open(chip, CS4231_MODE_RECORD);
1169 if (err < 0)
1170 return err;
1171 chip->capture_substream = substream;
1172 chip->c_periods_sent = 0;
1173 snd_pcm_set_sync(substream);
1174 snd_cs4231_xrate(runtime);
1175
1176 return 0;
1177}
1178
1179static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
1180{
1181 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1182
1183 snd_cs4231_close(chip, CS4231_MODE_PLAY);
1184 chip->playback_substream = NULL;
1185
1186 return 0;
1187}
1188
1189static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
1190{
1191 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1192
1193 snd_cs4231_close(chip, CS4231_MODE_RECORD);
1194 chip->capture_substream = NULL;
1195
1196 return 0;
1197}
1198
1199/* XXX We can do some power-management, in particular on EBUS using
1200 * XXX the audio AUXIO register...
1201 */
1202
1203static const struct snd_pcm_ops snd_cs4231_playback_ops = {
1204 .open = snd_cs4231_playback_open,
1205 .close = snd_cs4231_playback_close,
1206 .ioctl = snd_pcm_lib_ioctl,
1207 .hw_params = snd_cs4231_playback_hw_params,
1208 .hw_free = snd_pcm_lib_free_pages,
1209 .prepare = snd_cs4231_playback_prepare,
1210 .trigger = snd_cs4231_trigger,
1211 .pointer = snd_cs4231_playback_pointer,
1212};
1213
1214static const struct snd_pcm_ops snd_cs4231_capture_ops = {
1215 .open = snd_cs4231_capture_open,
1216 .close = snd_cs4231_capture_close,
1217 .ioctl = snd_pcm_lib_ioctl,
1218 .hw_params = snd_cs4231_capture_hw_params,
1219 .hw_free = snd_pcm_lib_free_pages,
1220 .prepare = snd_cs4231_capture_prepare,
1221 .trigger = snd_cs4231_trigger,
1222 .pointer = snd_cs4231_capture_pointer,
1223};
1224
1225static int snd_cs4231_pcm(struct snd_card *card)
1226{
1227 struct snd_cs4231 *chip = card->private_data;
1228 struct snd_pcm *pcm;
1229 int err;
1230
1231 err = snd_pcm_new(card, "CS4231", 0, 1, 1, &pcm);
1232 if (err < 0)
1233 return err;
1234
1235 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1236 &snd_cs4231_playback_ops);
1237 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1238 &snd_cs4231_capture_ops);
1239
1240 /* global setup */
1241 pcm->private_data = chip;
1242 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1243 strcpy(pcm->name, "CS4231");
1244
1245 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1246 &chip->op->dev,
1247 64 * 1024, 128 * 1024);
1248
1249 chip->pcm = pcm;
1250
1251 return 0;
1252}
1253
1254static int snd_cs4231_timer(struct snd_card *card)
1255{
1256 struct snd_cs4231 *chip = card->private_data;
1257 struct snd_timer *timer;
1258 struct snd_timer_id tid;
1259 int err;
1260
1261 /* Timer initialization */
1262 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1263 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1264 tid.card = card->number;
1265 tid.device = 0;
1266 tid.subdevice = 0;
1267 err = snd_timer_new(card, "CS4231", &tid, &timer);
1268 if (err < 0)
1269 return err;
1270 strcpy(timer->name, "CS4231");
1271 timer->private_data = chip;
1272 timer->hw = snd_cs4231_timer_table;
1273 chip->timer = timer;
1274
1275 return 0;
1276}
1277
1278/*
1279 * MIXER part
1280 */
1281
1282static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol,
1283 struct snd_ctl_elem_info *uinfo)
1284{
1285 static const char * const texts[4] = {
1286 "Line", "CD", "Mic", "Mix"
1287 };
1288
1289 return snd_ctl_enum_info(uinfo, 2, 4, texts);
1290}
1291
1292static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol,
1293 struct snd_ctl_elem_value *ucontrol)
1294{
1295 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1296 unsigned long flags;
1297
1298 spin_lock_irqsave(&chip->lock, flags);
1299 ucontrol->value.enumerated.item[0] =
1300 (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1301 ucontrol->value.enumerated.item[1] =
1302 (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1303 spin_unlock_irqrestore(&chip->lock, flags);
1304
1305 return 0;
1306}
1307
1308static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol,
1309 struct snd_ctl_elem_value *ucontrol)
1310{
1311 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1312 unsigned long flags;
1313 unsigned short left, right;
1314 int change;
1315
1316 if (ucontrol->value.enumerated.item[0] > 3 ||
1317 ucontrol->value.enumerated.item[1] > 3)
1318 return -EINVAL;
1319 left = ucontrol->value.enumerated.item[0] << 6;
1320 right = ucontrol->value.enumerated.item[1] << 6;
1321
1322 spin_lock_irqsave(&chip->lock, flags);
1323
1324 left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1325 right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1326 change = left != chip->image[CS4231_LEFT_INPUT] ||
1327 right != chip->image[CS4231_RIGHT_INPUT];
1328 snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1329 snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1330
1331 spin_unlock_irqrestore(&chip->lock, flags);
1332
1333 return change;
1334}
1335
1336static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol,
1337 struct snd_ctl_elem_info *uinfo)
1338{
1339 int mask = (kcontrol->private_value >> 16) & 0xff;
1340
1341 uinfo->type = (mask == 1) ?
1342 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1343 uinfo->count = 1;
1344 uinfo->value.integer.min = 0;
1345 uinfo->value.integer.max = mask;
1346
1347 return 0;
1348}
1349
1350static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol,
1351 struct snd_ctl_elem_value *ucontrol)
1352{
1353 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1354 unsigned long flags;
1355 int reg = kcontrol->private_value & 0xff;
1356 int shift = (kcontrol->private_value >> 8) & 0xff;
1357 int mask = (kcontrol->private_value >> 16) & 0xff;
1358 int invert = (kcontrol->private_value >> 24) & 0xff;
1359
1360 spin_lock_irqsave(&chip->lock, flags);
1361
1362 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1363
1364 spin_unlock_irqrestore(&chip->lock, flags);
1365
1366 if (invert)
1367 ucontrol->value.integer.value[0] =
1368 (mask - ucontrol->value.integer.value[0]);
1369
1370 return 0;
1371}
1372
1373static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol,
1374 struct snd_ctl_elem_value *ucontrol)
1375{
1376 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1377 unsigned long flags;
1378 int reg = kcontrol->private_value & 0xff;
1379 int shift = (kcontrol->private_value >> 8) & 0xff;
1380 int mask = (kcontrol->private_value >> 16) & 0xff;
1381 int invert = (kcontrol->private_value >> 24) & 0xff;
1382 int change;
1383 unsigned short val;
1384
1385 val = (ucontrol->value.integer.value[0] & mask);
1386 if (invert)
1387 val = mask - val;
1388 val <<= shift;
1389
1390 spin_lock_irqsave(&chip->lock, flags);
1391
1392 val = (chip->image[reg] & ~(mask << shift)) | val;
1393 change = val != chip->image[reg];
1394 snd_cs4231_out(chip, reg, val);
1395
1396 spin_unlock_irqrestore(&chip->lock, flags);
1397
1398 return change;
1399}
1400
1401static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol,
1402 struct snd_ctl_elem_info *uinfo)
1403{
1404 int mask = (kcontrol->private_value >> 24) & 0xff;
1405
1406 uinfo->type = mask == 1 ?
1407 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1408 uinfo->count = 2;
1409 uinfo->value.integer.min = 0;
1410 uinfo->value.integer.max = mask;
1411
1412 return 0;
1413}
1414
1415static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol,
1416 struct snd_ctl_elem_value *ucontrol)
1417{
1418 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1419 unsigned long flags;
1420 int left_reg = kcontrol->private_value & 0xff;
1421 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1422 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1423 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1424 int mask = (kcontrol->private_value >> 24) & 0xff;
1425 int invert = (kcontrol->private_value >> 22) & 1;
1426
1427 spin_lock_irqsave(&chip->lock, flags);
1428
1429 ucontrol->value.integer.value[0] =
1430 (chip->image[left_reg] >> shift_left) & mask;
1431 ucontrol->value.integer.value[1] =
1432 (chip->image[right_reg] >> shift_right) & mask;
1433
1434 spin_unlock_irqrestore(&chip->lock, flags);
1435
1436 if (invert) {
1437 ucontrol->value.integer.value[0] =
1438 (mask - ucontrol->value.integer.value[0]);
1439 ucontrol->value.integer.value[1] =
1440 (mask - ucontrol->value.integer.value[1]);
1441 }
1442
1443 return 0;
1444}
1445
1446static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol,
1447 struct snd_ctl_elem_value *ucontrol)
1448{
1449 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1450 unsigned long flags;
1451 int left_reg = kcontrol->private_value & 0xff;
1452 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1453 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1454 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1455 int mask = (kcontrol->private_value >> 24) & 0xff;
1456 int invert = (kcontrol->private_value >> 22) & 1;
1457 int change;
1458 unsigned short val1, val2;
1459
1460 val1 = ucontrol->value.integer.value[0] & mask;
1461 val2 = ucontrol->value.integer.value[1] & mask;
1462 if (invert) {
1463 val1 = mask - val1;
1464 val2 = mask - val2;
1465 }
1466 val1 <<= shift_left;
1467 val2 <<= shift_right;
1468
1469 spin_lock_irqsave(&chip->lock, flags);
1470
1471 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1472 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1473 change = val1 != chip->image[left_reg];
1474 change |= val2 != chip->image[right_reg];
1475 snd_cs4231_out(chip, left_reg, val1);
1476 snd_cs4231_out(chip, right_reg, val2);
1477
1478 spin_unlock_irqrestore(&chip->lock, flags);
1479
1480 return change;
1481}
1482
1483#define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
1484{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1485 .info = snd_cs4231_info_single, \
1486 .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \
1487 .private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) }
1488
1489#define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, \
1490 shift_right, mask, invert) \
1491{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1492 .info = snd_cs4231_info_double, \
1493 .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \
1494 .private_value = (left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | \
1495 ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22) }
1496
1497static struct snd_kcontrol_new snd_cs4231_controls[] = {
1498CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT,
1499 CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1500CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT,
1501 CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1502CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN,
1503 CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1504CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN,
1505 CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1506CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT,
1507 CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1508CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT,
1509 CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1510CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT,
1511 CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1512CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT,
1513 CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1514CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1515CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1516CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1517CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1518CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0,
1519 15, 0),
1520{
1521 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1522 .name = "Capture Source",
1523 .info = snd_cs4231_info_mux,
1524 .get = snd_cs4231_get_mux,
1525 .put = snd_cs4231_put_mux,
1526},
1527CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5,
1528 1, 0),
1529CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1530CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1),
1531/* SPARC specific uses of XCTL{0,1} general purpose outputs. */
1532CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1),
1533CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1)
1534};
1535
1536static int snd_cs4231_mixer(struct snd_card *card)
1537{
1538 struct snd_cs4231 *chip = card->private_data;
1539 int err, idx;
1540
1541 if (snd_BUG_ON(!chip || !chip->pcm))
1542 return -EINVAL;
1543
1544 strcpy(card->mixername, chip->pcm->name);
1545
1546 for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
1547 err = snd_ctl_add(card,
1548 snd_ctl_new1(&snd_cs4231_controls[idx], chip));
1549 if (err < 0)
1550 return err;
1551 }
1552 return 0;
1553}
1554
1555static int dev;
1556
1557static int cs4231_attach_begin(struct platform_device *op,
1558 struct snd_card **rcard)
1559{
1560 struct snd_card *card;
1561 struct snd_cs4231 *chip;
1562 int err;
1563
1564 *rcard = NULL;
1565
1566 if (dev >= SNDRV_CARDS)
1567 return -ENODEV;
1568
1569 if (!enable[dev]) {
1570 dev++;
1571 return -ENOENT;
1572 }
1573
1574 err = snd_card_new(&op->dev, index[dev], id[dev], THIS_MODULE,
1575 sizeof(struct snd_cs4231), &card);
1576 if (err < 0)
1577 return err;
1578
1579 strcpy(card->driver, "CS4231");
1580 strcpy(card->shortname, "Sun CS4231");
1581
1582 chip = card->private_data;
1583 chip->card = card;
1584
1585 *rcard = card;
1586 return 0;
1587}
1588
1589static int cs4231_attach_finish(struct snd_card *card)
1590{
1591 struct snd_cs4231 *chip = card->private_data;
1592 int err;
1593
1594 err = snd_cs4231_pcm(card);
1595 if (err < 0)
1596 goto out_err;
1597
1598 err = snd_cs4231_mixer(card);
1599 if (err < 0)
1600 goto out_err;
1601
1602 err = snd_cs4231_timer(card);
1603 if (err < 0)
1604 goto out_err;
1605
1606 err = snd_card_register(card);
1607 if (err < 0)
1608 goto out_err;
1609
1610 dev_set_drvdata(&chip->op->dev, chip);
1611
1612 dev++;
1613 return 0;
1614
1615out_err:
1616 snd_card_free(card);
1617 return err;
1618}
1619
1620#ifdef SBUS_SUPPORT
1621
1622static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id)
1623{
1624 unsigned long flags;
1625 unsigned char status;
1626 u32 csr;
1627 struct snd_cs4231 *chip = dev_id;
1628
1629 /*This is IRQ is not raised by the cs4231*/
1630 if (!(__cs4231_readb(chip, CS4231U(chip, STATUS)) & CS4231_GLOBALIRQ))
1631 return IRQ_NONE;
1632
1633 /* ACK the APC interrupt. */
1634 csr = sbus_readl(chip->port + APCCSR);
1635
1636 sbus_writel(csr, chip->port + APCCSR);
1637
1638 if ((csr & APC_PDMA_READY) &&
1639 (csr & APC_PLAY_INT) &&
1640 (csr & APC_XINT_PNVA) &&
1641 !(csr & APC_XINT_EMPT))
1642 snd_cs4231_play_callback(chip);
1643
1644 if ((csr & APC_CDMA_READY) &&
1645 (csr & APC_CAPT_INT) &&
1646 (csr & APC_XINT_CNVA) &&
1647 !(csr & APC_XINT_EMPT))
1648 snd_cs4231_capture_callback(chip);
1649
1650 status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
1651
1652 if (status & CS4231_TIMER_IRQ) {
1653 if (chip->timer)
1654 snd_timer_interrupt(chip->timer, chip->timer->sticks);
1655 }
1656
1657 if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY))
1658 snd_cs4231_overrange(chip);
1659
1660 /* ACK the CS4231 interrupt. */
1661 spin_lock_irqsave(&chip->lock, flags);
1662 snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
1663 spin_unlock_irqrestore(&chip->lock, flags);
1664
1665 return IRQ_HANDLED;
1666}
1667
1668/*
1669 * SBUS DMA routines
1670 */
1671
1672static int sbus_dma_request(struct cs4231_dma_control *dma_cont,
1673 dma_addr_t bus_addr, size_t len)
1674{
1675 unsigned long flags;
1676 u32 test, csr;
1677 int err;
1678 struct sbus_dma_info *base = &dma_cont->sbus_info;
1679
1680 if (len >= (1 << 24))
1681 return -EINVAL;
1682 spin_lock_irqsave(&base->lock, flags);
1683 csr = sbus_readl(base->regs + APCCSR);
1684 err = -EINVAL;
1685 test = APC_CDMA_READY;
1686 if (base->dir == APC_PLAY)
1687 test = APC_PDMA_READY;
1688 if (!(csr & test))
1689 goto out;
1690 err = -EBUSY;
1691 test = APC_XINT_CNVA;
1692 if (base->dir == APC_PLAY)
1693 test = APC_XINT_PNVA;
1694 if (!(csr & test))
1695 goto out;
1696 err = 0;
1697 sbus_writel(bus_addr, base->regs + base->dir + APCNVA);
1698 sbus_writel(len, base->regs + base->dir + APCNC);
1699out:
1700 spin_unlock_irqrestore(&base->lock, flags);
1701 return err;
1702}
1703
1704static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d)
1705{
1706 unsigned long flags;
1707 u32 csr, test;
1708 struct sbus_dma_info *base = &dma_cont->sbus_info;
1709
1710 spin_lock_irqsave(&base->lock, flags);
1711 csr = sbus_readl(base->regs + APCCSR);
1712 test = APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA |
1713 APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL |
1714 APC_XINT_PENA;
1715 if (base->dir == APC_RECORD)
1716 test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA |
1717 APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL;
1718 csr |= test;
1719 sbus_writel(csr, base->regs + APCCSR);
1720 spin_unlock_irqrestore(&base->lock, flags);
1721}
1722
1723static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1724{
1725 unsigned long flags;
1726 u32 csr, shift;
1727 struct sbus_dma_info *base = &dma_cont->sbus_info;
1728
1729 spin_lock_irqsave(&base->lock, flags);
1730 if (!on) {
1731 sbus_writel(0, base->regs + base->dir + APCNC);
1732 sbus_writel(0, base->regs + base->dir + APCNVA);
1733 if (base->dir == APC_PLAY) {
1734 sbus_writel(0, base->regs + base->dir + APCC);
1735 sbus_writel(0, base->regs + base->dir + APCVA);
1736 }
1737
1738 udelay(1200);
1739 }
1740 csr = sbus_readl(base->regs + APCCSR);
1741 shift = 0;
1742 if (base->dir == APC_PLAY)
1743 shift = 1;
1744 if (on)
1745 csr &= ~(APC_CPAUSE << shift);
1746 else
1747 csr |= (APC_CPAUSE << shift);
1748 sbus_writel(csr, base->regs + APCCSR);
1749 if (on)
1750 csr |= (APC_CDMA_READY << shift);
1751 else
1752 csr &= ~(APC_CDMA_READY << shift);
1753 sbus_writel(csr, base->regs + APCCSR);
1754
1755 spin_unlock_irqrestore(&base->lock, flags);
1756}
1757
1758static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont)
1759{
1760 struct sbus_dma_info *base = &dma_cont->sbus_info;
1761
1762 return sbus_readl(base->regs + base->dir + APCVA);
1763}
1764
1765/*
1766 * Init and exit routines
1767 */
1768
1769static int snd_cs4231_sbus_free(struct snd_cs4231 *chip)
1770{
1771 struct platform_device *op = chip->op;
1772
1773 if (chip->irq[0])
1774 free_irq(chip->irq[0], chip);
1775
1776 if (chip->port)
1777 of_iounmap(&op->resource[0], chip->port, chip->regs_size);
1778
1779 return 0;
1780}
1781
1782static int snd_cs4231_sbus_dev_free(struct snd_device *device)
1783{
1784 struct snd_cs4231 *cp = device->device_data;
1785
1786 return snd_cs4231_sbus_free(cp);
1787}
1788
1789static struct snd_device_ops snd_cs4231_sbus_dev_ops = {
1790 .dev_free = snd_cs4231_sbus_dev_free,
1791};
1792
1793static int snd_cs4231_sbus_create(struct snd_card *card,
1794 struct platform_device *op,
1795 int dev)
1796{
1797 struct snd_cs4231 *chip = card->private_data;
1798 int err;
1799
1800 spin_lock_init(&chip->lock);
1801 spin_lock_init(&chip->c_dma.sbus_info.lock);
1802 spin_lock_init(&chip->p_dma.sbus_info.lock);
1803 mutex_init(&chip->mce_mutex);
1804 mutex_init(&chip->open_mutex);
1805 chip->op = op;
1806 chip->regs_size = resource_size(&op->resource[0]);
1807 memcpy(&chip->image, &snd_cs4231_original_image,
1808 sizeof(snd_cs4231_original_image));
1809
1810 chip->port = of_ioremap(&op->resource[0], 0,
1811 chip->regs_size, "cs4231");
1812 if (!chip->port) {
1813 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
1814 return -EIO;
1815 }
1816
1817 chip->c_dma.sbus_info.regs = chip->port;
1818 chip->p_dma.sbus_info.regs = chip->port;
1819 chip->c_dma.sbus_info.dir = APC_RECORD;
1820 chip->p_dma.sbus_info.dir = APC_PLAY;
1821
1822 chip->p_dma.prepare = sbus_dma_prepare;
1823 chip->p_dma.enable = sbus_dma_enable;
1824 chip->p_dma.request = sbus_dma_request;
1825 chip->p_dma.address = sbus_dma_addr;
1826
1827 chip->c_dma.prepare = sbus_dma_prepare;
1828 chip->c_dma.enable = sbus_dma_enable;
1829 chip->c_dma.request = sbus_dma_request;
1830 chip->c_dma.address = sbus_dma_addr;
1831
1832 if (request_irq(op->archdata.irqs[0], snd_cs4231_sbus_interrupt,
1833 IRQF_SHARED, "cs4231", chip)) {
1834 snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n",
1835 dev, op->archdata.irqs[0]);
1836 snd_cs4231_sbus_free(chip);
1837 return -EBUSY;
1838 }
1839 chip->irq[0] = op->archdata.irqs[0];
1840
1841 if (snd_cs4231_probe(chip) < 0) {
1842 snd_cs4231_sbus_free(chip);
1843 return -ENODEV;
1844 }
1845 snd_cs4231_init(chip);
1846
1847 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
1848 chip, &snd_cs4231_sbus_dev_ops)) < 0) {
1849 snd_cs4231_sbus_free(chip);
1850 return err;
1851 }
1852
1853 return 0;
1854}
1855
1856static int cs4231_sbus_probe(struct platform_device *op)
1857{
1858 struct resource *rp = &op->resource[0];
1859 struct snd_card *card;
1860 int err;
1861
1862 err = cs4231_attach_begin(op, &card);
1863 if (err)
1864 return err;
1865
1866 sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d",
1867 card->shortname,
1868 rp->flags & 0xffL,
1869 (unsigned long long)rp->start,
1870 op->archdata.irqs[0]);
1871
1872 err = snd_cs4231_sbus_create(card, op, dev);
1873 if (err < 0) {
1874 snd_card_free(card);
1875 return err;
1876 }
1877
1878 return cs4231_attach_finish(card);
1879}
1880#endif
1881
1882#ifdef EBUS_SUPPORT
1883
1884static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event,
1885 void *cookie)
1886{
1887 struct snd_cs4231 *chip = cookie;
1888
1889 snd_cs4231_play_callback(chip);
1890}
1891
1892static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p,
1893 int event, void *cookie)
1894{
1895 struct snd_cs4231 *chip = cookie;
1896
1897 snd_cs4231_capture_callback(chip);
1898}
1899
1900/*
1901 * EBUS DMA wrappers
1902 */
1903
1904static int _ebus_dma_request(struct cs4231_dma_control *dma_cont,
1905 dma_addr_t bus_addr, size_t len)
1906{
1907 return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len);
1908}
1909
1910static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1911{
1912 ebus_dma_enable(&dma_cont->ebus_info, on);
1913}
1914
1915static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir)
1916{
1917 ebus_dma_prepare(&dma_cont->ebus_info, dir);
1918}
1919
1920static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont)
1921{
1922 return ebus_dma_addr(&dma_cont->ebus_info);
1923}
1924
1925/*
1926 * Init and exit routines
1927 */
1928
1929static int snd_cs4231_ebus_free(struct snd_cs4231 *chip)
1930{
1931 struct platform_device *op = chip->op;
1932
1933 if (chip->c_dma.ebus_info.regs) {
1934 ebus_dma_unregister(&chip->c_dma.ebus_info);
1935 of_iounmap(&op->resource[2], chip->c_dma.ebus_info.regs, 0x10);
1936 }
1937 if (chip->p_dma.ebus_info.regs) {
1938 ebus_dma_unregister(&chip->p_dma.ebus_info);
1939 of_iounmap(&op->resource[1], chip->p_dma.ebus_info.regs, 0x10);
1940 }
1941
1942 if (chip->port)
1943 of_iounmap(&op->resource[0], chip->port, 0x10);
1944
1945 return 0;
1946}
1947
1948static int snd_cs4231_ebus_dev_free(struct snd_device *device)
1949{
1950 struct snd_cs4231 *cp = device->device_data;
1951
1952 return snd_cs4231_ebus_free(cp);
1953}
1954
1955static struct snd_device_ops snd_cs4231_ebus_dev_ops = {
1956 .dev_free = snd_cs4231_ebus_dev_free,
1957};
1958
1959static int snd_cs4231_ebus_create(struct snd_card *card,
1960 struct platform_device *op,
1961 int dev)
1962{
1963 struct snd_cs4231 *chip = card->private_data;
1964 int err;
1965
1966 spin_lock_init(&chip->lock);
1967 spin_lock_init(&chip->c_dma.ebus_info.lock);
1968 spin_lock_init(&chip->p_dma.ebus_info.lock);
1969 mutex_init(&chip->mce_mutex);
1970 mutex_init(&chip->open_mutex);
1971 chip->flags |= CS4231_FLAG_EBUS;
1972 chip->op = op;
1973 memcpy(&chip->image, &snd_cs4231_original_image,
1974 sizeof(snd_cs4231_original_image));
1975 strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)");
1976 chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
1977 chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback;
1978 chip->c_dma.ebus_info.client_cookie = chip;
1979 chip->c_dma.ebus_info.irq = op->archdata.irqs[0];
1980 strcpy(chip->p_dma.ebus_info.name, "cs4231(play)");
1981 chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
1982 chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback;
1983 chip->p_dma.ebus_info.client_cookie = chip;
1984 chip->p_dma.ebus_info.irq = op->archdata.irqs[1];
1985
1986 chip->p_dma.prepare = _ebus_dma_prepare;
1987 chip->p_dma.enable = _ebus_dma_enable;
1988 chip->p_dma.request = _ebus_dma_request;
1989 chip->p_dma.address = _ebus_dma_addr;
1990
1991 chip->c_dma.prepare = _ebus_dma_prepare;
1992 chip->c_dma.enable = _ebus_dma_enable;
1993 chip->c_dma.request = _ebus_dma_request;
1994 chip->c_dma.address = _ebus_dma_addr;
1995
1996 chip->port = of_ioremap(&op->resource[0], 0, 0x10, "cs4231");
1997 chip->p_dma.ebus_info.regs =
1998 of_ioremap(&op->resource[1], 0, 0x10, "cs4231_pdma");
1999 chip->c_dma.ebus_info.regs =
2000 of_ioremap(&op->resource[2], 0, 0x10, "cs4231_cdma");
2001 if (!chip->port || !chip->p_dma.ebus_info.regs ||
2002 !chip->c_dma.ebus_info.regs) {
2003 snd_cs4231_ebus_free(chip);
2004 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
2005 return -EIO;
2006 }
2007
2008 if (ebus_dma_register(&chip->c_dma.ebus_info)) {
2009 snd_cs4231_ebus_free(chip);
2010 snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n",
2011 dev);
2012 return -EBUSY;
2013 }
2014 if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) {
2015 snd_cs4231_ebus_free(chip);
2016 snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n",
2017 dev);
2018 return -EBUSY;
2019 }
2020
2021 if (ebus_dma_register(&chip->p_dma.ebus_info)) {
2022 snd_cs4231_ebus_free(chip);
2023 snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n",
2024 dev);
2025 return -EBUSY;
2026 }
2027 if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) {
2028 snd_cs4231_ebus_free(chip);
2029 snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev);
2030 return -EBUSY;
2031 }
2032
2033 if (snd_cs4231_probe(chip) < 0) {
2034 snd_cs4231_ebus_free(chip);
2035 return -ENODEV;
2036 }
2037 snd_cs4231_init(chip);
2038
2039 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2040 chip, &snd_cs4231_ebus_dev_ops)) < 0) {
2041 snd_cs4231_ebus_free(chip);
2042 return err;
2043 }
2044
2045 return 0;
2046}
2047
2048static int cs4231_ebus_probe(struct platform_device *op)
2049{
2050 struct snd_card *card;
2051 int err;
2052
2053 err = cs4231_attach_begin(op, &card);
2054 if (err)
2055 return err;
2056
2057 sprintf(card->longname, "%s at 0x%llx, irq %d",
2058 card->shortname,
2059 op->resource[0].start,
2060 op->archdata.irqs[0]);
2061
2062 err = snd_cs4231_ebus_create(card, op, dev);
2063 if (err < 0) {
2064 snd_card_free(card);
2065 return err;
2066 }
2067
2068 return cs4231_attach_finish(card);
2069}
2070#endif
2071
2072static int cs4231_probe(struct platform_device *op)
2073{
2074#ifdef EBUS_SUPPORT
2075 if (of_node_name_eq(op->dev.of_node->parent, "ebus"))
2076 return cs4231_ebus_probe(op);
2077#endif
2078#ifdef SBUS_SUPPORT
2079 if (of_node_name_eq(op->dev.of_node->parent, "sbus") ||
2080 of_node_name_eq(op->dev.of_node->parent, "sbi"))
2081 return cs4231_sbus_probe(op);
2082#endif
2083 return -ENODEV;
2084}
2085
2086static int cs4231_remove(struct platform_device *op)
2087{
2088 struct snd_cs4231 *chip = dev_get_drvdata(&op->dev);
2089
2090 snd_card_free(chip->card);
2091
2092 return 0;
2093}
2094
2095static const struct of_device_id cs4231_match[] = {
2096 {
2097 .name = "SUNW,CS4231",
2098 },
2099 {
2100 .name = "audio",
2101 .compatible = "SUNW,CS4231",
2102 },
2103 {},
2104};
2105
2106MODULE_DEVICE_TABLE(of, cs4231_match);
2107
2108static struct platform_driver cs4231_driver = {
2109 .driver = {
2110 .name = "audio",
2111 .of_match_table = cs4231_match,
2112 },
2113 .probe = cs4231_probe,
2114 .remove = cs4231_remove,
2115};
2116
2117module_platform_driver(cs4231_driver);