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1// SPDX-License-Identifier: GPL-2.0-or-later
2
3#include <linux/context_tracking.h>
4#include <linux/err.h>
5#include <linux/compat.h>
6#include <linux/sched/debug.h> /* for show_regs */
7
8#include <asm/asm-prototypes.h>
9#include <asm/kup.h>
10#include <asm/cputime.h>
11#include <asm/interrupt.h>
12#include <asm/hw_irq.h>
13#include <asm/interrupt.h>
14#include <asm/kprobes.h>
15#include <asm/paca.h>
16#include <asm/ptrace.h>
17#include <asm/reg.h>
18#include <asm/signal.h>
19#include <asm/switch_to.h>
20#include <asm/syscall.h>
21#include <asm/time.h>
22#include <asm/tm.h>
23#include <asm/unistd.h>
24
25#if defined(CONFIG_PPC_ADV_DEBUG_REGS) && defined(CONFIG_PPC32)
26unsigned long global_dbcr0[NR_CPUS];
27#endif
28
29typedef long (*syscall_fn)(long, long, long, long, long, long);
30
31#ifdef CONFIG_PPC_BOOK3S_64
32DEFINE_STATIC_KEY_FALSE(interrupt_exit_not_reentrant);
33static inline bool exit_must_hard_disable(void)
34{
35 return static_branch_unlikely(&interrupt_exit_not_reentrant);
36}
37#else
38static inline bool exit_must_hard_disable(void)
39{
40 return true;
41}
42#endif
43
44/*
45 * local irqs must be disabled. Returns false if the caller must re-enable
46 * them, check for new work, and try again.
47 *
48 * This should be called with local irqs disabled, but if they were previously
49 * enabled when the interrupt handler returns (indicating a process-context /
50 * synchronous interrupt) then irqs_enabled should be true.
51 *
52 * restartable is true then EE/RI can be left on because interrupts are handled
53 * with a restart sequence.
54 */
55static notrace __always_inline bool prep_irq_for_enabled_exit(bool restartable)
56{
57 /* This must be done with RI=1 because tracing may touch vmaps */
58 trace_hardirqs_on();
59
60 if (exit_must_hard_disable() || !restartable)
61 __hard_EE_RI_disable();
62
63#ifdef CONFIG_PPC64
64 /* This pattern matches prep_irq_for_idle */
65 if (unlikely(lazy_irq_pending_nocheck())) {
66 if (exit_must_hard_disable() || !restartable) {
67 local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
68 __hard_RI_enable();
69 }
70 trace_hardirqs_off();
71
72 return false;
73 }
74#endif
75 return true;
76}
77
78/* Has to run notrace because it is entered not completely "reconciled" */
79notrace long system_call_exception(long r3, long r4, long r5,
80 long r6, long r7, long r8,
81 unsigned long r0, struct pt_regs *regs)
82{
83 syscall_fn f;
84
85 kuep_lock();
86
87 regs->orig_gpr3 = r3;
88
89 if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG))
90 BUG_ON(irq_soft_mask_return() != IRQS_ALL_DISABLED);
91
92 trace_hardirqs_off(); /* finish reconciling */
93
94 CT_WARN_ON(ct_state() == CONTEXT_KERNEL);
95 user_exit_irqoff();
96
97 if (!IS_ENABLED(CONFIG_BOOKE) && !IS_ENABLED(CONFIG_40x))
98 BUG_ON(!(regs->msr & MSR_RI));
99 BUG_ON(!(regs->msr & MSR_PR));
100 BUG_ON(arch_irq_disabled_regs(regs));
101
102#ifdef CONFIG_PPC_PKEY
103 if (mmu_has_feature(MMU_FTR_PKEY)) {
104 unsigned long amr, iamr;
105 bool flush_needed = false;
106 /*
107 * When entering from userspace we mostly have the AMR/IAMR
108 * different from kernel default values. Hence don't compare.
109 */
110 amr = mfspr(SPRN_AMR);
111 iamr = mfspr(SPRN_IAMR);
112 regs->amr = amr;
113 regs->iamr = iamr;
114 if (mmu_has_feature(MMU_FTR_BOOK3S_KUAP)) {
115 mtspr(SPRN_AMR, AMR_KUAP_BLOCKED);
116 flush_needed = true;
117 }
118 if (mmu_has_feature(MMU_FTR_BOOK3S_KUEP)) {
119 mtspr(SPRN_IAMR, AMR_KUEP_BLOCKED);
120 flush_needed = true;
121 }
122 if (flush_needed)
123 isync();
124 } else
125#endif
126 kuap_assert_locked();
127
128 booke_restore_dbcr0();
129
130 account_cpu_user_entry();
131
132 account_stolen_time();
133
134 /*
135 * This is not required for the syscall exit path, but makes the
136 * stack frame look nicer. If this was initialised in the first stack
137 * frame, or if the unwinder was taught the first stack frame always
138 * returns to user with IRQS_ENABLED, this store could be avoided!
139 */
140 irq_soft_mask_regs_set_state(regs, IRQS_ENABLED);
141
142 /*
143 * If system call is called with TM active, set _TIF_RESTOREALL to
144 * prevent RFSCV being used to return to userspace, because POWER9
145 * TM implementation has problems with this instruction returning to
146 * transactional state. Final register values are not relevant because
147 * the transaction will be aborted upon return anyway. Or in the case
148 * of unsupported_scv SIGILL fault, the return state does not much
149 * matter because it's an edge case.
150 */
151 if (IS_ENABLED(CONFIG_PPC_TRANSACTIONAL_MEM) &&
152 unlikely(MSR_TM_TRANSACTIONAL(regs->msr)))
153 current_thread_info()->flags |= _TIF_RESTOREALL;
154
155 /*
156 * If the system call was made with a transaction active, doom it and
157 * return without performing the system call. Unless it was an
158 * unsupported scv vector, in which case it's treated like an illegal
159 * instruction.
160 */
161#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
162 if (unlikely(MSR_TM_TRANSACTIONAL(regs->msr)) &&
163 !trap_is_unsupported_scv(regs)) {
164 /* Enable TM in the kernel, and disable EE (for scv) */
165 hard_irq_disable();
166 mtmsr(mfmsr() | MSR_TM);
167
168 /* tabort, this dooms the transaction, nothing else */
169 asm volatile(".long 0x7c00071d | ((%0) << 16)"
170 :: "r"(TM_CAUSE_SYSCALL|TM_CAUSE_PERSISTENT));
171
172 /*
173 * Userspace will never see the return value. Execution will
174 * resume after the tbegin. of the aborted transaction with the
175 * checkpointed register state. A context switch could occur
176 * or signal delivered to the process before resuming the
177 * doomed transaction context, but that should all be handled
178 * as expected.
179 */
180 return -ENOSYS;
181 }
182#endif // CONFIG_PPC_TRANSACTIONAL_MEM
183
184 local_irq_enable();
185
186 if (unlikely(current_thread_info()->flags & _TIF_SYSCALL_DOTRACE)) {
187 if (unlikely(trap_is_unsupported_scv(regs))) {
188 /* Unsupported scv vector */
189 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
190 return regs->gpr[3];
191 }
192 /*
193 * We use the return value of do_syscall_trace_enter() as the
194 * syscall number. If the syscall was rejected for any reason
195 * do_syscall_trace_enter() returns an invalid syscall number
196 * and the test against NR_syscalls will fail and the return
197 * value to be used is in regs->gpr[3].
198 */
199 r0 = do_syscall_trace_enter(regs);
200 if (unlikely(r0 >= NR_syscalls))
201 return regs->gpr[3];
202 r3 = regs->gpr[3];
203 r4 = regs->gpr[4];
204 r5 = regs->gpr[5];
205 r6 = regs->gpr[6];
206 r7 = regs->gpr[7];
207 r8 = regs->gpr[8];
208
209 } else if (unlikely(r0 >= NR_syscalls)) {
210 if (unlikely(trap_is_unsupported_scv(regs))) {
211 /* Unsupported scv vector */
212 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
213 return regs->gpr[3];
214 }
215 return -ENOSYS;
216 }
217
218 /* May be faster to do array_index_nospec? */
219 barrier_nospec();
220
221 if (unlikely(is_compat_task())) {
222 f = (void *)compat_sys_call_table[r0];
223
224 r3 &= 0x00000000ffffffffULL;
225 r4 &= 0x00000000ffffffffULL;
226 r5 &= 0x00000000ffffffffULL;
227 r6 &= 0x00000000ffffffffULL;
228 r7 &= 0x00000000ffffffffULL;
229 r8 &= 0x00000000ffffffffULL;
230
231 } else {
232 f = (void *)sys_call_table[r0];
233 }
234
235 return f(r3, r4, r5, r6, r7, r8);
236}
237
238static notrace void booke_load_dbcr0(void)
239{
240#ifdef CONFIG_PPC_ADV_DEBUG_REGS
241 unsigned long dbcr0 = current->thread.debug.dbcr0;
242
243 if (likely(!(dbcr0 & DBCR0_IDM)))
244 return;
245
246 /*
247 * Check to see if the dbcr0 register is set up to debug.
248 * Use the internal debug mode bit to do this.
249 */
250 mtmsr(mfmsr() & ~MSR_DE);
251 if (IS_ENABLED(CONFIG_PPC32)) {
252 isync();
253 global_dbcr0[smp_processor_id()] = mfspr(SPRN_DBCR0);
254 }
255 mtspr(SPRN_DBCR0, dbcr0);
256 mtspr(SPRN_DBSR, -1);
257#endif
258}
259
260static void check_return_regs_valid(struct pt_regs *regs)
261{
262#ifdef CONFIG_PPC_BOOK3S_64
263 unsigned long trap, srr0, srr1;
264 static bool warned;
265 u8 *validp;
266 char *h;
267
268 if (trap_is_scv(regs))
269 return;
270
271 trap = regs->trap;
272 // EE in HV mode sets HSRRs like 0xea0
273 if (cpu_has_feature(CPU_FTR_HVMODE) && trap == INTERRUPT_EXTERNAL)
274 trap = 0xea0;
275
276 switch (trap) {
277 case 0x980:
278 case INTERRUPT_H_DATA_STORAGE:
279 case 0xe20:
280 case 0xe40:
281 case INTERRUPT_HMI:
282 case 0xe80:
283 case 0xea0:
284 case INTERRUPT_H_FAC_UNAVAIL:
285 case 0x1200:
286 case 0x1500:
287 case 0x1600:
288 case 0x1800:
289 validp = &local_paca->hsrr_valid;
290 if (!*validp)
291 return;
292
293 srr0 = mfspr(SPRN_HSRR0);
294 srr1 = mfspr(SPRN_HSRR1);
295 h = "H";
296
297 break;
298 default:
299 validp = &local_paca->srr_valid;
300 if (!*validp)
301 return;
302
303 srr0 = mfspr(SPRN_SRR0);
304 srr1 = mfspr(SPRN_SRR1);
305 h = "";
306 break;
307 }
308
309 if (srr0 == regs->nip && srr1 == regs->msr)
310 return;
311
312 /*
313 * A NMI / soft-NMI interrupt may have come in after we found
314 * srr_valid and before the SRRs are loaded. The interrupt then
315 * comes in and clobbers SRRs and clears srr_valid. Then we load
316 * the SRRs here and test them above and find they don't match.
317 *
318 * Test validity again after that, to catch such false positives.
319 *
320 * This test in general will have some window for false negatives
321 * and may not catch and fix all such cases if an NMI comes in
322 * later and clobbers SRRs without clearing srr_valid, but hopefully
323 * such things will get caught most of the time, statistically
324 * enough to be able to get a warning out.
325 */
326 barrier();
327
328 if (!*validp)
329 return;
330
331 if (!warned) {
332 warned = true;
333 printk("%sSRR0 was: %lx should be: %lx\n", h, srr0, regs->nip);
334 printk("%sSRR1 was: %lx should be: %lx\n", h, srr1, regs->msr);
335 show_regs(regs);
336 }
337
338 *validp = 0; /* fixup */
339#endif
340}
341
342static notrace unsigned long
343interrupt_exit_user_prepare_main(unsigned long ret, struct pt_regs *regs)
344{
345 unsigned long ti_flags;
346
347again:
348 ti_flags = READ_ONCE(current_thread_info()->flags);
349 while (unlikely(ti_flags & (_TIF_USER_WORK_MASK & ~_TIF_RESTORE_TM))) {
350 local_irq_enable();
351 if (ti_flags & _TIF_NEED_RESCHED) {
352 schedule();
353 } else {
354 /*
355 * SIGPENDING must restore signal handler function
356 * argument GPRs, and some non-volatiles (e.g., r1).
357 * Restore all for now. This could be made lighter.
358 */
359 if (ti_flags & _TIF_SIGPENDING)
360 ret |= _TIF_RESTOREALL;
361 do_notify_resume(regs, ti_flags);
362 }
363 local_irq_disable();
364 ti_flags = READ_ONCE(current_thread_info()->flags);
365 }
366
367 if (IS_ENABLED(CONFIG_PPC_BOOK3S_64) && IS_ENABLED(CONFIG_PPC_FPU)) {
368 if (IS_ENABLED(CONFIG_PPC_TRANSACTIONAL_MEM) &&
369 unlikely((ti_flags & _TIF_RESTORE_TM))) {
370 restore_tm_state(regs);
371 } else {
372 unsigned long mathflags = MSR_FP;
373
374 if (cpu_has_feature(CPU_FTR_VSX))
375 mathflags |= MSR_VEC | MSR_VSX;
376 else if (cpu_has_feature(CPU_FTR_ALTIVEC))
377 mathflags |= MSR_VEC;
378
379 /*
380 * If userspace MSR has all available FP bits set,
381 * then they are live and no need to restore. If not,
382 * it means the regs were given up and restore_math
383 * may decide to restore them (to avoid taking an FP
384 * fault).
385 */
386 if ((regs->msr & mathflags) != mathflags)
387 restore_math(regs);
388 }
389 }
390
391 check_return_regs_valid(regs);
392
393 user_enter_irqoff();
394 if (!prep_irq_for_enabled_exit(true)) {
395 user_exit_irqoff();
396 local_irq_enable();
397 local_irq_disable();
398 goto again;
399 }
400
401#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
402 local_paca->tm_scratch = regs->msr;
403#endif
404
405 booke_load_dbcr0();
406
407 account_cpu_user_exit();
408
409 /* Restore user access locks last */
410 kuap_user_restore(regs);
411 kuep_unlock();
412
413 return ret;
414}
415
416/*
417 * This should be called after a syscall returns, with r3 the return value
418 * from the syscall. If this function returns non-zero, the system call
419 * exit assembly should additionally load all GPR registers and CTR and XER
420 * from the interrupt frame.
421 *
422 * The function graph tracer can not trace the return side of this function,
423 * because RI=0 and soft mask state is "unreconciled", so it is marked notrace.
424 */
425notrace unsigned long syscall_exit_prepare(unsigned long r3,
426 struct pt_regs *regs,
427 long scv)
428{
429 unsigned long ti_flags;
430 unsigned long ret = 0;
431 bool is_not_scv = !IS_ENABLED(CONFIG_PPC_BOOK3S_64) || !scv;
432
433 CT_WARN_ON(ct_state() == CONTEXT_USER);
434
435 kuap_assert_locked();
436
437 regs->result = r3;
438
439 /* Check whether the syscall is issued inside a restartable sequence */
440 rseq_syscall(regs);
441
442 ti_flags = current_thread_info()->flags;
443
444 if (unlikely(r3 >= (unsigned long)-MAX_ERRNO) && is_not_scv) {
445 if (likely(!(ti_flags & (_TIF_NOERROR | _TIF_RESTOREALL)))) {
446 r3 = -r3;
447 regs->ccr |= 0x10000000; /* Set SO bit in CR */
448 }
449 }
450
451 if (unlikely(ti_flags & _TIF_PERSYSCALL_MASK)) {
452 if (ti_flags & _TIF_RESTOREALL)
453 ret = _TIF_RESTOREALL;
454 else
455 regs->gpr[3] = r3;
456 clear_bits(_TIF_PERSYSCALL_MASK, ¤t_thread_info()->flags);
457 } else {
458 regs->gpr[3] = r3;
459 }
460
461 if (unlikely(ti_flags & _TIF_SYSCALL_DOTRACE)) {
462 do_syscall_trace_leave(regs);
463 ret |= _TIF_RESTOREALL;
464 }
465
466 local_irq_disable();
467 ret = interrupt_exit_user_prepare_main(ret, regs);
468
469#ifdef CONFIG_PPC64
470 regs->exit_result = ret;
471#endif
472
473 return ret;
474}
475
476#ifdef CONFIG_PPC64
477notrace unsigned long syscall_exit_restart(unsigned long r3, struct pt_regs *regs)
478{
479 /*
480 * This is called when detecting a soft-pending interrupt as well as
481 * an alternate-return interrupt. So we can't just have the alternate
482 * return path clear SRR1[MSR] and set PACA_IRQ_HARD_DIS (unless
483 * the soft-pending case were to fix things up as well). RI might be
484 * disabled, in which case it gets re-enabled by __hard_irq_disable().
485 */
486 __hard_irq_disable();
487 local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
488
489#ifdef CONFIG_PPC_BOOK3S_64
490 set_kuap(AMR_KUAP_BLOCKED);
491#endif
492
493 trace_hardirqs_off();
494 user_exit_irqoff();
495 account_cpu_user_entry();
496
497 BUG_ON(!user_mode(regs));
498
499 regs->exit_result = interrupt_exit_user_prepare_main(regs->exit_result, regs);
500
501 return regs->exit_result;
502}
503#endif
504
505notrace unsigned long interrupt_exit_user_prepare(struct pt_regs *regs)
506{
507 unsigned long ret;
508
509 if (!IS_ENABLED(CONFIG_BOOKE) && !IS_ENABLED(CONFIG_40x))
510 BUG_ON(!(regs->msr & MSR_RI));
511 BUG_ON(!(regs->msr & MSR_PR));
512 BUG_ON(arch_irq_disabled_regs(regs));
513 CT_WARN_ON(ct_state() == CONTEXT_USER);
514
515 /*
516 * We don't need to restore AMR on the way back to userspace for KUAP.
517 * AMR can only have been unlocked if we interrupted the kernel.
518 */
519 kuap_assert_locked();
520
521 local_irq_disable();
522
523 ret = interrupt_exit_user_prepare_main(0, regs);
524
525#ifdef CONFIG_PPC64
526 regs->exit_result = ret;
527#endif
528
529 return ret;
530}
531
532void preempt_schedule_irq(void);
533
534notrace unsigned long interrupt_exit_kernel_prepare(struct pt_regs *regs)
535{
536 unsigned long flags;
537 unsigned long ret = 0;
538 unsigned long kuap;
539 bool stack_store = current_thread_info()->flags &
540 _TIF_EMULATE_STACK_STORE;
541
542 if (!IS_ENABLED(CONFIG_BOOKE) && !IS_ENABLED(CONFIG_40x) &&
543 unlikely(!(regs->msr & MSR_RI)))
544 unrecoverable_exception(regs);
545 BUG_ON(regs->msr & MSR_PR);
546 /*
547 * CT_WARN_ON comes here via program_check_exception,
548 * so avoid recursion.
549 */
550 if (TRAP(regs) != INTERRUPT_PROGRAM)
551 CT_WARN_ON(ct_state() == CONTEXT_USER);
552
553 kuap = kuap_get_and_assert_locked();
554
555 local_irq_save(flags);
556
557 if (!arch_irq_disabled_regs(regs)) {
558 /* Returning to a kernel context with local irqs enabled. */
559 WARN_ON_ONCE(!(regs->msr & MSR_EE));
560again:
561 if (IS_ENABLED(CONFIG_PREEMPT)) {
562 /* Return to preemptible kernel context */
563 if (unlikely(current_thread_info()->flags & _TIF_NEED_RESCHED)) {
564 if (preempt_count() == 0)
565 preempt_schedule_irq();
566 }
567 }
568
569 check_return_regs_valid(regs);
570
571 /*
572 * Stack store exit can't be restarted because the interrupt
573 * stack frame might have been clobbered.
574 */
575 if (!prep_irq_for_enabled_exit(unlikely(stack_store))) {
576 /*
577 * Replay pending soft-masked interrupts now. Don't
578 * just local_irq_enabe(); local_irq_disable(); because
579 * if we are returning from an asynchronous interrupt
580 * here, another one might hit after irqs are enabled,
581 * and it would exit via this same path allowing
582 * another to fire, and so on unbounded.
583 */
584 hard_irq_disable();
585 replay_soft_interrupts();
586 /* Took an interrupt, may have more exit work to do. */
587 goto again;
588 }
589#ifdef CONFIG_PPC64
590 /*
591 * An interrupt may clear MSR[EE] and set this concurrently,
592 * but it will be marked pending and the exit will be retried.
593 * This leaves a racy window where MSR[EE]=0 and HARD_DIS is
594 * clear, until interrupt_exit_kernel_restart() calls
595 * hard_irq_disable(), which will set HARD_DIS again.
596 */
597 local_paca->irq_happened &= ~PACA_IRQ_HARD_DIS;
598
599 } else {
600 check_return_regs_valid(regs);
601
602 if (unlikely(stack_store))
603 __hard_EE_RI_disable();
604 /*
605 * Returning to a kernel context with local irqs disabled.
606 * Here, if EE was enabled in the interrupted context, enable
607 * it on return as well. A problem exists here where a soft
608 * masked interrupt may have cleared MSR[EE] and set HARD_DIS
609 * here, and it will still exist on return to the caller. This
610 * will be resolved by the masked interrupt firing again.
611 */
612 if (regs->msr & MSR_EE)
613 local_paca->irq_happened &= ~PACA_IRQ_HARD_DIS;
614#endif /* CONFIG_PPC64 */
615 }
616
617 if (unlikely(stack_store)) {
618 clear_bits(_TIF_EMULATE_STACK_STORE, ¤t_thread_info()->flags);
619 ret = 1;
620 }
621
622#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
623 local_paca->tm_scratch = regs->msr;
624#endif
625
626 /*
627 * 64s does not want to mfspr(SPRN_AMR) here, because this comes after
628 * mtmsr, which would cause Read-After-Write stalls. Hence, take the
629 * AMR value from the check above.
630 */
631 kuap_kernel_restore(regs, kuap);
632
633 return ret;
634}
635
636#ifdef CONFIG_PPC64
637notrace unsigned long interrupt_exit_user_restart(struct pt_regs *regs)
638{
639 __hard_irq_disable();
640 local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
641
642#ifdef CONFIG_PPC_BOOK3S_64
643 set_kuap(AMR_KUAP_BLOCKED);
644#endif
645
646 trace_hardirqs_off();
647 user_exit_irqoff();
648 account_cpu_user_entry();
649
650 BUG_ON(!user_mode(regs));
651
652 regs->exit_result |= interrupt_exit_user_prepare(regs);
653
654 return regs->exit_result;
655}
656
657/*
658 * No real need to return a value here because the stack store case does not
659 * get restarted.
660 */
661notrace unsigned long interrupt_exit_kernel_restart(struct pt_regs *regs)
662{
663 __hard_irq_disable();
664 local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
665
666#ifdef CONFIG_PPC_BOOK3S_64
667 set_kuap(AMR_KUAP_BLOCKED);
668#endif
669
670 if (regs->softe == IRQS_ENABLED)
671 trace_hardirqs_off();
672
673 BUG_ON(user_mode(regs));
674
675 return interrupt_exit_kernel_prepare(regs);
676}
677#endif