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v5.14.15
 1// SPDX-License-Identifier: GPL-2.0-or-later
 2/*
 3 *  Cobalt time initialization.
 4 *
 5 *  Copyright (C) 2007  Yoichi Yuasa <yuasa@linux-mips.org>
 6 */
 7#include <linux/i8253.h>
 8#include <linux/init.h>
 9
10#include <asm/gt64120.h>
11#include <asm/time.h>
12
13#define GT641XX_BASE_CLOCK	50000000	/* 50MHz */
14
15void __init plat_time_init(void)
16{
17	u32 start, end;
18	int i = HZ / 10;
19
20	setup_pit_timer();
21
22	gt641xx_set_base_clock(GT641XX_BASE_CLOCK);
23
24	/*
25	 * MIPS counter frequency is measured during a 100msec interval
26	 * using GT64111 timer0.
27	 */
28	while (!gt641xx_timer0_state())
29		;
30
31	start = read_c0_count();
32
33	while (i--)
34		while (!gt641xx_timer0_state())
35			;
36
37	end = read_c0_count();
38
39	mips_hpt_frequency = (end - start) * 10;
40	printk(KERN_INFO "MIPS counter frequency %dHz\n", mips_hpt_frequency);
41}
v5.4
 1// SPDX-License-Identifier: GPL-2.0-or-later
 2/*
 3 *  Cobalt time initialization.
 4 *
 5 *  Copyright (C) 2007  Yoichi Yuasa <yuasa@linux-mips.org>
 6 */
 7#include <linux/i8253.h>
 8#include <linux/init.h>
 9
10#include <asm/gt64120.h>
11#include <asm/time.h>
12
13#define GT641XX_BASE_CLOCK	50000000	/* 50MHz */
14
15void __init plat_time_init(void)
16{
17	u32 start, end;
18	int i = HZ / 10;
19
20	setup_pit_timer();
21
22	gt641xx_set_base_clock(GT641XX_BASE_CLOCK);
23
24	/*
25	 * MIPS counter frequency is measured during a 100msec interval
26	 * using GT64111 timer0.
27	 */
28	while (!gt641xx_timer0_state())
29		;
30
31	start = read_c0_count();
32
33	while (i--)
34		while (!gt641xx_timer0_state())
35			;
36
37	end = read_c0_count();
38
39	mips_hpt_frequency = (end - start) * 10;
40	printk(KERN_INFO "MIPS counter frequency %dHz\n", mips_hpt_frequency);
41}