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1# SPDX-License-Identifier: GPL-2.0
2config MIPS
3 bool
4 default y
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
8 select ARCH_HAS_FORTIFY_SOURCE
9 select ARCH_HAS_KCOV
10 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
11 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
12 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
13 select ARCH_HAS_UBSAN_SANITIZE_ALL
14 select ARCH_HAS_GCOV_PROFILE_ALL
15 select ARCH_KEEP_MEMBLOCK
16 select ARCH_SUPPORTS_UPROBES
17 select ARCH_USE_BUILTIN_BSWAP
18 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
19 select ARCH_USE_MEMTEST
20 select ARCH_USE_QUEUED_RWLOCKS
21 select ARCH_USE_QUEUED_SPINLOCKS
22 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
23 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
24 select ARCH_WANT_IPC_PARSE_VERSION
25 select ARCH_WANT_LD_ORPHAN_WARN
26 select BUILDTIME_TABLE_SORT
27 select CLONE_BACKWARDS
28 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
29 select CPU_PM if CPU_IDLE
30 select GENERIC_ATOMIC64 if !64BIT
31 select GENERIC_CMOS_UPDATE
32 select GENERIC_CPU_AUTOPROBE
33 select GENERIC_FIND_FIRST_BIT
34 select GENERIC_GETTIMEOFDAY
35 select GENERIC_IOMAP
36 select GENERIC_IRQ_PROBE
37 select GENERIC_IRQ_SHOW
38 select GENERIC_ISA_DMA if EISA
39 select GENERIC_LIB_ASHLDI3
40 select GENERIC_LIB_ASHRDI3
41 select GENERIC_LIB_CMPDI2
42 select GENERIC_LIB_LSHRDI3
43 select GENERIC_LIB_UCMPDI2
44 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
45 select GENERIC_SMP_IDLE_THREAD
46 select GENERIC_TIME_VSYSCALL
47 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
48 select HANDLE_DOMAIN_IRQ
49 select HAVE_ARCH_COMPILER_H
50 select HAVE_ARCH_JUMP_LABEL
51 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
52 select HAVE_ARCH_MMAP_RND_BITS if MMU
53 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
54 select HAVE_ARCH_SECCOMP_FILTER
55 select HAVE_ARCH_TRACEHOOK
56 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
57 select HAVE_ASM_MODVERSIONS
58 select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
59 select HAVE_CONTEXT_TRACKING
60 select HAVE_TIF_NOHZ
61 select HAVE_C_RECORDMCOUNT
62 select HAVE_DEBUG_KMEMLEAK
63 select HAVE_DEBUG_STACKOVERFLOW
64 select HAVE_DMA_CONTIGUOUS
65 select HAVE_DYNAMIC_FTRACE
66 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
67 select HAVE_EXIT_THREAD
68 select HAVE_FAST_GUP
69 select HAVE_FTRACE_MCOUNT_RECORD
70 select HAVE_FUNCTION_GRAPH_TRACER
71 select HAVE_FUNCTION_TRACER
72 select HAVE_GCC_PLUGINS
73 select HAVE_GENERIC_VDSO
74 select HAVE_IOREMAP_PROT
75 select HAVE_IRQ_EXIT_ON_IRQ_STACK
76 select HAVE_IRQ_TIME_ACCOUNTING
77 select HAVE_KPROBES
78 select HAVE_KRETPROBES
79 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
80 select HAVE_MOD_ARCH_SPECIFIC
81 select HAVE_NMI
82 select HAVE_PERF_EVENTS
83 select HAVE_PERF_REGS
84 select HAVE_PERF_USER_STACK_DUMP
85 select HAVE_REGS_AND_STACK_ACCESS_API
86 select HAVE_RSEQ
87 select HAVE_SPARSE_SYSCALL_NR
88 select HAVE_STACKPROTECTOR
89 select HAVE_SYSCALL_TRACEPOINTS
90 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
91 select IRQ_FORCED_THREADING
92 select ISA if EISA
93 select MODULES_USE_ELF_REL if MODULES
94 select MODULES_USE_ELF_RELA if MODULES && 64BIT
95 select PERF_USE_VMALLOC
96 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
97 select RTC_LIB
98 select SYSCTL_EXCEPTION_TRACE
99 select VIRT_TO_BUS
100 select ARCH_HAS_ELFCORE_COMPAT
101
102config MIPS_FIXUP_BIGPHYS_ADDR
103 bool
104
105config MIPS_GENERIC
106 bool
107
108config MACH_INGENIC
109 bool
110 select SYS_SUPPORTS_32BIT_KERNEL
111 select SYS_SUPPORTS_LITTLE_ENDIAN
112 select SYS_SUPPORTS_ZBOOT
113 select DMA_NONCOHERENT
114 select ARCH_HAS_SYNC_DMA_FOR_CPU
115 select IRQ_MIPS_CPU
116 select PINCTRL
117 select GPIOLIB
118 select COMMON_CLK
119 select GENERIC_IRQ_CHIP
120 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
121 select USE_OF
122 select CPU_SUPPORTS_CPUFREQ
123 select MIPS_EXTERNAL_TIMER
124
125menu "Machine selection"
126
127choice
128 prompt "System type"
129 default MIPS_GENERIC_KERNEL
130
131config MIPS_GENERIC_KERNEL
132 bool "Generic board-agnostic MIPS kernel"
133 select ARCH_HAS_SETUP_DMA_OPS
134 select MIPS_GENERIC
135 select BOOT_RAW
136 select BUILTIN_DTB
137 select CEVT_R4K
138 select CLKSRC_MIPS_GIC
139 select COMMON_CLK
140 select CPU_MIPSR2_IRQ_EI
141 select CPU_MIPSR2_IRQ_VI
142 select CSRC_R4K
143 select DMA_NONCOHERENT
144 select HAVE_PCI
145 select IRQ_MIPS_CPU
146 select MIPS_AUTO_PFN_OFFSET
147 select MIPS_CPU_SCACHE
148 select MIPS_GIC
149 select MIPS_L1_CACHE_SHIFT_7
150 select NO_EXCEPT_FILL
151 select PCI_DRIVERS_GENERIC
152 select SMP_UP if SMP
153 select SWAP_IO_SPACE
154 select SYS_HAS_CPU_MIPS32_R1
155 select SYS_HAS_CPU_MIPS32_R2
156 select SYS_HAS_CPU_MIPS32_R6
157 select SYS_HAS_CPU_MIPS64_R1
158 select SYS_HAS_CPU_MIPS64_R2
159 select SYS_HAS_CPU_MIPS64_R6
160 select SYS_SUPPORTS_32BIT_KERNEL
161 select SYS_SUPPORTS_64BIT_KERNEL
162 select SYS_SUPPORTS_BIG_ENDIAN
163 select SYS_SUPPORTS_HIGHMEM
164 select SYS_SUPPORTS_LITTLE_ENDIAN
165 select SYS_SUPPORTS_MICROMIPS
166 select SYS_SUPPORTS_MIPS16
167 select SYS_SUPPORTS_MIPS_CPS
168 select SYS_SUPPORTS_MULTITHREADING
169 select SYS_SUPPORTS_RELOCATABLE
170 select SYS_SUPPORTS_SMARTMIPS
171 select SYS_SUPPORTS_ZBOOT
172 select UHI_BOOT
173 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
174 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
175 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
176 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
177 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
178 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
179 select USE_OF
180 help
181 Select this to build a kernel which aims to support multiple boards,
182 generally using a flattened device tree passed from the bootloader
183 using the boot protocol defined in the UHI (Unified Hosting
184 Interface) specification.
185
186config MIPS_ALCHEMY
187 bool "Alchemy processor based machines"
188 select PHYS_ADDR_T_64BIT
189 select CEVT_R4K
190 select CSRC_R4K
191 select IRQ_MIPS_CPU
192 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
193 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
194 select SYS_HAS_CPU_MIPS32_R1
195 select SYS_SUPPORTS_32BIT_KERNEL
196 select SYS_SUPPORTS_APM_EMULATION
197 select GPIOLIB
198 select SYS_SUPPORTS_ZBOOT
199 select COMMON_CLK
200
201config AR7
202 bool "Texas Instruments AR7"
203 select BOOT_ELF32
204 select COMMON_CLK
205 select DMA_NONCOHERENT
206 select CEVT_R4K
207 select CSRC_R4K
208 select IRQ_MIPS_CPU
209 select NO_EXCEPT_FILL
210 select SWAP_IO_SPACE
211 select SYS_HAS_CPU_MIPS32_R1
212 select SYS_HAS_EARLY_PRINTK
213 select SYS_SUPPORTS_32BIT_KERNEL
214 select SYS_SUPPORTS_LITTLE_ENDIAN
215 select SYS_SUPPORTS_MIPS16
216 select SYS_SUPPORTS_ZBOOT_UART16550
217 select GPIOLIB
218 select VLYNQ
219 help
220 Support for the Texas Instruments AR7 System-on-a-Chip
221 family: TNETD7100, 7200 and 7300.
222
223config ATH25
224 bool "Atheros AR231x/AR531x SoC support"
225 select CEVT_R4K
226 select CSRC_R4K
227 select DMA_NONCOHERENT
228 select IRQ_MIPS_CPU
229 select IRQ_DOMAIN
230 select SYS_HAS_CPU_MIPS32_R1
231 select SYS_SUPPORTS_BIG_ENDIAN
232 select SYS_SUPPORTS_32BIT_KERNEL
233 select SYS_HAS_EARLY_PRINTK
234 help
235 Support for Atheros AR231x and Atheros AR531x based boards
236
237config ATH79
238 bool "Atheros AR71XX/AR724X/AR913X based boards"
239 select ARCH_HAS_RESET_CONTROLLER
240 select BOOT_RAW
241 select CEVT_R4K
242 select CSRC_R4K
243 select DMA_NONCOHERENT
244 select GPIOLIB
245 select PINCTRL
246 select COMMON_CLK
247 select IRQ_MIPS_CPU
248 select SYS_HAS_CPU_MIPS32_R2
249 select SYS_HAS_EARLY_PRINTK
250 select SYS_SUPPORTS_32BIT_KERNEL
251 select SYS_SUPPORTS_BIG_ENDIAN
252 select SYS_SUPPORTS_MIPS16
253 select SYS_SUPPORTS_ZBOOT_UART_PROM
254 select USE_OF
255 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
256 help
257 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
258
259config BMIPS_GENERIC
260 bool "Broadcom Generic BMIPS kernel"
261 select ARCH_HAS_RESET_CONTROLLER
262 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
263 select ARCH_HAS_PHYS_TO_DMA
264 select BOOT_RAW
265 select NO_EXCEPT_FILL
266 select USE_OF
267 select CEVT_R4K
268 select CSRC_R4K
269 select SYNC_R4K
270 select COMMON_CLK
271 select BCM6345_L1_IRQ
272 select BCM7038_L1_IRQ
273 select BCM7120_L2_IRQ
274 select BRCMSTB_L2_IRQ
275 select IRQ_MIPS_CPU
276 select DMA_NONCOHERENT
277 select SYS_SUPPORTS_32BIT_KERNEL
278 select SYS_SUPPORTS_LITTLE_ENDIAN
279 select SYS_SUPPORTS_BIG_ENDIAN
280 select SYS_SUPPORTS_HIGHMEM
281 select SYS_HAS_CPU_BMIPS32_3300
282 select SYS_HAS_CPU_BMIPS4350
283 select SYS_HAS_CPU_BMIPS4380
284 select SYS_HAS_CPU_BMIPS5000
285 select SWAP_IO_SPACE
286 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
287 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
288 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
289 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
290 select HARDIRQS_SW_RESEND
291 help
292 Build a generic DT-based kernel image that boots on select
293 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
294 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
295 must be set appropriately for your board.
296
297config BCM47XX
298 bool "Broadcom BCM47XX based boards"
299 select BOOT_RAW
300 select CEVT_R4K
301 select CSRC_R4K
302 select DMA_NONCOHERENT
303 select HAVE_PCI
304 select IRQ_MIPS_CPU
305 select SYS_HAS_CPU_MIPS32_R1
306 select NO_EXCEPT_FILL
307 select SYS_SUPPORTS_32BIT_KERNEL
308 select SYS_SUPPORTS_LITTLE_ENDIAN
309 select SYS_SUPPORTS_MIPS16
310 select SYS_SUPPORTS_ZBOOT
311 select SYS_HAS_EARLY_PRINTK
312 select USE_GENERIC_EARLY_PRINTK_8250
313 select GPIOLIB
314 select LEDS_GPIO_REGISTER
315 select BCM47XX_NVRAM
316 select BCM47XX_SPROM
317 select BCM47XX_SSB if !BCM47XX_BCMA
318 help
319 Support for BCM47XX based boards
320
321config BCM63XX
322 bool "Broadcom BCM63XX based boards"
323 select BOOT_RAW
324 select CEVT_R4K
325 select CSRC_R4K
326 select SYNC_R4K
327 select DMA_NONCOHERENT
328 select IRQ_MIPS_CPU
329 select SYS_SUPPORTS_32BIT_KERNEL
330 select SYS_SUPPORTS_BIG_ENDIAN
331 select SYS_HAS_EARLY_PRINTK
332 select SWAP_IO_SPACE
333 select GPIOLIB
334 select MIPS_L1_CACHE_SHIFT_4
335 select HAVE_LEGACY_CLK
336 help
337 Support for BCM63XX based boards
338
339config MIPS_COBALT
340 bool "Cobalt Server"
341 select CEVT_R4K
342 select CSRC_R4K
343 select CEVT_GT641XX
344 select DMA_NONCOHERENT
345 select FORCE_PCI
346 select I8253
347 select I8259
348 select IRQ_MIPS_CPU
349 select IRQ_GT641XX
350 select PCI_GT64XXX_PCI0
351 select SYS_HAS_CPU_NEVADA
352 select SYS_HAS_EARLY_PRINTK
353 select SYS_SUPPORTS_32BIT_KERNEL
354 select SYS_SUPPORTS_64BIT_KERNEL
355 select SYS_SUPPORTS_LITTLE_ENDIAN
356 select USE_GENERIC_EARLY_PRINTK_8250
357
358config MACH_DECSTATION
359 bool "DECstations"
360 select BOOT_ELF32
361 select CEVT_DS1287
362 select CEVT_R4K if CPU_R4X00
363 select CSRC_IOASIC
364 select CSRC_R4K if CPU_R4X00
365 select CPU_DADDI_WORKAROUNDS if 64BIT
366 select CPU_R4000_WORKAROUNDS if 64BIT
367 select CPU_R4400_WORKAROUNDS if 64BIT
368 select DMA_NONCOHERENT
369 select NO_IOPORT_MAP
370 select IRQ_MIPS_CPU
371 select SYS_HAS_CPU_R3000
372 select SYS_HAS_CPU_R4X00
373 select SYS_SUPPORTS_32BIT_KERNEL
374 select SYS_SUPPORTS_64BIT_KERNEL
375 select SYS_SUPPORTS_LITTLE_ENDIAN
376 select SYS_SUPPORTS_128HZ
377 select SYS_SUPPORTS_256HZ
378 select SYS_SUPPORTS_1024HZ
379 select MIPS_L1_CACHE_SHIFT_4
380 help
381 This enables support for DEC's MIPS based workstations. For details
382 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
383 DECstation porting pages on <http://decstation.unix-ag.org/>.
384
385 If you have one of the following DECstation Models you definitely
386 want to choose R4xx0 for the CPU Type:
387
388 DECstation 5000/50
389 DECstation 5000/150
390 DECstation 5000/260
391 DECsystem 5900/260
392
393 otherwise choose R3000.
394
395config MACH_JAZZ
396 bool "Jazz family of machines"
397 select ARC_MEMORY
398 select ARC_PROMLIB
399 select ARCH_MIGHT_HAVE_PC_PARPORT
400 select ARCH_MIGHT_HAVE_PC_SERIO
401 select DMA_OPS
402 select FW_ARC
403 select FW_ARC32
404 select ARCH_MAY_HAVE_PC_FDC
405 select CEVT_R4K
406 select CSRC_R4K
407 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
408 select GENERIC_ISA_DMA
409 select HAVE_PCSPKR_PLATFORM
410 select IRQ_MIPS_CPU
411 select I8253
412 select I8259
413 select ISA
414 select SYS_HAS_CPU_R4X00
415 select SYS_SUPPORTS_32BIT_KERNEL
416 select SYS_SUPPORTS_64BIT_KERNEL
417 select SYS_SUPPORTS_100HZ
418 select SYS_SUPPORTS_LITTLE_ENDIAN
419 help
420 This a family of machines based on the MIPS R4030 chipset which was
421 used by several vendors to build RISC/os and Windows NT workstations.
422 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
423 Olivetti M700-10 workstations.
424
425config MACH_INGENIC_SOC
426 bool "Ingenic SoC based machines"
427 select MIPS_GENERIC
428 select MACH_INGENIC
429 select SYS_SUPPORTS_ZBOOT_UART16550
430 select CPU_SUPPORTS_CPUFREQ
431 select MIPS_EXTERNAL_TIMER
432
433config LANTIQ
434 bool "Lantiq based platforms"
435 select DMA_NONCOHERENT
436 select IRQ_MIPS_CPU
437 select CEVT_R4K
438 select CSRC_R4K
439 select SYS_HAS_CPU_MIPS32_R1
440 select SYS_HAS_CPU_MIPS32_R2
441 select SYS_SUPPORTS_BIG_ENDIAN
442 select SYS_SUPPORTS_32BIT_KERNEL
443 select SYS_SUPPORTS_MIPS16
444 select SYS_SUPPORTS_MULTITHREADING
445 select SYS_SUPPORTS_VPE_LOADER
446 select SYS_HAS_EARLY_PRINTK
447 select GPIOLIB
448 select SWAP_IO_SPACE
449 select BOOT_RAW
450 select HAVE_LEGACY_CLK
451 select USE_OF
452 select PINCTRL
453 select PINCTRL_LANTIQ
454 select ARCH_HAS_RESET_CONTROLLER
455 select RESET_CONTROLLER
456
457config MACH_LOONGSON32
458 bool "Loongson 32-bit family of machines"
459 select SYS_SUPPORTS_ZBOOT
460 help
461 This enables support for the Loongson-1 family of machines.
462
463 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
464 the Institute of Computing Technology (ICT), Chinese Academy of
465 Sciences (CAS).
466
467config MACH_LOONGSON2EF
468 bool "Loongson-2E/F family of machines"
469 select SYS_SUPPORTS_ZBOOT
470 help
471 This enables the support of early Loongson-2E/F family of machines.
472
473config MACH_LOONGSON64
474 bool "Loongson 64-bit family of machines"
475 select ARCH_SPARSEMEM_ENABLE
476 select ARCH_MIGHT_HAVE_PC_PARPORT
477 select ARCH_MIGHT_HAVE_PC_SERIO
478 select GENERIC_ISA_DMA_SUPPORT_BROKEN
479 select BOOT_ELF32
480 select BOARD_SCACHE
481 select CSRC_R4K
482 select CEVT_R4K
483 select CPU_HAS_WB
484 select FORCE_PCI
485 select ISA
486 select I8259
487 select IRQ_MIPS_CPU
488 select NO_EXCEPT_FILL
489 select NR_CPUS_DEFAULT_64
490 select USE_GENERIC_EARLY_PRINTK_8250
491 select PCI_DRIVERS_GENERIC
492 select SYS_HAS_CPU_LOONGSON64
493 select SYS_HAS_EARLY_PRINTK
494 select SYS_SUPPORTS_SMP
495 select SYS_SUPPORTS_HOTPLUG_CPU
496 select SYS_SUPPORTS_NUMA
497 select SYS_SUPPORTS_64BIT_KERNEL
498 select SYS_SUPPORTS_HIGHMEM
499 select SYS_SUPPORTS_LITTLE_ENDIAN
500 select SYS_SUPPORTS_ZBOOT
501 select SYS_SUPPORTS_RELOCATABLE
502 select ZONE_DMA32
503 select COMMON_CLK
504 select USE_OF
505 select BUILTIN_DTB
506 select PCI_HOST_GENERIC
507 help
508 This enables the support of Loongson-2/3 family of machines.
509
510 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
511 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
512 and Loongson-2F which will be removed), developed by the Institute
513 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
514
515config MACH_PISTACHIO
516 bool "IMG Pistachio SoC based boards"
517 select BOOT_ELF32
518 select BOOT_RAW
519 select CEVT_R4K
520 select CLKSRC_MIPS_GIC
521 select COMMON_CLK
522 select CSRC_R4K
523 select DMA_NONCOHERENT
524 select GPIOLIB
525 select IRQ_MIPS_CPU
526 select MFD_SYSCON
527 select MIPS_CPU_SCACHE
528 select MIPS_GIC
529 select PINCTRL
530 select REGULATOR
531 select SYS_HAS_CPU_MIPS32_R2
532 select SYS_SUPPORTS_32BIT_KERNEL
533 select SYS_SUPPORTS_LITTLE_ENDIAN
534 select SYS_SUPPORTS_MIPS_CPS
535 select SYS_SUPPORTS_MULTITHREADING
536 select SYS_SUPPORTS_RELOCATABLE
537 select SYS_SUPPORTS_ZBOOT
538 select SYS_HAS_EARLY_PRINTK
539 select USE_GENERIC_EARLY_PRINTK_8250
540 select USE_OF
541 help
542 This enables support for the IMG Pistachio SoC platform.
543
544config MIPS_MALTA
545 bool "MIPS Malta board"
546 select ARCH_MAY_HAVE_PC_FDC
547 select ARCH_MIGHT_HAVE_PC_PARPORT
548 select ARCH_MIGHT_HAVE_PC_SERIO
549 select BOOT_ELF32
550 select BOOT_RAW
551 select BUILTIN_DTB
552 select CEVT_R4K
553 select CLKSRC_MIPS_GIC
554 select COMMON_CLK
555 select CSRC_R4K
556 select DMA_NONCOHERENT
557 select GENERIC_ISA_DMA
558 select HAVE_PCSPKR_PLATFORM
559 select HAVE_PCI
560 select I8253
561 select I8259
562 select IRQ_MIPS_CPU
563 select MIPS_BONITO64
564 select MIPS_CPU_SCACHE
565 select MIPS_GIC
566 select MIPS_L1_CACHE_SHIFT_6
567 select MIPS_MSC
568 select PCI_GT64XXX_PCI0
569 select SMP_UP if SMP
570 select SWAP_IO_SPACE
571 select SYS_HAS_CPU_MIPS32_R1
572 select SYS_HAS_CPU_MIPS32_R2
573 select SYS_HAS_CPU_MIPS32_R3_5
574 select SYS_HAS_CPU_MIPS32_R5
575 select SYS_HAS_CPU_MIPS32_R6
576 select SYS_HAS_CPU_MIPS64_R1
577 select SYS_HAS_CPU_MIPS64_R2
578 select SYS_HAS_CPU_MIPS64_R6
579 select SYS_HAS_CPU_NEVADA
580 select SYS_HAS_CPU_RM7000
581 select SYS_SUPPORTS_32BIT_KERNEL
582 select SYS_SUPPORTS_64BIT_KERNEL
583 select SYS_SUPPORTS_BIG_ENDIAN
584 select SYS_SUPPORTS_HIGHMEM
585 select SYS_SUPPORTS_LITTLE_ENDIAN
586 select SYS_SUPPORTS_MICROMIPS
587 select SYS_SUPPORTS_MIPS16
588 select SYS_SUPPORTS_MIPS_CMP
589 select SYS_SUPPORTS_MIPS_CPS
590 select SYS_SUPPORTS_MULTITHREADING
591 select SYS_SUPPORTS_RELOCATABLE
592 select SYS_SUPPORTS_SMARTMIPS
593 select SYS_SUPPORTS_VPE_LOADER
594 select SYS_SUPPORTS_ZBOOT
595 select USE_OF
596 select WAR_ICACHE_REFILLS
597 select ZONE_DMA32 if 64BIT
598 help
599 This enables support for the MIPS Technologies Malta evaluation
600 board.
601
602config MACH_PIC32
603 bool "Microchip PIC32 Family"
604 help
605 This enables support for the Microchip PIC32 family of platforms.
606
607 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
608 microcontrollers.
609
610config MACH_VR41XX
611 bool "NEC VR4100 series based machines"
612 select CEVT_R4K
613 select CSRC_R4K
614 select SYS_HAS_CPU_VR41XX
615 select SYS_SUPPORTS_MIPS16
616 select GPIOLIB
617
618config MACH_NINTENDO64
619 bool "Nintendo 64 console"
620 select CEVT_R4K
621 select CSRC_R4K
622 select SYS_HAS_CPU_R4300
623 select SYS_SUPPORTS_BIG_ENDIAN
624 select SYS_SUPPORTS_ZBOOT
625 select SYS_SUPPORTS_32BIT_KERNEL
626 select SYS_SUPPORTS_64BIT_KERNEL
627 select DMA_NONCOHERENT
628 select IRQ_MIPS_CPU
629
630config RALINK
631 bool "Ralink based machines"
632 select CEVT_R4K
633 select COMMON_CLK
634 select CSRC_R4K
635 select BOOT_RAW
636 select DMA_NONCOHERENT
637 select IRQ_MIPS_CPU
638 select USE_OF
639 select SYS_HAS_CPU_MIPS32_R1
640 select SYS_HAS_CPU_MIPS32_R2
641 select SYS_SUPPORTS_32BIT_KERNEL
642 select SYS_SUPPORTS_LITTLE_ENDIAN
643 select SYS_SUPPORTS_MIPS16
644 select SYS_SUPPORTS_ZBOOT
645 select SYS_HAS_EARLY_PRINTK
646 select ARCH_HAS_RESET_CONTROLLER
647 select RESET_CONTROLLER
648
649config MACH_REALTEK_RTL
650 bool "Realtek RTL838x/RTL839x based machines"
651 select MIPS_GENERIC
652 select DMA_NONCOHERENT
653 select IRQ_MIPS_CPU
654 select CSRC_R4K
655 select CEVT_R4K
656 select SYS_HAS_CPU_MIPS32_R1
657 select SYS_HAS_CPU_MIPS32_R2
658 select SYS_SUPPORTS_BIG_ENDIAN
659 select SYS_SUPPORTS_32BIT_KERNEL
660 select SYS_SUPPORTS_MIPS16
661 select SYS_SUPPORTS_MULTITHREADING
662 select SYS_SUPPORTS_VPE_LOADER
663 select SYS_HAS_EARLY_PRINTK
664 select SYS_HAS_EARLY_PRINTK_8250
665 select USE_GENERIC_EARLY_PRINTK_8250
666 select BOOT_RAW
667 select PINCTRL
668 select USE_OF
669
670config SGI_IP22
671 bool "SGI IP22 (Indy/Indigo2)"
672 select ARC_MEMORY
673 select ARC_PROMLIB
674 select FW_ARC
675 select FW_ARC32
676 select ARCH_MIGHT_HAVE_PC_SERIO
677 select BOOT_ELF32
678 select CEVT_R4K
679 select CSRC_R4K
680 select DEFAULT_SGI_PARTITION
681 select DMA_NONCOHERENT
682 select HAVE_EISA
683 select I8253
684 select I8259
685 select IP22_CPU_SCACHE
686 select IRQ_MIPS_CPU
687 select GENERIC_ISA_DMA_SUPPORT_BROKEN
688 select SGI_HAS_I8042
689 select SGI_HAS_INDYDOG
690 select SGI_HAS_HAL2
691 select SGI_HAS_SEEQ
692 select SGI_HAS_WD93
693 select SGI_HAS_ZILOG
694 select SWAP_IO_SPACE
695 select SYS_HAS_CPU_R4X00
696 select SYS_HAS_CPU_R5000
697 select SYS_HAS_EARLY_PRINTK
698 select SYS_SUPPORTS_32BIT_KERNEL
699 select SYS_SUPPORTS_64BIT_KERNEL
700 select SYS_SUPPORTS_BIG_ENDIAN
701 select WAR_R4600_V1_INDEX_ICACHEOP
702 select WAR_R4600_V1_HIT_CACHEOP
703 select WAR_R4600_V2_HIT_CACHEOP
704 select MIPS_L1_CACHE_SHIFT_7
705 help
706 This are the SGI Indy, Challenge S and Indigo2, as well as certain
707 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
708 that runs on these, say Y here.
709
710config SGI_IP27
711 bool "SGI IP27 (Origin200/2000)"
712 select ARCH_HAS_PHYS_TO_DMA
713 select ARCH_SPARSEMEM_ENABLE
714 select FW_ARC
715 select FW_ARC64
716 select ARC_CMDLINE_ONLY
717 select BOOT_ELF64
718 select DEFAULT_SGI_PARTITION
719 select FORCE_PCI
720 select SYS_HAS_EARLY_PRINTK
721 select HAVE_PCI
722 select IRQ_MIPS_CPU
723 select IRQ_DOMAIN_HIERARCHY
724 select NR_CPUS_DEFAULT_64
725 select PCI_DRIVERS_GENERIC
726 select PCI_XTALK_BRIDGE
727 select SYS_HAS_CPU_R10000
728 select SYS_SUPPORTS_64BIT_KERNEL
729 select SYS_SUPPORTS_BIG_ENDIAN
730 select SYS_SUPPORTS_NUMA
731 select SYS_SUPPORTS_SMP
732 select WAR_R10000_LLSC
733 select MIPS_L1_CACHE_SHIFT_7
734 select NUMA
735 help
736 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
737 workstations. To compile a Linux kernel that runs on these, say Y
738 here.
739
740config SGI_IP28
741 bool "SGI IP28 (Indigo2 R10k)"
742 select ARC_MEMORY
743 select ARC_PROMLIB
744 select FW_ARC
745 select FW_ARC64
746 select ARCH_MIGHT_HAVE_PC_SERIO
747 select BOOT_ELF64
748 select CEVT_R4K
749 select CSRC_R4K
750 select DEFAULT_SGI_PARTITION
751 select DMA_NONCOHERENT
752 select GENERIC_ISA_DMA_SUPPORT_BROKEN
753 select IRQ_MIPS_CPU
754 select HAVE_EISA
755 select I8253
756 select I8259
757 select SGI_HAS_I8042
758 select SGI_HAS_INDYDOG
759 select SGI_HAS_HAL2
760 select SGI_HAS_SEEQ
761 select SGI_HAS_WD93
762 select SGI_HAS_ZILOG
763 select SWAP_IO_SPACE
764 select SYS_HAS_CPU_R10000
765 select SYS_HAS_EARLY_PRINTK
766 select SYS_SUPPORTS_64BIT_KERNEL
767 select SYS_SUPPORTS_BIG_ENDIAN
768 select WAR_R10000_LLSC
769 select MIPS_L1_CACHE_SHIFT_7
770 help
771 This is the SGI Indigo2 with R10000 processor. To compile a Linux
772 kernel that runs on these, say Y here.
773
774config SGI_IP30
775 bool "SGI IP30 (Octane/Octane2)"
776 select ARCH_HAS_PHYS_TO_DMA
777 select FW_ARC
778 select FW_ARC64
779 select BOOT_ELF64
780 select CEVT_R4K
781 select CSRC_R4K
782 select FORCE_PCI
783 select SYNC_R4K if SMP
784 select ZONE_DMA32
785 select HAVE_PCI
786 select IRQ_MIPS_CPU
787 select IRQ_DOMAIN_HIERARCHY
788 select NR_CPUS_DEFAULT_2
789 select PCI_DRIVERS_GENERIC
790 select PCI_XTALK_BRIDGE
791 select SYS_HAS_EARLY_PRINTK
792 select SYS_HAS_CPU_R10000
793 select SYS_SUPPORTS_64BIT_KERNEL
794 select SYS_SUPPORTS_BIG_ENDIAN
795 select SYS_SUPPORTS_SMP
796 select WAR_R10000_LLSC
797 select MIPS_L1_CACHE_SHIFT_7
798 select ARC_MEMORY
799 help
800 These are the SGI Octane and Octane2 graphics workstations. To
801 compile a Linux kernel that runs on these, say Y here.
802
803config SGI_IP32
804 bool "SGI IP32 (O2)"
805 select ARC_MEMORY
806 select ARC_PROMLIB
807 select ARCH_HAS_PHYS_TO_DMA
808 select FW_ARC
809 select FW_ARC32
810 select BOOT_ELF32
811 select CEVT_R4K
812 select CSRC_R4K
813 select DMA_NONCOHERENT
814 select HAVE_PCI
815 select IRQ_MIPS_CPU
816 select R5000_CPU_SCACHE
817 select RM7000_CPU_SCACHE
818 select SYS_HAS_CPU_R5000
819 select SYS_HAS_CPU_R10000 if BROKEN
820 select SYS_HAS_CPU_RM7000
821 select SYS_HAS_CPU_NEVADA
822 select SYS_SUPPORTS_64BIT_KERNEL
823 select SYS_SUPPORTS_BIG_ENDIAN
824 select WAR_ICACHE_REFILLS
825 help
826 If you want this kernel to run on SGI O2 workstation, say Y here.
827
828config SIBYTE_CRHINE
829 bool "Sibyte BCM91120C-CRhine"
830 select BOOT_ELF32
831 select SIBYTE_BCM1120
832 select SWAP_IO_SPACE
833 select SYS_HAS_CPU_SB1
834 select SYS_SUPPORTS_BIG_ENDIAN
835 select SYS_SUPPORTS_LITTLE_ENDIAN
836
837config SIBYTE_CARMEL
838 bool "Sibyte BCM91120x-Carmel"
839 select BOOT_ELF32
840 select SIBYTE_BCM1120
841 select SWAP_IO_SPACE
842 select SYS_HAS_CPU_SB1
843 select SYS_SUPPORTS_BIG_ENDIAN
844 select SYS_SUPPORTS_LITTLE_ENDIAN
845
846config SIBYTE_CRHONE
847 bool "Sibyte BCM91125C-CRhone"
848 select BOOT_ELF32
849 select SIBYTE_BCM1125
850 select SWAP_IO_SPACE
851 select SYS_HAS_CPU_SB1
852 select SYS_SUPPORTS_BIG_ENDIAN
853 select SYS_SUPPORTS_HIGHMEM
854 select SYS_SUPPORTS_LITTLE_ENDIAN
855
856config SIBYTE_RHONE
857 bool "Sibyte BCM91125E-Rhone"
858 select BOOT_ELF32
859 select SIBYTE_BCM1125H
860 select SWAP_IO_SPACE
861 select SYS_HAS_CPU_SB1
862 select SYS_SUPPORTS_BIG_ENDIAN
863 select SYS_SUPPORTS_LITTLE_ENDIAN
864
865config SIBYTE_SWARM
866 bool "Sibyte BCM91250A-SWARM"
867 select BOOT_ELF32
868 select HAVE_PATA_PLATFORM
869 select SIBYTE_SB1250
870 select SWAP_IO_SPACE
871 select SYS_HAS_CPU_SB1
872 select SYS_SUPPORTS_BIG_ENDIAN
873 select SYS_SUPPORTS_HIGHMEM
874 select SYS_SUPPORTS_LITTLE_ENDIAN
875 select ZONE_DMA32 if 64BIT
876 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
877
878config SIBYTE_LITTLESUR
879 bool "Sibyte BCM91250C2-LittleSur"
880 select BOOT_ELF32
881 select HAVE_PATA_PLATFORM
882 select SIBYTE_SB1250
883 select SWAP_IO_SPACE
884 select SYS_HAS_CPU_SB1
885 select SYS_SUPPORTS_BIG_ENDIAN
886 select SYS_SUPPORTS_HIGHMEM
887 select SYS_SUPPORTS_LITTLE_ENDIAN
888 select ZONE_DMA32 if 64BIT
889
890config SIBYTE_SENTOSA
891 bool "Sibyte BCM91250E-Sentosa"
892 select BOOT_ELF32
893 select SIBYTE_SB1250
894 select SWAP_IO_SPACE
895 select SYS_HAS_CPU_SB1
896 select SYS_SUPPORTS_BIG_ENDIAN
897 select SYS_SUPPORTS_LITTLE_ENDIAN
898 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
899
900config SIBYTE_BIGSUR
901 bool "Sibyte BCM91480B-BigSur"
902 select BOOT_ELF32
903 select NR_CPUS_DEFAULT_4
904 select SIBYTE_BCM1x80
905 select SWAP_IO_SPACE
906 select SYS_HAS_CPU_SB1
907 select SYS_SUPPORTS_BIG_ENDIAN
908 select SYS_SUPPORTS_HIGHMEM
909 select SYS_SUPPORTS_LITTLE_ENDIAN
910 select ZONE_DMA32 if 64BIT
911 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
912
913config SNI_RM
914 bool "SNI RM200/300/400"
915 select ARC_MEMORY
916 select ARC_PROMLIB
917 select FW_ARC if CPU_LITTLE_ENDIAN
918 select FW_ARC32 if CPU_LITTLE_ENDIAN
919 select FW_SNIPROM if CPU_BIG_ENDIAN
920 select ARCH_MAY_HAVE_PC_FDC
921 select ARCH_MIGHT_HAVE_PC_PARPORT
922 select ARCH_MIGHT_HAVE_PC_SERIO
923 select BOOT_ELF32
924 select CEVT_R4K
925 select CSRC_R4K
926 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
927 select DMA_NONCOHERENT
928 select GENERIC_ISA_DMA
929 select HAVE_EISA
930 select HAVE_PCSPKR_PLATFORM
931 select HAVE_PCI
932 select IRQ_MIPS_CPU
933 select I8253
934 select I8259
935 select ISA
936 select MIPS_L1_CACHE_SHIFT_6
937 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
938 select SYS_HAS_CPU_R4X00
939 select SYS_HAS_CPU_R5000
940 select SYS_HAS_CPU_R10000
941 select R5000_CPU_SCACHE
942 select SYS_HAS_EARLY_PRINTK
943 select SYS_SUPPORTS_32BIT_KERNEL
944 select SYS_SUPPORTS_64BIT_KERNEL
945 select SYS_SUPPORTS_BIG_ENDIAN
946 select SYS_SUPPORTS_HIGHMEM
947 select SYS_SUPPORTS_LITTLE_ENDIAN
948 select WAR_R4600_V2_HIT_CACHEOP
949 help
950 The SNI RM200/300/400 are MIPS-based machines manufactured by
951 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
952 Technology and now in turn merged with Fujitsu. Say Y here to
953 support this machine type.
954
955config MACH_TX39XX
956 bool "Toshiba TX39 series based machines"
957
958config MACH_TX49XX
959 bool "Toshiba TX49 series based machines"
960 select WAR_TX49XX_ICACHE_INDEX_INV
961
962config MIKROTIK_RB532
963 bool "Mikrotik RB532 boards"
964 select CEVT_R4K
965 select CSRC_R4K
966 select DMA_NONCOHERENT
967 select HAVE_PCI
968 select IRQ_MIPS_CPU
969 select SYS_HAS_CPU_MIPS32_R1
970 select SYS_SUPPORTS_32BIT_KERNEL
971 select SYS_SUPPORTS_LITTLE_ENDIAN
972 select SWAP_IO_SPACE
973 select BOOT_RAW
974 select GPIOLIB
975 select MIPS_L1_CACHE_SHIFT_4
976 help
977 Support the Mikrotik(tm) RouterBoard 532 series,
978 based on the IDT RC32434 SoC.
979
980config CAVIUM_OCTEON_SOC
981 bool "Cavium Networks Octeon SoC based boards"
982 select CEVT_R4K
983 select ARCH_HAS_PHYS_TO_DMA
984 select HAVE_RAPIDIO
985 select PHYS_ADDR_T_64BIT
986 select SYS_SUPPORTS_64BIT_KERNEL
987 select SYS_SUPPORTS_BIG_ENDIAN
988 select EDAC_SUPPORT
989 select EDAC_ATOMIC_SCRUB
990 select SYS_SUPPORTS_LITTLE_ENDIAN
991 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
992 select SYS_HAS_EARLY_PRINTK
993 select SYS_HAS_CPU_CAVIUM_OCTEON
994 select HAVE_PCI
995 select HAVE_PLAT_DELAY
996 select HAVE_PLAT_FW_INIT_CMDLINE
997 select HAVE_PLAT_MEMCPY
998 select ZONE_DMA32
999 select GPIOLIB
1000 select USE_OF
1001 select ARCH_SPARSEMEM_ENABLE
1002 select SYS_SUPPORTS_SMP
1003 select NR_CPUS_DEFAULT_64
1004 select MIPS_NR_CPU_NR_MAP_1024
1005 select BUILTIN_DTB
1006 select MTD
1007 select MTD_COMPLEX_MAPPINGS
1008 select SWIOTLB
1009 select SYS_SUPPORTS_RELOCATABLE
1010 help
1011 This option supports all of the Octeon reference boards from Cavium
1012 Networks. It builds a kernel that dynamically determines the Octeon
1013 CPU type and supports all known board reference implementations.
1014 Some of the supported boards are:
1015 EBT3000
1016 EBH3000
1017 EBH3100
1018 Thunder
1019 Kodama
1020 Hikari
1021 Say Y here for most Octeon reference boards.
1022
1023config NLM_XLR_BOARD
1024 bool "Netlogic XLR/XLS based systems"
1025 select BOOT_ELF32
1026 select NLM_COMMON
1027 select SYS_HAS_CPU_XLR
1028 select SYS_SUPPORTS_SMP
1029 select HAVE_PCI
1030 select SWAP_IO_SPACE
1031 select SYS_SUPPORTS_32BIT_KERNEL
1032 select SYS_SUPPORTS_64BIT_KERNEL
1033 select PHYS_ADDR_T_64BIT
1034 select SYS_SUPPORTS_BIG_ENDIAN
1035 select SYS_SUPPORTS_HIGHMEM
1036 select NR_CPUS_DEFAULT_32
1037 select CEVT_R4K
1038 select CSRC_R4K
1039 select IRQ_MIPS_CPU
1040 select ZONE_DMA32 if 64BIT
1041 select SYNC_R4K
1042 select SYS_HAS_EARLY_PRINTK
1043 select SYS_SUPPORTS_ZBOOT
1044 select SYS_SUPPORTS_ZBOOT_UART16550
1045 help
1046 Support for systems based on Netlogic XLR and XLS processors.
1047 Say Y here if you have a XLR or XLS based board.
1048
1049config NLM_XLP_BOARD
1050 bool "Netlogic XLP based systems"
1051 select BOOT_ELF32
1052 select NLM_COMMON
1053 select SYS_HAS_CPU_XLP
1054 select SYS_SUPPORTS_SMP
1055 select HAVE_PCI
1056 select SYS_SUPPORTS_32BIT_KERNEL
1057 select SYS_SUPPORTS_64BIT_KERNEL
1058 select PHYS_ADDR_T_64BIT
1059 select GPIOLIB
1060 select SYS_SUPPORTS_BIG_ENDIAN
1061 select SYS_SUPPORTS_LITTLE_ENDIAN
1062 select SYS_SUPPORTS_HIGHMEM
1063 select NR_CPUS_DEFAULT_32
1064 select CEVT_R4K
1065 select CSRC_R4K
1066 select IRQ_MIPS_CPU
1067 select ZONE_DMA32 if 64BIT
1068 select SYNC_R4K
1069 select SYS_HAS_EARLY_PRINTK
1070 select USE_OF
1071 select SYS_SUPPORTS_ZBOOT
1072 select SYS_SUPPORTS_ZBOOT_UART16550
1073 help
1074 This board is based on Netlogic XLP Processor.
1075 Say Y here if you have a XLP based board.
1076
1077endchoice
1078
1079source "arch/mips/alchemy/Kconfig"
1080source "arch/mips/ath25/Kconfig"
1081source "arch/mips/ath79/Kconfig"
1082source "arch/mips/bcm47xx/Kconfig"
1083source "arch/mips/bcm63xx/Kconfig"
1084source "arch/mips/bmips/Kconfig"
1085source "arch/mips/generic/Kconfig"
1086source "arch/mips/ingenic/Kconfig"
1087source "arch/mips/jazz/Kconfig"
1088source "arch/mips/lantiq/Kconfig"
1089source "arch/mips/pic32/Kconfig"
1090source "arch/mips/pistachio/Kconfig"
1091source "arch/mips/ralink/Kconfig"
1092source "arch/mips/sgi-ip27/Kconfig"
1093source "arch/mips/sibyte/Kconfig"
1094source "arch/mips/txx9/Kconfig"
1095source "arch/mips/vr41xx/Kconfig"
1096source "arch/mips/cavium-octeon/Kconfig"
1097source "arch/mips/loongson2ef/Kconfig"
1098source "arch/mips/loongson32/Kconfig"
1099source "arch/mips/loongson64/Kconfig"
1100source "arch/mips/netlogic/Kconfig"
1101
1102endmenu
1103
1104config GENERIC_HWEIGHT
1105 bool
1106 default y
1107
1108config GENERIC_CALIBRATE_DELAY
1109 bool
1110 default y
1111
1112config SCHED_OMIT_FRAME_POINTER
1113 bool
1114 default y
1115
1116#
1117# Select some configuration options automatically based on user selections.
1118#
1119config FW_ARC
1120 bool
1121
1122config ARCH_MAY_HAVE_PC_FDC
1123 bool
1124
1125config BOOT_RAW
1126 bool
1127
1128config CEVT_BCM1480
1129 bool
1130
1131config CEVT_DS1287
1132 bool
1133
1134config CEVT_GT641XX
1135 bool
1136
1137config CEVT_R4K
1138 bool
1139
1140config CEVT_SB1250
1141 bool
1142
1143config CEVT_TXX9
1144 bool
1145
1146config CSRC_BCM1480
1147 bool
1148
1149config CSRC_IOASIC
1150 bool
1151
1152config CSRC_R4K
1153 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1154 bool
1155
1156config CSRC_SB1250
1157 bool
1158
1159config MIPS_CLOCK_VSYSCALL
1160 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1161
1162config GPIO_TXX9
1163 select GPIOLIB
1164 bool
1165
1166config FW_CFE
1167 bool
1168
1169config ARCH_SUPPORTS_UPROBES
1170 bool
1171
1172config DMA_PERDEV_COHERENT
1173 bool
1174 select ARCH_HAS_SETUP_DMA_OPS
1175 select DMA_NONCOHERENT
1176
1177config DMA_NONCOHERENT
1178 bool
1179 #
1180 # MIPS allows mixing "slightly different" Cacheability and Coherency
1181 # Attribute bits. It is believed that the uncached access through
1182 # KSEG1 and the implementation specific "uncached accelerated" used
1183 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1184 # significant advantages.
1185 #
1186 select ARCH_HAS_DMA_WRITE_COMBINE
1187 select ARCH_HAS_DMA_PREP_COHERENT
1188 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1189 select ARCH_HAS_DMA_SET_UNCACHED
1190 select DMA_NONCOHERENT_MMAP
1191 select NEED_DMA_MAP_STATE
1192
1193config SYS_HAS_EARLY_PRINTK
1194 bool
1195
1196config SYS_SUPPORTS_HOTPLUG_CPU
1197 bool
1198
1199config MIPS_BONITO64
1200 bool
1201
1202config MIPS_MSC
1203 bool
1204
1205config SYNC_R4K
1206 bool
1207
1208config NO_IOPORT_MAP
1209 def_bool n
1210
1211config GENERIC_CSUM
1212 def_bool CPU_NO_LOAD_STORE_LR
1213
1214config GENERIC_ISA_DMA
1215 bool
1216 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1217 select ISA_DMA_API
1218
1219config GENERIC_ISA_DMA_SUPPORT_BROKEN
1220 bool
1221 select GENERIC_ISA_DMA
1222
1223config HAVE_PLAT_DELAY
1224 bool
1225
1226config HAVE_PLAT_FW_INIT_CMDLINE
1227 bool
1228
1229config HAVE_PLAT_MEMCPY
1230 bool
1231
1232config ISA_DMA_API
1233 bool
1234
1235config SYS_SUPPORTS_RELOCATABLE
1236 bool
1237 help
1238 Selected if the platform supports relocating the kernel.
1239 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1240 to allow access to command line and entropy sources.
1241
1242config MIPS_CBPF_JIT
1243 def_bool y
1244 depends on BPF_JIT && HAVE_CBPF_JIT
1245
1246config MIPS_EBPF_JIT
1247 def_bool y
1248 depends on BPF_JIT && HAVE_EBPF_JIT
1249
1250
1251#
1252# Endianness selection. Sufficiently obscure so many users don't know what to
1253# answer,so we try hard to limit the available choices. Also the use of a
1254# choice statement should be more obvious to the user.
1255#
1256choice
1257 prompt "Endianness selection"
1258 help
1259 Some MIPS machines can be configured for either little or big endian
1260 byte order. These modes require different kernels and a different
1261 Linux distribution. In general there is one preferred byteorder for a
1262 particular system but some systems are just as commonly used in the
1263 one or the other endianness.
1264
1265config CPU_BIG_ENDIAN
1266 bool "Big endian"
1267 depends on SYS_SUPPORTS_BIG_ENDIAN
1268
1269config CPU_LITTLE_ENDIAN
1270 bool "Little endian"
1271 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1272
1273endchoice
1274
1275config EXPORT_UASM
1276 bool
1277
1278config SYS_SUPPORTS_APM_EMULATION
1279 bool
1280
1281config SYS_SUPPORTS_BIG_ENDIAN
1282 bool
1283
1284config SYS_SUPPORTS_LITTLE_ENDIAN
1285 bool
1286
1287config MIPS_HUGE_TLB_SUPPORT
1288 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1289
1290config IRQ_MSP_SLP
1291 bool
1292
1293config IRQ_MSP_CIC
1294 bool
1295
1296config IRQ_TXX9
1297 bool
1298
1299config IRQ_GT641XX
1300 bool
1301
1302config PCI_GT64XXX_PCI0
1303 bool
1304
1305config PCI_XTALK_BRIDGE
1306 bool
1307
1308config NO_EXCEPT_FILL
1309 bool
1310
1311config MIPS_SPRAM
1312 bool
1313
1314config SWAP_IO_SPACE
1315 bool
1316
1317config SGI_HAS_INDYDOG
1318 bool
1319
1320config SGI_HAS_HAL2
1321 bool
1322
1323config SGI_HAS_SEEQ
1324 bool
1325
1326config SGI_HAS_WD93
1327 bool
1328
1329config SGI_HAS_ZILOG
1330 bool
1331
1332config SGI_HAS_I8042
1333 bool
1334
1335config DEFAULT_SGI_PARTITION
1336 bool
1337
1338config FW_ARC32
1339 bool
1340
1341config FW_SNIPROM
1342 bool
1343
1344config BOOT_ELF32
1345 bool
1346
1347config MIPS_L1_CACHE_SHIFT_4
1348 bool
1349
1350config MIPS_L1_CACHE_SHIFT_5
1351 bool
1352
1353config MIPS_L1_CACHE_SHIFT_6
1354 bool
1355
1356config MIPS_L1_CACHE_SHIFT_7
1357 bool
1358
1359config MIPS_L1_CACHE_SHIFT
1360 int
1361 default "7" if MIPS_L1_CACHE_SHIFT_7
1362 default "6" if MIPS_L1_CACHE_SHIFT_6
1363 default "5" if MIPS_L1_CACHE_SHIFT_5
1364 default "4" if MIPS_L1_CACHE_SHIFT_4
1365 default "5"
1366
1367config ARC_CMDLINE_ONLY
1368 bool
1369
1370config ARC_CONSOLE
1371 bool "ARC console support"
1372 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1373
1374config ARC_MEMORY
1375 bool
1376
1377config ARC_PROMLIB
1378 bool
1379
1380config FW_ARC64
1381 bool
1382
1383config BOOT_ELF64
1384 bool
1385
1386menu "CPU selection"
1387
1388choice
1389 prompt "CPU type"
1390 default CPU_R4X00
1391
1392config CPU_LOONGSON64
1393 bool "Loongson 64-bit CPU"
1394 depends on SYS_HAS_CPU_LOONGSON64
1395 select ARCH_HAS_PHYS_TO_DMA
1396 select CPU_MIPSR2
1397 select CPU_HAS_PREFETCH
1398 select CPU_SUPPORTS_64BIT_KERNEL
1399 select CPU_SUPPORTS_HIGHMEM
1400 select CPU_SUPPORTS_HUGEPAGES
1401 select CPU_SUPPORTS_MSA
1402 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1403 select CPU_MIPSR2_IRQ_VI
1404 select WEAK_ORDERING
1405 select WEAK_REORDERING_BEYOND_LLSC
1406 select MIPS_ASID_BITS_VARIABLE
1407 select MIPS_PGD_C0_CONTEXT
1408 select MIPS_L1_CACHE_SHIFT_6
1409 select GPIOLIB
1410 select SWIOTLB
1411 select HAVE_KVM
1412 help
1413 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1414 cores implements the MIPS64R2 instruction set with many extensions,
1415 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1416 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1417 Loongson-2E/2F is not covered here and will be removed in future.
1418
1419config LOONGSON3_ENHANCEMENT
1420 bool "New Loongson-3 CPU Enhancements"
1421 default n
1422 depends on CPU_LOONGSON64
1423 help
1424 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1425 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1426 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1427 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1428 Fast TLB refill support, etc.
1429
1430 This option enable those enhancements which are not probed at run
1431 time. If you want a generic kernel to run on all Loongson 3 machines,
1432 please say 'N' here. If you want a high-performance kernel to run on
1433 new Loongson-3 machines only, please say 'Y' here.
1434
1435config CPU_LOONGSON3_WORKAROUNDS
1436 bool "Old Loongson-3 LLSC Workarounds"
1437 default y if SMP
1438 depends on CPU_LOONGSON64
1439 help
1440 Loongson-3 processors have the llsc issues which require workarounds.
1441 Without workarounds the system may hang unexpectedly.
1442
1443 Newer Loongson-3 will fix these issues and no workarounds are needed.
1444 The workarounds have no significant side effect on them but may
1445 decrease the performance of the system so this option should be
1446 disabled unless the kernel is intended to be run on old systems.
1447
1448 If unsure, please say Y.
1449
1450config CPU_LOONGSON3_CPUCFG_EMULATION
1451 bool "Emulate the CPUCFG instruction on older Loongson cores"
1452 default y
1453 depends on CPU_LOONGSON64
1454 help
1455 Loongson-3A R4 and newer have the CPUCFG instruction available for
1456 userland to query CPU capabilities, much like CPUID on x86. This
1457 option provides emulation of the instruction on older Loongson
1458 cores, back to Loongson-3A1000.
1459
1460 If unsure, please say Y.
1461
1462config CPU_LOONGSON2E
1463 bool "Loongson 2E"
1464 depends on SYS_HAS_CPU_LOONGSON2E
1465 select CPU_LOONGSON2EF
1466 help
1467 The Loongson 2E processor implements the MIPS III instruction set
1468 with many extensions.
1469
1470 It has an internal FPGA northbridge, which is compatible to
1471 bonito64.
1472
1473config CPU_LOONGSON2F
1474 bool "Loongson 2F"
1475 depends on SYS_HAS_CPU_LOONGSON2F
1476 select CPU_LOONGSON2EF
1477 select GPIOLIB
1478 help
1479 The Loongson 2F processor implements the MIPS III instruction set
1480 with many extensions.
1481
1482 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1483 have a similar programming interface with FPGA northbridge used in
1484 Loongson2E.
1485
1486config CPU_LOONGSON1B
1487 bool "Loongson 1B"
1488 depends on SYS_HAS_CPU_LOONGSON1B
1489 select CPU_LOONGSON32
1490 select LEDS_GPIO_REGISTER
1491 help
1492 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1493 Release 1 instruction set and part of the MIPS32 Release 2
1494 instruction set.
1495
1496config CPU_LOONGSON1C
1497 bool "Loongson 1C"
1498 depends on SYS_HAS_CPU_LOONGSON1C
1499 select CPU_LOONGSON32
1500 select LEDS_GPIO_REGISTER
1501 help
1502 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1503 Release 1 instruction set and part of the MIPS32 Release 2
1504 instruction set.
1505
1506config CPU_MIPS32_R1
1507 bool "MIPS32 Release 1"
1508 depends on SYS_HAS_CPU_MIPS32_R1
1509 select CPU_HAS_PREFETCH
1510 select CPU_SUPPORTS_32BIT_KERNEL
1511 select CPU_SUPPORTS_HIGHMEM
1512 help
1513 Choose this option to build a kernel for release 1 or later of the
1514 MIPS32 architecture. Most modern embedded systems with a 32-bit
1515 MIPS processor are based on a MIPS32 processor. If you know the
1516 specific type of processor in your system, choose those that one
1517 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1518 Release 2 of the MIPS32 architecture is available since several
1519 years so chances are you even have a MIPS32 Release 2 processor
1520 in which case you should choose CPU_MIPS32_R2 instead for better
1521 performance.
1522
1523config CPU_MIPS32_R2
1524 bool "MIPS32 Release 2"
1525 depends on SYS_HAS_CPU_MIPS32_R2
1526 select CPU_HAS_PREFETCH
1527 select CPU_SUPPORTS_32BIT_KERNEL
1528 select CPU_SUPPORTS_HIGHMEM
1529 select CPU_SUPPORTS_MSA
1530 select HAVE_KVM
1531 help
1532 Choose this option to build a kernel for release 2 or later of the
1533 MIPS32 architecture. Most modern embedded systems with a 32-bit
1534 MIPS processor are based on a MIPS32 processor. If you know the
1535 specific type of processor in your system, choose those that one
1536 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1537
1538config CPU_MIPS32_R5
1539 bool "MIPS32 Release 5"
1540 depends on SYS_HAS_CPU_MIPS32_R5
1541 select CPU_HAS_PREFETCH
1542 select CPU_SUPPORTS_32BIT_KERNEL
1543 select CPU_SUPPORTS_HIGHMEM
1544 select CPU_SUPPORTS_MSA
1545 select HAVE_KVM
1546 select MIPS_O32_FP64_SUPPORT
1547 help
1548 Choose this option to build a kernel for release 5 or later of the
1549 MIPS32 architecture. New MIPS processors, starting with the Warrior
1550 family, are based on a MIPS32r5 processor. If you own an older
1551 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1552
1553config CPU_MIPS32_R6
1554 bool "MIPS32 Release 6"
1555 depends on SYS_HAS_CPU_MIPS32_R6
1556 select CPU_HAS_PREFETCH
1557 select CPU_NO_LOAD_STORE_LR
1558 select CPU_SUPPORTS_32BIT_KERNEL
1559 select CPU_SUPPORTS_HIGHMEM
1560 select CPU_SUPPORTS_MSA
1561 select HAVE_KVM
1562 select MIPS_O32_FP64_SUPPORT
1563 help
1564 Choose this option to build a kernel for release 6 or later of the
1565 MIPS32 architecture. New MIPS processors, starting with the Warrior
1566 family, are based on a MIPS32r6 processor. If you own an older
1567 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1568
1569config CPU_MIPS64_R1
1570 bool "MIPS64 Release 1"
1571 depends on SYS_HAS_CPU_MIPS64_R1
1572 select CPU_HAS_PREFETCH
1573 select CPU_SUPPORTS_32BIT_KERNEL
1574 select CPU_SUPPORTS_64BIT_KERNEL
1575 select CPU_SUPPORTS_HIGHMEM
1576 select CPU_SUPPORTS_HUGEPAGES
1577 help
1578 Choose this option to build a kernel for release 1 or later of the
1579 MIPS64 architecture. Many modern embedded systems with a 64-bit
1580 MIPS processor are based on a MIPS64 processor. If you know the
1581 specific type of processor in your system, choose those that one
1582 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1583 Release 2 of the MIPS64 architecture is available since several
1584 years so chances are you even have a MIPS64 Release 2 processor
1585 in which case you should choose CPU_MIPS64_R2 instead for better
1586 performance.
1587
1588config CPU_MIPS64_R2
1589 bool "MIPS64 Release 2"
1590 depends on SYS_HAS_CPU_MIPS64_R2
1591 select CPU_HAS_PREFETCH
1592 select CPU_SUPPORTS_32BIT_KERNEL
1593 select CPU_SUPPORTS_64BIT_KERNEL
1594 select CPU_SUPPORTS_HIGHMEM
1595 select CPU_SUPPORTS_HUGEPAGES
1596 select CPU_SUPPORTS_MSA
1597 select HAVE_KVM
1598 help
1599 Choose this option to build a kernel for release 2 or later of the
1600 MIPS64 architecture. Many modern embedded systems with a 64-bit
1601 MIPS processor are based on a MIPS64 processor. If you know the
1602 specific type of processor in your system, choose those that one
1603 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1604
1605config CPU_MIPS64_R5
1606 bool "MIPS64 Release 5"
1607 depends on SYS_HAS_CPU_MIPS64_R5
1608 select CPU_HAS_PREFETCH
1609 select CPU_SUPPORTS_32BIT_KERNEL
1610 select CPU_SUPPORTS_64BIT_KERNEL
1611 select CPU_SUPPORTS_HIGHMEM
1612 select CPU_SUPPORTS_HUGEPAGES
1613 select CPU_SUPPORTS_MSA
1614 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1615 select HAVE_KVM
1616 help
1617 Choose this option to build a kernel for release 5 or later of the
1618 MIPS64 architecture. This is a intermediate MIPS architecture
1619 release partly implementing release 6 features. Though there is no
1620 any hardware known to be based on this release.
1621
1622config CPU_MIPS64_R6
1623 bool "MIPS64 Release 6"
1624 depends on SYS_HAS_CPU_MIPS64_R6
1625 select CPU_HAS_PREFETCH
1626 select CPU_NO_LOAD_STORE_LR
1627 select CPU_SUPPORTS_32BIT_KERNEL
1628 select CPU_SUPPORTS_64BIT_KERNEL
1629 select CPU_SUPPORTS_HIGHMEM
1630 select CPU_SUPPORTS_HUGEPAGES
1631 select CPU_SUPPORTS_MSA
1632 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1633 select HAVE_KVM
1634 help
1635 Choose this option to build a kernel for release 6 or later of the
1636 MIPS64 architecture. New MIPS processors, starting with the Warrior
1637 family, are based on a MIPS64r6 processor. If you own an older
1638 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1639
1640config CPU_P5600
1641 bool "MIPS Warrior P5600"
1642 depends on SYS_HAS_CPU_P5600
1643 select CPU_HAS_PREFETCH
1644 select CPU_SUPPORTS_32BIT_KERNEL
1645 select CPU_SUPPORTS_HIGHMEM
1646 select CPU_SUPPORTS_MSA
1647 select CPU_SUPPORTS_CPUFREQ
1648 select CPU_MIPSR2_IRQ_VI
1649 select CPU_MIPSR2_IRQ_EI
1650 select HAVE_KVM
1651 select MIPS_O32_FP64_SUPPORT
1652 help
1653 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1654 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1655 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1656 level features like up to six P5600 calculation cores, CM2 with L2
1657 cache, IOCU/IOMMU (though might be unused depending on the system-
1658 specific IP core configuration), GIC, CPC, virtualisation module,
1659 eJTAG and PDtrace.
1660
1661config CPU_R3000
1662 bool "R3000"
1663 depends on SYS_HAS_CPU_R3000
1664 select CPU_HAS_WB
1665 select CPU_R3K_TLB
1666 select CPU_SUPPORTS_32BIT_KERNEL
1667 select CPU_SUPPORTS_HIGHMEM
1668 help
1669 Please make sure to pick the right CPU type. Linux/MIPS is not
1670 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1671 *not* work on R4000 machines and vice versa. However, since most
1672 of the supported machines have an R4000 (or similar) CPU, R4x00
1673 might be a safe bet. If the resulting kernel does not work,
1674 try to recompile with R3000.
1675
1676config CPU_TX39XX
1677 bool "R39XX"
1678 depends on SYS_HAS_CPU_TX39XX
1679 select CPU_SUPPORTS_32BIT_KERNEL
1680 select CPU_R3K_TLB
1681
1682config CPU_VR41XX
1683 bool "R41xx"
1684 depends on SYS_HAS_CPU_VR41XX
1685 select CPU_SUPPORTS_32BIT_KERNEL
1686 select CPU_SUPPORTS_64BIT_KERNEL
1687 help
1688 The options selects support for the NEC VR4100 series of processors.
1689 Only choose this option if you have one of these processors as a
1690 kernel built with this option will not run on any other type of
1691 processor or vice versa.
1692
1693config CPU_R4300
1694 bool "R4300"
1695 depends on SYS_HAS_CPU_R4300
1696 select CPU_SUPPORTS_32BIT_KERNEL
1697 select CPU_SUPPORTS_64BIT_KERNEL
1698 select CPU_HAS_LOAD_STORE_LR
1699 help
1700 MIPS Technologies R4300-series processors.
1701
1702config CPU_R4X00
1703 bool "R4x00"
1704 depends on SYS_HAS_CPU_R4X00
1705 select CPU_SUPPORTS_32BIT_KERNEL
1706 select CPU_SUPPORTS_64BIT_KERNEL
1707 select CPU_SUPPORTS_HUGEPAGES
1708 help
1709 MIPS Technologies R4000-series processors other than 4300, including
1710 the R4000, R4400, R4600, and 4700.
1711
1712config CPU_TX49XX
1713 bool "R49XX"
1714 depends on SYS_HAS_CPU_TX49XX
1715 select CPU_HAS_PREFETCH
1716 select CPU_SUPPORTS_32BIT_KERNEL
1717 select CPU_SUPPORTS_64BIT_KERNEL
1718 select CPU_SUPPORTS_HUGEPAGES
1719
1720config CPU_R5000
1721 bool "R5000"
1722 depends on SYS_HAS_CPU_R5000
1723 select CPU_SUPPORTS_32BIT_KERNEL
1724 select CPU_SUPPORTS_64BIT_KERNEL
1725 select CPU_SUPPORTS_HUGEPAGES
1726 help
1727 MIPS Technologies R5000-series processors other than the Nevada.
1728
1729config CPU_R5500
1730 bool "R5500"
1731 depends on SYS_HAS_CPU_R5500
1732 select CPU_SUPPORTS_32BIT_KERNEL
1733 select CPU_SUPPORTS_64BIT_KERNEL
1734 select CPU_SUPPORTS_HUGEPAGES
1735 help
1736 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1737 instruction set.
1738
1739config CPU_NEVADA
1740 bool "RM52xx"
1741 depends on SYS_HAS_CPU_NEVADA
1742 select CPU_SUPPORTS_32BIT_KERNEL
1743 select CPU_SUPPORTS_64BIT_KERNEL
1744 select CPU_SUPPORTS_HUGEPAGES
1745 help
1746 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1747
1748config CPU_R10000
1749 bool "R10000"
1750 depends on SYS_HAS_CPU_R10000
1751 select CPU_HAS_PREFETCH
1752 select CPU_SUPPORTS_32BIT_KERNEL
1753 select CPU_SUPPORTS_64BIT_KERNEL
1754 select CPU_SUPPORTS_HIGHMEM
1755 select CPU_SUPPORTS_HUGEPAGES
1756 help
1757 MIPS Technologies R10000-series processors.
1758
1759config CPU_RM7000
1760 bool "RM7000"
1761 depends on SYS_HAS_CPU_RM7000
1762 select CPU_HAS_PREFETCH
1763 select CPU_SUPPORTS_32BIT_KERNEL
1764 select CPU_SUPPORTS_64BIT_KERNEL
1765 select CPU_SUPPORTS_HIGHMEM
1766 select CPU_SUPPORTS_HUGEPAGES
1767
1768config CPU_SB1
1769 bool "SB1"
1770 depends on SYS_HAS_CPU_SB1
1771 select CPU_SUPPORTS_32BIT_KERNEL
1772 select CPU_SUPPORTS_64BIT_KERNEL
1773 select CPU_SUPPORTS_HIGHMEM
1774 select CPU_SUPPORTS_HUGEPAGES
1775 select WEAK_ORDERING
1776
1777config CPU_CAVIUM_OCTEON
1778 bool "Cavium Octeon processor"
1779 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1780 select CPU_HAS_PREFETCH
1781 select CPU_SUPPORTS_64BIT_KERNEL
1782 select WEAK_ORDERING
1783 select CPU_SUPPORTS_HIGHMEM
1784 select CPU_SUPPORTS_HUGEPAGES
1785 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1786 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1787 select MIPS_L1_CACHE_SHIFT_7
1788 select HAVE_KVM
1789 help
1790 The Cavium Octeon processor is a highly integrated chip containing
1791 many ethernet hardware widgets for networking tasks. The processor
1792 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1793 Full details can be found at http://www.caviumnetworks.com.
1794
1795config CPU_BMIPS
1796 bool "Broadcom BMIPS"
1797 depends on SYS_HAS_CPU_BMIPS
1798 select CPU_MIPS32
1799 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1800 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1801 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1802 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1803 select CPU_SUPPORTS_32BIT_KERNEL
1804 select DMA_NONCOHERENT
1805 select IRQ_MIPS_CPU
1806 select SWAP_IO_SPACE
1807 select WEAK_ORDERING
1808 select CPU_SUPPORTS_HIGHMEM
1809 select CPU_HAS_PREFETCH
1810 select CPU_SUPPORTS_CPUFREQ
1811 select MIPS_EXTERNAL_TIMER
1812 help
1813 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1814
1815config CPU_XLR
1816 bool "Netlogic XLR SoC"
1817 depends on SYS_HAS_CPU_XLR
1818 select CPU_SUPPORTS_32BIT_KERNEL
1819 select CPU_SUPPORTS_64BIT_KERNEL
1820 select CPU_SUPPORTS_HIGHMEM
1821 select CPU_SUPPORTS_HUGEPAGES
1822 select WEAK_ORDERING
1823 select WEAK_REORDERING_BEYOND_LLSC
1824 help
1825 Netlogic Microsystems XLR/XLS processors.
1826
1827config CPU_XLP
1828 bool "Netlogic XLP SoC"
1829 depends on SYS_HAS_CPU_XLP
1830 select CPU_SUPPORTS_32BIT_KERNEL
1831 select CPU_SUPPORTS_64BIT_KERNEL
1832 select CPU_SUPPORTS_HIGHMEM
1833 select WEAK_ORDERING
1834 select WEAK_REORDERING_BEYOND_LLSC
1835 select CPU_HAS_PREFETCH
1836 select CPU_MIPSR2
1837 select CPU_SUPPORTS_HUGEPAGES
1838 select MIPS_ASID_BITS_VARIABLE
1839 help
1840 Netlogic Microsystems XLP processors.
1841endchoice
1842
1843config CPU_MIPS32_3_5_FEATURES
1844 bool "MIPS32 Release 3.5 Features"
1845 depends on SYS_HAS_CPU_MIPS32_R3_5
1846 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1847 CPU_P5600
1848 help
1849 Choose this option to build a kernel for release 2 or later of the
1850 MIPS32 architecture including features from the 3.5 release such as
1851 support for Enhanced Virtual Addressing (EVA).
1852
1853config CPU_MIPS32_3_5_EVA
1854 bool "Enhanced Virtual Addressing (EVA)"
1855 depends on CPU_MIPS32_3_5_FEATURES
1856 select EVA
1857 default y
1858 help
1859 Choose this option if you want to enable the Enhanced Virtual
1860 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1861 One of its primary benefits is an increase in the maximum size
1862 of lowmem (up to 3GB). If unsure, say 'N' here.
1863
1864config CPU_MIPS32_R5_FEATURES
1865 bool "MIPS32 Release 5 Features"
1866 depends on SYS_HAS_CPU_MIPS32_R5
1867 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1868 help
1869 Choose this option to build a kernel for release 2 or later of the
1870 MIPS32 architecture including features from release 5 such as
1871 support for Extended Physical Addressing (XPA).
1872
1873config CPU_MIPS32_R5_XPA
1874 bool "Extended Physical Addressing (XPA)"
1875 depends on CPU_MIPS32_R5_FEATURES
1876 depends on !EVA
1877 depends on !PAGE_SIZE_4KB
1878 depends on SYS_SUPPORTS_HIGHMEM
1879 select XPA
1880 select HIGHMEM
1881 select PHYS_ADDR_T_64BIT
1882 default n
1883 help
1884 Choose this option if you want to enable the Extended Physical
1885 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1886 benefit is to increase physical addressing equal to or greater
1887 than 40 bits. Note that this has the side effect of turning on
1888 64-bit addressing which in turn makes the PTEs 64-bit in size.
1889 If unsure, say 'N' here.
1890
1891if CPU_LOONGSON2F
1892config CPU_NOP_WORKAROUNDS
1893 bool
1894
1895config CPU_JUMP_WORKAROUNDS
1896 bool
1897
1898config CPU_LOONGSON2F_WORKAROUNDS
1899 bool "Loongson 2F Workarounds"
1900 default y
1901 select CPU_NOP_WORKAROUNDS
1902 select CPU_JUMP_WORKAROUNDS
1903 help
1904 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1905 require workarounds. Without workarounds the system may hang
1906 unexpectedly. For more information please refer to the gas
1907 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1908
1909 Loongson 2F03 and later have fixed these issues and no workarounds
1910 are needed. The workarounds have no significant side effect on them
1911 but may decrease the performance of the system so this option should
1912 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1913 systems.
1914
1915 If unsure, please say Y.
1916endif # CPU_LOONGSON2F
1917
1918config SYS_SUPPORTS_ZBOOT
1919 bool
1920 select HAVE_KERNEL_GZIP
1921 select HAVE_KERNEL_BZIP2
1922 select HAVE_KERNEL_LZ4
1923 select HAVE_KERNEL_LZMA
1924 select HAVE_KERNEL_LZO
1925 select HAVE_KERNEL_XZ
1926 select HAVE_KERNEL_ZSTD
1927
1928config SYS_SUPPORTS_ZBOOT_UART16550
1929 bool
1930 select SYS_SUPPORTS_ZBOOT
1931
1932config SYS_SUPPORTS_ZBOOT_UART_PROM
1933 bool
1934 select SYS_SUPPORTS_ZBOOT
1935
1936config CPU_LOONGSON2EF
1937 bool
1938 select CPU_SUPPORTS_32BIT_KERNEL
1939 select CPU_SUPPORTS_64BIT_KERNEL
1940 select CPU_SUPPORTS_HIGHMEM
1941 select CPU_SUPPORTS_HUGEPAGES
1942 select ARCH_HAS_PHYS_TO_DMA
1943
1944config CPU_LOONGSON32
1945 bool
1946 select CPU_MIPS32
1947 select CPU_MIPSR2
1948 select CPU_HAS_PREFETCH
1949 select CPU_SUPPORTS_32BIT_KERNEL
1950 select CPU_SUPPORTS_HIGHMEM
1951 select CPU_SUPPORTS_CPUFREQ
1952
1953config CPU_BMIPS32_3300
1954 select SMP_UP if SMP
1955 bool
1956
1957config CPU_BMIPS4350
1958 bool
1959 select SYS_SUPPORTS_SMP
1960 select SYS_SUPPORTS_HOTPLUG_CPU
1961
1962config CPU_BMIPS4380
1963 bool
1964 select MIPS_L1_CACHE_SHIFT_6
1965 select SYS_SUPPORTS_SMP
1966 select SYS_SUPPORTS_HOTPLUG_CPU
1967 select CPU_HAS_RIXI
1968
1969config CPU_BMIPS5000
1970 bool
1971 select MIPS_CPU_SCACHE
1972 select MIPS_L1_CACHE_SHIFT_7
1973 select SYS_SUPPORTS_SMP
1974 select SYS_SUPPORTS_HOTPLUG_CPU
1975 select CPU_HAS_RIXI
1976
1977config SYS_HAS_CPU_LOONGSON64
1978 bool
1979 select CPU_SUPPORTS_CPUFREQ
1980 select CPU_HAS_RIXI
1981
1982config SYS_HAS_CPU_LOONGSON2E
1983 bool
1984
1985config SYS_HAS_CPU_LOONGSON2F
1986 bool
1987 select CPU_SUPPORTS_CPUFREQ
1988 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1989
1990config SYS_HAS_CPU_LOONGSON1B
1991 bool
1992
1993config SYS_HAS_CPU_LOONGSON1C
1994 bool
1995
1996config SYS_HAS_CPU_MIPS32_R1
1997 bool
1998
1999config SYS_HAS_CPU_MIPS32_R2
2000 bool
2001
2002config SYS_HAS_CPU_MIPS32_R3_5
2003 bool
2004
2005config SYS_HAS_CPU_MIPS32_R5
2006 bool
2007 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2008
2009config SYS_HAS_CPU_MIPS32_R6
2010 bool
2011 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2012
2013config SYS_HAS_CPU_MIPS64_R1
2014 bool
2015
2016config SYS_HAS_CPU_MIPS64_R2
2017 bool
2018
2019config SYS_HAS_CPU_MIPS64_R6
2020 bool
2021 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2022
2023config SYS_HAS_CPU_P5600
2024 bool
2025 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2026
2027config SYS_HAS_CPU_R3000
2028 bool
2029
2030config SYS_HAS_CPU_TX39XX
2031 bool
2032
2033config SYS_HAS_CPU_VR41XX
2034 bool
2035
2036config SYS_HAS_CPU_R4300
2037 bool
2038
2039config SYS_HAS_CPU_R4X00
2040 bool
2041
2042config SYS_HAS_CPU_TX49XX
2043 bool
2044
2045config SYS_HAS_CPU_R5000
2046 bool
2047
2048config SYS_HAS_CPU_R5500
2049 bool
2050
2051config SYS_HAS_CPU_NEVADA
2052 bool
2053
2054config SYS_HAS_CPU_R10000
2055 bool
2056 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2057
2058config SYS_HAS_CPU_RM7000
2059 bool
2060
2061config SYS_HAS_CPU_SB1
2062 bool
2063
2064config SYS_HAS_CPU_CAVIUM_OCTEON
2065 bool
2066
2067config SYS_HAS_CPU_BMIPS
2068 bool
2069
2070config SYS_HAS_CPU_BMIPS32_3300
2071 bool
2072 select SYS_HAS_CPU_BMIPS
2073
2074config SYS_HAS_CPU_BMIPS4350
2075 bool
2076 select SYS_HAS_CPU_BMIPS
2077
2078config SYS_HAS_CPU_BMIPS4380
2079 bool
2080 select SYS_HAS_CPU_BMIPS
2081
2082config SYS_HAS_CPU_BMIPS5000
2083 bool
2084 select SYS_HAS_CPU_BMIPS
2085 select ARCH_HAS_SYNC_DMA_FOR_CPU
2086
2087config SYS_HAS_CPU_XLR
2088 bool
2089
2090config SYS_HAS_CPU_XLP
2091 bool
2092
2093#
2094# CPU may reorder R->R, R->W, W->R, W->W
2095# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
2096#
2097config WEAK_ORDERING
2098 bool
2099
2100#
2101# CPU may reorder reads and writes beyond LL/SC
2102# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2103#
2104config WEAK_REORDERING_BEYOND_LLSC
2105 bool
2106endmenu
2107
2108#
2109# These two indicate any level of the MIPS32 and MIPS64 architecture
2110#
2111config CPU_MIPS32
2112 bool
2113 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
2114 CPU_MIPS32_R6 || CPU_P5600
2115
2116config CPU_MIPS64
2117 bool
2118 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2119 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
2120
2121#
2122# These indicate the revision of the architecture
2123#
2124config CPU_MIPSR1
2125 bool
2126 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2127
2128config CPU_MIPSR2
2129 bool
2130 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2131 select CPU_HAS_RIXI
2132 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2133 select MIPS_SPRAM
2134
2135config CPU_MIPSR5
2136 bool
2137 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2138 select CPU_HAS_RIXI
2139 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2140 select MIPS_SPRAM
2141
2142config CPU_MIPSR6
2143 bool
2144 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2145 select CPU_HAS_RIXI
2146 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2147 select HAVE_ARCH_BITREVERSE
2148 select MIPS_ASID_BITS_VARIABLE
2149 select MIPS_CRC_SUPPORT
2150 select MIPS_SPRAM
2151
2152config TARGET_ISA_REV
2153 int
2154 default 1 if CPU_MIPSR1
2155 default 2 if CPU_MIPSR2
2156 default 5 if CPU_MIPSR5
2157 default 6 if CPU_MIPSR6
2158 default 0
2159 help
2160 Reflects the ISA revision being targeted by the kernel build. This
2161 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2162
2163config EVA
2164 bool
2165
2166config XPA
2167 bool
2168
2169config SYS_SUPPORTS_32BIT_KERNEL
2170 bool
2171config SYS_SUPPORTS_64BIT_KERNEL
2172 bool
2173config CPU_SUPPORTS_32BIT_KERNEL
2174 bool
2175config CPU_SUPPORTS_64BIT_KERNEL
2176 bool
2177config CPU_SUPPORTS_CPUFREQ
2178 bool
2179config CPU_SUPPORTS_ADDRWINCFG
2180 bool
2181config CPU_SUPPORTS_HUGEPAGES
2182 bool
2183 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
2184config MIPS_PGD_C0_CONTEXT
2185 bool
2186 depends on 64BIT
2187 default y if (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
2188
2189#
2190# Set to y for ptrace access to watch registers.
2191#
2192config HARDWARE_WATCHPOINTS
2193 bool
2194 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2195
2196menu "Kernel type"
2197
2198choice
2199 prompt "Kernel code model"
2200 help
2201 You should only select this option if you have a workload that
2202 actually benefits from 64-bit processing or if your machine has
2203 large memory. You will only be presented a single option in this
2204 menu if your system does not support both 32-bit and 64-bit kernels.
2205
2206config 32BIT
2207 bool "32-bit kernel"
2208 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2209 select TRAD_SIGNALS
2210 help
2211 Select this option if you want to build a 32-bit kernel.
2212
2213config 64BIT
2214 bool "64-bit kernel"
2215 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2216 help
2217 Select this option if you want to build a 64-bit kernel.
2218
2219endchoice
2220
2221config MIPS_VA_BITS_48
2222 bool "48 bits virtual memory"
2223 depends on 64BIT
2224 help
2225 Support a maximum at least 48 bits of application virtual
2226 memory. Default is 40 bits or less, depending on the CPU.
2227 For page sizes 16k and above, this option results in a small
2228 memory overhead for page tables. For 4k page size, a fourth
2229 level of page tables is added which imposes both a memory
2230 overhead as well as slower TLB fault handling.
2231
2232 If unsure, say N.
2233
2234choice
2235 prompt "Kernel page size"
2236 default PAGE_SIZE_4KB
2237
2238config PAGE_SIZE_4KB
2239 bool "4kB"
2240 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2241 help
2242 This option select the standard 4kB Linux page size. On some
2243 R3000-family processors this is the only available page size. Using
2244 4kB page size will minimize memory consumption and is therefore
2245 recommended for low memory systems.
2246
2247config PAGE_SIZE_8KB
2248 bool "8kB"
2249 depends on CPU_CAVIUM_OCTEON
2250 depends on !MIPS_VA_BITS_48
2251 help
2252 Using 8kB page size will result in higher performance kernel at
2253 the price of higher memory consumption. This option is available
2254 only on cnMIPS processors. Note that you will need a suitable Linux
2255 distribution to support this.
2256
2257config PAGE_SIZE_16KB
2258 bool "16kB"
2259 depends on !CPU_R3000 && !CPU_TX39XX
2260 help
2261 Using 16kB page size will result in higher performance kernel at
2262 the price of higher memory consumption. This option is available on
2263 all non-R3000 family processors. Note that you will need a suitable
2264 Linux distribution to support this.
2265
2266config PAGE_SIZE_32KB
2267 bool "32kB"
2268 depends on CPU_CAVIUM_OCTEON
2269 depends on !MIPS_VA_BITS_48
2270 help
2271 Using 32kB page size will result in higher performance kernel at
2272 the price of higher memory consumption. This option is available
2273 only on cnMIPS cores. Note that you will need a suitable Linux
2274 distribution to support this.
2275
2276config PAGE_SIZE_64KB
2277 bool "64kB"
2278 depends on !CPU_R3000 && !CPU_TX39XX
2279 help
2280 Using 64kB page size will result in higher performance kernel at
2281 the price of higher memory consumption. This option is available on
2282 all non-R3000 family processor. Not that at the time of this
2283 writing this option is still high experimental.
2284
2285endchoice
2286
2287config FORCE_MAX_ZONEORDER
2288 int "Maximum zone order"
2289 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2290 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2291 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2292 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2293 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2294 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2295 range 0 64
2296 default "11"
2297 help
2298 The kernel memory allocator divides physically contiguous memory
2299 blocks into "zones", where each zone is a power of two number of
2300 pages. This option selects the largest power of two that the kernel
2301 keeps in the memory allocator. If you need to allocate very large
2302 blocks of physically contiguous memory, then you may need to
2303 increase this value.
2304
2305 This config option is actually maximum order plus one. For example,
2306 a value of 11 means that the largest free memory block is 2^10 pages.
2307
2308 The page size is not necessarily 4KB. Keep this in mind
2309 when choosing a value for this option.
2310
2311config BOARD_SCACHE
2312 bool
2313
2314config IP22_CPU_SCACHE
2315 bool
2316 select BOARD_SCACHE
2317
2318#
2319# Support for a MIPS32 / MIPS64 style S-caches
2320#
2321config MIPS_CPU_SCACHE
2322 bool
2323 select BOARD_SCACHE
2324
2325config R5000_CPU_SCACHE
2326 bool
2327 select BOARD_SCACHE
2328
2329config RM7000_CPU_SCACHE
2330 bool
2331 select BOARD_SCACHE
2332
2333config SIBYTE_DMA_PAGEOPS
2334 bool "Use DMA to clear/copy pages"
2335 depends on CPU_SB1
2336 help
2337 Instead of using the CPU to zero and copy pages, use a Data Mover
2338 channel. These DMA channels are otherwise unused by the standard
2339 SiByte Linux port. Seems to give a small performance benefit.
2340
2341config CPU_HAS_PREFETCH
2342 bool
2343
2344config CPU_GENERIC_DUMP_TLB
2345 bool
2346 default y if !(CPU_R3000 || CPU_TX39XX)
2347
2348config MIPS_FP_SUPPORT
2349 bool "Floating Point support" if EXPERT
2350 default y
2351 help
2352 Select y to include support for floating point in the kernel
2353 including initialization of FPU hardware, FP context save & restore
2354 and emulation of an FPU where necessary. Without this support any
2355 userland program attempting to use floating point instructions will
2356 receive a SIGILL.
2357
2358 If you know that your userland will not attempt to use floating point
2359 instructions then you can say n here to shrink the kernel a little.
2360
2361 If unsure, say y.
2362
2363config CPU_R2300_FPU
2364 bool
2365 depends on MIPS_FP_SUPPORT
2366 default y if CPU_R3000 || CPU_TX39XX
2367
2368config CPU_R3K_TLB
2369 bool
2370
2371config CPU_R4K_FPU
2372 bool
2373 depends on MIPS_FP_SUPPORT
2374 default y if !CPU_R2300_FPU
2375
2376config CPU_R4K_CACHE_TLB
2377 bool
2378 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2379
2380config MIPS_MT_SMP
2381 bool "MIPS MT SMP support (1 TC on each available VPE)"
2382 default y
2383 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2384 select CPU_MIPSR2_IRQ_VI
2385 select CPU_MIPSR2_IRQ_EI
2386 select SYNC_R4K
2387 select MIPS_MT
2388 select SMP
2389 select SMP_UP
2390 select SYS_SUPPORTS_SMP
2391 select SYS_SUPPORTS_SCHED_SMT
2392 select MIPS_PERF_SHARED_TC_COUNTERS
2393 help
2394 This is a kernel model which is known as SMVP. This is supported
2395 on cores with the MT ASE and uses the available VPEs to implement
2396 virtual processors which supports SMP. This is equivalent to the
2397 Intel Hyperthreading feature. For further information go to
2398 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2399
2400config MIPS_MT
2401 bool
2402
2403config SCHED_SMT
2404 bool "SMT (multithreading) scheduler support"
2405 depends on SYS_SUPPORTS_SCHED_SMT
2406 default n
2407 help
2408 SMT scheduler support improves the CPU scheduler's decision making
2409 when dealing with MIPS MT enabled cores at a cost of slightly
2410 increased overhead in some places. If unsure say N here.
2411
2412config SYS_SUPPORTS_SCHED_SMT
2413 bool
2414
2415config SYS_SUPPORTS_MULTITHREADING
2416 bool
2417
2418config MIPS_MT_FPAFF
2419 bool "Dynamic FPU affinity for FP-intensive threads"
2420 default y
2421 depends on MIPS_MT_SMP
2422
2423config MIPSR2_TO_R6_EMULATOR
2424 bool "MIPS R2-to-R6 emulator"
2425 depends on CPU_MIPSR6
2426 depends on MIPS_FP_SUPPORT
2427 default y
2428 help
2429 Choose this option if you want to run non-R6 MIPS userland code.
2430 Even if you say 'Y' here, the emulator will still be disabled by
2431 default. You can enable it using the 'mipsr2emu' kernel option.
2432 The only reason this is a build-time option is to save ~14K from the
2433 final kernel image.
2434
2435config SYS_SUPPORTS_VPE_LOADER
2436 bool
2437 depends on SYS_SUPPORTS_MULTITHREADING
2438 help
2439 Indicates that the platform supports the VPE loader, and provides
2440 physical_memsize.
2441
2442config MIPS_VPE_LOADER
2443 bool "VPE loader support."
2444 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2445 select CPU_MIPSR2_IRQ_VI
2446 select CPU_MIPSR2_IRQ_EI
2447 select MIPS_MT
2448 help
2449 Includes a loader for loading an elf relocatable object
2450 onto another VPE and running it.
2451
2452config MIPS_VPE_LOADER_CMP
2453 bool
2454 default "y"
2455 depends on MIPS_VPE_LOADER && MIPS_CMP
2456
2457config MIPS_VPE_LOADER_MT
2458 bool
2459 default "y"
2460 depends on MIPS_VPE_LOADER && !MIPS_CMP
2461
2462config MIPS_VPE_LOADER_TOM
2463 bool "Load VPE program into memory hidden from linux"
2464 depends on MIPS_VPE_LOADER
2465 default y
2466 help
2467 The loader can use memory that is present but has been hidden from
2468 Linux using the kernel command line option "mem=xxMB". It's up to
2469 you to ensure the amount you put in the option and the space your
2470 program requires is less or equal to the amount physically present.
2471
2472config MIPS_VPE_APSP_API
2473 bool "Enable support for AP/SP API (RTLX)"
2474 depends on MIPS_VPE_LOADER
2475
2476config MIPS_VPE_APSP_API_CMP
2477 bool
2478 default "y"
2479 depends on MIPS_VPE_APSP_API && MIPS_CMP
2480
2481config MIPS_VPE_APSP_API_MT
2482 bool
2483 default "y"
2484 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2485
2486config MIPS_CMP
2487 bool "MIPS CMP framework support (DEPRECATED)"
2488 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2489 select SMP
2490 select SYNC_R4K
2491 select SYS_SUPPORTS_SMP
2492 select WEAK_ORDERING
2493 default n
2494 help
2495 Select this if you are using a bootloader which implements the "CMP
2496 framework" protocol (ie. YAMON) and want your kernel to make use of
2497 its ability to start secondary CPUs.
2498
2499 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2500 instead of this.
2501
2502config MIPS_CPS
2503 bool "MIPS Coherent Processing System support"
2504 depends on SYS_SUPPORTS_MIPS_CPS
2505 select MIPS_CM
2506 select MIPS_CPS_PM if HOTPLUG_CPU
2507 select SMP
2508 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2509 select SYS_SUPPORTS_HOTPLUG_CPU
2510 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2511 select SYS_SUPPORTS_SMP
2512 select WEAK_ORDERING
2513 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2514 help
2515 Select this if you wish to run an SMP kernel across multiple cores
2516 within a MIPS Coherent Processing System. When this option is
2517 enabled the kernel will probe for other cores and boot them with
2518 no external assistance. It is safe to enable this when hardware
2519 support is unavailable.
2520
2521config MIPS_CPS_PM
2522 depends on MIPS_CPS
2523 bool
2524
2525config MIPS_CM
2526 bool
2527 select MIPS_CPC
2528
2529config MIPS_CPC
2530 bool
2531
2532config SB1_PASS_2_WORKAROUNDS
2533 bool
2534 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2535 default y
2536
2537config SB1_PASS_2_1_WORKAROUNDS
2538 bool
2539 depends on CPU_SB1 && CPU_SB1_PASS_2
2540 default y
2541
2542choice
2543 prompt "SmartMIPS or microMIPS ASE support"
2544
2545config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2546 bool "None"
2547 help
2548 Select this if you want neither microMIPS nor SmartMIPS support
2549
2550config CPU_HAS_SMARTMIPS
2551 depends on SYS_SUPPORTS_SMARTMIPS
2552 bool "SmartMIPS"
2553 help
2554 SmartMIPS is a extension of the MIPS32 architecture aimed at
2555 increased security at both hardware and software level for
2556 smartcards. Enabling this option will allow proper use of the
2557 SmartMIPS instructions by Linux applications. However a kernel with
2558 this option will not work on a MIPS core without SmartMIPS core. If
2559 you don't know you probably don't have SmartMIPS and should say N
2560 here.
2561
2562config CPU_MICROMIPS
2563 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2564 bool "microMIPS"
2565 help
2566 When this option is enabled the kernel will be built using the
2567 microMIPS ISA
2568
2569endchoice
2570
2571config CPU_HAS_MSA
2572 bool "Support for the MIPS SIMD Architecture"
2573 depends on CPU_SUPPORTS_MSA
2574 depends on MIPS_FP_SUPPORT
2575 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2576 help
2577 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2578 and a set of SIMD instructions to operate on them. When this option
2579 is enabled the kernel will support allocating & switching MSA
2580 vector register contexts. If you know that your kernel will only be
2581 running on CPUs which do not support MSA or that your userland will
2582 not be making use of it then you may wish to say N here to reduce
2583 the size & complexity of your kernel.
2584
2585 If unsure, say Y.
2586
2587config CPU_HAS_WB
2588 bool
2589
2590config XKS01
2591 bool
2592
2593config CPU_HAS_DIEI
2594 depends on !CPU_DIEI_BROKEN
2595 bool
2596
2597config CPU_DIEI_BROKEN
2598 bool
2599
2600config CPU_HAS_RIXI
2601 bool
2602
2603config CPU_NO_LOAD_STORE_LR
2604 bool
2605 help
2606 CPU lacks support for unaligned load and store instructions:
2607 LWL, LWR, SWL, SWR (Load/store word left/right).
2608 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2609 systems).
2610
2611#
2612# Vectored interrupt mode is an R2 feature
2613#
2614config CPU_MIPSR2_IRQ_VI
2615 bool
2616
2617#
2618# Extended interrupt mode is an R2 feature
2619#
2620config CPU_MIPSR2_IRQ_EI
2621 bool
2622
2623config CPU_HAS_SYNC
2624 bool
2625 depends on !CPU_R3000
2626 default y
2627
2628#
2629# CPU non-features
2630#
2631config CPU_DADDI_WORKAROUNDS
2632 bool
2633
2634config CPU_R4000_WORKAROUNDS
2635 bool
2636 select CPU_R4400_WORKAROUNDS
2637
2638config CPU_R4400_WORKAROUNDS
2639 bool
2640
2641config CPU_R4X00_BUGS64
2642 bool
2643 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2644
2645config MIPS_ASID_SHIFT
2646 int
2647 default 6 if CPU_R3000 || CPU_TX39XX
2648 default 0
2649
2650config MIPS_ASID_BITS
2651 int
2652 default 0 if MIPS_ASID_BITS_VARIABLE
2653 default 6 if CPU_R3000 || CPU_TX39XX
2654 default 8
2655
2656config MIPS_ASID_BITS_VARIABLE
2657 bool
2658
2659config MIPS_CRC_SUPPORT
2660 bool
2661
2662# R4600 erratum. Due to the lack of errata information the exact
2663# technical details aren't known. I've experimentally found that disabling
2664# interrupts during indexed I-cache flushes seems to be sufficient to deal
2665# with the issue.
2666config WAR_R4600_V1_INDEX_ICACHEOP
2667 bool
2668
2669# Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2670#
2671# 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2672# Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2673# executed if there is no other dcache activity. If the dcache is
2674# accessed for another instruction immediately preceding when these
2675# cache instructions are executing, it is possible that the dcache
2676# tag match outputs used by these cache instructions will be
2677# incorrect. These cache instructions should be preceded by at least
2678# four instructions that are not any kind of load or store
2679# instruction.
2680#
2681# This is not allowed: lw
2682# nop
2683# nop
2684# nop
2685# cache Hit_Writeback_Invalidate_D
2686#
2687# This is allowed: lw
2688# nop
2689# nop
2690# nop
2691# nop
2692# cache Hit_Writeback_Invalidate_D
2693config WAR_R4600_V1_HIT_CACHEOP
2694 bool
2695
2696# Writeback and invalidate the primary cache dcache before DMA.
2697#
2698# R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2699# Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2700# operate correctly if the internal data cache refill buffer is empty. These
2701# CACHE instructions should be separated from any potential data cache miss
2702# by a load instruction to an uncached address to empty the response buffer."
2703# (Revision 2.0 device errata from IDT available on https://www.idt.com/
2704# in .pdf format.)
2705config WAR_R4600_V2_HIT_CACHEOP
2706 bool
2707
2708# From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2709# the line which this instruction itself exists, the following
2710# operation is not guaranteed."
2711#
2712# Workaround: do two phase flushing for Index_Invalidate_I
2713config WAR_TX49XX_ICACHE_INDEX_INV
2714 bool
2715
2716# The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2717# opposes it being called that) where invalid instructions in the same
2718# I-cache line worth of instructions being fetched may case spurious
2719# exceptions.
2720config WAR_ICACHE_REFILLS
2721 bool
2722
2723# On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2724# may cause ll / sc and lld / scd sequences to execute non-atomically.
2725config WAR_R10000_LLSC
2726 bool
2727
2728# 34K core erratum: "Problems Executing the TLBR Instruction"
2729config WAR_MIPS34K_MISSED_ITLB
2730 bool
2731
2732#
2733# - Highmem only makes sense for the 32-bit kernel.
2734# - The current highmem code will only work properly on physically indexed
2735# caches such as R3000, SB1, R7000 or those that look like they're virtually
2736# indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2737# moment we protect the user and offer the highmem option only on machines
2738# where it's known to be safe. This will not offer highmem on a few systems
2739# such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2740# indexed CPUs but we're playing safe.
2741# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2742# know they might have memory configurations that could make use of highmem
2743# support.
2744#
2745config HIGHMEM
2746 bool "High Memory Support"
2747 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2748 select KMAP_LOCAL
2749
2750config CPU_SUPPORTS_HIGHMEM
2751 bool
2752
2753config SYS_SUPPORTS_HIGHMEM
2754 bool
2755
2756config SYS_SUPPORTS_SMARTMIPS
2757 bool
2758
2759config SYS_SUPPORTS_MICROMIPS
2760 bool
2761
2762config SYS_SUPPORTS_MIPS16
2763 bool
2764 help
2765 This option must be set if a kernel might be executed on a MIPS16-
2766 enabled CPU even if MIPS16 is not actually being used. In other
2767 words, it makes the kernel MIPS16-tolerant.
2768
2769config CPU_SUPPORTS_MSA
2770 bool
2771
2772config ARCH_FLATMEM_ENABLE
2773 def_bool y
2774 depends on !NUMA && !CPU_LOONGSON2EF
2775
2776config ARCH_SPARSEMEM_ENABLE
2777 bool
2778 select SPARSEMEM_STATIC if !SGI_IP27
2779
2780config NUMA
2781 bool "NUMA Support"
2782 depends on SYS_SUPPORTS_NUMA
2783 select SMP
2784 help
2785 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2786 Access). This option improves performance on systems with more
2787 than two nodes; on two node systems it is generally better to
2788 leave it disabled; on single node systems leave this option
2789 disabled.
2790
2791config SYS_SUPPORTS_NUMA
2792 bool
2793
2794config HAVE_SETUP_PER_CPU_AREA
2795 def_bool y
2796 depends on NUMA
2797
2798config NEED_PER_CPU_EMBED_FIRST_CHUNK
2799 def_bool y
2800 depends on NUMA
2801
2802config RELOCATABLE
2803 bool "Relocatable kernel"
2804 depends on SYS_SUPPORTS_RELOCATABLE
2805 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2806 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2807 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2808 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2809 CPU_LOONGSON64
2810 help
2811 This builds a kernel image that retains relocation information
2812 so it can be loaded someplace besides the default 1MB.
2813 The relocations make the kernel binary about 15% larger,
2814 but are discarded at runtime
2815
2816config RELOCATION_TABLE_SIZE
2817 hex "Relocation table size"
2818 depends on RELOCATABLE
2819 range 0x0 0x01000000
2820 default "0x00200000" if CPU_LOONGSON64
2821 default "0x00100000"
2822 help
2823 A table of relocation data will be appended to the kernel binary
2824 and parsed at boot to fix up the relocated kernel.
2825
2826 This option allows the amount of space reserved for the table to be
2827 adjusted, although the default of 1Mb should be ok in most cases.
2828
2829 The build will fail and a valid size suggested if this is too small.
2830
2831 If unsure, leave at the default value.
2832
2833config RANDOMIZE_BASE
2834 bool "Randomize the address of the kernel image"
2835 depends on RELOCATABLE
2836 help
2837 Randomizes the physical and virtual address at which the
2838 kernel image is loaded, as a security feature that
2839 deters exploit attempts relying on knowledge of the location
2840 of kernel internals.
2841
2842 Entropy is generated using any coprocessor 0 registers available.
2843
2844 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2845
2846 If unsure, say N.
2847
2848config RANDOMIZE_BASE_MAX_OFFSET
2849 hex "Maximum kASLR offset" if EXPERT
2850 depends on RANDOMIZE_BASE
2851 range 0x0 0x40000000 if EVA || 64BIT
2852 range 0x0 0x08000000
2853 default "0x01000000"
2854 help
2855 When kASLR is active, this provides the maximum offset that will
2856 be applied to the kernel image. It should be set according to the
2857 amount of physical RAM available in the target system minus
2858 PHYSICAL_START and must be a power of 2.
2859
2860 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2861 EVA or 64-bit. The default is 16Mb.
2862
2863config NODES_SHIFT
2864 int
2865 default "6"
2866 depends on NUMA
2867
2868config HW_PERF_EVENTS
2869 bool "Enable hardware performance counter support for perf events"
2870 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
2871 default y
2872 help
2873 Enable hardware performance counter support for perf events. If
2874 disabled, perf events will use software events only.
2875
2876config DMI
2877 bool "Enable DMI scanning"
2878 depends on MACH_LOONGSON64
2879 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2880 default y
2881 help
2882 Enabled scanning of DMI to identify machine quirks. Say Y
2883 here unless you have verified that your setup is not
2884 affected by entries in the DMI blacklist. Required by PNP
2885 BIOS code.
2886
2887config SMP
2888 bool "Multi-Processing support"
2889 depends on SYS_SUPPORTS_SMP
2890 help
2891 This enables support for systems with more than one CPU. If you have
2892 a system with only one CPU, say N. If you have a system with more
2893 than one CPU, say Y.
2894
2895 If you say N here, the kernel will run on uni- and multiprocessor
2896 machines, but will use only one CPU of a multiprocessor machine. If
2897 you say Y here, the kernel will run on many, but not all,
2898 uniprocessor machines. On a uniprocessor machine, the kernel
2899 will run faster if you say N here.
2900
2901 People using multiprocessor machines who say Y here should also say
2902 Y to "Enhanced Real Time Clock Support", below.
2903
2904 See also the SMP-HOWTO available at
2905 <https://www.tldp.org/docs.html#howto>.
2906
2907 If you don't know what to do here, say N.
2908
2909config HOTPLUG_CPU
2910 bool "Support for hot-pluggable CPUs"
2911 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2912 help
2913 Say Y here to allow turning CPUs off and on. CPUs can be
2914 controlled through /sys/devices/system/cpu.
2915 (Note: power management support will enable this option
2916 automatically on SMP systems. )
2917 Say N if you want to disable CPU hotplug.
2918
2919config SMP_UP
2920 bool
2921
2922config SYS_SUPPORTS_MIPS_CMP
2923 bool
2924
2925config SYS_SUPPORTS_MIPS_CPS
2926 bool
2927
2928config SYS_SUPPORTS_SMP
2929 bool
2930
2931config NR_CPUS_DEFAULT_4
2932 bool
2933
2934config NR_CPUS_DEFAULT_8
2935 bool
2936
2937config NR_CPUS_DEFAULT_16
2938 bool
2939
2940config NR_CPUS_DEFAULT_32
2941 bool
2942
2943config NR_CPUS_DEFAULT_64
2944 bool
2945
2946config NR_CPUS
2947 int "Maximum number of CPUs (2-256)"
2948 range 2 256
2949 depends on SMP
2950 default "4" if NR_CPUS_DEFAULT_4
2951 default "8" if NR_CPUS_DEFAULT_8
2952 default "16" if NR_CPUS_DEFAULT_16
2953 default "32" if NR_CPUS_DEFAULT_32
2954 default "64" if NR_CPUS_DEFAULT_64
2955 help
2956 This allows you to specify the maximum number of CPUs which this
2957 kernel will support. The maximum supported value is 32 for 32-bit
2958 kernel and 64 for 64-bit kernels; the minimum value which makes
2959 sense is 1 for Qemu (useful only for kernel debugging purposes)
2960 and 2 for all others.
2961
2962 This is purely to save memory - each supported CPU adds
2963 approximately eight kilobytes to the kernel image. For best
2964 performance should round up your number of processors to the next
2965 power of two.
2966
2967config MIPS_PERF_SHARED_TC_COUNTERS
2968 bool
2969
2970config MIPS_NR_CPU_NR_MAP_1024
2971 bool
2972
2973config MIPS_NR_CPU_NR_MAP
2974 int
2975 depends on SMP
2976 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2977 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2978
2979#
2980# Timer Interrupt Frequency Configuration
2981#
2982
2983choice
2984 prompt "Timer frequency"
2985 default HZ_250
2986 help
2987 Allows the configuration of the timer frequency.
2988
2989 config HZ_24
2990 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2991
2992 config HZ_48
2993 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2994
2995 config HZ_100
2996 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2997
2998 config HZ_128
2999 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
3000
3001 config HZ_250
3002 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
3003
3004 config HZ_256
3005 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
3006
3007 config HZ_1000
3008 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
3009
3010 config HZ_1024
3011 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
3012
3013endchoice
3014
3015config SYS_SUPPORTS_24HZ
3016 bool
3017
3018config SYS_SUPPORTS_48HZ
3019 bool
3020
3021config SYS_SUPPORTS_100HZ
3022 bool
3023
3024config SYS_SUPPORTS_128HZ
3025 bool
3026
3027config SYS_SUPPORTS_250HZ
3028 bool
3029
3030config SYS_SUPPORTS_256HZ
3031 bool
3032
3033config SYS_SUPPORTS_1000HZ
3034 bool
3035
3036config SYS_SUPPORTS_1024HZ
3037 bool
3038
3039config SYS_SUPPORTS_ARBIT_HZ
3040 bool
3041 default y if !SYS_SUPPORTS_24HZ && \
3042 !SYS_SUPPORTS_48HZ && \
3043 !SYS_SUPPORTS_100HZ && \
3044 !SYS_SUPPORTS_128HZ && \
3045 !SYS_SUPPORTS_250HZ && \
3046 !SYS_SUPPORTS_256HZ && \
3047 !SYS_SUPPORTS_1000HZ && \
3048 !SYS_SUPPORTS_1024HZ
3049
3050config HZ
3051 int
3052 default 24 if HZ_24
3053 default 48 if HZ_48
3054 default 100 if HZ_100
3055 default 128 if HZ_128
3056 default 250 if HZ_250
3057 default 256 if HZ_256
3058 default 1000 if HZ_1000
3059 default 1024 if HZ_1024
3060
3061config SCHED_HRTICK
3062 def_bool HIGH_RES_TIMERS
3063
3064config KEXEC
3065 bool "Kexec system call"
3066 select KEXEC_CORE
3067 help
3068 kexec is a system call that implements the ability to shutdown your
3069 current kernel, and to start another kernel. It is like a reboot
3070 but it is independent of the system firmware. And like a reboot
3071 you can start any kernel with it, not just Linux.
3072
3073 The name comes from the similarity to the exec system call.
3074
3075 It is an ongoing process to be certain the hardware in a machine
3076 is properly shutdown, so do not be surprised if this code does not
3077 initially work for you. As of this writing the exact hardware
3078 interface is strongly in flux, so no good recommendation can be
3079 made.
3080
3081config CRASH_DUMP
3082 bool "Kernel crash dumps"
3083 help
3084 Generate crash dump after being started by kexec.
3085 This should be normally only set in special crash dump kernels
3086 which are loaded in the main kernel with kexec-tools into
3087 a specially reserved region and then later executed after
3088 a crash by kdump/kexec. The crash dump kernel must be compiled
3089 to a memory address not used by the main kernel or firmware using
3090 PHYSICAL_START.
3091
3092config PHYSICAL_START
3093 hex "Physical address where the kernel is loaded"
3094 default "0xffffffff84000000"
3095 depends on CRASH_DUMP
3096 help
3097 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
3098 If you plan to use kernel for capturing the crash dump change
3099 this value to start of the reserved region (the "X" value as
3100 specified in the "crashkernel=YM@XM" command line boot parameter
3101 passed to the panic-ed kernel).
3102
3103config MIPS_O32_FP64_SUPPORT
3104 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
3105 depends on 32BIT || MIPS32_O32
3106 help
3107 When this is enabled, the kernel will support use of 64-bit floating
3108 point registers with binaries using the O32 ABI along with the
3109 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3110 32-bit MIPS systems this support is at the cost of increasing the
3111 size and complexity of the compiled FPU emulator. Thus if you are
3112 running a MIPS32 system and know that none of your userland binaries
3113 will require 64-bit floating point, you may wish to reduce the size
3114 of your kernel & potentially improve FP emulation performance by
3115 saying N here.
3116
3117 Although binutils currently supports use of this flag the details
3118 concerning its effect upon the O32 ABI in userland are still being
3119 worked on. In order to avoid userland becoming dependent upon current
3120 behaviour before the details have been finalised, this option should
3121 be considered experimental and only enabled by those working upon
3122 said details.
3123
3124 If unsure, say N.
3125
3126config USE_OF
3127 bool
3128 select OF
3129 select OF_EARLY_FLATTREE
3130 select IRQ_DOMAIN
3131
3132config UHI_BOOT
3133 bool
3134
3135config BUILTIN_DTB
3136 bool
3137
3138choice
3139 prompt "Kernel appended dtb support" if USE_OF
3140 default MIPS_NO_APPENDED_DTB
3141
3142 config MIPS_NO_APPENDED_DTB
3143 bool "None"
3144 help
3145 Do not enable appended dtb support.
3146
3147 config MIPS_ELF_APPENDED_DTB
3148 bool "vmlinux"
3149 help
3150 With this option, the boot code will look for a device tree binary
3151 DTB) included in the vmlinux ELF section .appended_dtb. By default
3152 it is empty and the DTB can be appended using binutils command
3153 objcopy:
3154
3155 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3156
3157 This is meant as a backward compatibility convenience for those
3158 systems with a bootloader that can't be upgraded to accommodate
3159 the documented boot protocol using a device tree.
3160
3161 config MIPS_RAW_APPENDED_DTB
3162 bool "vmlinux.bin or vmlinuz.bin"
3163 help
3164 With this option, the boot code will look for a device tree binary
3165 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3166 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3167
3168 This is meant as a backward compatibility convenience for those
3169 systems with a bootloader that can't be upgraded to accommodate
3170 the documented boot protocol using a device tree.
3171
3172 Beware that there is very little in terms of protection against
3173 this option being confused by leftover garbage in memory that might
3174 look like a DTB header after a reboot if no actual DTB is appended
3175 to vmlinux.bin. Do not leave this option active in a production kernel
3176 if you don't intend to always append a DTB.
3177endchoice
3178
3179choice
3180 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3181 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3182 !MACH_LOONGSON64 && !MIPS_MALTA && \
3183 !CAVIUM_OCTEON_SOC
3184 default MIPS_CMDLINE_FROM_BOOTLOADER
3185
3186 config MIPS_CMDLINE_FROM_DTB
3187 depends on USE_OF
3188 bool "Dtb kernel arguments if available"
3189
3190 config MIPS_CMDLINE_DTB_EXTEND
3191 depends on USE_OF
3192 bool "Extend dtb kernel arguments with bootloader arguments"
3193
3194 config MIPS_CMDLINE_FROM_BOOTLOADER
3195 bool "Bootloader kernel arguments if available"
3196
3197 config MIPS_CMDLINE_BUILTIN_EXTEND
3198 depends on CMDLINE_BOOL
3199 bool "Extend builtin kernel arguments with bootloader arguments"
3200endchoice
3201
3202endmenu
3203
3204config LOCKDEP_SUPPORT
3205 bool
3206 default y
3207
3208config STACKTRACE_SUPPORT
3209 bool
3210 default y
3211
3212config PGTABLE_LEVELS
3213 int
3214 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3215 default 3 if 64BIT && !PAGE_SIZE_64KB
3216 default 2
3217
3218config MIPS_AUTO_PFN_OFFSET
3219 bool
3220
3221menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3222
3223config PCI_DRIVERS_GENERIC
3224 select PCI_DOMAINS_GENERIC if PCI
3225 bool
3226
3227config PCI_DRIVERS_LEGACY
3228 def_bool !PCI_DRIVERS_GENERIC
3229 select NO_GENERIC_PCI_IOPORT_MAP
3230 select PCI_DOMAINS if PCI
3231
3232#
3233# ISA support is now enabled via select. Too many systems still have the one
3234# or other ISA chip on the board that users don't know about so don't expect
3235# users to choose the right thing ...
3236#
3237config ISA
3238 bool
3239
3240config TC
3241 bool "TURBOchannel support"
3242 depends on MACH_DECSTATION
3243 help
3244 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3245 processors. TURBOchannel programming specifications are available
3246 at:
3247 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3248 and:
3249 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3250 Linux driver support status is documented at:
3251 <http://www.linux-mips.org/wiki/DECstation>
3252
3253config MMU
3254 bool
3255 default y
3256
3257config ARCH_MMAP_RND_BITS_MIN
3258 default 12 if 64BIT
3259 default 8
3260
3261config ARCH_MMAP_RND_BITS_MAX
3262 default 18 if 64BIT
3263 default 15
3264
3265config ARCH_MMAP_RND_COMPAT_BITS_MIN
3266 default 8
3267
3268config ARCH_MMAP_RND_COMPAT_BITS_MAX
3269 default 15
3270
3271config I8253
3272 bool
3273 select CLKSRC_I8253
3274 select CLKEVT_I8253
3275 select MIPS_EXTERNAL_TIMER
3276endmenu
3277
3278config TRAD_SIGNALS
3279 bool
3280
3281config MIPS32_COMPAT
3282 bool
3283
3284config COMPAT
3285 bool
3286
3287config SYSVIPC_COMPAT
3288 bool
3289
3290config MIPS32_O32
3291 bool "Kernel support for o32 binaries"
3292 depends on 64BIT
3293 select ARCH_WANT_OLD_COMPAT_IPC
3294 select COMPAT
3295 select MIPS32_COMPAT
3296 select SYSVIPC_COMPAT if SYSVIPC
3297 help
3298 Select this option if you want to run o32 binaries. These are pure
3299 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3300 existing binaries are in this format.
3301
3302 If unsure, say Y.
3303
3304config MIPS32_N32
3305 bool "Kernel support for n32 binaries"
3306 depends on 64BIT
3307 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3308 select COMPAT
3309 select MIPS32_COMPAT
3310 select SYSVIPC_COMPAT if SYSVIPC
3311 help
3312 Select this option if you want to run n32 binaries. These are
3313 64-bit binaries using 32-bit quantities for addressing and certain
3314 data that would normally be 64-bit. They are used in special
3315 cases.
3316
3317 If unsure, say N.
3318
3319menu "Power management options"
3320
3321config ARCH_HIBERNATION_POSSIBLE
3322 def_bool y
3323 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3324
3325config ARCH_SUSPEND_POSSIBLE
3326 def_bool y
3327 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3328
3329source "kernel/power/Kconfig"
3330
3331endmenu
3332
3333config MIPS_EXTERNAL_TIMER
3334 bool
3335
3336menu "CPU Power Management"
3337
3338if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3339source "drivers/cpufreq/Kconfig"
3340endif
3341
3342source "drivers/cpuidle/Kconfig"
3343
3344endmenu
3345
3346source "drivers/firmware/Kconfig"
3347
3348source "arch/mips/kvm/Kconfig"
3349
3350source "arch/mips/vdso/Kconfig"
1# SPDX-License-Identifier: GPL-2.0
2config MIPS
3 bool
4 default y
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_CLOCKSOURCE_DATA
8 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
9 select ARCH_HAS_UBSAN_SANITIZE_ALL
10 select ARCH_SUPPORTS_UPROBES
11 select ARCH_USE_BUILTIN_BSWAP
12 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
13 select ARCH_USE_QUEUED_RWLOCKS
14 select ARCH_USE_QUEUED_SPINLOCKS
15 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
16 select ARCH_WANT_IPC_PARSE_VERSION
17 select BUILDTIME_EXTABLE_SORT
18 select CLONE_BACKWARDS
19 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
20 select CPU_PM if CPU_IDLE
21 select GENERIC_ATOMIC64 if !64BIT
22 select GENERIC_CLOCKEVENTS
23 select GENERIC_CMOS_UPDATE
24 select GENERIC_CPU_AUTOPROBE
25 select GENERIC_GETTIMEOFDAY
26 select GENERIC_IOMAP
27 select GENERIC_IRQ_PROBE
28 select GENERIC_IRQ_SHOW
29 select GENERIC_ISA_DMA if EISA
30 select GENERIC_LIB_ASHLDI3
31 select GENERIC_LIB_ASHRDI3
32 select GENERIC_LIB_CMPDI2
33 select GENERIC_LIB_LSHRDI3
34 select GENERIC_LIB_UCMPDI2
35 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
36 select GENERIC_SMP_IDLE_THREAD
37 select GENERIC_TIME_VSYSCALL
38 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
39 select HANDLE_DOMAIN_IRQ
40 select HAVE_ARCH_COMPILER_H
41 select HAVE_ARCH_JUMP_LABEL
42 select HAVE_ARCH_KGDB
43 select HAVE_ARCH_MMAP_RND_BITS if MMU
44 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
45 select HAVE_ARCH_SECCOMP_FILTER
46 select HAVE_ARCH_TRACEHOOK
47 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
48 select HAVE_ASM_MODVERSIONS
49 select HAVE_EBPF_JIT if (!CPU_MICROMIPS)
50 select HAVE_CONTEXT_TRACKING
51 select HAVE_COPY_THREAD_TLS
52 select HAVE_C_RECORDMCOUNT
53 select HAVE_DEBUG_KMEMLEAK
54 select HAVE_DEBUG_STACKOVERFLOW
55 select HAVE_DMA_CONTIGUOUS
56 select HAVE_DYNAMIC_FTRACE
57 select HAVE_EXIT_THREAD
58 select HAVE_FAST_GUP
59 select HAVE_FTRACE_MCOUNT_RECORD
60 select HAVE_FUNCTION_GRAPH_TRACER
61 select HAVE_FUNCTION_TRACER
62 select HAVE_IDE
63 select HAVE_IOREMAP_PROT
64 select HAVE_IRQ_EXIT_ON_IRQ_STACK
65 select HAVE_IRQ_TIME_ACCOUNTING
66 select HAVE_KPROBES
67 select HAVE_KRETPROBES
68 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
69 select HAVE_MEMBLOCK_NODE_MAP
70 select HAVE_MOD_ARCH_SPECIFIC
71 select HAVE_NMI
72 select HAVE_OPROFILE
73 select HAVE_PERF_EVENTS
74 select HAVE_REGS_AND_STACK_ACCESS_API
75 select HAVE_RSEQ
76 select HAVE_STACKPROTECTOR
77 select HAVE_SYSCALL_TRACEPOINTS
78 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
79 select HAVE_GENERIC_VDSO
80 select IRQ_FORCED_THREADING
81 select ISA if EISA
82 select MODULES_USE_ELF_RELA if MODULES && 64BIT
83 select MODULES_USE_ELF_REL if MODULES
84 select PERF_USE_VMALLOC
85 select RTC_LIB
86 select SYSCTL_EXCEPTION_TRACE
87 select VIRT_TO_BUS
88 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
89
90menu "Machine selection"
91
92choice
93 prompt "System type"
94 default MIPS_GENERIC
95
96config MIPS_GENERIC
97 bool "Generic board-agnostic MIPS kernel"
98 select BOOT_RAW
99 select BUILTIN_DTB
100 select CEVT_R4K
101 select CLKSRC_MIPS_GIC
102 select COMMON_CLK
103 select CPU_MIPSR2_IRQ_VI
104 select CPU_MIPSR2_IRQ_EI
105 select CSRC_R4K
106 select DMA_PERDEV_COHERENT
107 select HAVE_PCI
108 select IRQ_MIPS_CPU
109 select LIBFDT
110 select MIPS_AUTO_PFN_OFFSET
111 select MIPS_CPU_SCACHE
112 select MIPS_GIC
113 select MIPS_L1_CACHE_SHIFT_7
114 select NO_EXCEPT_FILL
115 select PCI_DRIVERS_GENERIC
116 select PINCTRL
117 select SMP_UP if SMP
118 select SWAP_IO_SPACE
119 select SYS_HAS_CPU_MIPS32_R1
120 select SYS_HAS_CPU_MIPS32_R2
121 select SYS_HAS_CPU_MIPS32_R6
122 select SYS_HAS_CPU_MIPS64_R1
123 select SYS_HAS_CPU_MIPS64_R2
124 select SYS_HAS_CPU_MIPS64_R6
125 select SYS_SUPPORTS_32BIT_KERNEL
126 select SYS_SUPPORTS_64BIT_KERNEL
127 select SYS_SUPPORTS_BIG_ENDIAN
128 select SYS_SUPPORTS_HIGHMEM
129 select SYS_SUPPORTS_LITTLE_ENDIAN
130 select SYS_SUPPORTS_MICROMIPS
131 select SYS_SUPPORTS_MIPS_CPS
132 select SYS_SUPPORTS_MIPS16
133 select SYS_SUPPORTS_MULTITHREADING
134 select SYS_SUPPORTS_RELOCATABLE
135 select SYS_SUPPORTS_SMARTMIPS
136 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
137 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
138 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
139 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
140 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
141 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
142 select USE_OF
143 select UHI_BOOT
144 help
145 Select this to build a kernel which aims to support multiple boards,
146 generally using a flattened device tree passed from the bootloader
147 using the boot protocol defined in the UHI (Unified Hosting
148 Interface) specification.
149
150config MIPS_ALCHEMY
151 bool "Alchemy processor based machines"
152 select PHYS_ADDR_T_64BIT
153 select CEVT_R4K
154 select CSRC_R4K
155 select IRQ_MIPS_CPU
156 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
157 select SYS_HAS_CPU_MIPS32_R1
158 select SYS_SUPPORTS_32BIT_KERNEL
159 select SYS_SUPPORTS_APM_EMULATION
160 select GPIOLIB
161 select SYS_SUPPORTS_ZBOOT
162 select COMMON_CLK
163
164config AR7
165 bool "Texas Instruments AR7"
166 select BOOT_ELF32
167 select DMA_NONCOHERENT
168 select CEVT_R4K
169 select CSRC_R4K
170 select IRQ_MIPS_CPU
171 select NO_EXCEPT_FILL
172 select SWAP_IO_SPACE
173 select SYS_HAS_CPU_MIPS32_R1
174 select SYS_HAS_EARLY_PRINTK
175 select SYS_SUPPORTS_32BIT_KERNEL
176 select SYS_SUPPORTS_LITTLE_ENDIAN
177 select SYS_SUPPORTS_MIPS16
178 select SYS_SUPPORTS_ZBOOT_UART16550
179 select GPIOLIB
180 select VLYNQ
181 select HAVE_CLK
182 help
183 Support for the Texas Instruments AR7 System-on-a-Chip
184 family: TNETD7100, 7200 and 7300.
185
186config ATH25
187 bool "Atheros AR231x/AR531x SoC support"
188 select CEVT_R4K
189 select CSRC_R4K
190 select DMA_NONCOHERENT
191 select IRQ_MIPS_CPU
192 select IRQ_DOMAIN
193 select SYS_HAS_CPU_MIPS32_R1
194 select SYS_SUPPORTS_BIG_ENDIAN
195 select SYS_SUPPORTS_32BIT_KERNEL
196 select SYS_HAS_EARLY_PRINTK
197 help
198 Support for Atheros AR231x and Atheros AR531x based boards
199
200config ATH79
201 bool "Atheros AR71XX/AR724X/AR913X based boards"
202 select ARCH_HAS_RESET_CONTROLLER
203 select BOOT_RAW
204 select CEVT_R4K
205 select CSRC_R4K
206 select DMA_NONCOHERENT
207 select GPIOLIB
208 select PINCTRL
209 select HAVE_CLK
210 select COMMON_CLK
211 select CLKDEV_LOOKUP
212 select IRQ_MIPS_CPU
213 select SYS_HAS_CPU_MIPS32_R2
214 select SYS_HAS_EARLY_PRINTK
215 select SYS_SUPPORTS_32BIT_KERNEL
216 select SYS_SUPPORTS_BIG_ENDIAN
217 select SYS_SUPPORTS_MIPS16
218 select SYS_SUPPORTS_ZBOOT_UART_PROM
219 select USE_OF
220 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
221 help
222 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
223
224config BMIPS_GENERIC
225 bool "Broadcom Generic BMIPS kernel"
226 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
227 select ARCH_HAS_PHYS_TO_DMA
228 select BOOT_RAW
229 select NO_EXCEPT_FILL
230 select USE_OF
231 select CEVT_R4K
232 select CSRC_R4K
233 select SYNC_R4K
234 select COMMON_CLK
235 select BCM6345_L1_IRQ
236 select BCM7038_L1_IRQ
237 select BCM7120_L2_IRQ
238 select BRCMSTB_L2_IRQ
239 select IRQ_MIPS_CPU
240 select DMA_NONCOHERENT
241 select SYS_SUPPORTS_32BIT_KERNEL
242 select SYS_SUPPORTS_LITTLE_ENDIAN
243 select SYS_SUPPORTS_BIG_ENDIAN
244 select SYS_SUPPORTS_HIGHMEM
245 select SYS_HAS_CPU_BMIPS32_3300
246 select SYS_HAS_CPU_BMIPS4350
247 select SYS_HAS_CPU_BMIPS4380
248 select SYS_HAS_CPU_BMIPS5000
249 select SWAP_IO_SPACE
250 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
251 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
252 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
253 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
254 select HARDIRQS_SW_RESEND
255 help
256 Build a generic DT-based kernel image that boots on select
257 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
258 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
259 must be set appropriately for your board.
260
261config BCM47XX
262 bool "Broadcom BCM47XX based boards"
263 select BOOT_RAW
264 select CEVT_R4K
265 select CSRC_R4K
266 select DMA_NONCOHERENT
267 select HAVE_PCI
268 select IRQ_MIPS_CPU
269 select SYS_HAS_CPU_MIPS32_R1
270 select NO_EXCEPT_FILL
271 select SYS_SUPPORTS_32BIT_KERNEL
272 select SYS_SUPPORTS_LITTLE_ENDIAN
273 select SYS_SUPPORTS_MIPS16
274 select SYS_SUPPORTS_ZBOOT
275 select SYS_HAS_EARLY_PRINTK
276 select USE_GENERIC_EARLY_PRINTK_8250
277 select GPIOLIB
278 select LEDS_GPIO_REGISTER
279 select BCM47XX_NVRAM
280 select BCM47XX_SPROM
281 select BCM47XX_SSB if !BCM47XX_BCMA
282 help
283 Support for BCM47XX based boards
284
285config BCM63XX
286 bool "Broadcom BCM63XX based boards"
287 select BOOT_RAW
288 select CEVT_R4K
289 select CSRC_R4K
290 select SYNC_R4K
291 select DMA_NONCOHERENT
292 select IRQ_MIPS_CPU
293 select SYS_SUPPORTS_32BIT_KERNEL
294 select SYS_SUPPORTS_BIG_ENDIAN
295 select SYS_HAS_EARLY_PRINTK
296 select SWAP_IO_SPACE
297 select GPIOLIB
298 select HAVE_CLK
299 select MIPS_L1_CACHE_SHIFT_4
300 select CLKDEV_LOOKUP
301 help
302 Support for BCM63XX based boards
303
304config MIPS_COBALT
305 bool "Cobalt Server"
306 select CEVT_R4K
307 select CSRC_R4K
308 select CEVT_GT641XX
309 select DMA_NONCOHERENT
310 select FORCE_PCI
311 select I8253
312 select I8259
313 select IRQ_MIPS_CPU
314 select IRQ_GT641XX
315 select PCI_GT64XXX_PCI0
316 select SYS_HAS_CPU_NEVADA
317 select SYS_HAS_EARLY_PRINTK
318 select SYS_SUPPORTS_32BIT_KERNEL
319 select SYS_SUPPORTS_64BIT_KERNEL
320 select SYS_SUPPORTS_LITTLE_ENDIAN
321 select USE_GENERIC_EARLY_PRINTK_8250
322
323config MACH_DECSTATION
324 bool "DECstations"
325 select BOOT_ELF32
326 select CEVT_DS1287
327 select CEVT_R4K if CPU_R4X00
328 select CSRC_IOASIC
329 select CSRC_R4K if CPU_R4X00
330 select CPU_DADDI_WORKAROUNDS if 64BIT
331 select CPU_R4000_WORKAROUNDS if 64BIT
332 select CPU_R4400_WORKAROUNDS if 64BIT
333 select DMA_NONCOHERENT
334 select NO_IOPORT_MAP
335 select IRQ_MIPS_CPU
336 select SYS_HAS_CPU_R3000
337 select SYS_HAS_CPU_R4X00
338 select SYS_SUPPORTS_32BIT_KERNEL
339 select SYS_SUPPORTS_64BIT_KERNEL
340 select SYS_SUPPORTS_LITTLE_ENDIAN
341 select SYS_SUPPORTS_128HZ
342 select SYS_SUPPORTS_256HZ
343 select SYS_SUPPORTS_1024HZ
344 select MIPS_L1_CACHE_SHIFT_4
345 help
346 This enables support for DEC's MIPS based workstations. For details
347 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
348 DECstation porting pages on <http://decstation.unix-ag.org/>.
349
350 If you have one of the following DECstation Models you definitely
351 want to choose R4xx0 for the CPU Type:
352
353 DECstation 5000/50
354 DECstation 5000/150
355 DECstation 5000/260
356 DECsystem 5900/260
357
358 otherwise choose R3000.
359
360config MACH_JAZZ
361 bool "Jazz family of machines"
362 select ARCH_MIGHT_HAVE_PC_PARPORT
363 select ARCH_MIGHT_HAVE_PC_SERIO
364 select FW_ARC
365 select FW_ARC32
366 select ARCH_MAY_HAVE_PC_FDC
367 select CEVT_R4K
368 select CSRC_R4K
369 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
370 select GENERIC_ISA_DMA
371 select HAVE_PCSPKR_PLATFORM
372 select IRQ_MIPS_CPU
373 select I8253
374 select I8259
375 select ISA
376 select SYS_HAS_CPU_R4X00
377 select SYS_SUPPORTS_32BIT_KERNEL
378 select SYS_SUPPORTS_64BIT_KERNEL
379 select SYS_SUPPORTS_100HZ
380 help
381 This a family of machines based on the MIPS R4030 chipset which was
382 used by several vendors to build RISC/os and Windows NT workstations.
383 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
384 Olivetti M700-10 workstations.
385
386config MACH_INGENIC
387 bool "Ingenic SoC based machines"
388 select SYS_SUPPORTS_32BIT_KERNEL
389 select SYS_SUPPORTS_LITTLE_ENDIAN
390 select SYS_SUPPORTS_ZBOOT_UART16550
391 select CPU_SUPPORTS_HUGEPAGES
392 select DMA_NONCOHERENT
393 select IRQ_MIPS_CPU
394 select PINCTRL
395 select GPIOLIB
396 select COMMON_CLK
397 select GENERIC_IRQ_CHIP
398 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
399 select USE_OF
400 select LIBFDT
401
402config LANTIQ
403 bool "Lantiq based platforms"
404 select DMA_NONCOHERENT
405 select IRQ_MIPS_CPU
406 select CEVT_R4K
407 select CSRC_R4K
408 select SYS_HAS_CPU_MIPS32_R1
409 select SYS_HAS_CPU_MIPS32_R2
410 select SYS_SUPPORTS_BIG_ENDIAN
411 select SYS_SUPPORTS_32BIT_KERNEL
412 select SYS_SUPPORTS_MIPS16
413 select SYS_SUPPORTS_MULTITHREADING
414 select SYS_SUPPORTS_VPE_LOADER
415 select SYS_HAS_EARLY_PRINTK
416 select GPIOLIB
417 select SWAP_IO_SPACE
418 select BOOT_RAW
419 select CLKDEV_LOOKUP
420 select USE_OF
421 select PINCTRL
422 select PINCTRL_LANTIQ
423 select ARCH_HAS_RESET_CONTROLLER
424 select RESET_CONTROLLER
425
426config LASAT
427 bool "LASAT Networks platforms"
428 select CEVT_R4K
429 select CRC32
430 select CSRC_R4K
431 select DMA_NONCOHERENT
432 select SYS_HAS_EARLY_PRINTK
433 select HAVE_PCI
434 select IRQ_MIPS_CPU
435 select PCI_GT64XXX_PCI0
436 select MIPS_NILE4
437 select R5000_CPU_SCACHE
438 select SYS_HAS_CPU_R5000
439 select SYS_SUPPORTS_32BIT_KERNEL
440 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
441 select SYS_SUPPORTS_LITTLE_ENDIAN
442
443config MACH_LOONGSON32
444 bool "Loongson-1 family of machines"
445 select SYS_SUPPORTS_ZBOOT
446 help
447 This enables support for the Loongson-1 family of machines.
448
449 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
450 the Institute of Computing Technology (ICT), Chinese Academy of
451 Sciences (CAS).
452
453config MACH_LOONGSON64
454 bool "Loongson-2/3 family of machines"
455 select SYS_SUPPORTS_ZBOOT
456 help
457 This enables the support of Loongson-2/3 family of machines.
458
459 Loongson-2 is a family of single-core CPUs and Loongson-3 is a
460 family of multi-core CPUs. They are both 64-bit general-purpose
461 MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
462 of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
463 in the People's Republic of China. The chief architect is Professor
464 Weiwu Hu.
465
466config MACH_PISTACHIO
467 bool "IMG Pistachio SoC based boards"
468 select BOOT_ELF32
469 select BOOT_RAW
470 select CEVT_R4K
471 select CLKSRC_MIPS_GIC
472 select COMMON_CLK
473 select CSRC_R4K
474 select DMA_NONCOHERENT
475 select GPIOLIB
476 select IRQ_MIPS_CPU
477 select LIBFDT
478 select MFD_SYSCON
479 select MIPS_CPU_SCACHE
480 select MIPS_GIC
481 select PINCTRL
482 select REGULATOR
483 select SYS_HAS_CPU_MIPS32_R2
484 select SYS_SUPPORTS_32BIT_KERNEL
485 select SYS_SUPPORTS_LITTLE_ENDIAN
486 select SYS_SUPPORTS_MIPS_CPS
487 select SYS_SUPPORTS_MULTITHREADING
488 select SYS_SUPPORTS_RELOCATABLE
489 select SYS_SUPPORTS_ZBOOT
490 select SYS_HAS_EARLY_PRINTK
491 select USE_GENERIC_EARLY_PRINTK_8250
492 select USE_OF
493 help
494 This enables support for the IMG Pistachio SoC platform.
495
496config MIPS_MALTA
497 bool "MIPS Malta board"
498 select ARCH_MAY_HAVE_PC_FDC
499 select ARCH_MIGHT_HAVE_PC_PARPORT
500 select ARCH_MIGHT_HAVE_PC_SERIO
501 select BOOT_ELF32
502 select BOOT_RAW
503 select BUILTIN_DTB
504 select CEVT_R4K
505 select CLKSRC_MIPS_GIC
506 select COMMON_CLK
507 select CSRC_R4K
508 select DMA_MAYBE_COHERENT
509 select GENERIC_ISA_DMA
510 select HAVE_PCSPKR_PLATFORM
511 select HAVE_PCI
512 select I8253
513 select I8259
514 select IRQ_MIPS_CPU
515 select LIBFDT
516 select MIPS_BONITO64
517 select MIPS_CPU_SCACHE
518 select MIPS_GIC
519 select MIPS_L1_CACHE_SHIFT_6
520 select MIPS_MSC
521 select PCI_GT64XXX_PCI0
522 select SMP_UP if SMP
523 select SWAP_IO_SPACE
524 select SYS_HAS_CPU_MIPS32_R1
525 select SYS_HAS_CPU_MIPS32_R2
526 select SYS_HAS_CPU_MIPS32_R3_5
527 select SYS_HAS_CPU_MIPS32_R5
528 select SYS_HAS_CPU_MIPS32_R6
529 select SYS_HAS_CPU_MIPS64_R1
530 select SYS_HAS_CPU_MIPS64_R2
531 select SYS_HAS_CPU_MIPS64_R6
532 select SYS_HAS_CPU_NEVADA
533 select SYS_HAS_CPU_RM7000
534 select SYS_SUPPORTS_32BIT_KERNEL
535 select SYS_SUPPORTS_64BIT_KERNEL
536 select SYS_SUPPORTS_BIG_ENDIAN
537 select SYS_SUPPORTS_HIGHMEM
538 select SYS_SUPPORTS_LITTLE_ENDIAN
539 select SYS_SUPPORTS_MICROMIPS
540 select SYS_SUPPORTS_MIPS16
541 select SYS_SUPPORTS_MIPS_CMP
542 select SYS_SUPPORTS_MIPS_CPS
543 select SYS_SUPPORTS_MULTITHREADING
544 select SYS_SUPPORTS_RELOCATABLE
545 select SYS_SUPPORTS_SMARTMIPS
546 select SYS_SUPPORTS_VPE_LOADER
547 select SYS_SUPPORTS_ZBOOT
548 select USE_OF
549 select ZONE_DMA32 if 64BIT
550 help
551 This enables support for the MIPS Technologies Malta evaluation
552 board.
553
554config MACH_PIC32
555 bool "Microchip PIC32 Family"
556 help
557 This enables support for the Microchip PIC32 family of platforms.
558
559 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
560 microcontrollers.
561
562config NEC_MARKEINS
563 bool "NEC EMMA2RH Mark-eins board"
564 select SOC_EMMA2RH
565 select HAVE_PCI
566 help
567 This enables support for the NEC Electronics Mark-eins boards.
568
569config MACH_VR41XX
570 bool "NEC VR4100 series based machines"
571 select CEVT_R4K
572 select CSRC_R4K
573 select SYS_HAS_CPU_VR41XX
574 select SYS_SUPPORTS_MIPS16
575 select GPIOLIB
576
577config NXP_STB220
578 bool "NXP STB220 board"
579 select SOC_PNX833X
580 help
581 Support for NXP Semiconductors STB220 Development Board.
582
583config NXP_STB225
584 bool "NXP 225 board"
585 select SOC_PNX833X
586 select SOC_PNX8335
587 help
588 Support for NXP Semiconductors STB225 Development Board.
589
590config PMC_MSP
591 bool "PMC-Sierra MSP chipsets"
592 select CEVT_R4K
593 select CSRC_R4K
594 select DMA_NONCOHERENT
595 select SWAP_IO_SPACE
596 select NO_EXCEPT_FILL
597 select BOOT_RAW
598 select SYS_HAS_CPU_MIPS32_R1
599 select SYS_HAS_CPU_MIPS32_R2
600 select SYS_SUPPORTS_32BIT_KERNEL
601 select SYS_SUPPORTS_BIG_ENDIAN
602 select SYS_SUPPORTS_MIPS16
603 select IRQ_MIPS_CPU
604 select SERIAL_8250
605 select SERIAL_8250_CONSOLE
606 select USB_EHCI_BIG_ENDIAN_MMIO
607 select USB_EHCI_BIG_ENDIAN_DESC
608 help
609 This adds support for the PMC-Sierra family of Multi-Service
610 Processor System-On-A-Chips. These parts include a number
611 of integrated peripherals, interfaces and DSPs in addition to
612 a variety of MIPS cores.
613
614config RALINK
615 bool "Ralink based machines"
616 select CEVT_R4K
617 select CSRC_R4K
618 select BOOT_RAW
619 select DMA_NONCOHERENT
620 select IRQ_MIPS_CPU
621 select USE_OF
622 select SYS_HAS_CPU_MIPS32_R1
623 select SYS_HAS_CPU_MIPS32_R2
624 select SYS_SUPPORTS_32BIT_KERNEL
625 select SYS_SUPPORTS_LITTLE_ENDIAN
626 select SYS_SUPPORTS_MIPS16
627 select SYS_HAS_EARLY_PRINTK
628 select CLKDEV_LOOKUP
629 select ARCH_HAS_RESET_CONTROLLER
630 select RESET_CONTROLLER
631
632config SGI_IP22
633 bool "SGI IP22 (Indy/Indigo2)"
634 select FW_ARC
635 select FW_ARC32
636 select ARCH_MIGHT_HAVE_PC_SERIO
637 select BOOT_ELF32
638 select CEVT_R4K
639 select CSRC_R4K
640 select DEFAULT_SGI_PARTITION
641 select DMA_NONCOHERENT
642 select HAVE_EISA
643 select I8253
644 select I8259
645 select IP22_CPU_SCACHE
646 select IRQ_MIPS_CPU
647 select GENERIC_ISA_DMA_SUPPORT_BROKEN
648 select SGI_HAS_I8042
649 select SGI_HAS_INDYDOG
650 select SGI_HAS_HAL2
651 select SGI_HAS_SEEQ
652 select SGI_HAS_WD93
653 select SGI_HAS_ZILOG
654 select SWAP_IO_SPACE
655 select SYS_HAS_CPU_R4X00
656 select SYS_HAS_CPU_R5000
657 #
658 # Disable EARLY_PRINTK for now since it leads to overwritten prom
659 # memory during early boot on some machines.
660 #
661 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
662 # for a more details discussion
663 #
664 # select SYS_HAS_EARLY_PRINTK
665 select SYS_SUPPORTS_32BIT_KERNEL
666 select SYS_SUPPORTS_64BIT_KERNEL
667 select SYS_SUPPORTS_BIG_ENDIAN
668 select MIPS_L1_CACHE_SHIFT_7
669 help
670 This are the SGI Indy, Challenge S and Indigo2, as well as certain
671 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
672 that runs on these, say Y here.
673
674config SGI_IP27
675 bool "SGI IP27 (Origin200/2000)"
676 select ARCH_HAS_PHYS_TO_DMA
677 select FW_ARC
678 select FW_ARC64
679 select BOOT_ELF64
680 select DEFAULT_SGI_PARTITION
681 select SYS_HAS_EARLY_PRINTK
682 select HAVE_PCI
683 select IRQ_MIPS_CPU
684 select IRQ_DOMAIN_HIERARCHY
685 select NR_CPUS_DEFAULT_64
686 select PCI_DRIVERS_GENERIC
687 select PCI_XTALK_BRIDGE
688 select SYS_HAS_CPU_R10000
689 select SYS_SUPPORTS_64BIT_KERNEL
690 select SYS_SUPPORTS_BIG_ENDIAN
691 select SYS_SUPPORTS_NUMA
692 select SYS_SUPPORTS_SMP
693 select MIPS_L1_CACHE_SHIFT_7
694 help
695 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
696 workstations. To compile a Linux kernel that runs on these, say Y
697 here.
698
699config SGI_IP28
700 bool "SGI IP28 (Indigo2 R10k)"
701 select FW_ARC
702 select FW_ARC64
703 select ARCH_MIGHT_HAVE_PC_SERIO
704 select BOOT_ELF64
705 select CEVT_R4K
706 select CSRC_R4K
707 select DEFAULT_SGI_PARTITION
708 select DMA_NONCOHERENT
709 select GENERIC_ISA_DMA_SUPPORT_BROKEN
710 select IRQ_MIPS_CPU
711 select HAVE_EISA
712 select I8253
713 select I8259
714 select SGI_HAS_I8042
715 select SGI_HAS_INDYDOG
716 select SGI_HAS_HAL2
717 select SGI_HAS_SEEQ
718 select SGI_HAS_WD93
719 select SGI_HAS_ZILOG
720 select SWAP_IO_SPACE
721 select SYS_HAS_CPU_R10000
722 #
723 # Disable EARLY_PRINTK for now since it leads to overwritten prom
724 # memory during early boot on some machines.
725 #
726 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
727 # for a more details discussion
728 #
729 # select SYS_HAS_EARLY_PRINTK
730 select SYS_SUPPORTS_64BIT_KERNEL
731 select SYS_SUPPORTS_BIG_ENDIAN
732 select MIPS_L1_CACHE_SHIFT_7
733 help
734 This is the SGI Indigo2 with R10000 processor. To compile a Linux
735 kernel that runs on these, say Y here.
736
737config SGI_IP32
738 bool "SGI IP32 (O2)"
739 select ARCH_HAS_PHYS_TO_DMA
740 select FW_ARC
741 select FW_ARC32
742 select BOOT_ELF32
743 select CEVT_R4K
744 select CSRC_R4K
745 select DMA_NONCOHERENT
746 select HAVE_PCI
747 select IRQ_MIPS_CPU
748 select R5000_CPU_SCACHE
749 select RM7000_CPU_SCACHE
750 select SYS_HAS_CPU_R5000
751 select SYS_HAS_CPU_R10000 if BROKEN
752 select SYS_HAS_CPU_RM7000
753 select SYS_HAS_CPU_NEVADA
754 select SYS_SUPPORTS_64BIT_KERNEL
755 select SYS_SUPPORTS_BIG_ENDIAN
756 help
757 If you want this kernel to run on SGI O2 workstation, say Y here.
758
759config SIBYTE_CRHINE
760 bool "Sibyte BCM91120C-CRhine"
761 select BOOT_ELF32
762 select SIBYTE_BCM1120
763 select SWAP_IO_SPACE
764 select SYS_HAS_CPU_SB1
765 select SYS_SUPPORTS_BIG_ENDIAN
766 select SYS_SUPPORTS_LITTLE_ENDIAN
767
768config SIBYTE_CARMEL
769 bool "Sibyte BCM91120x-Carmel"
770 select BOOT_ELF32
771 select SIBYTE_BCM1120
772 select SWAP_IO_SPACE
773 select SYS_HAS_CPU_SB1
774 select SYS_SUPPORTS_BIG_ENDIAN
775 select SYS_SUPPORTS_LITTLE_ENDIAN
776
777config SIBYTE_CRHONE
778 bool "Sibyte BCM91125C-CRhone"
779 select BOOT_ELF32
780 select SIBYTE_BCM1125
781 select SWAP_IO_SPACE
782 select SYS_HAS_CPU_SB1
783 select SYS_SUPPORTS_BIG_ENDIAN
784 select SYS_SUPPORTS_HIGHMEM
785 select SYS_SUPPORTS_LITTLE_ENDIAN
786
787config SIBYTE_RHONE
788 bool "Sibyte BCM91125E-Rhone"
789 select BOOT_ELF32
790 select SIBYTE_BCM1125H
791 select SWAP_IO_SPACE
792 select SYS_HAS_CPU_SB1
793 select SYS_SUPPORTS_BIG_ENDIAN
794 select SYS_SUPPORTS_LITTLE_ENDIAN
795
796config SIBYTE_SWARM
797 bool "Sibyte BCM91250A-SWARM"
798 select BOOT_ELF32
799 select HAVE_PATA_PLATFORM
800 select SIBYTE_SB1250
801 select SWAP_IO_SPACE
802 select SYS_HAS_CPU_SB1
803 select SYS_SUPPORTS_BIG_ENDIAN
804 select SYS_SUPPORTS_HIGHMEM
805 select SYS_SUPPORTS_LITTLE_ENDIAN
806 select ZONE_DMA32 if 64BIT
807 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
808
809config SIBYTE_LITTLESUR
810 bool "Sibyte BCM91250C2-LittleSur"
811 select BOOT_ELF32
812 select HAVE_PATA_PLATFORM
813 select SIBYTE_SB1250
814 select SWAP_IO_SPACE
815 select SYS_HAS_CPU_SB1
816 select SYS_SUPPORTS_BIG_ENDIAN
817 select SYS_SUPPORTS_HIGHMEM
818 select SYS_SUPPORTS_LITTLE_ENDIAN
819 select ZONE_DMA32 if 64BIT
820
821config SIBYTE_SENTOSA
822 bool "Sibyte BCM91250E-Sentosa"
823 select BOOT_ELF32
824 select SIBYTE_SB1250
825 select SWAP_IO_SPACE
826 select SYS_HAS_CPU_SB1
827 select SYS_SUPPORTS_BIG_ENDIAN
828 select SYS_SUPPORTS_LITTLE_ENDIAN
829 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
830
831config SIBYTE_BIGSUR
832 bool "Sibyte BCM91480B-BigSur"
833 select BOOT_ELF32
834 select NR_CPUS_DEFAULT_4
835 select SIBYTE_BCM1x80
836 select SWAP_IO_SPACE
837 select SYS_HAS_CPU_SB1
838 select SYS_SUPPORTS_BIG_ENDIAN
839 select SYS_SUPPORTS_HIGHMEM
840 select SYS_SUPPORTS_LITTLE_ENDIAN
841 select ZONE_DMA32 if 64BIT
842 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
843
844config SNI_RM
845 bool "SNI RM200/300/400"
846 select FW_ARC if CPU_LITTLE_ENDIAN
847 select FW_ARC32 if CPU_LITTLE_ENDIAN
848 select FW_SNIPROM if CPU_BIG_ENDIAN
849 select ARCH_MAY_HAVE_PC_FDC
850 select ARCH_MIGHT_HAVE_PC_PARPORT
851 select ARCH_MIGHT_HAVE_PC_SERIO
852 select BOOT_ELF32
853 select CEVT_R4K
854 select CSRC_R4K
855 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
856 select DMA_NONCOHERENT
857 select GENERIC_ISA_DMA
858 select HAVE_EISA
859 select HAVE_PCSPKR_PLATFORM
860 select HAVE_PCI
861 select IRQ_MIPS_CPU
862 select I8253
863 select I8259
864 select ISA
865 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
866 select SYS_HAS_CPU_R4X00
867 select SYS_HAS_CPU_R5000
868 select SYS_HAS_CPU_R10000
869 select R5000_CPU_SCACHE
870 select SYS_HAS_EARLY_PRINTK
871 select SYS_SUPPORTS_32BIT_KERNEL
872 select SYS_SUPPORTS_64BIT_KERNEL
873 select SYS_SUPPORTS_BIG_ENDIAN
874 select SYS_SUPPORTS_HIGHMEM
875 select SYS_SUPPORTS_LITTLE_ENDIAN
876 help
877 The SNI RM200/300/400 are MIPS-based machines manufactured by
878 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
879 Technology and now in turn merged with Fujitsu. Say Y here to
880 support this machine type.
881
882config MACH_TX39XX
883 bool "Toshiba TX39 series based machines"
884
885config MACH_TX49XX
886 bool "Toshiba TX49 series based machines"
887
888config MIKROTIK_RB532
889 bool "Mikrotik RB532 boards"
890 select CEVT_R4K
891 select CSRC_R4K
892 select DMA_NONCOHERENT
893 select HAVE_PCI
894 select IRQ_MIPS_CPU
895 select SYS_HAS_CPU_MIPS32_R1
896 select SYS_SUPPORTS_32BIT_KERNEL
897 select SYS_SUPPORTS_LITTLE_ENDIAN
898 select SWAP_IO_SPACE
899 select BOOT_RAW
900 select GPIOLIB
901 select MIPS_L1_CACHE_SHIFT_4
902 help
903 Support the Mikrotik(tm) RouterBoard 532 series,
904 based on the IDT RC32434 SoC.
905
906config CAVIUM_OCTEON_SOC
907 bool "Cavium Networks Octeon SoC based boards"
908 select CEVT_R4K
909 select ARCH_HAS_PHYS_TO_DMA
910 select HAVE_RAPIDIO
911 select PHYS_ADDR_T_64BIT
912 select SYS_SUPPORTS_64BIT_KERNEL
913 select SYS_SUPPORTS_BIG_ENDIAN
914 select EDAC_SUPPORT
915 select EDAC_ATOMIC_SCRUB
916 select SYS_SUPPORTS_LITTLE_ENDIAN
917 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
918 select SYS_HAS_EARLY_PRINTK
919 select SYS_HAS_CPU_CAVIUM_OCTEON
920 select HAVE_PCI
921 select ZONE_DMA32
922 select HOLES_IN_ZONE
923 select GPIOLIB
924 select LIBFDT
925 select USE_OF
926 select ARCH_SPARSEMEM_ENABLE
927 select SYS_SUPPORTS_SMP
928 select NR_CPUS_DEFAULT_64
929 select MIPS_NR_CPU_NR_MAP_1024
930 select BUILTIN_DTB
931 select MTD_COMPLEX_MAPPINGS
932 select SWIOTLB
933 select SYS_SUPPORTS_RELOCATABLE
934 help
935 This option supports all of the Octeon reference boards from Cavium
936 Networks. It builds a kernel that dynamically determines the Octeon
937 CPU type and supports all known board reference implementations.
938 Some of the supported boards are:
939 EBT3000
940 EBH3000
941 EBH3100
942 Thunder
943 Kodama
944 Hikari
945 Say Y here for most Octeon reference boards.
946
947config NLM_XLR_BOARD
948 bool "Netlogic XLR/XLS based systems"
949 select BOOT_ELF32
950 select NLM_COMMON
951 select SYS_HAS_CPU_XLR
952 select SYS_SUPPORTS_SMP
953 select HAVE_PCI
954 select SWAP_IO_SPACE
955 select SYS_SUPPORTS_32BIT_KERNEL
956 select SYS_SUPPORTS_64BIT_KERNEL
957 select PHYS_ADDR_T_64BIT
958 select SYS_SUPPORTS_BIG_ENDIAN
959 select SYS_SUPPORTS_HIGHMEM
960 select NR_CPUS_DEFAULT_32
961 select CEVT_R4K
962 select CSRC_R4K
963 select IRQ_MIPS_CPU
964 select ZONE_DMA32 if 64BIT
965 select SYNC_R4K
966 select SYS_HAS_EARLY_PRINTK
967 select SYS_SUPPORTS_ZBOOT
968 select SYS_SUPPORTS_ZBOOT_UART16550
969 help
970 Support for systems based on Netlogic XLR and XLS processors.
971 Say Y here if you have a XLR or XLS based board.
972
973config NLM_XLP_BOARD
974 bool "Netlogic XLP based systems"
975 select BOOT_ELF32
976 select NLM_COMMON
977 select SYS_HAS_CPU_XLP
978 select SYS_SUPPORTS_SMP
979 select HAVE_PCI
980 select SYS_SUPPORTS_32BIT_KERNEL
981 select SYS_SUPPORTS_64BIT_KERNEL
982 select PHYS_ADDR_T_64BIT
983 select GPIOLIB
984 select SYS_SUPPORTS_BIG_ENDIAN
985 select SYS_SUPPORTS_LITTLE_ENDIAN
986 select SYS_SUPPORTS_HIGHMEM
987 select NR_CPUS_DEFAULT_32
988 select CEVT_R4K
989 select CSRC_R4K
990 select IRQ_MIPS_CPU
991 select ZONE_DMA32 if 64BIT
992 select SYNC_R4K
993 select SYS_HAS_EARLY_PRINTK
994 select USE_OF
995 select SYS_SUPPORTS_ZBOOT
996 select SYS_SUPPORTS_ZBOOT_UART16550
997 help
998 This board is based on Netlogic XLP Processor.
999 Say Y here if you have a XLP based board.
1000
1001config MIPS_PARAVIRT
1002 bool "Para-Virtualized guest system"
1003 select CEVT_R4K
1004 select CSRC_R4K
1005 select SYS_SUPPORTS_64BIT_KERNEL
1006 select SYS_SUPPORTS_32BIT_KERNEL
1007 select SYS_SUPPORTS_BIG_ENDIAN
1008 select SYS_SUPPORTS_SMP
1009 select NR_CPUS_DEFAULT_4
1010 select SYS_HAS_EARLY_PRINTK
1011 select SYS_HAS_CPU_MIPS32_R2
1012 select SYS_HAS_CPU_MIPS64_R2
1013 select SYS_HAS_CPU_CAVIUM_OCTEON
1014 select HAVE_PCI
1015 select SWAP_IO_SPACE
1016 help
1017 This option supports guest running under ????
1018
1019endchoice
1020
1021source "arch/mips/alchemy/Kconfig"
1022source "arch/mips/ath25/Kconfig"
1023source "arch/mips/ath79/Kconfig"
1024source "arch/mips/bcm47xx/Kconfig"
1025source "arch/mips/bcm63xx/Kconfig"
1026source "arch/mips/bmips/Kconfig"
1027source "arch/mips/generic/Kconfig"
1028source "arch/mips/jazz/Kconfig"
1029source "arch/mips/jz4740/Kconfig"
1030source "arch/mips/lantiq/Kconfig"
1031source "arch/mips/lasat/Kconfig"
1032source "arch/mips/pic32/Kconfig"
1033source "arch/mips/pistachio/Kconfig"
1034source "arch/mips/pmcs-msp71xx/Kconfig"
1035source "arch/mips/ralink/Kconfig"
1036source "arch/mips/sgi-ip27/Kconfig"
1037source "arch/mips/sibyte/Kconfig"
1038source "arch/mips/txx9/Kconfig"
1039source "arch/mips/vr41xx/Kconfig"
1040source "arch/mips/cavium-octeon/Kconfig"
1041source "arch/mips/loongson32/Kconfig"
1042source "arch/mips/loongson64/Kconfig"
1043source "arch/mips/netlogic/Kconfig"
1044source "arch/mips/paravirt/Kconfig"
1045
1046endmenu
1047
1048config GENERIC_HWEIGHT
1049 bool
1050 default y
1051
1052config GENERIC_CALIBRATE_DELAY
1053 bool
1054 default y
1055
1056config SCHED_OMIT_FRAME_POINTER
1057 bool
1058 default y
1059
1060#
1061# Select some configuration options automatically based on user selections.
1062#
1063config FW_ARC
1064 bool
1065
1066config ARCH_MAY_HAVE_PC_FDC
1067 bool
1068
1069config BOOT_RAW
1070 bool
1071
1072config CEVT_BCM1480
1073 bool
1074
1075config CEVT_DS1287
1076 bool
1077
1078config CEVT_GT641XX
1079 bool
1080
1081config CEVT_R4K
1082 bool
1083
1084config CEVT_SB1250
1085 bool
1086
1087config CEVT_TXX9
1088 bool
1089
1090config CSRC_BCM1480
1091 bool
1092
1093config CSRC_IOASIC
1094 bool
1095
1096config CSRC_R4K
1097 bool
1098
1099config CSRC_SB1250
1100 bool
1101
1102config MIPS_CLOCK_VSYSCALL
1103 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1104
1105config GPIO_TXX9
1106 select GPIOLIB
1107 bool
1108
1109config FW_CFE
1110 bool
1111
1112config ARCH_SUPPORTS_UPROBES
1113 bool
1114
1115config DMA_MAYBE_COHERENT
1116 select ARCH_HAS_DMA_COHERENCE_H
1117 select DMA_NONCOHERENT
1118 bool
1119
1120config DMA_PERDEV_COHERENT
1121 bool
1122 select ARCH_HAS_SETUP_DMA_OPS
1123 select DMA_NONCOHERENT
1124
1125config DMA_NONCOHERENT
1126 bool
1127 #
1128 # MIPS allows mixing "slightly different" Cacheability and Coherency
1129 # Attribute bits. It is believed that the uncached access through
1130 # KSEG1 and the implementation specific "uncached accelerated" used
1131 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1132 # significant advantages.
1133 #
1134 select ARCH_HAS_DMA_WRITE_COMBINE
1135 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1136 select ARCH_HAS_UNCACHED_SEGMENT
1137 select NEED_DMA_MAP_STATE
1138 select ARCH_HAS_DMA_COHERENT_TO_PFN
1139 select DMA_NONCOHERENT_CACHE_SYNC
1140
1141config SYS_HAS_EARLY_PRINTK
1142 bool
1143
1144config SYS_SUPPORTS_HOTPLUG_CPU
1145 bool
1146
1147config MIPS_BONITO64
1148 bool
1149
1150config MIPS_MSC
1151 bool
1152
1153config MIPS_NILE4
1154 bool
1155
1156config SYNC_R4K
1157 bool
1158
1159config MIPS_MACHINE
1160 def_bool n
1161
1162config NO_IOPORT_MAP
1163 def_bool n
1164
1165config GENERIC_CSUM
1166 bool
1167 default y if !CPU_HAS_LOAD_STORE_LR
1168
1169config GENERIC_ISA_DMA
1170 bool
1171 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1172 select ISA_DMA_API
1173
1174config GENERIC_ISA_DMA_SUPPORT_BROKEN
1175 bool
1176 select GENERIC_ISA_DMA
1177
1178config ISA_DMA_API
1179 bool
1180
1181config HOLES_IN_ZONE
1182 bool
1183
1184config SYS_SUPPORTS_RELOCATABLE
1185 bool
1186 help
1187 Selected if the platform supports relocating the kernel.
1188 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1189 to allow access to command line and entropy sources.
1190
1191config MIPS_CBPF_JIT
1192 def_bool y
1193 depends on BPF_JIT && HAVE_CBPF_JIT
1194
1195config MIPS_EBPF_JIT
1196 def_bool y
1197 depends on BPF_JIT && HAVE_EBPF_JIT
1198
1199
1200#
1201# Endianness selection. Sufficiently obscure so many users don't know what to
1202# answer,so we try hard to limit the available choices. Also the use of a
1203# choice statement should be more obvious to the user.
1204#
1205choice
1206 prompt "Endianness selection"
1207 help
1208 Some MIPS machines can be configured for either little or big endian
1209 byte order. These modes require different kernels and a different
1210 Linux distribution. In general there is one preferred byteorder for a
1211 particular system but some systems are just as commonly used in the
1212 one or the other endianness.
1213
1214config CPU_BIG_ENDIAN
1215 bool "Big endian"
1216 depends on SYS_SUPPORTS_BIG_ENDIAN
1217
1218config CPU_LITTLE_ENDIAN
1219 bool "Little endian"
1220 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1221
1222endchoice
1223
1224config EXPORT_UASM
1225 bool
1226
1227config SYS_SUPPORTS_APM_EMULATION
1228 bool
1229
1230config SYS_SUPPORTS_BIG_ENDIAN
1231 bool
1232
1233config SYS_SUPPORTS_LITTLE_ENDIAN
1234 bool
1235
1236config SYS_SUPPORTS_HUGETLBFS
1237 bool
1238 depends on CPU_SUPPORTS_HUGEPAGES
1239 default y
1240
1241config MIPS_HUGE_TLB_SUPPORT
1242 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1243
1244config IRQ_CPU_RM7K
1245 bool
1246
1247config IRQ_MSP_SLP
1248 bool
1249
1250config IRQ_MSP_CIC
1251 bool
1252
1253config IRQ_TXX9
1254 bool
1255
1256config IRQ_GT641XX
1257 bool
1258
1259config PCI_GT64XXX_PCI0
1260 bool
1261
1262config PCI_XTALK_BRIDGE
1263 bool
1264
1265config NO_EXCEPT_FILL
1266 bool
1267
1268config SOC_EMMA2RH
1269 bool
1270 select CEVT_R4K
1271 select CSRC_R4K
1272 select DMA_NONCOHERENT
1273 select IRQ_MIPS_CPU
1274 select SWAP_IO_SPACE
1275 select SYS_HAS_CPU_R5500
1276 select SYS_SUPPORTS_32BIT_KERNEL
1277 select SYS_SUPPORTS_64BIT_KERNEL
1278 select SYS_SUPPORTS_BIG_ENDIAN
1279
1280config SOC_PNX833X
1281 bool
1282 select CEVT_R4K
1283 select CSRC_R4K
1284 select IRQ_MIPS_CPU
1285 select DMA_NONCOHERENT
1286 select SYS_HAS_CPU_MIPS32_R2
1287 select SYS_SUPPORTS_32BIT_KERNEL
1288 select SYS_SUPPORTS_LITTLE_ENDIAN
1289 select SYS_SUPPORTS_BIG_ENDIAN
1290 select SYS_SUPPORTS_MIPS16
1291 select CPU_MIPSR2_IRQ_VI
1292
1293config SOC_PNX8335
1294 bool
1295 select SOC_PNX833X
1296
1297config MIPS_SPRAM
1298 bool
1299
1300config SWAP_IO_SPACE
1301 bool
1302
1303config SGI_HAS_INDYDOG
1304 bool
1305
1306config SGI_HAS_HAL2
1307 bool
1308
1309config SGI_HAS_SEEQ
1310 bool
1311
1312config SGI_HAS_WD93
1313 bool
1314
1315config SGI_HAS_ZILOG
1316 bool
1317
1318config SGI_HAS_I8042
1319 bool
1320
1321config DEFAULT_SGI_PARTITION
1322 bool
1323
1324config FW_ARC32
1325 bool
1326
1327config FW_SNIPROM
1328 bool
1329
1330config BOOT_ELF32
1331 bool
1332
1333config MIPS_L1_CACHE_SHIFT_4
1334 bool
1335
1336config MIPS_L1_CACHE_SHIFT_5
1337 bool
1338
1339config MIPS_L1_CACHE_SHIFT_6
1340 bool
1341
1342config MIPS_L1_CACHE_SHIFT_7
1343 bool
1344
1345config MIPS_L1_CACHE_SHIFT
1346 int
1347 default "7" if MIPS_L1_CACHE_SHIFT_7
1348 default "6" if MIPS_L1_CACHE_SHIFT_6
1349 default "5" if MIPS_L1_CACHE_SHIFT_5
1350 default "4" if MIPS_L1_CACHE_SHIFT_4
1351 default "5"
1352
1353config HAVE_STD_PC_SERIAL_PORT
1354 bool
1355
1356config ARC_CONSOLE
1357 bool "ARC console support"
1358 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1359
1360config ARC_MEMORY
1361 bool
1362 depends on MACH_JAZZ || SNI_RM || SGI_IP32
1363 default y
1364
1365config ARC_PROMLIB
1366 bool
1367 depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
1368 default y
1369
1370config FW_ARC64
1371 bool
1372
1373config BOOT_ELF64
1374 bool
1375
1376menu "CPU selection"
1377
1378choice
1379 prompt "CPU type"
1380 default CPU_R4X00
1381
1382config CPU_LOONGSON3
1383 bool "Loongson 3 CPU"
1384 depends on SYS_HAS_CPU_LOONGSON3
1385 select ARCH_HAS_PHYS_TO_DMA
1386 select CPU_SUPPORTS_64BIT_KERNEL
1387 select CPU_SUPPORTS_HIGHMEM
1388 select CPU_SUPPORTS_HUGEPAGES
1389 select CPU_HAS_LOAD_STORE_LR
1390 select WEAK_ORDERING
1391 select WEAK_REORDERING_BEYOND_LLSC
1392 select MIPS_PGD_C0_CONTEXT
1393 select MIPS_L1_CACHE_SHIFT_6
1394 select GPIOLIB
1395 select SWIOTLB
1396 help
1397 The Loongson 3 processor implements the MIPS64R2 instruction
1398 set with many extensions.
1399
1400config LOONGSON3_ENHANCEMENT
1401 bool "New Loongson 3 CPU Enhancements"
1402 default n
1403 select CPU_MIPSR2
1404 select CPU_HAS_PREFETCH
1405 depends on CPU_LOONGSON3
1406 help
1407 New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A
1408 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1409 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User
1410 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1411 Fast TLB refill support, etc.
1412
1413 This option enable those enhancements which are not probed at run
1414 time. If you want a generic kernel to run on all Loongson 3 machines,
1415 please say 'N' here. If you want a high-performance kernel to run on
1416 new Loongson 3 machines only, please say 'Y' here.
1417
1418config CPU_LOONGSON3_WORKAROUNDS
1419 bool "Old Loongson 3 LLSC Workarounds"
1420 default y if SMP
1421 depends on CPU_LOONGSON3
1422 help
1423 Loongson 3 processors have the llsc issues which require workarounds.
1424 Without workarounds the system may hang unexpectedly.
1425
1426 Newer Loongson 3 will fix these issues and no workarounds are needed.
1427 The workarounds have no significant side effect on them but may
1428 decrease the performance of the system so this option should be
1429 disabled unless the kernel is intended to be run on old systems.
1430
1431 If unsure, please say Y.
1432
1433config CPU_LOONGSON2E
1434 bool "Loongson 2E"
1435 depends on SYS_HAS_CPU_LOONGSON2E
1436 select CPU_LOONGSON2
1437 help
1438 The Loongson 2E processor implements the MIPS III instruction set
1439 with many extensions.
1440
1441 It has an internal FPGA northbridge, which is compatible to
1442 bonito64.
1443
1444config CPU_LOONGSON2F
1445 bool "Loongson 2F"
1446 depends on SYS_HAS_CPU_LOONGSON2F
1447 select CPU_LOONGSON2
1448 select GPIOLIB
1449 help
1450 The Loongson 2F processor implements the MIPS III instruction set
1451 with many extensions.
1452
1453 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1454 have a similar programming interface with FPGA northbridge used in
1455 Loongson2E.
1456
1457config CPU_LOONGSON1B
1458 bool "Loongson 1B"
1459 depends on SYS_HAS_CPU_LOONGSON1B
1460 select CPU_LOONGSON1
1461 select LEDS_GPIO_REGISTER
1462 help
1463 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1464 Release 1 instruction set and part of the MIPS32 Release 2
1465 instruction set.
1466
1467config CPU_LOONGSON1C
1468 bool "Loongson 1C"
1469 depends on SYS_HAS_CPU_LOONGSON1C
1470 select CPU_LOONGSON1
1471 select LEDS_GPIO_REGISTER
1472 help
1473 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1474 Release 1 instruction set and part of the MIPS32 Release 2
1475 instruction set.
1476
1477config CPU_MIPS32_R1
1478 bool "MIPS32 Release 1"
1479 depends on SYS_HAS_CPU_MIPS32_R1
1480 select CPU_HAS_PREFETCH
1481 select CPU_HAS_LOAD_STORE_LR
1482 select CPU_SUPPORTS_32BIT_KERNEL
1483 select CPU_SUPPORTS_HIGHMEM
1484 help
1485 Choose this option to build a kernel for release 1 or later of the
1486 MIPS32 architecture. Most modern embedded systems with a 32-bit
1487 MIPS processor are based on a MIPS32 processor. If you know the
1488 specific type of processor in your system, choose those that one
1489 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1490 Release 2 of the MIPS32 architecture is available since several
1491 years so chances are you even have a MIPS32 Release 2 processor
1492 in which case you should choose CPU_MIPS32_R2 instead for better
1493 performance.
1494
1495config CPU_MIPS32_R2
1496 bool "MIPS32 Release 2"
1497 depends on SYS_HAS_CPU_MIPS32_R2
1498 select CPU_HAS_PREFETCH
1499 select CPU_HAS_LOAD_STORE_LR
1500 select CPU_SUPPORTS_32BIT_KERNEL
1501 select CPU_SUPPORTS_HIGHMEM
1502 select CPU_SUPPORTS_MSA
1503 select HAVE_KVM
1504 help
1505 Choose this option to build a kernel for release 2 or later of the
1506 MIPS32 architecture. Most modern embedded systems with a 32-bit
1507 MIPS processor are based on a MIPS32 processor. If you know the
1508 specific type of processor in your system, choose those that one
1509 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1510
1511config CPU_MIPS32_R6
1512 bool "MIPS32 Release 6"
1513 depends on SYS_HAS_CPU_MIPS32_R6
1514 select CPU_HAS_PREFETCH
1515 select CPU_SUPPORTS_32BIT_KERNEL
1516 select CPU_SUPPORTS_HIGHMEM
1517 select CPU_SUPPORTS_MSA
1518 select HAVE_KVM
1519 select MIPS_O32_FP64_SUPPORT
1520 help
1521 Choose this option to build a kernel for release 6 or later of the
1522 MIPS32 architecture. New MIPS processors, starting with the Warrior
1523 family, are based on a MIPS32r6 processor. If you own an older
1524 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1525
1526config CPU_MIPS64_R1
1527 bool "MIPS64 Release 1"
1528 depends on SYS_HAS_CPU_MIPS64_R1
1529 select CPU_HAS_PREFETCH
1530 select CPU_HAS_LOAD_STORE_LR
1531 select CPU_SUPPORTS_32BIT_KERNEL
1532 select CPU_SUPPORTS_64BIT_KERNEL
1533 select CPU_SUPPORTS_HIGHMEM
1534 select CPU_SUPPORTS_HUGEPAGES
1535 help
1536 Choose this option to build a kernel for release 1 or later of the
1537 MIPS64 architecture. Many modern embedded systems with a 64-bit
1538 MIPS processor are based on a MIPS64 processor. If you know the
1539 specific type of processor in your system, choose those that one
1540 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1541 Release 2 of the MIPS64 architecture is available since several
1542 years so chances are you even have a MIPS64 Release 2 processor
1543 in which case you should choose CPU_MIPS64_R2 instead for better
1544 performance.
1545
1546config CPU_MIPS64_R2
1547 bool "MIPS64 Release 2"
1548 depends on SYS_HAS_CPU_MIPS64_R2
1549 select CPU_HAS_PREFETCH
1550 select CPU_HAS_LOAD_STORE_LR
1551 select CPU_SUPPORTS_32BIT_KERNEL
1552 select CPU_SUPPORTS_64BIT_KERNEL
1553 select CPU_SUPPORTS_HIGHMEM
1554 select CPU_SUPPORTS_HUGEPAGES
1555 select CPU_SUPPORTS_MSA
1556 select HAVE_KVM
1557 help
1558 Choose this option to build a kernel for release 2 or later of the
1559 MIPS64 architecture. Many modern embedded systems with a 64-bit
1560 MIPS processor are based on a MIPS64 processor. If you know the
1561 specific type of processor in your system, choose those that one
1562 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1563
1564config CPU_MIPS64_R6
1565 bool "MIPS64 Release 6"
1566 depends on SYS_HAS_CPU_MIPS64_R6
1567 select CPU_HAS_PREFETCH
1568 select CPU_SUPPORTS_32BIT_KERNEL
1569 select CPU_SUPPORTS_64BIT_KERNEL
1570 select CPU_SUPPORTS_HIGHMEM
1571 select CPU_SUPPORTS_HUGEPAGES
1572 select CPU_SUPPORTS_MSA
1573 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1574 select HAVE_KVM
1575 help
1576 Choose this option to build a kernel for release 6 or later of the
1577 MIPS64 architecture. New MIPS processors, starting with the Warrior
1578 family, are based on a MIPS64r6 processor. If you own an older
1579 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1580
1581config CPU_R3000
1582 bool "R3000"
1583 depends on SYS_HAS_CPU_R3000
1584 select CPU_HAS_WB
1585 select CPU_HAS_LOAD_STORE_LR
1586 select CPU_R3K_TLB
1587 select CPU_SUPPORTS_32BIT_KERNEL
1588 select CPU_SUPPORTS_HIGHMEM
1589 help
1590 Please make sure to pick the right CPU type. Linux/MIPS is not
1591 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1592 *not* work on R4000 machines and vice versa. However, since most
1593 of the supported machines have an R4000 (or similar) CPU, R4x00
1594 might be a safe bet. If the resulting kernel does not work,
1595 try to recompile with R3000.
1596
1597config CPU_TX39XX
1598 bool "R39XX"
1599 depends on SYS_HAS_CPU_TX39XX
1600 select CPU_SUPPORTS_32BIT_KERNEL
1601 select CPU_HAS_LOAD_STORE_LR
1602 select CPU_R3K_TLB
1603
1604config CPU_VR41XX
1605 bool "R41xx"
1606 depends on SYS_HAS_CPU_VR41XX
1607 select CPU_SUPPORTS_32BIT_KERNEL
1608 select CPU_SUPPORTS_64BIT_KERNEL
1609 select CPU_HAS_LOAD_STORE_LR
1610 help
1611 The options selects support for the NEC VR4100 series of processors.
1612 Only choose this option if you have one of these processors as a
1613 kernel built with this option will not run on any other type of
1614 processor or vice versa.
1615
1616config CPU_R4X00
1617 bool "R4x00"
1618 depends on SYS_HAS_CPU_R4X00
1619 select CPU_SUPPORTS_32BIT_KERNEL
1620 select CPU_SUPPORTS_64BIT_KERNEL
1621 select CPU_SUPPORTS_HUGEPAGES
1622 select CPU_HAS_LOAD_STORE_LR
1623 help
1624 MIPS Technologies R4000-series processors other than 4300, including
1625 the R4000, R4400, R4600, and 4700.
1626
1627config CPU_TX49XX
1628 bool "R49XX"
1629 depends on SYS_HAS_CPU_TX49XX
1630 select CPU_HAS_PREFETCH
1631 select CPU_HAS_LOAD_STORE_LR
1632 select CPU_SUPPORTS_32BIT_KERNEL
1633 select CPU_SUPPORTS_64BIT_KERNEL
1634 select CPU_SUPPORTS_HUGEPAGES
1635
1636config CPU_R5000
1637 bool "R5000"
1638 depends on SYS_HAS_CPU_R5000
1639 select CPU_SUPPORTS_32BIT_KERNEL
1640 select CPU_SUPPORTS_64BIT_KERNEL
1641 select CPU_SUPPORTS_HUGEPAGES
1642 select CPU_HAS_LOAD_STORE_LR
1643 help
1644 MIPS Technologies R5000-series processors other than the Nevada.
1645
1646config CPU_R5500
1647 bool "R5500"
1648 depends on SYS_HAS_CPU_R5500
1649 select CPU_SUPPORTS_32BIT_KERNEL
1650 select CPU_SUPPORTS_64BIT_KERNEL
1651 select CPU_SUPPORTS_HUGEPAGES
1652 select CPU_HAS_LOAD_STORE_LR
1653 help
1654 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1655 instruction set.
1656
1657config CPU_NEVADA
1658 bool "RM52xx"
1659 depends on SYS_HAS_CPU_NEVADA
1660 select CPU_SUPPORTS_32BIT_KERNEL
1661 select CPU_SUPPORTS_64BIT_KERNEL
1662 select CPU_SUPPORTS_HUGEPAGES
1663 select CPU_HAS_LOAD_STORE_LR
1664 help
1665 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1666
1667config CPU_R10000
1668 bool "R10000"
1669 depends on SYS_HAS_CPU_R10000
1670 select CPU_HAS_PREFETCH
1671 select CPU_HAS_LOAD_STORE_LR
1672 select CPU_SUPPORTS_32BIT_KERNEL
1673 select CPU_SUPPORTS_64BIT_KERNEL
1674 select CPU_SUPPORTS_HIGHMEM
1675 select CPU_SUPPORTS_HUGEPAGES
1676 help
1677 MIPS Technologies R10000-series processors.
1678
1679config CPU_RM7000
1680 bool "RM7000"
1681 depends on SYS_HAS_CPU_RM7000
1682 select CPU_HAS_PREFETCH
1683 select CPU_HAS_LOAD_STORE_LR
1684 select CPU_SUPPORTS_32BIT_KERNEL
1685 select CPU_SUPPORTS_64BIT_KERNEL
1686 select CPU_SUPPORTS_HIGHMEM
1687 select CPU_SUPPORTS_HUGEPAGES
1688
1689config CPU_SB1
1690 bool "SB1"
1691 depends on SYS_HAS_CPU_SB1
1692 select CPU_HAS_LOAD_STORE_LR
1693 select CPU_SUPPORTS_32BIT_KERNEL
1694 select CPU_SUPPORTS_64BIT_KERNEL
1695 select CPU_SUPPORTS_HIGHMEM
1696 select CPU_SUPPORTS_HUGEPAGES
1697 select WEAK_ORDERING
1698
1699config CPU_CAVIUM_OCTEON
1700 bool "Cavium Octeon processor"
1701 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1702 select CPU_HAS_PREFETCH
1703 select CPU_HAS_LOAD_STORE_LR
1704 select CPU_SUPPORTS_64BIT_KERNEL
1705 select WEAK_ORDERING
1706 select CPU_SUPPORTS_HIGHMEM
1707 select CPU_SUPPORTS_HUGEPAGES
1708 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1709 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1710 select MIPS_L1_CACHE_SHIFT_7
1711 select HAVE_KVM
1712 help
1713 The Cavium Octeon processor is a highly integrated chip containing
1714 many ethernet hardware widgets for networking tasks. The processor
1715 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1716 Full details can be found at http://www.caviumnetworks.com.
1717
1718config CPU_BMIPS
1719 bool "Broadcom BMIPS"
1720 depends on SYS_HAS_CPU_BMIPS
1721 select CPU_MIPS32
1722 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1723 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1724 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1725 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1726 select CPU_SUPPORTS_32BIT_KERNEL
1727 select DMA_NONCOHERENT
1728 select IRQ_MIPS_CPU
1729 select SWAP_IO_SPACE
1730 select WEAK_ORDERING
1731 select CPU_SUPPORTS_HIGHMEM
1732 select CPU_HAS_PREFETCH
1733 select CPU_HAS_LOAD_STORE_LR
1734 select CPU_SUPPORTS_CPUFREQ
1735 select MIPS_EXTERNAL_TIMER
1736 help
1737 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1738
1739config CPU_XLR
1740 bool "Netlogic XLR SoC"
1741 depends on SYS_HAS_CPU_XLR
1742 select CPU_HAS_LOAD_STORE_LR
1743 select CPU_SUPPORTS_32BIT_KERNEL
1744 select CPU_SUPPORTS_64BIT_KERNEL
1745 select CPU_SUPPORTS_HIGHMEM
1746 select CPU_SUPPORTS_HUGEPAGES
1747 select WEAK_ORDERING
1748 select WEAK_REORDERING_BEYOND_LLSC
1749 help
1750 Netlogic Microsystems XLR/XLS processors.
1751
1752config CPU_XLP
1753 bool "Netlogic XLP SoC"
1754 depends on SYS_HAS_CPU_XLP
1755 select CPU_SUPPORTS_32BIT_KERNEL
1756 select CPU_SUPPORTS_64BIT_KERNEL
1757 select CPU_SUPPORTS_HIGHMEM
1758 select WEAK_ORDERING
1759 select WEAK_REORDERING_BEYOND_LLSC
1760 select CPU_HAS_PREFETCH
1761 select CPU_HAS_LOAD_STORE_LR
1762 select CPU_MIPSR2
1763 select CPU_SUPPORTS_HUGEPAGES
1764 select MIPS_ASID_BITS_VARIABLE
1765 help
1766 Netlogic Microsystems XLP processors.
1767endchoice
1768
1769config CPU_MIPS32_3_5_FEATURES
1770 bool "MIPS32 Release 3.5 Features"
1771 depends on SYS_HAS_CPU_MIPS32_R3_5
1772 depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
1773 help
1774 Choose this option to build a kernel for release 2 or later of the
1775 MIPS32 architecture including features from the 3.5 release such as
1776 support for Enhanced Virtual Addressing (EVA).
1777
1778config CPU_MIPS32_3_5_EVA
1779 bool "Enhanced Virtual Addressing (EVA)"
1780 depends on CPU_MIPS32_3_5_FEATURES
1781 select EVA
1782 default y
1783 help
1784 Choose this option if you want to enable the Enhanced Virtual
1785 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1786 One of its primary benefits is an increase in the maximum size
1787 of lowmem (up to 3GB). If unsure, say 'N' here.
1788
1789config CPU_MIPS32_R5_FEATURES
1790 bool "MIPS32 Release 5 Features"
1791 depends on SYS_HAS_CPU_MIPS32_R5
1792 depends on CPU_MIPS32_R2
1793 help
1794 Choose this option to build a kernel for release 2 or later of the
1795 MIPS32 architecture including features from release 5 such as
1796 support for Extended Physical Addressing (XPA).
1797
1798config CPU_MIPS32_R5_XPA
1799 bool "Extended Physical Addressing (XPA)"
1800 depends on CPU_MIPS32_R5_FEATURES
1801 depends on !EVA
1802 depends on !PAGE_SIZE_4KB
1803 depends on SYS_SUPPORTS_HIGHMEM
1804 select XPA
1805 select HIGHMEM
1806 select PHYS_ADDR_T_64BIT
1807 default n
1808 help
1809 Choose this option if you want to enable the Extended Physical
1810 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1811 benefit is to increase physical addressing equal to or greater
1812 than 40 bits. Note that this has the side effect of turning on
1813 64-bit addressing which in turn makes the PTEs 64-bit in size.
1814 If unsure, say 'N' here.
1815
1816if CPU_LOONGSON2F
1817config CPU_NOP_WORKAROUNDS
1818 bool
1819
1820config CPU_JUMP_WORKAROUNDS
1821 bool
1822
1823config CPU_LOONGSON2F_WORKAROUNDS
1824 bool "Loongson 2F Workarounds"
1825 default y
1826 select CPU_NOP_WORKAROUNDS
1827 select CPU_JUMP_WORKAROUNDS
1828 help
1829 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1830 require workarounds. Without workarounds the system may hang
1831 unexpectedly. For more information please refer to the gas
1832 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1833
1834 Loongson 2F03 and later have fixed these issues and no workarounds
1835 are needed. The workarounds have no significant side effect on them
1836 but may decrease the performance of the system so this option should
1837 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1838 systems.
1839
1840 If unsure, please say Y.
1841endif # CPU_LOONGSON2F
1842
1843config SYS_SUPPORTS_ZBOOT
1844 bool
1845 select HAVE_KERNEL_GZIP
1846 select HAVE_KERNEL_BZIP2
1847 select HAVE_KERNEL_LZ4
1848 select HAVE_KERNEL_LZMA
1849 select HAVE_KERNEL_LZO
1850 select HAVE_KERNEL_XZ
1851
1852config SYS_SUPPORTS_ZBOOT_UART16550
1853 bool
1854 select SYS_SUPPORTS_ZBOOT
1855
1856config SYS_SUPPORTS_ZBOOT_UART_PROM
1857 bool
1858 select SYS_SUPPORTS_ZBOOT
1859
1860config CPU_LOONGSON2
1861 bool
1862 select CPU_SUPPORTS_32BIT_KERNEL
1863 select CPU_SUPPORTS_64BIT_KERNEL
1864 select CPU_SUPPORTS_HIGHMEM
1865 select CPU_SUPPORTS_HUGEPAGES
1866 select ARCH_HAS_PHYS_TO_DMA
1867 select CPU_HAS_LOAD_STORE_LR
1868
1869config CPU_LOONGSON1
1870 bool
1871 select CPU_MIPS32
1872 select CPU_MIPSR2
1873 select CPU_HAS_PREFETCH
1874 select CPU_HAS_LOAD_STORE_LR
1875 select CPU_SUPPORTS_32BIT_KERNEL
1876 select CPU_SUPPORTS_HIGHMEM
1877 select CPU_SUPPORTS_CPUFREQ
1878
1879config CPU_BMIPS32_3300
1880 select SMP_UP if SMP
1881 bool
1882
1883config CPU_BMIPS4350
1884 bool
1885 select SYS_SUPPORTS_SMP
1886 select SYS_SUPPORTS_HOTPLUG_CPU
1887
1888config CPU_BMIPS4380
1889 bool
1890 select MIPS_L1_CACHE_SHIFT_6
1891 select SYS_SUPPORTS_SMP
1892 select SYS_SUPPORTS_HOTPLUG_CPU
1893 select CPU_HAS_RIXI
1894
1895config CPU_BMIPS5000
1896 bool
1897 select MIPS_CPU_SCACHE
1898 select MIPS_L1_CACHE_SHIFT_7
1899 select SYS_SUPPORTS_SMP
1900 select SYS_SUPPORTS_HOTPLUG_CPU
1901 select CPU_HAS_RIXI
1902
1903config SYS_HAS_CPU_LOONGSON3
1904 bool
1905 select CPU_SUPPORTS_CPUFREQ
1906 select CPU_HAS_RIXI
1907
1908config SYS_HAS_CPU_LOONGSON2E
1909 bool
1910
1911config SYS_HAS_CPU_LOONGSON2F
1912 bool
1913 select CPU_SUPPORTS_CPUFREQ
1914 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1915 select CPU_SUPPORTS_UNCACHED_ACCELERATED
1916
1917config SYS_HAS_CPU_LOONGSON1B
1918 bool
1919
1920config SYS_HAS_CPU_LOONGSON1C
1921 bool
1922
1923config SYS_HAS_CPU_MIPS32_R1
1924 bool
1925
1926config SYS_HAS_CPU_MIPS32_R2
1927 bool
1928
1929config SYS_HAS_CPU_MIPS32_R3_5
1930 bool
1931
1932config SYS_HAS_CPU_MIPS32_R5
1933 bool
1934 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1935
1936config SYS_HAS_CPU_MIPS32_R6
1937 bool
1938 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1939
1940config SYS_HAS_CPU_MIPS64_R1
1941 bool
1942
1943config SYS_HAS_CPU_MIPS64_R2
1944 bool
1945
1946config SYS_HAS_CPU_MIPS64_R6
1947 bool
1948 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1949
1950config SYS_HAS_CPU_R3000
1951 bool
1952
1953config SYS_HAS_CPU_TX39XX
1954 bool
1955
1956config SYS_HAS_CPU_VR41XX
1957 bool
1958
1959config SYS_HAS_CPU_R4X00
1960 bool
1961
1962config SYS_HAS_CPU_TX49XX
1963 bool
1964
1965config SYS_HAS_CPU_R5000
1966 bool
1967
1968config SYS_HAS_CPU_R5500
1969 bool
1970
1971config SYS_HAS_CPU_NEVADA
1972 bool
1973
1974config SYS_HAS_CPU_R10000
1975 bool
1976 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1977
1978config SYS_HAS_CPU_RM7000
1979 bool
1980
1981config SYS_HAS_CPU_SB1
1982 bool
1983
1984config SYS_HAS_CPU_CAVIUM_OCTEON
1985 bool
1986
1987config SYS_HAS_CPU_BMIPS
1988 bool
1989
1990config SYS_HAS_CPU_BMIPS32_3300
1991 bool
1992 select SYS_HAS_CPU_BMIPS
1993
1994config SYS_HAS_CPU_BMIPS4350
1995 bool
1996 select SYS_HAS_CPU_BMIPS
1997
1998config SYS_HAS_CPU_BMIPS4380
1999 bool
2000 select SYS_HAS_CPU_BMIPS
2001
2002config SYS_HAS_CPU_BMIPS5000
2003 bool
2004 select SYS_HAS_CPU_BMIPS
2005 select ARCH_HAS_SYNC_DMA_FOR_CPU
2006
2007config SYS_HAS_CPU_XLR
2008 bool
2009
2010config SYS_HAS_CPU_XLP
2011 bool
2012
2013#
2014# CPU may reorder R->R, R->W, W->R, W->W
2015# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
2016#
2017config WEAK_ORDERING
2018 bool
2019
2020#
2021# CPU may reorder reads and writes beyond LL/SC
2022# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2023#
2024config WEAK_REORDERING_BEYOND_LLSC
2025 bool
2026endmenu
2027
2028#
2029# These two indicate any level of the MIPS32 and MIPS64 architecture
2030#
2031config CPU_MIPS32
2032 bool
2033 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
2034
2035config CPU_MIPS64
2036 bool
2037 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
2038
2039#
2040# These indicate the revision of the architecture
2041#
2042config CPU_MIPSR1
2043 bool
2044 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2045
2046config CPU_MIPSR2
2047 bool
2048 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2049 select CPU_HAS_RIXI
2050 select MIPS_SPRAM
2051
2052config CPU_MIPSR6
2053 bool
2054 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2055 select CPU_HAS_RIXI
2056 select HAVE_ARCH_BITREVERSE
2057 select MIPS_ASID_BITS_VARIABLE
2058 select MIPS_CRC_SUPPORT
2059 select MIPS_SPRAM
2060
2061config TARGET_ISA_REV
2062 int
2063 default 1 if CPU_MIPSR1
2064 default 2 if CPU_MIPSR2
2065 default 6 if CPU_MIPSR6
2066 default 0
2067 help
2068 Reflects the ISA revision being targeted by the kernel build. This
2069 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2070
2071config EVA
2072 bool
2073
2074config XPA
2075 bool
2076
2077config SYS_SUPPORTS_32BIT_KERNEL
2078 bool
2079config SYS_SUPPORTS_64BIT_KERNEL
2080 bool
2081config CPU_SUPPORTS_32BIT_KERNEL
2082 bool
2083config CPU_SUPPORTS_64BIT_KERNEL
2084 bool
2085config CPU_SUPPORTS_CPUFREQ
2086 bool
2087config CPU_SUPPORTS_ADDRWINCFG
2088 bool
2089config CPU_SUPPORTS_HUGEPAGES
2090 bool
2091 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
2092config CPU_SUPPORTS_UNCACHED_ACCELERATED
2093 bool
2094config MIPS_PGD_C0_CONTEXT
2095 bool
2096 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
2097
2098#
2099# Set to y for ptrace access to watch registers.
2100#
2101config HARDWARE_WATCHPOINTS
2102 bool
2103 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2104
2105menu "Kernel type"
2106
2107choice
2108 prompt "Kernel code model"
2109 help
2110 You should only select this option if you have a workload that
2111 actually benefits from 64-bit processing or if your machine has
2112 large memory. You will only be presented a single option in this
2113 menu if your system does not support both 32-bit and 64-bit kernels.
2114
2115config 32BIT
2116 bool "32-bit kernel"
2117 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2118 select TRAD_SIGNALS
2119 help
2120 Select this option if you want to build a 32-bit kernel.
2121
2122config 64BIT
2123 bool "64-bit kernel"
2124 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2125 help
2126 Select this option if you want to build a 64-bit kernel.
2127
2128endchoice
2129
2130config KVM_GUEST
2131 bool "KVM Guest Kernel"
2132 depends on BROKEN_ON_SMP
2133 help
2134 Select this option if building a guest kernel for KVM (Trap & Emulate)
2135 mode.
2136
2137config KVM_GUEST_TIMER_FREQ
2138 int "Count/Compare Timer Frequency (MHz)"
2139 depends on KVM_GUEST
2140 default 100
2141 help
2142 Set this to non-zero if building a guest kernel for KVM to skip RTC
2143 emulation when determining guest CPU Frequency. Instead, the guest's
2144 timer frequency is specified directly.
2145
2146config MIPS_VA_BITS_48
2147 bool "48 bits virtual memory"
2148 depends on 64BIT
2149 help
2150 Support a maximum at least 48 bits of application virtual
2151 memory. Default is 40 bits or less, depending on the CPU.
2152 For page sizes 16k and above, this option results in a small
2153 memory overhead for page tables. For 4k page size, a fourth
2154 level of page tables is added which imposes both a memory
2155 overhead as well as slower TLB fault handling.
2156
2157 If unsure, say N.
2158
2159choice
2160 prompt "Kernel page size"
2161 default PAGE_SIZE_4KB
2162
2163config PAGE_SIZE_4KB
2164 bool "4kB"
2165 depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
2166 help
2167 This option select the standard 4kB Linux page size. On some
2168 R3000-family processors this is the only available page size. Using
2169 4kB page size will minimize memory consumption and is therefore
2170 recommended for low memory systems.
2171
2172config PAGE_SIZE_8KB
2173 bool "8kB"
2174 depends on CPU_CAVIUM_OCTEON
2175 depends on !MIPS_VA_BITS_48
2176 help
2177 Using 8kB page size will result in higher performance kernel at
2178 the price of higher memory consumption. This option is available
2179 only on cnMIPS processors. Note that you will need a suitable Linux
2180 distribution to support this.
2181
2182config PAGE_SIZE_16KB
2183 bool "16kB"
2184 depends on !CPU_R3000 && !CPU_TX39XX
2185 help
2186 Using 16kB page size will result in higher performance kernel at
2187 the price of higher memory consumption. This option is available on
2188 all non-R3000 family processors. Note that you will need a suitable
2189 Linux distribution to support this.
2190
2191config PAGE_SIZE_32KB
2192 bool "32kB"
2193 depends on CPU_CAVIUM_OCTEON
2194 depends on !MIPS_VA_BITS_48
2195 help
2196 Using 32kB page size will result in higher performance kernel at
2197 the price of higher memory consumption. This option is available
2198 only on cnMIPS cores. Note that you will need a suitable Linux
2199 distribution to support this.
2200
2201config PAGE_SIZE_64KB
2202 bool "64kB"
2203 depends on !CPU_R3000 && !CPU_TX39XX
2204 help
2205 Using 64kB page size will result in higher performance kernel at
2206 the price of higher memory consumption. This option is available on
2207 all non-R3000 family processor. Not that at the time of this
2208 writing this option is still high experimental.
2209
2210endchoice
2211
2212config FORCE_MAX_ZONEORDER
2213 int "Maximum zone order"
2214 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2215 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2216 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2217 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2218 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2219 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2220 range 11 64
2221 default "11"
2222 help
2223 The kernel memory allocator divides physically contiguous memory
2224 blocks into "zones", where each zone is a power of two number of
2225 pages. This option selects the largest power of two that the kernel
2226 keeps in the memory allocator. If you need to allocate very large
2227 blocks of physically contiguous memory, then you may need to
2228 increase this value.
2229
2230 This config option is actually maximum order plus one. For example,
2231 a value of 11 means that the largest free memory block is 2^10 pages.
2232
2233 The page size is not necessarily 4KB. Keep this in mind
2234 when choosing a value for this option.
2235
2236config BOARD_SCACHE
2237 bool
2238
2239config IP22_CPU_SCACHE
2240 bool
2241 select BOARD_SCACHE
2242
2243#
2244# Support for a MIPS32 / MIPS64 style S-caches
2245#
2246config MIPS_CPU_SCACHE
2247 bool
2248 select BOARD_SCACHE
2249
2250config R5000_CPU_SCACHE
2251 bool
2252 select BOARD_SCACHE
2253
2254config RM7000_CPU_SCACHE
2255 bool
2256 select BOARD_SCACHE
2257
2258config SIBYTE_DMA_PAGEOPS
2259 bool "Use DMA to clear/copy pages"
2260 depends on CPU_SB1
2261 help
2262 Instead of using the CPU to zero and copy pages, use a Data Mover
2263 channel. These DMA channels are otherwise unused by the standard
2264 SiByte Linux port. Seems to give a small performance benefit.
2265
2266config CPU_HAS_PREFETCH
2267 bool
2268
2269config CPU_GENERIC_DUMP_TLB
2270 bool
2271 default y if !(CPU_R3000 || CPU_TX39XX)
2272
2273config MIPS_FP_SUPPORT
2274 bool "Floating Point support" if EXPERT
2275 default y
2276 help
2277 Select y to include support for floating point in the kernel
2278 including initialization of FPU hardware, FP context save & restore
2279 and emulation of an FPU where necessary. Without this support any
2280 userland program attempting to use floating point instructions will
2281 receive a SIGILL.
2282
2283 If you know that your userland will not attempt to use floating point
2284 instructions then you can say n here to shrink the kernel a little.
2285
2286 If unsure, say y.
2287
2288config CPU_R2300_FPU
2289 bool
2290 depends on MIPS_FP_SUPPORT
2291 default y if CPU_R3000 || CPU_TX39XX
2292
2293config CPU_R3K_TLB
2294 bool
2295
2296config CPU_R4K_FPU
2297 bool
2298 depends on MIPS_FP_SUPPORT
2299 default y if !CPU_R2300_FPU
2300
2301config CPU_R4K_CACHE_TLB
2302 bool
2303 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2304
2305config MIPS_MT_SMP
2306 bool "MIPS MT SMP support (1 TC on each available VPE)"
2307 default y
2308 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2309 select CPU_MIPSR2_IRQ_VI
2310 select CPU_MIPSR2_IRQ_EI
2311 select SYNC_R4K
2312 select MIPS_MT
2313 select SMP
2314 select SMP_UP
2315 select SYS_SUPPORTS_SMP
2316 select SYS_SUPPORTS_SCHED_SMT
2317 select MIPS_PERF_SHARED_TC_COUNTERS
2318 help
2319 This is a kernel model which is known as SMVP. This is supported
2320 on cores with the MT ASE and uses the available VPEs to implement
2321 virtual processors which supports SMP. This is equivalent to the
2322 Intel Hyperthreading feature. For further information go to
2323 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2324
2325config MIPS_MT
2326 bool
2327
2328config SCHED_SMT
2329 bool "SMT (multithreading) scheduler support"
2330 depends on SYS_SUPPORTS_SCHED_SMT
2331 default n
2332 help
2333 SMT scheduler support improves the CPU scheduler's decision making
2334 when dealing with MIPS MT enabled cores at a cost of slightly
2335 increased overhead in some places. If unsure say N here.
2336
2337config SYS_SUPPORTS_SCHED_SMT
2338 bool
2339
2340config SYS_SUPPORTS_MULTITHREADING
2341 bool
2342
2343config MIPS_MT_FPAFF
2344 bool "Dynamic FPU affinity for FP-intensive threads"
2345 default y
2346 depends on MIPS_MT_SMP
2347
2348config MIPSR2_TO_R6_EMULATOR
2349 bool "MIPS R2-to-R6 emulator"
2350 depends on CPU_MIPSR6
2351 depends on MIPS_FP_SUPPORT
2352 default y
2353 help
2354 Choose this option if you want to run non-R6 MIPS userland code.
2355 Even if you say 'Y' here, the emulator will still be disabled by
2356 default. You can enable it using the 'mipsr2emu' kernel option.
2357 The only reason this is a build-time option is to save ~14K from the
2358 final kernel image.
2359
2360config SYS_SUPPORTS_VPE_LOADER
2361 bool
2362 depends on SYS_SUPPORTS_MULTITHREADING
2363 help
2364 Indicates that the platform supports the VPE loader, and provides
2365 physical_memsize.
2366
2367config MIPS_VPE_LOADER
2368 bool "VPE loader support."
2369 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2370 select CPU_MIPSR2_IRQ_VI
2371 select CPU_MIPSR2_IRQ_EI
2372 select MIPS_MT
2373 help
2374 Includes a loader for loading an elf relocatable object
2375 onto another VPE and running it.
2376
2377config MIPS_VPE_LOADER_CMP
2378 bool
2379 default "y"
2380 depends on MIPS_VPE_LOADER && MIPS_CMP
2381
2382config MIPS_VPE_LOADER_MT
2383 bool
2384 default "y"
2385 depends on MIPS_VPE_LOADER && !MIPS_CMP
2386
2387config MIPS_VPE_LOADER_TOM
2388 bool "Load VPE program into memory hidden from linux"
2389 depends on MIPS_VPE_LOADER
2390 default y
2391 help
2392 The loader can use memory that is present but has been hidden from
2393 Linux using the kernel command line option "mem=xxMB". It's up to
2394 you to ensure the amount you put in the option and the space your
2395 program requires is less or equal to the amount physically present.
2396
2397config MIPS_VPE_APSP_API
2398 bool "Enable support for AP/SP API (RTLX)"
2399 depends on MIPS_VPE_LOADER
2400
2401config MIPS_VPE_APSP_API_CMP
2402 bool
2403 default "y"
2404 depends on MIPS_VPE_APSP_API && MIPS_CMP
2405
2406config MIPS_VPE_APSP_API_MT
2407 bool
2408 default "y"
2409 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2410
2411config MIPS_CMP
2412 bool "MIPS CMP framework support (DEPRECATED)"
2413 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2414 select SMP
2415 select SYNC_R4K
2416 select SYS_SUPPORTS_SMP
2417 select WEAK_ORDERING
2418 default n
2419 help
2420 Select this if you are using a bootloader which implements the "CMP
2421 framework" protocol (ie. YAMON) and want your kernel to make use of
2422 its ability to start secondary CPUs.
2423
2424 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2425 instead of this.
2426
2427config MIPS_CPS
2428 bool "MIPS Coherent Processing System support"
2429 depends on SYS_SUPPORTS_MIPS_CPS
2430 select MIPS_CM
2431 select MIPS_CPS_PM if HOTPLUG_CPU
2432 select SMP
2433 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2434 select SYS_SUPPORTS_HOTPLUG_CPU
2435 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2436 select SYS_SUPPORTS_SMP
2437 select WEAK_ORDERING
2438 help
2439 Select this if you wish to run an SMP kernel across multiple cores
2440 within a MIPS Coherent Processing System. When this option is
2441 enabled the kernel will probe for other cores and boot them with
2442 no external assistance. It is safe to enable this when hardware
2443 support is unavailable.
2444
2445config MIPS_CPS_PM
2446 depends on MIPS_CPS
2447 bool
2448
2449config MIPS_CM
2450 bool
2451 select MIPS_CPC
2452
2453config MIPS_CPC
2454 bool
2455
2456config SB1_PASS_2_WORKAROUNDS
2457 bool
2458 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2459 default y
2460
2461config SB1_PASS_2_1_WORKAROUNDS
2462 bool
2463 depends on CPU_SB1 && CPU_SB1_PASS_2
2464 default y
2465
2466choice
2467 prompt "SmartMIPS or microMIPS ASE support"
2468
2469config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2470 bool "None"
2471 help
2472 Select this if you want neither microMIPS nor SmartMIPS support
2473
2474config CPU_HAS_SMARTMIPS
2475 depends on SYS_SUPPORTS_SMARTMIPS
2476 bool "SmartMIPS"
2477 help
2478 SmartMIPS is a extension of the MIPS32 architecture aimed at
2479 increased security at both hardware and software level for
2480 smartcards. Enabling this option will allow proper use of the
2481 SmartMIPS instructions by Linux applications. However a kernel with
2482 this option will not work on a MIPS core without SmartMIPS core. If
2483 you don't know you probably don't have SmartMIPS and should say N
2484 here.
2485
2486config CPU_MICROMIPS
2487 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2488 bool "microMIPS"
2489 help
2490 When this option is enabled the kernel will be built using the
2491 microMIPS ISA
2492
2493endchoice
2494
2495config CPU_HAS_MSA
2496 bool "Support for the MIPS SIMD Architecture"
2497 depends on CPU_SUPPORTS_MSA
2498 depends on MIPS_FP_SUPPORT
2499 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2500 help
2501 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2502 and a set of SIMD instructions to operate on them. When this option
2503 is enabled the kernel will support allocating & switching MSA
2504 vector register contexts. If you know that your kernel will only be
2505 running on CPUs which do not support MSA or that your userland will
2506 not be making use of it then you may wish to say N here to reduce
2507 the size & complexity of your kernel.
2508
2509 If unsure, say Y.
2510
2511config CPU_HAS_WB
2512 bool
2513
2514config XKS01
2515 bool
2516
2517config CPU_HAS_RIXI
2518 bool
2519
2520config CPU_HAS_LOAD_STORE_LR
2521 bool
2522 help
2523 CPU has support for unaligned load and store instructions:
2524 LWL, LWR, SWL, SWR (Load/store word left/right).
2525 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit systems).
2526
2527#
2528# Vectored interrupt mode is an R2 feature
2529#
2530config CPU_MIPSR2_IRQ_VI
2531 bool
2532
2533#
2534# Extended interrupt mode is an R2 feature
2535#
2536config CPU_MIPSR2_IRQ_EI
2537 bool
2538
2539config CPU_HAS_SYNC
2540 bool
2541 depends on !CPU_R3000
2542 default y
2543
2544#
2545# CPU non-features
2546#
2547config CPU_DADDI_WORKAROUNDS
2548 bool
2549
2550config CPU_R4000_WORKAROUNDS
2551 bool
2552 select CPU_R4400_WORKAROUNDS
2553
2554config CPU_R4400_WORKAROUNDS
2555 bool
2556
2557config MIPS_ASID_SHIFT
2558 int
2559 default 6 if CPU_R3000 || CPU_TX39XX
2560 default 0
2561
2562config MIPS_ASID_BITS
2563 int
2564 default 0 if MIPS_ASID_BITS_VARIABLE
2565 default 6 if CPU_R3000 || CPU_TX39XX
2566 default 8
2567
2568config MIPS_ASID_BITS_VARIABLE
2569 bool
2570
2571config MIPS_CRC_SUPPORT
2572 bool
2573
2574#
2575# - Highmem only makes sense for the 32-bit kernel.
2576# - The current highmem code will only work properly on physically indexed
2577# caches such as R3000, SB1, R7000 or those that look like they're virtually
2578# indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2579# moment we protect the user and offer the highmem option only on machines
2580# where it's known to be safe. This will not offer highmem on a few systems
2581# such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2582# indexed CPUs but we're playing safe.
2583# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2584# know they might have memory configurations that could make use of highmem
2585# support.
2586#
2587config HIGHMEM
2588 bool "High Memory Support"
2589 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2590
2591config CPU_SUPPORTS_HIGHMEM
2592 bool
2593
2594config SYS_SUPPORTS_HIGHMEM
2595 bool
2596
2597config SYS_SUPPORTS_SMARTMIPS
2598 bool
2599
2600config SYS_SUPPORTS_MICROMIPS
2601 bool
2602
2603config SYS_SUPPORTS_MIPS16
2604 bool
2605 help
2606 This option must be set if a kernel might be executed on a MIPS16-
2607 enabled CPU even if MIPS16 is not actually being used. In other
2608 words, it makes the kernel MIPS16-tolerant.
2609
2610config CPU_SUPPORTS_MSA
2611 bool
2612
2613config ARCH_FLATMEM_ENABLE
2614 def_bool y
2615 depends on !NUMA && !CPU_LOONGSON2
2616
2617config ARCH_DISCONTIGMEM_ENABLE
2618 bool
2619 default y if SGI_IP27
2620 help
2621 Say Y to support efficient handling of discontiguous physical memory,
2622 for architectures which are either NUMA (Non-Uniform Memory Access)
2623 or have huge holes in the physical address space for other reasons.
2624 See <file:Documentation/vm/numa.rst> for more.
2625
2626config ARCH_SPARSEMEM_ENABLE
2627 bool
2628 select SPARSEMEM_STATIC
2629
2630config NUMA
2631 bool "NUMA Support"
2632 depends on SYS_SUPPORTS_NUMA
2633 help
2634 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2635 Access). This option improves performance on systems with more
2636 than two nodes; on two node systems it is generally better to
2637 leave it disabled; on single node systems disable this option
2638 disabled.
2639
2640config SYS_SUPPORTS_NUMA
2641 bool
2642
2643config RELOCATABLE
2644 bool "Relocatable kernel"
2645 depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC)
2646 help
2647 This builds a kernel image that retains relocation information
2648 so it can be loaded someplace besides the default 1MB.
2649 The relocations make the kernel binary about 15% larger,
2650 but are discarded at runtime
2651
2652config RELOCATION_TABLE_SIZE
2653 hex "Relocation table size"
2654 depends on RELOCATABLE
2655 range 0x0 0x01000000
2656 default "0x00100000"
2657 ---help---
2658 A table of relocation data will be appended to the kernel binary
2659 and parsed at boot to fix up the relocated kernel.
2660
2661 This option allows the amount of space reserved for the table to be
2662 adjusted, although the default of 1Mb should be ok in most cases.
2663
2664 The build will fail and a valid size suggested if this is too small.
2665
2666 If unsure, leave at the default value.
2667
2668config RANDOMIZE_BASE
2669 bool "Randomize the address of the kernel image"
2670 depends on RELOCATABLE
2671 ---help---
2672 Randomizes the physical and virtual address at which the
2673 kernel image is loaded, as a security feature that
2674 deters exploit attempts relying on knowledge of the location
2675 of kernel internals.
2676
2677 Entropy is generated using any coprocessor 0 registers available.
2678
2679 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2680
2681 If unsure, say N.
2682
2683config RANDOMIZE_BASE_MAX_OFFSET
2684 hex "Maximum kASLR offset" if EXPERT
2685 depends on RANDOMIZE_BASE
2686 range 0x0 0x40000000 if EVA || 64BIT
2687 range 0x0 0x08000000
2688 default "0x01000000"
2689 ---help---
2690 When kASLR is active, this provides the maximum offset that will
2691 be applied to the kernel image. It should be set according to the
2692 amount of physical RAM available in the target system minus
2693 PHYSICAL_START and must be a power of 2.
2694
2695 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2696 EVA or 64-bit. The default is 16Mb.
2697
2698config NODES_SHIFT
2699 int
2700 default "6"
2701 depends on NEED_MULTIPLE_NODES
2702
2703config HW_PERF_EVENTS
2704 bool "Enable hardware performance counter support for perf events"
2705 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
2706 default y
2707 help
2708 Enable hardware performance counter support for perf events. If
2709 disabled, perf events will use software events only.
2710
2711config SMP
2712 bool "Multi-Processing support"
2713 depends on SYS_SUPPORTS_SMP
2714 help
2715 This enables support for systems with more than one CPU. If you have
2716 a system with only one CPU, say N. If you have a system with more
2717 than one CPU, say Y.
2718
2719 If you say N here, the kernel will run on uni- and multiprocessor
2720 machines, but will use only one CPU of a multiprocessor machine. If
2721 you say Y here, the kernel will run on many, but not all,
2722 uniprocessor machines. On a uniprocessor machine, the kernel
2723 will run faster if you say N here.
2724
2725 People using multiprocessor machines who say Y here should also say
2726 Y to "Enhanced Real Time Clock Support", below.
2727
2728 See also the SMP-HOWTO available at
2729 <http://www.tldp.org/docs.html#howto>.
2730
2731 If you don't know what to do here, say N.
2732
2733config HOTPLUG_CPU
2734 bool "Support for hot-pluggable CPUs"
2735 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2736 help
2737 Say Y here to allow turning CPUs off and on. CPUs can be
2738 controlled through /sys/devices/system/cpu.
2739 (Note: power management support will enable this option
2740 automatically on SMP systems. )
2741 Say N if you want to disable CPU hotplug.
2742
2743config SMP_UP
2744 bool
2745
2746config SYS_SUPPORTS_MIPS_CMP
2747 bool
2748
2749config SYS_SUPPORTS_MIPS_CPS
2750 bool
2751
2752config SYS_SUPPORTS_SMP
2753 bool
2754
2755config NR_CPUS_DEFAULT_4
2756 bool
2757
2758config NR_CPUS_DEFAULT_8
2759 bool
2760
2761config NR_CPUS_DEFAULT_16
2762 bool
2763
2764config NR_CPUS_DEFAULT_32
2765 bool
2766
2767config NR_CPUS_DEFAULT_64
2768 bool
2769
2770config NR_CPUS
2771 int "Maximum number of CPUs (2-256)"
2772 range 2 256
2773 depends on SMP
2774 default "4" if NR_CPUS_DEFAULT_4
2775 default "8" if NR_CPUS_DEFAULT_8
2776 default "16" if NR_CPUS_DEFAULT_16
2777 default "32" if NR_CPUS_DEFAULT_32
2778 default "64" if NR_CPUS_DEFAULT_64
2779 help
2780 This allows you to specify the maximum number of CPUs which this
2781 kernel will support. The maximum supported value is 32 for 32-bit
2782 kernel and 64 for 64-bit kernels; the minimum value which makes
2783 sense is 1 for Qemu (useful only for kernel debugging purposes)
2784 and 2 for all others.
2785
2786 This is purely to save memory - each supported CPU adds
2787 approximately eight kilobytes to the kernel image. For best
2788 performance should round up your number of processors to the next
2789 power of two.
2790
2791config MIPS_PERF_SHARED_TC_COUNTERS
2792 bool
2793
2794config MIPS_NR_CPU_NR_MAP_1024
2795 bool
2796
2797config MIPS_NR_CPU_NR_MAP
2798 int
2799 depends on SMP
2800 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2801 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2802
2803#
2804# Timer Interrupt Frequency Configuration
2805#
2806
2807choice
2808 prompt "Timer frequency"
2809 default HZ_250
2810 help
2811 Allows the configuration of the timer frequency.
2812
2813 config HZ_24
2814 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2815
2816 config HZ_48
2817 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2818
2819 config HZ_100
2820 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2821
2822 config HZ_128
2823 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2824
2825 config HZ_250
2826 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2827
2828 config HZ_256
2829 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2830
2831 config HZ_1000
2832 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2833
2834 config HZ_1024
2835 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2836
2837endchoice
2838
2839config SYS_SUPPORTS_24HZ
2840 bool
2841
2842config SYS_SUPPORTS_48HZ
2843 bool
2844
2845config SYS_SUPPORTS_100HZ
2846 bool
2847
2848config SYS_SUPPORTS_128HZ
2849 bool
2850
2851config SYS_SUPPORTS_250HZ
2852 bool
2853
2854config SYS_SUPPORTS_256HZ
2855 bool
2856
2857config SYS_SUPPORTS_1000HZ
2858 bool
2859
2860config SYS_SUPPORTS_1024HZ
2861 bool
2862
2863config SYS_SUPPORTS_ARBIT_HZ
2864 bool
2865 default y if !SYS_SUPPORTS_24HZ && \
2866 !SYS_SUPPORTS_48HZ && \
2867 !SYS_SUPPORTS_100HZ && \
2868 !SYS_SUPPORTS_128HZ && \
2869 !SYS_SUPPORTS_250HZ && \
2870 !SYS_SUPPORTS_256HZ && \
2871 !SYS_SUPPORTS_1000HZ && \
2872 !SYS_SUPPORTS_1024HZ
2873
2874config HZ
2875 int
2876 default 24 if HZ_24
2877 default 48 if HZ_48
2878 default 100 if HZ_100
2879 default 128 if HZ_128
2880 default 250 if HZ_250
2881 default 256 if HZ_256
2882 default 1000 if HZ_1000
2883 default 1024 if HZ_1024
2884
2885config SCHED_HRTICK
2886 def_bool HIGH_RES_TIMERS
2887
2888config KEXEC
2889 bool "Kexec system call"
2890 select KEXEC_CORE
2891 help
2892 kexec is a system call that implements the ability to shutdown your
2893 current kernel, and to start another kernel. It is like a reboot
2894 but it is independent of the system firmware. And like a reboot
2895 you can start any kernel with it, not just Linux.
2896
2897 The name comes from the similarity to the exec system call.
2898
2899 It is an ongoing process to be certain the hardware in a machine
2900 is properly shutdown, so do not be surprised if this code does not
2901 initially work for you. As of this writing the exact hardware
2902 interface is strongly in flux, so no good recommendation can be
2903 made.
2904
2905config CRASH_DUMP
2906 bool "Kernel crash dumps"
2907 help
2908 Generate crash dump after being started by kexec.
2909 This should be normally only set in special crash dump kernels
2910 which are loaded in the main kernel with kexec-tools into
2911 a specially reserved region and then later executed after
2912 a crash by kdump/kexec. The crash dump kernel must be compiled
2913 to a memory address not used by the main kernel or firmware using
2914 PHYSICAL_START.
2915
2916config PHYSICAL_START
2917 hex "Physical address where the kernel is loaded"
2918 default "0xffffffff84000000"
2919 depends on CRASH_DUMP
2920 help
2921 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
2922 If you plan to use kernel for capturing the crash dump change
2923 this value to start of the reserved region (the "X" value as
2924 specified in the "crashkernel=YM@XM" command line boot parameter
2925 passed to the panic-ed kernel).
2926
2927config SECCOMP
2928 bool "Enable seccomp to safely compute untrusted bytecode"
2929 depends on PROC_FS
2930 default y
2931 help
2932 This kernel feature is useful for number crunching applications
2933 that may need to compute untrusted bytecode during their
2934 execution. By using pipes or other transports made available to
2935 the process as file descriptors supporting the read/write
2936 syscalls, it's possible to isolate those applications in
2937 their own address space using seccomp. Once seccomp is
2938 enabled via /proc/<pid>/seccomp, it cannot be disabled
2939 and the task is only allowed to execute a few safe syscalls
2940 defined by each seccomp mode.
2941
2942 If unsure, say Y. Only embedded should say N here.
2943
2944config MIPS_O32_FP64_SUPPORT
2945 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
2946 depends on 32BIT || MIPS32_O32
2947 help
2948 When this is enabled, the kernel will support use of 64-bit floating
2949 point registers with binaries using the O32 ABI along with the
2950 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2951 32-bit MIPS systems this support is at the cost of increasing the
2952 size and complexity of the compiled FPU emulator. Thus if you are
2953 running a MIPS32 system and know that none of your userland binaries
2954 will require 64-bit floating point, you may wish to reduce the size
2955 of your kernel & potentially improve FP emulation performance by
2956 saying N here.
2957
2958 Although binutils currently supports use of this flag the details
2959 concerning its effect upon the O32 ABI in userland are still being
2960 worked on. In order to avoid userland becoming dependant upon current
2961 behaviour before the details have been finalised, this option should
2962 be considered experimental and only enabled by those working upon
2963 said details.
2964
2965 If unsure, say N.
2966
2967config USE_OF
2968 bool
2969 select OF
2970 select OF_EARLY_FLATTREE
2971 select IRQ_DOMAIN
2972
2973config UHI_BOOT
2974 bool
2975
2976config BUILTIN_DTB
2977 bool
2978
2979choice
2980 prompt "Kernel appended dtb support" if USE_OF
2981 default MIPS_NO_APPENDED_DTB
2982
2983 config MIPS_NO_APPENDED_DTB
2984 bool "None"
2985 help
2986 Do not enable appended dtb support.
2987
2988 config MIPS_ELF_APPENDED_DTB
2989 bool "vmlinux"
2990 help
2991 With this option, the boot code will look for a device tree binary
2992 DTB) included in the vmlinux ELF section .appended_dtb. By default
2993 it is empty and the DTB can be appended using binutils command
2994 objcopy:
2995
2996 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
2997
2998 This is meant as a backward compatiblity convenience for those
2999 systems with a bootloader that can't be upgraded to accommodate
3000 the documented boot protocol using a device tree.
3001
3002 config MIPS_RAW_APPENDED_DTB
3003 bool "vmlinux.bin or vmlinuz.bin"
3004 help
3005 With this option, the boot code will look for a device tree binary
3006 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3007 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3008
3009 This is meant as a backward compatibility convenience for those
3010 systems with a bootloader that can't be upgraded to accommodate
3011 the documented boot protocol using a device tree.
3012
3013 Beware that there is very little in terms of protection against
3014 this option being confused by leftover garbage in memory that might
3015 look like a DTB header after a reboot if no actual DTB is appended
3016 to vmlinux.bin. Do not leave this option active in a production kernel
3017 if you don't intend to always append a DTB.
3018endchoice
3019
3020choice
3021 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3022 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3023 !MIPS_MALTA && \
3024 !CAVIUM_OCTEON_SOC
3025 default MIPS_CMDLINE_FROM_BOOTLOADER
3026
3027 config MIPS_CMDLINE_FROM_DTB
3028 depends on USE_OF
3029 bool "Dtb kernel arguments if available"
3030
3031 config MIPS_CMDLINE_DTB_EXTEND
3032 depends on USE_OF
3033 bool "Extend dtb kernel arguments with bootloader arguments"
3034
3035 config MIPS_CMDLINE_FROM_BOOTLOADER
3036 bool "Bootloader kernel arguments if available"
3037
3038 config MIPS_CMDLINE_BUILTIN_EXTEND
3039 depends on CMDLINE_BOOL
3040 bool "Extend builtin kernel arguments with bootloader arguments"
3041endchoice
3042
3043endmenu
3044
3045config LOCKDEP_SUPPORT
3046 bool
3047 default y
3048
3049config STACKTRACE_SUPPORT
3050 bool
3051 default y
3052
3053config PGTABLE_LEVELS
3054 int
3055 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3056 default 3 if 64BIT && !PAGE_SIZE_64KB
3057 default 2
3058
3059config MIPS_AUTO_PFN_OFFSET
3060 bool
3061
3062menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3063
3064config PCI_DRIVERS_GENERIC
3065 select PCI_DOMAINS_GENERIC if PCI
3066 bool
3067
3068config PCI_DRIVERS_LEGACY
3069 def_bool !PCI_DRIVERS_GENERIC
3070 select NO_GENERIC_PCI_IOPORT_MAP
3071 select PCI_DOMAINS if PCI
3072
3073#
3074# ISA support is now enabled via select. Too many systems still have the one
3075# or other ISA chip on the board that users don't know about so don't expect
3076# users to choose the right thing ...
3077#
3078config ISA
3079 bool
3080
3081config TC
3082 bool "TURBOchannel support"
3083 depends on MACH_DECSTATION
3084 help
3085 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3086 processors. TURBOchannel programming specifications are available
3087 at:
3088 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3089 and:
3090 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3091 Linux driver support status is documented at:
3092 <http://www.linux-mips.org/wiki/DECstation>
3093
3094config MMU
3095 bool
3096 default y
3097
3098config ARCH_MMAP_RND_BITS_MIN
3099 default 12 if 64BIT
3100 default 8
3101
3102config ARCH_MMAP_RND_BITS_MAX
3103 default 18 if 64BIT
3104 default 15
3105
3106config ARCH_MMAP_RND_COMPAT_BITS_MIN
3107 default 8
3108
3109config ARCH_MMAP_RND_COMPAT_BITS_MAX
3110 default 15
3111
3112config I8253
3113 bool
3114 select CLKSRC_I8253
3115 select CLKEVT_I8253
3116 select MIPS_EXTERNAL_TIMER
3117
3118config ZONE_DMA
3119 bool
3120
3121config ZONE_DMA32
3122 bool
3123
3124endmenu
3125
3126config TRAD_SIGNALS
3127 bool
3128
3129config MIPS32_COMPAT
3130 bool
3131
3132config COMPAT
3133 bool
3134
3135config SYSVIPC_COMPAT
3136 bool
3137
3138config MIPS32_O32
3139 bool "Kernel support for o32 binaries"
3140 depends on 64BIT
3141 select ARCH_WANT_OLD_COMPAT_IPC
3142 select COMPAT
3143 select MIPS32_COMPAT
3144 select SYSVIPC_COMPAT if SYSVIPC
3145 help
3146 Select this option if you want to run o32 binaries. These are pure
3147 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3148 existing binaries are in this format.
3149
3150 If unsure, say Y.
3151
3152config MIPS32_N32
3153 bool "Kernel support for n32 binaries"
3154 depends on 64BIT
3155 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3156 select COMPAT
3157 select MIPS32_COMPAT
3158 select SYSVIPC_COMPAT if SYSVIPC
3159 help
3160 Select this option if you want to run n32 binaries. These are
3161 64-bit binaries using 32-bit quantities for addressing and certain
3162 data that would normally be 64-bit. They are used in special
3163 cases.
3164
3165 If unsure, say N.
3166
3167config BINFMT_ELF32
3168 bool
3169 default y if MIPS32_O32 || MIPS32_N32
3170 select ELFCORE
3171
3172menu "Power management options"
3173
3174config ARCH_HIBERNATION_POSSIBLE
3175 def_bool y
3176 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3177
3178config ARCH_SUSPEND_POSSIBLE
3179 def_bool y
3180 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3181
3182source "kernel/power/Kconfig"
3183
3184endmenu
3185
3186config MIPS_EXTERNAL_TIMER
3187 bool
3188
3189menu "CPU Power Management"
3190
3191if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3192source "drivers/cpufreq/Kconfig"
3193endif
3194
3195source "drivers/cpuidle/Kconfig"
3196
3197endmenu
3198
3199source "drivers/firmware/Kconfig"
3200
3201source "arch/mips/kvm/Kconfig"